US 7,633,280 B2
7,471,150 B2*
12/2008
7,508,265 B2*
3/2009
............. .. 330/257
* cited by examiner
Dallas, TX (US)
(*)
Notice:
(57)
Filed:
(65)
US 2009/0179622 A1
(51)
Int. Cl.
(52)
(58)
US. Cl.
G05F 3/16
Jul. 16,2009
(2006.01)
........................................ ..
323/316
381/120;
(56)
ABSTRACT
References Cited
8/2005
7,274,256 B2 *
9/2007
Ricotti
..................... .. 330/255
10B
VDD
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US. Patent
Sheet 1 0f 3
US 7,633,280 B2
US 7,633,280 B2
1
20
25
supply conductor along With the digital logic circuit cells and
the LDO voltage regulator Which poWers them. Such large
35
capacitors.
Use of the external load bypass capacitors is costly because
of the relatively high cost of the capacitors themselves, the
costs associated With the extra required integrated circuit
40
package lead, and the cost of the additional area of the bond
CINT'
alone.
Consequently, the amount of current 11 of current source
11 must be substantially increased in order to achieve a cor
55
voltage regulator 1.
60
65
US 7,633,280 B2
4
3
There also is an unmet need for LDO voltage regulator
tance.
20
25
capacitance.
Brie?y described, and in accordance With one embodi
30
35
WDD)
45
50
US 7,633,280 B2
5
20
current I1.
The sources of input transistors MN1 are connected to tail
satisfactory performance.)
35
VSS.
50
55
lator and Without the need to use a large external load bypass
65
US 7,633,280 B2
8
lator 10.
stability.
Thus, the previously described problems of LDO voltage
25
regulator.
35
40
45
60
US 7,633,280 B2
9
10
13. The voltage regulator circuitry of claim 1 including a
method comprising:
(a) controlling the accuracy of the regulated output voltage
produced by a voltage regulator by applying the regu
put conductor;
20
25
30
35
40
45
50
65
US 7,633,280 B2
11
to an input of a class AB output stage Which generates
current; and
(c) means for supplying the load current demanded by the
load means including means for applying the decreased
12
transistor having a control electrode coupled to the out
put of the differential input stage to decrease current in a
current mirror having an output coupled to a control
electrode of an amplifying transistor, means for rapidly
turning on the amplifying transistor to cause it to rapidly
turn on a cascode transistor, and means for turning on a