MODEL
WG12232A-YGH-V
APPROVAL
SALES BY
BY:
APPROVED BY
DATA:
CHECKED BY
PREPARED BY
Contents
1.Module Classification Information
2.Precautions in use of LCD Modules
3.General Specification
4.Absolute Maximum Ratings
5.Electrical Characteristics
6.Optical Characteristics
7.Interface Description
8.Contour Drawing & Block Diagram
9.Function Description
10.Commands Description
11.Timing Characteristics
12.Quality Assurance
13.Relability
14.Backlight Information
12232
e
AY G H
f
ghi
V
j
c
d
e
f
g
Type
Display TypeHCharacter Type, GGraphic Type
Display Font122 x 32 dot
Model serials no.
Backlight Type
NWithout backlight
BEL, Blue green
ALED, Amber
DEL, Green
RLED, Red
WEL, White
OLED, Orange
FCCFL, White
GLED, Green
YLED, Yellow Green
h LCD Mode
BTN Positive, Gray
TFSTN Negative
NTN Negative,
GSTN Positive, Gray
YSTN Positive, Yellow Green
MSTN Negative, Blue
FFSTN Positive
i LCD Polarize
AReflective, N.T, 6:00
HTransflective, W.T,6:00
Type/ Temperature DReflective, N.T, 12:00
KTransflective, W.T,12:00
range/ View
GReflective, W. T, 6:00
CTransmissive, N.T,6:00
direction
JReflective, W. T, 12:00
FTransmissive, N.T,12:00
BTransflective, N.T,6:00
ITransmissive, W. T, 6:00
ETransflective, N.T.12:00
LTransmissive, W.T,12:00
j Special Code
V : Negative voltage
3.General Specification
Item
Dimension
Unit
122 x 32 dot
mm
View area
60.0 x 18.0
mm
Active area
53.64 x 15.64
mm
Dot size
0.4 x 0.45
mm
Dot pitch
0.44 x 0.49
mm
Number of Characters
Module dimension
LCD type
Duty
1/32
View direction
6 oclock
Backlight Type
Symbol
Min
Typ
Max
Unit
Operating Temperature
TOP
-20
+70
Storage Temperature
TST
-30
+80
Input Voltage
VI
VDD
VDD
6.7
VDD-VLCD
-10
5.Electrical Characteristics
Item
Supply Voltage For Logic
Symbol
Condition
Min
Typ
Max
Unit
VDD-VSS
4.75
5.0
5.25
5.6
Ta=25
4.6
Ta=+70
3.6
Ta=-20
Supply Voltage For LCD
VDD-V0
VIH
0.7VDD
VDD
VIL
0.3VDD
VOH
2.4
VOL
0.4
Supply Current
IDD
5.0
8.0
mA
6.Optical Characteristics
Item
Symbol
Condition
Min
Typ
Max
Unit
(V)
CR2
10
105
deg
(H)
CR2
-30
30
deg
CR
T rise
100
150
ms
T fall
100
150
ms
View Angle
Contrast Ratio
Response Time
Intensity
100 H
Non-selected
Conition
Selected Wave
Non-selected Wave
Non-selected
Conition
Selected Conition
Intensity
10 H
Cr Max
Cr = Lon / Loff
Vop
90 H
100 H
Tr
Driving Voltage(V)
Tf
[positive type]
[positive type]
Conditions :
Operating Voltage : Vop
Frame Frequency : 64 HZ
Viewing Angle() : 0 0
Driving Waveform : 1/N duty , 1/a bias
lc
b
c
=
p 180 X
rc
=
p 90 X
= 270 X
p
= 0 X
p
7.Interface Description
Pin No.
Symbol
Level
Description
Vss
0V
Ground
Vdd
5V
Vo
A0
H/L
H : Data L : Instruction
CS1
H/L
CS2
H/L
NC
NC
R/W
H/L
H : Read ; L : Write
10
DB0
H/L
Data bus
11
DB1
H/L
Data bus
12
DB2
H/L
Data bus
13
DB3
H/L
Data bus
14
DB4
H/L
Data bus
15
DB5
H/L
Data bus
16
DB6
H/L
Data bus
17
DB7
H/L
Data bus
18
RES
H/L
19
Vee
-5V
Negative Voltage
20
NC
P2.54*19=48.26
20- 1.0 PTH
1.8
1.5
4.0
20
14.2 MAX
9.1
2- 2.5 PTH
2- 5.0 PAD
7.0
15.0
44.0 0.5
27.2
18.0(VA)
15.64(AA)
36.0
6- 1.0 PTH
42.0
2.5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
84.0 0.5
68.2
60.0(VA)
53.64(AA)
23.5
20.0
16.0
7.9
12.0
15.18
10.2
4.0
2.5
9.9
14.5
15.68
4.0
1.6
2-R1.25 PTH
2-R2.5 PAD
79.0
LED B/L
Vss
Vdd
Vo
A0
CS1
CS2
NC
NC
R/W
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
RES
Vee
NC
0.44
0.4
0.49
0.45
DOT SIZE
122X32 DOT
80 series
or
68 series
CS1
CS2
RES
Com17~32,Seg62~122
SED 1520
or Equivalent
Bias and
Power Circuit
CL,FR
N.V.
Generator
MPU
CL
A0
R/W
E
DB0~DB7
SED 1520
or Equivalent
B/L
(Internal clock)
Com1~16,Seg1~61
A
K
Vdd
Vo
Vss
VR
10K~20K
Vee
(pin 19)
A
B/L
K
LCM
(Contrast performance may go down.)
Recommanded Value
VLED= 4.2V, ILED= 120mA
R= 6.7[(1/2 Watt)
Optional
External contrast adjustment.
9.Function Description
Block Diagram
This 12232 dots LCD Module built in two SED 1520 LSI controller.
L ine counter
D0 ~ D7
M PU
interface
A 0 , C S1 , C S2
R /W
RES
C olum e
address
register
C olum e
address
counter
D isplay D ata R A M
( DD RAM )
L C D drive circuit
T o L C D Panel
MPU interface
The SED 1520 controller transfers data via 8-bit bidirecional data buses (Do to D7), it can fit
any MPU if it corresponds to SED 1520 Read and Write Timing Characteristics.
Data transfer
The SED1520 driver uses the A0, E and R/W signals to transfer data between the system MPU
and internal registers, The combinations used are given in the table below.
A0
R/W
Function
Read status
Busy flag
When the Busy flag is logical 1, the SED1520 series is executing its internal operations. Any
command other than Status Read is rejected during this time. The Busy flag is output at pin D7
Free Datasheet http://www.datasheet4u.com/
by the Status Read command. If an appropriate cycle time (tCYC) is given, this flag needs not
be checked at the beginning of each command and, therefore, the MPU processing capacity
can greatly be enhanced.
Display Start Line and Line Count Registers
The contents of this register form a pointer to a line of data in display data RAM corresponding
to the first line of the display (COM0), and are set by the Display Start Line command.
Column Address Counter
The column address counter is a 7-bit presentable counter that supplies the column address for
MPU access to the display data RAM. See Figure 1. The counter is incremented by one
every time the driver receives a Read or Write Display Data command. Addresses above
50H are invalid, and the counter will not increment past this value. The contents of the
column address counter are set with the Set Column Address command.
Display Data RAM
The display data RAM stores the LCD display data, on a 1-bit per pixel basis. The
relation-ship between display data, display address and the display is shown in Figure 1
.
Page Register
The page register is a 2-bit register that supplies the page address for MPU access to the
display data RAM. See Figure 1. The contents of the page register are set by the Set Page
Register command.
Figure 1.
Page address
D1,D2=
0,0
0,1
1,0
1,1
DATA
Line address
D0
00H
COM0
D1
01H
COM1
D2
02H
COM2
D3
03H
COM3
D4
04H
COM4
D5
05H
COM5
D6
06H
COM6
D7
07H
COM7
D0
08H
COM8
D1
09H
COM9
D2
0AH
COM10
D3
0BH
COM11
D4
0CH
COM12
D5
0DH
COM13
D6
0EH
COM14
D7
0FH
COM15
D0
10H
COM16
D1
11H
COM17
D2
12H
COM18
D3
13H
COM19
D4
14H
COM20
D5
15H
COM21
D6
16H
COM22
D7
17H
COM23
D0
18H
COM24
D1
19H
COM25
D2
1AH
COM26
D3
1BH
COM27
D4
1CH
COM28
D5
1DH
COM29
D6
1EH
COM30
D7
1FH
COM31
Common output
4FH
4EH
4DH
3CH
3BH
3AH
06H
05H
04H
03H
02H
01H
00H
D0=0
00H
01H
02H
49H
4AH
4BH
4CH
4DH
4EH
4FH
D0=1
ADC
Coloumaddress
80
79
78
61
60
59
7
6
5
4
3
2
1
seg pin
SED1520
SED1521
The 122*32 dots display area is consisted 2 61*32,The inyerface pin CS1 enable the left 61*32
,CS2 enable the right 61*32 dots.
10.Commands Descriptions
Summary
Code
Function
Command
A0 RD WR
D7
D6
D5
D4
D3
D2
D1
D0
0/1
1:ON, 0:OFF
Display start address
Display start line
0
display.
(0 to 31)
Set page address
Set column
(segment) address
address register.
Reads the following status:
BUSY
1:Busy
0:Ready
ADC
Read status
1:CW output
0:CCW output
0
ON/OFF
1:Display off
0: Display on
RESET
1:Being reset
0:Normal
Write data
Read data
Select ADC
0/1
0/1
1:1/32, 0:1/16
Read-Modify-Write
0 Read-modify-write ON
End
0 Read-modify-write OFF
Reset
0 Software reset
Table 1
Table 1 is the command table. The SED 1520 series identifies a data bus using a
combination of A0 and R/W (RD or WR) signals. As the MPU translates a command in the
internal timing only (independent from the external clock), its speed is very high. The busy
check is usually not required.
Free Datasheet http://www.datasheet4u.com/
Display ON/OFF
A0 R/W D7
D6
D5
D4
D3
D2
D1
D0
AEH, AFH
D6
D5
D4
D3
D2
D1
D0
A4
A3
A2
A1
A0
C0H to DFH
A3
A2
A1
A0
Line Address
0
0
0
0
0
0
0
0
0
1
0
1
31
See Figure 1.
Set Page Address
This command specifies the page address that corresponds to the low address of the display
data RAM when it is accessed by the MPU. Any bit of the display data RAM can be
accessed when its page address and column address are specified. The display status is not
changed even when the page address is changed.
A0 R/W D7
D6
D5
D4
D3
D2
D1
D0
A1
A0
B8H to BBH
A1
A0
Page
0
0
1
1
0
1
0
1
0
1
2
3
See Figure 1
Set Column Address
This command specifies a column address of the display data RAM.
RAM is accessed by the MPU continuously, the column address is incremented by 1 each time
it is accessed from the set address. Therefore, the MPU can access to data continuously.
The column address stops to be incremented at address 80, and the page address is not changed
continuously.
A0 R/W D7
0
D6
D5
D4
D3
D2
D1
D0
A6
A5
A4
A3
A2
A1
A0
00H to 4FH
A5
A4
A3
A2
A1
A0
Column Address
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
79
A0
R/W
D7
D6
D5
D4
D3
D2
D1
D0
Read Status
BUSY ADC
ON/OFF RESET
Reading the command I/O register (A0=0) yields system status information.
The busy bit indicates whether the driver will accept a command or not.
Busy=1: The driver is currently executing a command or is resetting. No new command will
be accepted.
Busy=0: The driver will accept a new command.
The ADC bit indicates the way column addresses are assigned to segment drivers.
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R/W
D7
D6
D5
D4
D3
D2
D1
D0
Write data
Writes 8-bits of data into the display data RAM, at a location specified by the contents of the
column address and page address registers and then increments the column address register by
one.
Read Display Data
A0
R/W
D7
D6
D5
D4
D3
D2
D1
D0
Read data
Read 8-bits of data from the data I/O latch, updates the contents of the I/O latch with display
data from the display data RAM location specified by the contents of the column address and
page address registers and then increments the column address register.
After loading a new address into the column address register one dummy read is required
before valid data is obtained.
Select ADC
A0
R/W
D7
D6
D5
D4
D3
D2
D1
D0
AOH A1H
This
command selects the relationship between display data RAM column addresses and segment
drivers.
D=1: SEG0column address 4FH,.(inverted)
D=0: SEGOcolumn address 00H,.(normal)
This command is provided to reduce restrictions on the placement of driver ICs and routing of
traces during printed circuit board design. See Figure 1 for a table of segments and column
addresses for the two values of D.
R/W
D7
D6
D5
D4
D3
D2
D1
D0
A4H A5H
R/W
D7
D6
D5
D4
D3
D2
D1
D0
A8H A9H
This command sets the duty cycle of the LCD drive, Please set D=1, LCD duty cycle is 1/32
duty.
Read-Modify-Write
A0
R/W
D7
D6
D5
D4
D3
D2
D1
D0
E0H
This command defeats column address register auto-increment after data reads. The current
contents of the column address register are saved. This mode remains active until an End
command is received.
Operation sequence during cursor display
When the End command is entered, the column address is returned to the one used during input
of Read-Modify-Write command. This function can reduce the load of MPU when data
change is repeated at a specific display area (such as cursor blinking).
* Any command other than Data Read or Write can be used in the Read-Modify-Write mode.
However, the Column Address Set command cannot be used.
End
A0
R/W
D7
D6
D5
D4
D3
D2
D1
D0
EEH
This command cancels read-modify-write mode and restores the contents of the column
address register to their value prior to the receipt of the Read-Modify-Write command.
Reset
A0
R/W
D7
D6
D5
D4
D3
D2
D1
D0
E2H
The Reset
11.Timing Characteristics
MPU Bus Read/Write II (68-family MPU)
t CYC6
CS1,CS2
tr
t EW
t AW6
tf
t DS6
R/W
t AH6
A0
t DH6
D0 to D7
(WRITE)
t ACC6
t OH6
D0 to D7
(READ)
Symbol
Condition
Rating
Unit
Signal
Min.
Max.
1000
ns
20
ns
tAH6
10
ns
tDS6
80
ns
tDH6
10
ns
10
60
ns
90
ns
100
ns
80
ns
15
ns
Unit
Signal
tCYC6
D0 to D7
CL=100pF
tACC6
Read
tEW
pulsewidth Write
Rise and fall time
tr, tf
A0,R/W
CS
Symbol
Condition
Rating
Min.
Max.
2000
ns
40
ns
tAH6
20
ns
tDS6
160
ns
tDH6
20
ns
tCYC6
D0 to D7
20
120
ns
180
ns
200
ns
CL=100pF
tACC6
Read
A0,R/W
tEW
CS
pulsewidth Write
160
ns
15
ns
Defect
Judgment Criterion
Partition
A)Clear
Size: d mm
area
d 0.1
Disregard
0.1<d0.2
0.2<d0.3
0.3<d
1 Spots
Minor
B)Unclear
Size: d mm
area
d 0.2
Disregard
0.2<d0.5
0.5<d0.7
0.7<d
Size: d mm
area
d0.3
2 Bubbles in Polarize
Disregard
0.3<d1.0
1.0<d1.5
1.5<d
Minor
3 Scratch
Minor
remarkable.
4 Allowable Density
Minor
5 Coloration
panels.
Minor
13.Reliability
Content of Reliability Test
Environmental Test
Applicable
Test Item
Content of Test
Test Condition
Standard
80
storage
200hrs
Low Temperature
-30
storage
200hrs
High Temperature
Operation
for a long time.
Low Temperature
-20
Operation
200hrs
80,90%RH
Humidity Storage
96hrs
Operation
25
80
-30/ 80
Temperature Cycle
10 cycles
30min
5min
30min
1 cycle
Mechanical Test
10~22Hz1.5mmp-p
Endurance test applying the vibration during
22~500Hz1.5G
Vibration test
Shock test
115mbar
pressure test
40hrs
Others
VS=800V,RS=1.5k
Static electricity
test
terminal.
CS=100pF
1 time
***Supply voltage for logic system=5V. Supply voltage for LCD system =Operating voltage at 25
14.Backlight Information
PARAMETER
SYMBOL MIN
TYP
Supply Current
ILED
120
240
mA
V=4.2V
Supply Voltage
4.2
4.6
Reverse Voltage
VR
Luminous Intensity
IV
60
CD/M2 ILED=120mA
Wave Length
574
nm
ILED=120mA
Life Time
100000
Hr.
V4.6V
Color
Yellow Green
Free
Datasheet
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