Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX1538ETI
-40C to +85C
28 Thin QFN
ADAPTER
SYSTEM LOAD
Applications
ACDET
CHRG
BATSEL
RELRN
OUT2
AIRDET
ADPIN
REVBLK
OUT1
OUT0
EXTLD
BATTERY
CHARGER
MAX1538
ADPBLK
VDD
CHG_OUT
CHGIN
MINVA
CHGA
MINVB
CHGB
DISB
GND
DISA
BATB
BATTERY A
BATTERY B
BATA
BATSUP
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxims website at www.maxim-ic.com.
MAX1538
General Description
MAX1538
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VBATA = VBATB = VCHGIN = 16.8V, CVDD= 1F, VMINVA = VMINVB = 0.93V, VEXTLD = VADPIN = 28V, VCHRG = VBATSEL = VRELRN = 0,
CADPPWR = CREVBLK = CADPBLK = CDISBAT = CDISA = CDISB = CCHGA = CCHGB = 4.7nF, TA = 0C to +85C, unless otherwise noted.
Typical values are at TA = +25C.)
PARAMETER
ADPIN, EXTLD Supply Voltage
Range
CHGIN, BATA, BATB and
BATSUP Supply Voltage Range
CONDITIONS
MIN
TYP
MAX
UNITS
4.75
28.00
4.75
19.00
VADPIN = highest,
VADPPWR = high
21
50
VADPIN = highest,
VADPPWR = low
23
54
VBATA = highest,
VDISA = high
21
42
24
50
VBATB = highest,
VDISB = high
21
42
24
50
VBATSUP = highest
18
40
VADPPWR = high
0.01
0.5
VADPPWR = low
2.6
VDISA = high
3.9
6.0
VDISA = low
7.0
12
VDISB = high
3.9
6.0
VDISB = low
7.0
12
3.0
6.1
0.02
1.0
0.03
1.5
3.1
6.2
6.1
12.1
_______________________________________________________________________________________
CONDITIONS
MIN
TYP
MAX
UNITS
3.270
3.3
3.330
LINEAR REGULATOR
VDD Output Voltage
IVDD = 0 to 100A
1.0
1.0
mV / V
1
-55
-10
mV
5.5
0.1
2.0
2.03
COMPARATORS
ACDET, AIRDET Input Voltage
Range
ACDET, AIRDET Input Bias
Current
VAIRDET = VACDET = 3V
Input falling
1.97
20
0.93
2.60
-50
+50
nA
VMINV_ = 0.93V
4.605
4.65
4.695
VMINV_ = 1.5V
7.455
7.5
7.545
VMINV_ = 2.6V
12.93
13
13.07
125
VBAT_ falling
V
mV
1.90
2.0
mV
2.10
85
V
mV
18
60
15
20
70
10
55
-11.0
-9.0
VSOURCE = 4.75V to 8V
-8.00
mA
mA
-7.0
V
-3.65
_______________________________________________________________________________________
MAX1538
MAX1538
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
0.3
0.88
0.3
0.88
0.8
2.1
V
0.1
STATE OUTPUTS
OUT0, OUT1, OUT2 Sink Current
OUT0, OUT1, OUT2 Leakage
Current
VOUT_ = 0.4V
VOUT_ = 5.5V
25
VOUT_ = 5.5V
mA
0.1
TRANSITION TIMES
MINV_ Comparator Delay
tMINV
5.5
11
tADP
2.7
6.0
31
ms
10
10
tBBLANK
13
21
tTRANS
7.5
State-Machine Delay
MOSFET Turn-On Delay
50
_______________________________________________________________________________________
ns
MAX
UNITS
PARAMETER
4.75
28.00
4.75
19.00
CONDITIONS
VADPIN = highest,
VADPPWR = high
50
VADPIN = highest,
VADPPWR = low
54
42
50
42
50
VBATSUP = highest
40
1
VADPPWR = low
VADPPWR = high
VDISA = high
7.5
VDISA = low
16
VDISB = high
7.5
VDISB = low
16
9.5
1.0
1.5
10
18.5
LINEAR REGULATOR
VDD Output Voltage
IVDD = 0 to 100A
3.270
3.330
-60
-10
mV
5.5
1.94
2.06
0.93
2.60
VMINV_ = 0.93V
4.59
4.72
VMINV_ = 1.5V
7.4
7.6
VMINV_ = 2.6V
12.86
13.14
COMPARATORS
ACDET, AIRDET Input Voltage
Range
ACDET, AIRDET Trip Threshold
Input falling
VBAT_ falling
_______________________________________________________________________________________
MAX1538
ELECTRICAL CHARACTERISTICS
MAX1538
SYMBOL
CONDITIONS
VBAT_ falling
MIN
MAX
UNITS
1.88
2.12
18
20
10
-11.7
VSOURCE = 4.75V to 8V
-8.00
mA
mA
-6.5
V
-3.50
0.88
0.88
0.8
2.1
STATE OUTPUTS
OUT0, OUT1, OUT2 Sink Current
VOUT_ = 0.4V
VOUT_ = 5.5V
25
mA
TRANSITION TIMES
MINV_ Comparator Delay
tMINV
11
tADP
tBBLANK
12
31
ms
tTRANS
10
Note 1: VPIN refers to the voltage of the driver output. VSOURCE refers to the power source for the driver. ADPPWR, REVBLK, ADPBLK, DISBAT, DISA, DISB, CHGA, and CHGB gate drivers correspond to sources at ADPIN, EXTLD, EXTLD, CHGIN, BATA,
BATB, CHGIN, and CHGIN, respectively.
Note 2: Guaranteed by design. Not production tested.
_______________________________________________________________________________________
3.305
3.297
35
MAX1538 toc02
MAX1538 toc01
3.298
3.310
VDD (V)
3.295
3.294
3.300
3.295
3.293
3.292
3.290
30
25
20
15
10
5
3.291
3.285
0.05
0.10
0.15
0.20
0
-40
-20
20
40
60
80
TEMPERATURE (C)
10
12
14
16
ADAPTER INSERTION
MAX1538 toc05
4.0
MAX1538 toc04
VDD (V)
3.296
MAX1538 toc03
VADPIN
20V
VADPIN AND
10V VEXTLD
3.0
VEXTLD
VREVBLK
2.5
2.0
0V
20V V
ADPBLK
1.5
10V
tADP
VREVBLK
1.0
0V
VADPBLK
0.5
5V
VOUT1
0V
0
10
15
20
10.0s/div
_______________________________________________________________________________________
MAX1538
MAX1538
BATTERY REMOVAL
BATTERY INSERTION
MAX1538 toc07
MAX1538 toc06
CONTACT BOUNCE
10V
10V
SYSTEM LOAD = 3A
0V
0V
VBATA
0V
VOUT0
(10V/div)
0V
VEXTLD
10V
5.00ms/div
5.00ms/div
A: CONTACT BOUNCE
B: BATTERY INSERTION BLANKING TIME = 22ms
5 x MINV
20V
VEXTLD
10V
MAX1538 toc08
VBATB = 16.8V
VBATA = 10V
20V
VBATA = 10V
MAX1538 toc09
10.2V
10V
(tADP FOR t
TRANS
ADAPTER
REMOVAL
TIMING)
VDISB
tTRANS
0V
0V
VDISA
10V (10V/div)
CBATB = 1F
VDISA
0V
VOUT0
(10V/div)
SYSTEM LOAD = 3A
2.00s/div
4.00s/div
10V
0V
5V
0V
VBATSEL
VOUT0
VDISB
10V (10V/div)
20V
tTRANS
INDUCTIVE KICK
VDISA
10V (10V/div)
NO CAPACITOR
AT BATB
VBATB
AC-COUPLED
(5V/div)
2.00s/div
VOUT0
INDUCTIVE KICK
10V
SYSTEM LOAD = 3A
VBATSEL
10V VDISB
(10V/div)
20V
9.6V
10V
10V
0V
5V
0V
VEXTLD
9.8V
tMINV
VOUT0
(10V/div)
10V VDISB
(10V/div)
10V
VDISA
0V
10V VDISB
(10V/div)
10V
VDISA
0V
VBATB = 16.8V
VBATA
_______________________________________________________________________________________
VBATB
AC-COUPLED
(5V/div)
BREAK-BEFORE-MAKE TIMING
MAX1538 toc11
MAX1538 toc12
5V
OUT1
0V OUT2, OUT0
tTRANS
16V
MOSFET
TURN-OFF
TIME
MOSFET
TURN-ON
TIME
MOSFET FOR INITIAL
DISCHARGE PATH
14V
20V VADPIN
12V MOSFET
DRIVERS
10V VREVBLK
10V
8V
0V
POWER-UP TIME
20V
10V
VEXTLD
0V
1.00s/div
200s/div
Pin Description
PIN
NAME
FUNCTION
MINVA
Minimum Battery A Voltage Set Point. Battery A discharge is prevented if VBATA has fallen below 5 x
VMINVA.
MINVB
Minimum Battery B Voltage Set Point. Battery B discharge is prevented if VBATB has fallen below 5 x
VMINVB.
BATSEL
Battery-Selection Input. Drive to logic low to charge battery A or give discharge preference to battery A.
Drive to logic high to charge battery B or give discharge preference to battery B.
RELRN
CHRG
Charge-Enable Logic-Level Input. Drive CHRG high to enable the charging path from the charger to the
battery selected by BATSEL.
OUT0
OUT1
OUT2
ACDET
AC-Adapter Detection Input. When VACDET is greater than the ACDET trip threshold (2V typ), adapter
presence is detected.
10
AIRDET
Airline-Adapter Detection Input. When VAIRDET > 2V and VACDET < 2V, the airline-adapter presence is
detected. Charging is disabled when an airline adapter is detected.
11
ADPIN
Adapter Input. When VADPIN > VBATSUP, the MAX1538 is powered by ADPIN. ADPIN is the supply rail for
the ADPPWR MOSFET driver.
12
ADPPWR
Adapter-Power P-Channel MOSFET Driver. Connect ADPPWR to the gate of P1 (Figure 1). P1 disconnects
the adapter from the system during relearn mode. Exclude P1 and leave ADPPWR disconnected if relearn
is not used. ADPPWR is driven relative to ADPIN. ADPPWR and REVBLK are driven with the same control
signal.
13
REVBLK
Gate Drive for the Reverse-Blocking P-Channel MOSFET. Connect REVBLK to the gate of P2 (Figure 1). P2
enables and disables the AC adapters power path. REVBLK is driven relative to EXTLD. REVBLK and
ADPPWR are driven with the same control signal.
Selector-State Output. This open-drain output indicates the state of the MAX1538. See Table 1 for
information on decoding.
_______________________________________________________________________________________
MAX1538
MAX1538
10
PIN
NAME
14
ADPBLK
15, 21
N.C.
FUNCTION
Gate Drive for the Adapter-Blocking P-Channel MOSFET. Connect ADPBLK to the gate of P3 (Figure 1). P3
enables and disables the battery discharge path. ADPBLK is driven relative to EXTLD. ADPBLK and
DISBAT are driven with the same control signal.
Not Internally Connected
16
EXTLD
External Load. EXTLD is the supply rail for REVBLK and ADPBLK.
17
CHGIN
Charger Node Input. CHGIN is the supply rail for DISBAT, CHGA, and CHGB.
18
DISBAT
Gate Drive for the Battery-Discharge P-Channel MOSFET. Connect DISBAT to the gate of P4 (Figure 2). P4
disconnects the battery from the system load when charging from a step-up converter. Exclude P4 and
leave DISBAT disconnected if using a step-down charger. DISBAT is driven relative to CHGIN. DISBAT and
ADPBLK are driven by the same control signal.
19
CHGA
Gate Drive for the Charge Battery A P-Channel MOSFET. Connect CHGA to the gate of P6 (Figure 1). P6
enables and disables the charge path into battery A. CHGA is driven relative to CHGIN. CHGA and DISA
are driven by the same control signal.
20
CHGB
Gate Drive for the Charge Battery B P-Channel MOSFET. Connect CHGB to the gate of P7 (Figure 1). P7
enables and disables the charge path into battery B. CHGB is driven relative to CHGIN. CHGB and DISB
are driven by the same control signal.
22
BATB
Battery B Voltage Input. Battery undervoltage and absence is determined by measuring BATB. BATB is the
supply rail for DISB.
23
DISB
Gate Drive for the Discharge from Battery B P-Channel MOSFET. Connect DISB to the gate of P8 (Figure 1).
P8 enables and disables the discharge path from battery B. DISB is driven relative to BATB. DISB and
CHGB are driven by the same control signal.
24
DISA
Gate Drive for the Discharge from Battery A P-Channel MOSFET. Connect DISA to the gate of P5 (Figure 1).
P5 enables and disables the discharge path from battery A. DISA is driven relative to BATA. DISA and
CHGA are driven by the same control signal.
25
BATA
Battery A Voltage Input. Battery undervoltage and absence is determined by measuring BATA. BATA is the
supply rail for DISA.
26
BATSUP
27
GND
Ground
28
VDD
BATSUP powers the MAX1538. Diode OR BATA and BATB to BATSUP externally. ADPIN is diode
connected to BATSUP internally. Bypass with a 0.1F capacitor from BATSUP to GND.
______________________________________________________________________________________
ADAPTER
R1
R2
R3
CADAPTER
ACDET
CHRG
AIRDET
BATSEL
ADPIN
ADPPWR
FOR RELEARN
P1
MODE ONLY
RELRN
STEP-DOWN CHARGER
MAX1538
REVBLK
P2
SYSTEM LOAD
CSYS
RSNS
CHARGER INPUT
IN
EXTLD
LOGIC SUPPLY
C2
CHARGER OUTPUT
P3
ADPBLK
CCHG
OUT2
OUT
P7
P6
CHGIN
OUT1
CHGA
OUT0
VDD
CHGB
DISB
P8
P5
DISA
MINVA
BATB
CBATB
C1
0.1F
R10
R11
BATA
D1
D2
CBATA
BATSUP
GND
MINVB
R12
C3
0.1F
R13
BATTERY B
BATTERY A
______________________________________________________________________________________
11
MAX1538
R2 + R3
OUT
CADAPTER
ACDET
CHRG
AIRDET
BATSEL
ADPIN
ADPPWR
FOR RELEARN
P1
MODE ONLY
RELRN
LOGIC SUPPLY
STEP-UP CHARGER
MAX1538
CHARGER INPUT
IN
OUT2
C2
CHARGER OUTPUT
P2
OUT1
REVBLK
CCHG
SYSTEM LOAD
OUT0
OUT
EXTLD
VDD
CSYS
P3
ADPBLK
MINVA
DISBAT
P4
C1
1F
R10
R11
CHGIN
R12
P7
P6
CHGA
MINVB
CHGB
R13
DISB
GND
P8
P5
DISA
BATB
CBATB
D1
CBATA
BATTERY B
BATA
BATSUP
D2
C3
0.1F
BATTERY A
12
______________________________________________________________________________________
4R
BATB
R
BATTERY B
UNDERVOLTAGE
LATCH
Q
S
0.4V
ADPIN
ADPPWR
MINVB
EXTLD
4R
REVBLK
BATA
R
BATTERY A
UNDERVOLTAGE
LATCH
Q
S
0.4V
ADPBLK
CHGIN
MINVA
DISBAT
ACDET
CHGA
STATE
MACHINE
2V
CHGB
AIRDET
BATA
CHRG
BATSEL
RELRN
DISA
ADPIN
BATSUP
BATB
LDO
VDD
DISB
REF
GND
OUT0
OUT1
OUT2
MAX1538
N
13
Detailed Description
The MAX1538 performs power path selection between
an adapter input and two batteries, relieving the host
system from the burden of real-time response to powersource changes. The integrated selector implements a
fixed break-before-make timer to ensure that power
sources are not connected together and yet the load is
not left unserviced. The MAX1538 monitors battery and
adapter state and presence to determine which source
to select and whether to charge the battery. Logic
inputs CHRG, BATSEL, and RELRN allow the host to
enable/disable charging, select which battery to use,
and impose battery discharge even with adapter presence. The MAX1538 automatically detects airline
adapters and prevents charging when an airline
adapter is detected. Open-drain logic outputs OUT2,
On
Off
Charge A
BATSEL
BATT A
(CHGA and
DISA)
RELRN
Battery
(ADPBLK
and DISBAT)
OUT0
LOGIC INPUTS
Battery
OUT2
SOURCE STATE
CHG
MAX1538
System
(ADPPWR
and REVBLK)
On
Off
AC
On
Off
Off
On
Charge B
AC
Off
On
On
Off
Relearn A
AC
Off
On
Off
On
Relearn B
On
Off
Off
Off
AC adapter
On
Off
Off
Off
Airline
Off
On
On
Off
Discharge A
Off
On
Off
On
Discharge B
Off
Off
Off
Off
Idle
Adapter
AC
AC
Otherwise
AIR
Absent
Absent
Absent
Absent
Absent
STATE
Legend
AC
AIR
Absent
N indicates the battery is normal. The battery is normal when it has not tripped the undervoltage latch (5 x
VMINV_). See the Battery Presence and Undervoltage Detection section.
U indicates the battery has tripped the undervoltage comparator. An undervoltage battery is detected
when VBAT_ goes below 5 x VMINV_. See the Battery Presence and Undervoltage Detection section.
Otherwise covers all cases not explicitly shown elsewhere in the table.
Otherwise
X
14
X indicates dont care. The output does not depend on any inputs labeled X.
______________________________________________________________________________________
ADAPTER
SWITCH
ADAPTER
ADAPTER
SWITCH
SYSTEM
SYSTEM
BATTERY
SWITCH
CHARGER
ADAPTER
SWITCH
BATTERY
SWITCH
CHARGER
"A"
SWITCH
BATTERY
SWITCH
CHARGER
"B"
"A"
SWITCH SWITCH
"B"
"A"
SWITCH SWITCH
BATTERY B
DISCHARGE/
RELEARN
"B"
SWITCH
BATTERY A
BATTERY B
BATTERY A
BATTERY B
BATTERY A
CHARGE
SYSTEM
AC/AIR
R11
R10 + R11
R13
R12 + R13
______________________________________________________________________________________
15
MAX1538
ADAPTER
MAX1538
R1+ R2 + R3
R3
R1+ R2 + R3
R2 + R3
where VACDET_Threshold and VAIRDET_Threshold are typically 2.0V (see the Electrical Characteristics). An AC
adapter is detected when the adapter voltage is above
VAC_Threshold, and an airline adapter is detected when
EXTERNAL AC/AIRLINE
DETECTION CIRCUIT
ADAPTER
R1
R2 + R3
OUT
ADPIN
FOR AC ADAPTER
ACDET
P1
AIRDET
ADPIN
ADPPWR
ACDET
MAX1538
P2
ADAPTER REMOVAL
REVBLK
EXTLD
ADPIN
FOR AC ADAPTER
FOR AIRLINE ADAPTER
ACDET
______________________________________________________________________________________
Applications Information
MOSFET Selection
Select P-channel MOSFETs P1P8 according to their
power dissipation, R DSON , and gate charge. Each
MOSFET must be rated for the full system load current.
Additionally, the battery discharge MOSFETs (P3, P5,
P6, P7, and P8) should be selected with low on-resistance for high discharge efficiency. Since for any given
switch configuration at least half of the MOSFETs are
off, dual MOSFETs can be used without reducing the
effective MOSFET power dissipation. When using dual
ADAPTER
ADPIN
FOR RELEARN
MODE ONLY
P1
ADPPWR
MAX1538
STEP-DOWN
BATTERY CHARGER
SYSTEM LOAD
IN
P2
REVBLK
EXTLD
ADPBLK
P3
DUAL
FDS4935A
OUT
CHGIN
DUAL
FDS4935A
P7
P6
CHGB
DISB
DUAL
FDS4935A
P8
P5
Blanking
The MAX1538 implements sophisticated blanking at the
adapter and the batteries to correctly determine battery/adapter insertion and removal. Logic inputs CHRG,
RELRN, and BATSEL should be debounced to ensure
that fast repetitive transitions do not occur, in which
CHGA
DISA
BATB
BATA
BATTERY B
BATTERY A
17
MAX1538
CHG Control
Toggle CHG to enable the charge path to the battery.
Charge control is overridden by RELRN (see the Battery
Relearn Mode section) or airline mode (see the Airline
Mode and AC Adapter section). When CHG is enabled,
the MAX1538 connects the selected battery (BATSEL = 0
for battery A and BATSEL = 1 for battery B) to the charger. OUT[2:1] = 11 if the MAX1538 is in charge mode.
When the charge path is enabled, the corresponding
battery undervoltage latch is cleared. This allows charging of protected battery packs. In typical applications,
connect CHRG to VDD to reduce the system I/O.
MAX1538
t ON =
QG V1
V2 QG
+
=
0.93k
VG IOFF1 IOFF2 VG
5V QG
QG
=
0.25k
VG ION VG
ISYS _ MAX
CSYS
CADAPTER
MAX1538
1F
ADPIN
MAX1908
MAX1909 OR
MAX1535
SYSTEM LOAD
CSYS
DCIN
P2
CSSP
CSSN
REVBLK
EXTLD
C2
P3
ADPBLK
BATT
CHGIN
______________________________________________________________________________________
EXTLD
MAX1538
VSYS_MIN
tMINV OR tADP
CSOURCE
ISOURCE
tOFF
ADPBLK/REVBLK
tTRANS
tON
PARASITIC
INDUCTANCE
(LSOURCE)
REVBLK/ADPBLK
TO BATTERY
OR ADAPTER
crash, and CSYS is the total system holdup capacitance, which does not need to be near the MAX1538.
The timing related to the system holdup capacitance is
shown in Figure 8.
Charger output capacitance contributes to CSYS for the
step-down charger topology (Figure 1), but not for the
step-up/step-down charger topology (Figure 2).
Inductive Kick
When the adapter or a battery is delivering a significant
current to the system and that path is disabled (typically to enable another path), a voltage spike is generated
at the source. This is due to a parasitic inductance
shown in Figure 9. When the adapter is disconnected, a
positive voltage spike occurs at ADPIN. When a discharging battery is disconnected, a positive voltage
spike occurs at BAT_. Connect a capacitor from BAT_
or ADPIN to GND to limit this inductive kick. Choose the
source capacitance according to the following equation:
CSOURCE >
CBAT _ >
VBAT _ _ MIN
______________________________________________________________________________________
19
BATB
21 N.C.
20 CHGB
19 CHGA
BATSEL 3
MAX1538 *
RELRN 4
18 DISBAT
CHRG 5
17 CHGIN
OUT0 6
16 EXTLD
OUT1 7
15 N.C.
IBAT
*EXPOSED PADDLE
ADPBLK
10 11 12 13 14
REVBLK
19V CBAT _
20
MINVA 1
MINVB 2
ADPPWR
t Absence _ delay =
DISA
VDD
28 27 26 25 24 23 22
Battery-Absence-Detection Delay
When a selected battery is removed, the system load
quickly pulls BAT_ below 5 x V MINV_ and another
source is selected. The battery is considered present
and undervoltage until VBAT_ falls below 2V. Although
another power source is quickly switched to the system
load, capacitance at BAT_ (see the Inductive "Kick"
section) delays the detection of the removed battery. If
another battery is inserted before this delay has
passed, it is considered undervoltage. Calculate the
delay using the following equation:
DISB
Pin Configuration
where VAdapter is the AC-adapter voltage when removing an AC adapter and airline-adapter voltage when
removing an airline adapter, CADPIN is the capacitance
at ADPIN, and tBounce is the 5ms debounce time. See
the Airline Mode and AC Adapter section for a definition of V_Threshold.
BATSUP
BATA
ADPIN
V_ Threshold tBounce
C ADPIN VAdapter V_ Threshold
AIRDET
R1 + R2 + R3 <
GND
Layout
The MAX1538 selector fits in a very small layout.
Ensure that C1 is placed close to V DD and GND.
Connect the paddle to GND directly under the IC. A
complete layout example is shown in Figure 10.
OUT2
ACDET
MAX1538
THIN QFN
(5mm x 5mm)
Chip Information
TRANSISTOR COUNT: 5431
PROCESS: BiCMOS
______________________________________________________________________________________
GND
BATTERY A
GND
R11
GND
C1
R3
OUT1 7
OUT0 6
CHRG 5
RELRN 4
BATSEL 3
MINVB 2
MINVA 1
P5
10 11 12 13 14
* EXPOSED PADDLE
MAX1538
28 27 26 25 24 23 22
VDD
OUT2
R2
CBATA
GND
ACDET
BATSUP
AIRDET
BATA
ADPIN
R1
CBATSUP
R10
P8
DISA
ADPPWR
DISB
REVBLK
BATTERY B
BATB
ADPBLK
CBATB
15 N.C.
16 EXTLD
17 CHGIN
18 DISBAT
19 CHGA
20 CHGB
21 N.C.
P3
SYSTEM
P2
5
P6
P7
GND
CADAPTER
ADAPTER
CHARGER
MAX1538
GND
______________________________________________________________________________________
21
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
D2
0.15 C A
CL
D/2
PIN # 1
I.D.
QFN THIN.EPS
MAX1538
0.10 M C A B
D2/2
0.15 C B
PIN # 1 I.D.
0.35x45
E/2
E2/2
CL
(NE-1) X e
E2
k
L
DETAIL A
e
(ND-1) X e
CL
CL
L
e
0.10 C
A
0.08 C
A1 A3
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE
16, 20, 28, 32L, QFN THIN, 5x5x0.8 mm
APPROVAL
COMMON DIMENSIONS
REV.
21-0140
1
2
NOTES:
1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994.
2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.
3. N IS THE TOTAL NUMBER OF TERMINALS.
4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1
SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE
ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE.
5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm
FROM TERMINAL TIP.
6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.
7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.
8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS.
9. DRAWING CONFORMS TO JEDEC MO220.
10. WARPAGE SHALL NOT EXCEED 0.10 mm.
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE
16, 20, 28, 32L, QFN THIN, 5x5x0.8 mm
APPROVAL
REV.
21-0140
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
22 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
2004 Maxim Integrated Products
Printed USA