Data Sheet

STB6NK60Z - STB6NK60Z-1
STP6NK60ZFP - STP6NK60Z
N-channel 600 V - 1 - 6 A - TO-220/TO-220FP/D2PAK/I2PAK
Zener-Protected SuperMESH Power MOSFET
Features
Type
VDSS
RDS(on)
ID
PW
STB6NK60Z
600 V
< 1.2
6A
110 W
STB6NK60Z-1
600 V
< 1.2
6A
110 W
STP6NK60ZFP
600 V
< 1.2
6A
30 W
STP6NK60Z
600 V
< 1.2
6A
110 W
Extremely high dv/dt capability
100% avalanche tested
3
1
3
1
DPAK
TO-220
3
12
Gate charge minimized
IPAK
TO-220FP
Application
Switching applications
Figure 1.
Internal schematic diagram
Description
The SuperMESH series is obtained through an
extreme optimization of STs well established
strip-based PowerMESH layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt
capability for the most demanding applications.
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Table 1.
Device summary
Order codes
Marking
Package
Packaging
STB6NK60Z
B6NK60Z
DPAK
Tape & reel
STB6NK60Z-1
B6NK60Z
IPAK
Tube
STP6NK60ZFP
P6NK60ZFP
TO-220FP
Tube
STP6NK60Z
P6NK60Z
TO-220
Tube
November 2007
Rev 8
1/17
www.st.com
17
Contents
STB6NK60Z - STB6NK60Z-1 - STP6NK60ZFP - STP6NK60Z
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
............................ 6
Test circuit
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Packing mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
www.DataSheet4U.com
2/17
................................................ 9
Electrical ratings
Electrical ratings
Table 2.
Absolute maximum ratings

Value
Symbol
Parameter
Unit
TO-220/D/IPAK TO-220FP
VDS
Drain-source voltage (VGS = 0)
600
VGS
Gate-source voltage
30
ID
Drain current (continuous) at TC = 25 C
6 (1)
ID
Drain current (continuous) at TC = 100 C
3.8
3.8 (1)
IDM (2)
Drain current (pulsed)
24
24 (1)
PTOT
Total dissipation at TC = 25 C
110
30
Derating factor
0.88
0.24
W/C
VESD(G-S) G-S ESD (HBM C=100 pF, R=1.5 k)

dv/dt(3)
Peak diode recovery voltage slope
VISO
Insulation withstand voltage (DC)
Tj
Tstg
Operating junction temperature

Storage temperature
3500
4.5
V/ns
--
2500
-55 to 150
V
C
1. Limited only by maximum temperature allowed

2. Pulse width limited by safe operating area
3. ISD 6 A, di/dt 200 A/s, VDD = 80% V(BR)DSS
Table 3.
Thermal data
Value
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Symbol
Parameter
Unit
TO-220/D/IPAK TO-220FP
Rthj-case Thermal resistance junction-case max

Rthj-amb Thermal resistance junction-amb max
Tl
Table 4.
Symbol
Maximum lead temperature for soldering

purpose
1.14
4.2
C/W
62.5
C/W
300
Value
Unit
210
mJ
Avalanche characteristics
Parameter
IAR
Avalanche current, repetitive or not-repetitive

(pulse width limited by Tj max)
EAS
Single pulse avalanche energy

(starting TJ= 25 C, ID= IAR, VDD= 50 V)
3/17
Electrical characteristics
(TCASE=25C unless otherwise specified)
Table 5.
On/off states
Symbol
Parameter
V(BR)DSS
Drain-source
breakdown voltage
IDSS
Zero gate voltage

drain current (VGS = 0)
IGSS
ID = 1 mA, VGS = 0
Min.
Typ.
Max.
Unit
600
VDS = Max rating

VDS = Max rating, TC = 125 C
1
50
A
A
Gate-body leakage
current (VDS = 0)
VGS = 20 V
10
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 100 A
3.75
4.5
RDS(on)
Static drain-source on
resistance
VGS = 10 V, ID = 3 A
1.2
Typ.
Max.
Unit
Table 6.
Symbol
gfs (1)
Ciss
Coss
Crss
Qg
Qgs
Qgd
Dynamic
Parameter
Forward transconductance
Input capacitance
Output capacitance
Reverse transfer
capacitance
Coss eq(2). Equivalent output

capacitance
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Test conditions
Total gate charge

Gate-source charge
Gate-drain charge
Test conditions
VDS = 8 V, ID = 3 A
VDS = 25 V, f = 1 MHz,
VGS = 0
Min.
56
VDD = 480 V, ID = 6 A,
33
6
17
(see Figure 18)
pF
pF
pF
905
115
25
VGS = 0, VDS = 0 to 480 V
VGS = 10 V
pF
46
nC
nC
nC
1. Pulsed: pulse duration=300s, duty cycle 1.5%

2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS
4/17
Table 7.
Symbol
td(on)
tr
td(off)
tf
Table 8.
Symbol
Switching times
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
Min.
Typ.
Max.
14
14
47
19
VDD = 300 V, ID = 3 A
RG = 4.7 VGS = 10 V
(see Figure 17)
Unit
ns
ns
ns
ns
Source drain diode

Max
Unit
Source-drain current
ISDM(1)
Source-drain current (pulsed)
24
VSD(2)
Forward on voltage
ISD = 6 A, VGS = 0
1.6
Reverse recovery time

Reverse recovery charge
Reverse recovery current
VDD = 50 V, Tj = 150 C
ISD
trr
Qrr
IRRM
Parameter
Test conditions
Min
ISD = 6 A, di/dt = 100 A/s
Typ.
445
2.7
12
(see Figure 19)
ns
C
A
1. Pulse width limited by safe operating area

2. Pulsed: pulse duration= 300 s, duty cycle 1.5%
Table 9.
Symbol
BVGSO(1)
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Gate-source zener diode

Parameter
Gate-source breakdown
voltage
Test conditions
Min.
Eggs 1 mA (open drain)
30
Typ.
Max.
Unit
V
1. The built-in back-to-back Zener diodes have specifically been designed to enhance not only the devices
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the devices integrity. These integrated Zener diodes thus avoid the
usage of external components.
5/17
2.1
Electrical characteristics (curves)
Figure 2.
Safe operating area for TO-220/

IPAK/ DPAK
Figure 3.
Thermal impedance for TO-220/

IPAK/ DPAK
Figure 4.
Safe operating area for TO-220FP
Figure 5.
Thermal impedance for TO-220FP
Output characteristics
Figure 7.
Transfer characteristics
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Figure 6.
6/17

Figure 8.
Transconductance
Figure 9.
Static drain-source on resistance
Figure 10. Gate charge vs gate-source voltage Figure 11. Capacitance variations
Figure 12. Normalized gate threshold voltage

vs temperature
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Figure 13. Normalized on resistance vs

temperature
7/17
Figure 14. Source-drain diode forward

characteristics
Figure 16. Maximum avalanche energy vs

temperature
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8/17
Figure 15. Normalized BVDSS vs temperature
Test circuit
Test circuit
Figure 17. Switching times test circuit for

resistive load
Figure 18. Gate charge test circuit
Figure 19. Test circuit for inductive load

Figure 20. Unclamped Inductive load test
switching and diode recovery times
circuit
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Figure 21. Unclamped inductive waveform
Figure 22. Switching time waveform
9/17
Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK
packages. These packages have a Lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
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10/17
TO-220 mechanical data
mm
inch
Dim
Min
A
b
b1
c
D
D1
E
e
e1
F
H1
J1
L
L1
L20
L30
P
Q
Typ
4.40
0.61
1.14
0.49
15.25
Max
Min
4.60
0.88
1.70
0.70
15.75
0.173
0.024
0.044
0.019
0.6
10.40
2.70
5.15
1.32
6.60
2.72
14
3.93
0.393
0.094
0.194
0.048
0.244
0.094
0.511
0.137
1.27
10
2.40
4.95
1.23
6.20
2.40
13
3.50
Max
0.181
0.034
0.066
0.027
0.62
0.050
16.40
28.90
3.75
2.65
Typ
0.409
0.106
0.202
0.051
0.256
0.107
0.551
0.154
0.645
1.137
3.85
2.95
0.147
0.104
0.151
0.116
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11/17
TO-220FP MECHANICAL DATA

mm.
DIM.
MIN.
4.4
inch
TYP
MAX.
MIN.
TYP.
4.6
0.173
0.181
MAX.
0.106
2.5
2.7
0.098
2.5
2.75
0.098
0.108
0.45
0.7
0.017
0.027
0.75
0.030
0.039
F1
1.15
1.7
0.045
0.067
F2
1.15
1.7
0.045
0.067
4.95
5.2
0.195
0.204
G1
2.4
2.7
0.094
0.106
10
10.4
0.393
0.409
L2
16
0.630
L3
28.6
30.6
1.126
1.204
L4
9.8
10.6
.0385
0.417
L5
2.9
3.6
0.114
0.141
L6
15.9
16.4
0.626
0.645
9.3
0.354
0.366
3.2
0.118
0.126
L7
L3
L6
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F2
G1
F1
L7
L2
12/17
L5
1 2 3
L4
TO-262 (I2PAK) MECHANICAL DATA

mm.
inch
DIM.
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
4.40
4.60
0.173
0.181
A1
2.40
2.72
0.094
0.107
0.61
0.88
0.024
0.034
b1
1.14
1.70
0.044
0.066
0.49
0.70
0.019
0.027
c2
1.23
1.32
0.048
0.052
8.95
9.35
0.352
0.368
2.40
2.70
0.094
0.106
e1
4.95
5.15
0.194
0.202
10
10.40
0.393
0.410
13
14
0.511
0.551
L1
3.50
3.93
0.137
0.154
L2
1.27
1.40
0.050
0.055
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13/17
D2PAK MECHANICAL DATA

TO-247 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
4.4
4.6
0.173
0.181
A1
2.49
2.69
0.098
0.106
A2
0.03
0.23
0.001
0.009
0.7
0.93
0.027
0.036
B2
1.14
1.7
0.044
0.067
0.45
0.6
0.017
0.023
C2
1.23
1.36
0.048
0.053
8.95
9.35
0.352
0.368
D1
E
8
10
E1
0.315
10.4
0.393
8.5
0.334
4.88
5.28
0.192
0.208
15
15.85
0.590
0.625
L2
1.27
1.4
0.050
0.055
L3
1.4
1.75
0.055
0.068
2.4
3.2
0.094
0.126
R
V2
0.4
0
0.015
4
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14/17
Packing mechanical data
Packing mechanical data

D2PAK FOOTPRINT
TAPE AND REEL SHIPMENT

REEL MECHANICAL DATA
DIM.
mm
MIN.
A
B
1.5
12.8
20.2
24.4
100
TAPE MECHANICAL DATA

DIM.
www.DataSheet4U.com
mm
inch
MIN.
MAX.
MIN.
A0
10.5
10.7
0.413 0.421
B0
15.7
15.9
0.618 0.626
1.5
1.6
0.059 0.063
D1
1.59
1.61
0.062 0.063
1.65
1.85
0.065 0.073
11.4
11.6
0.449 0.456
K0
4.8
5.0
0.189 0.197
P0
3.9
4.1
0.153 0.161
P1
11.9
12.1
0.468 0.476
P2
1.9
2.1
0.075 0.082
inch
MAX.
MIN.
MAX.
330
12.992
13.2
0.504 0.520
26.4
0.960 1.039
0.059
0795
3.937
30.4
1.197
BASE QTY
BULK QTY
1000
1000
MAX.
50
1.574
0.25
0.35 0.0098 0.0137
23.7
24.3
0.933 0.956
* on sales type
15/17
Revision history
Revision history
Table 10.
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16/17
Document revision history
Date
Revision
Changes
14-Jan-2004
Initial electronic version
23-Aug-2005
Inserted ecopack label
04-Oct-2005
Modified header
23-May-2007
Added Figure 16: Maximum avalanche energy vs temperature
22-Nov-2007
Figure 11: Capacitance variations has been updated
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STB6NK60Z - STB6NK60Z-1

Extremely high dv/dt capability

100% avalanche tested

Gate charge minimized

Internal schematic diagram

Tape & reel

STB6NK60Z - STB6NK60Z-1 - STP6NK60ZFP - STP6NK60Z

Electrical characteristics (curves)

Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Packing mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

STB6NK60Z - STB6NK60Z-1 - STP6NK60ZFP - STP6NK60Z

Absolute maximum ratings

Drain-source voltage (VGS = 0)

Drain current (continuous) at TC = 25 C

Drain current (continuous) at TC = 100 C

Drain current (pulsed)

VESD(G-S) G-S ESD (HBM C=100 pF, R=1.5 k)

Peak diode recovery voltage slope

Insulation withstand voltage (DC)

Operating junction temperature

1. Limited only by maximum temperature allowed

Rthj-case Thermal resistance junction-case max

Maximum lead temperature for soldering

Avalanche current, repetitive or not-repetitive

Single pulse avalanche energy

STB6NK60Z - STB6NK60Z-1 - STP6NK60ZFP - STP6NK60Z

Zero gate voltage

VDS = Max rating

Gate threshold voltage

VDS = VGS, ID = 100 A

Coss eq(2). Equivalent output

Total gate charge

(see Figure 18)

VGS = 0, VDS = 0 to 480 V

1. Pulsed: pulse duration=300s, duty cycle 1.5%

STB6NK60Z - STB6NK60Z-1 - STP6NK60ZFP - STP6NK60Z

Source drain diode

Source-drain current (pulsed)

Reverse recovery time

ISD = 6 A, di/dt = 100 A/s

(see Figure 19)

1. Pulse width limited by safe operating area

Gate-source zener diode

Eggs 1 mA (open drain)

STB6NK60Z - STB6NK60Z-1 - STP6NK60ZFP - STP6NK60Z

Electrical characteristics (curves)

Safe operating area for TO-220/

Thermal impedance for TO-220/

Safe operating area for TO-220FP

Thermal impedance for TO-220FP

STB6NK60Z - STB6NK60Z-1 - STP6NK60ZFP - STP6NK60Z

Figure 12. Normalized gate threshold voltage

Figure 13. Normalized on resistance vs

STB6NK60Z - STB6NK60Z-1 - STP6NK60ZFP - STP6NK60Z

Figure 14. Source-drain diode forward

Figure 16. Maximum avalanche energy vs

Figure 15. Normalized BVDSS vs temperature

STB6NK60Z - STB6NK60Z-1 - STP6NK60ZFP - STP6NK60Z

Figure 17. Switching times test circuit for

Figure 18. Gate charge test circuit

Figure 19. Test circuit for inductive load

Figure 21. Unclamped inductive waveform

Figure 22. Switching time waveform

Package mechanical data