Intel 8086

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Intel 8086

Produced From 1978 to 1990s

Common manufacturer(s) Intel, AMD, NEC, Fujitsu,Harris (Intersil), OKI,Siemens AG, Texas I
Max. CPU clock rate
5 MHz to 10 MHz
Instruction set
x86-16
Package(s) 40 pin DIP
The 8086[1] is a 16-bit microprocessor chip designed by Intel and introduced to the market
Contents
[hide]
• 1 History
o 1.1 Background
o 1.2 The first x86 design
• 2 Details
o 2.1 Buses and operation
o 2.2 Registers and instructions
o 2.3 Flags
o 2.4 Segmentation
2.4.1 Subsequent expansion
2.4.2 Porting older software
o 2.5 Performance
o 2.6 Floating point
• 3 Chip versions
o 3.1 Derivatives and clones
• 4 Microcomputers using the 8086
• 5 Notes and references
• 6 See also
• 7 External links
[edit]History
[edit]Background
In 1972, Intel launched the 8008, the first 8-bit microprocessor[3]. It implemented an inst
Two years later, in 1974, Intel launched the 8080[4], employing the new 40-pin DIL packages
[edit]The first x86 design
The 8086 was originally intended as a temporary substitute for the ambitious iAPX 432 proje
The 8086 was sequenced[7] using a mix of random logic and microcode and was implemented usi
The architecture was defined by Stephen P. Morse and Bruce Ravenel. Jim McKevitt and John B
[edit]Details

The 8086 pin-assignments in min and max mode.

Main registers
AH AL AX (primary accumulator)
BH BL BX (base, accumulator)
CH CL CX (counter, accumulator)
DH DL DX (accumulator, other functions)
Index registers
SI Source Index
DI Destination Index
BP Base Pointer
SP Stack Pointer
Status register
15 14 13 12 11 10 9 8 7 6 5 4
- - - - O D I T S Z - A
Segment register
CS Code Segment
DS Data Segment
ES ExtraSegment
SS Stack Segment
Instruction pointer
IP Instruction Pointer

The 8086 registers

[edit]Buses and operation
All internal registers as well as internal and external data buses were 16 bits wide, firml
Some of the control pins, which carry essential signals for all external operations, had mo
[edit]Registers and instructions
The 8086 had eight (more or less general) 16-bit registers including the stack pointer, but
Due to a compact encoding inspired by 8085 and other 8-bit processors, most instructions we
Although the degree of generality of most registers were much greater than in the 8080 or 8
As mentioned above 8086 also featured 64 KB of 8-bit (or alternatively 32 K-word of 16-bit)
The processor had some new instructions (not present in the 8085) to better support stack b
[edit]Flags
8086 has a 16 bit flag register. Out of these, 9 are active, and indicate the current state
[edit]Segmentation
There were also four sixteen-bit segment registers (CS, DS, SS, ES) that allowed the CPU to
Compilers for the 8086-family commonly supported two types of pointer, near and far. Near p
To avoid the need to specify near and far on every pointer and every function which took or
In principle the address space of the x86 series could have been extended in later processo
According to Morse et al., the designers of the 8086 considered using a shift of eight bits
[edit]Subsequent expansion
The 80286's protected mode extended the processor's address space to 224 bytes (16 megabyte
The 80386 increased both the base address and the offset to 32 bits and introduced two more
The x86-64 architecture drops most support for segmentation. The segment registers still ex
In x86 versions of Microsoft Windows, the FS segment does not cover the entire address spac
[edit]Porting older software
Small programs could ignore the segmentation and just use plain 16-bit addressing. This all
[edit]Performance

Block diagram over Intel 8088 (a variant of 8086).

Although partly shadowed by other design choices in this particular chip, the multiplexed b
Execution times for typical instructions (in clock cycles):
Timings are best case, depending on prefetch status, instruction alignment, and other facto
MOV reg,reg: 2, reg,im: 4, reg,mem: 8+EA, mem,reg: 9+EA, mem,im: 10+EA cycles
ALU reg,reg: 3, reg,im: 4, reg,mem: 9+EA, mem,reg: 16+EA, mem,im: 17+EA cycles
JMP reg: 11, JMP label: 15, Jcc label: 16 (cc = condition code)
MUL reg: 70..118 cycles
IDIV reg: 101..165 cycles
EA: time to compute effective address, ranging from 5 to 12 cycles.
As can be seen from these tables, operations on registers and immediates were fast (between
Loosely coupled fetch and execution units are efficient for instruction prefetch, b
No dedicated address calculation adder was afforded; the microcode routines had to
The address and data buses were multiplexed, forcing a slightly longer (33~50%) bus
It should be noted, however, that memory access performance was drastically enhanced with I
[edit]Floating point
The 8086/8088 could be connected to a mathematical coprocessor to add floating point capabi
[edit]Chip versions
The clock frequency was originally limited to 5 MHz (IBM PC used 4.77 MHz, 4/3 the standard
[edit]Derivatives and clones

Soviet clone KP1810BM86.

OKI M80C86A QFP-56

Compatible and, in many cases, enhanced versions were manufactured by Fujitsu, Harris/Inter
The electronics industry of the Soviet Union was able to replicate the 8086 through both in
[edit]Microcomputers using the 8086
One of the most influential microcomputers of all, the IBM PC, used the Intel 8088,
The first commercial microcomputer built on the basis of the 8086 was the Mycron 20
The IBM Displaywriter[citation needed] word processing machine and the Wang Profess
The first Compaq Deskpro used an 8086 running at 7.14 MHz, but was capable of runni
The FLT86 is a well established training system for the 8086 CPU still being manufa
The IBM PS/2 models 25 and 30 were built with an 8MHz 8086
The Tandy 1000 SL-series machines used 8086 CPUs.
The Amstrad PC1512, PC1640, and PC2086 all used 8086 CPUs at 8MHz.
As of 2002, NASA was still using original 8086 CPUs on equipment for ground-based m

8086 interview questions

By admin | January 9, 2005
1. What are the flags in 8086? - In 8086 Carry flag, Parity flag, Auxiliary carry flag
2. What are the various interrupts in 8086? - Maskable interrupts, Non-Maskable interr
3. What is meant by Maskable interrupts? - An interrupt that can be turned off by the
4. What is Non-Maskable interrupts? - An interrupt which can be never be turned off (i
5. Which interrupts are generally used for critical events? - Non-Maskable interrupts
6. Give examples for Maskable interrupts? - RST 7.5, RST6.5, RST5.5 are Maskable inter
7. Give example for Non-Maskable interrupts? - Trap is known as Non-Maskable interrupt
8. What is the Maximum clock frequency in 8086? - 5 Mhz is the Maximum clock frequency
9. What are the various segment registers in 8086? - Code, Data, Stack, Extra Segment
10. Which Stack is used in 8086? - FIFO (First In First Out) stack is used in 8086.In t
11. What are the address lines for the software interrupts? -

RST 0 0000 H
RST1 0008 H
RST2 0010 H
RST3 0018 H
RST4 0020 H
RST5 0028 H
RST6 0030 H
RST7 0038 H
12. What is SIM and RIM instructions? - SIM is Set Interrupt Mask. Used to mask the har
13. Which is the tool used to connect the user and the computer? - Interpreter is the t
14. What is the position of the Stack Pointer after the PUSH instruction? - The address
15. What is the position of the Stack Pointer after the POP instruction? - The address
16. Logic calculations are done in which type of registers? - Accumulator is the regist
17. What are the different functional units in 8086? - Bus Interface Unit and Execution
18. Give examples for Micro controller? - Z80, Intel MSC51 &96, Motorola are the best e
19. What is meant by cross-compiler? - A program runs on one machine and executes on an
20. What are the address lines for the hardware interrupts? -

RST 7.5 003C H

RST 6.5 0034 H
RST 5.5 002C H
TRAP 0024 H
21. Which Segment is used to store interrupt and subroutine return address registers? -
22. Which Flags can be set or reset by the programmer and also used to control the oper
23. What does EU do? - Execution Unit receives program instruction codes and data from
24. Which microprocessor accepts the program written for 8086 without any changes? - 80
25. What is the difference between 8086 and 8088? - The BIU in 8088 is 8-bit data bus &

Intel 8086 microprocessor architecture

Related links
8086 family
All CPU architectures
Memory
Program, data and stack memories occupy the same memory space. The total addressable memory
16-bit pointers and data are stored as:
address: low-order byte
address+1: high-order byte
32-bit addresses are stored in "segment:offset" format as:
address: low-order byte of segment
address+1: high-order byte of segment
address+2: low-order byte of offset
address+3: high-order byte of offset
Physical memory address pointed by segment:offset pair is calculated as:
address = (<segment> * 16) + <offset>
Program memory - program can be located anywhere in memory. Jump and call instructions can
Data memory - the processor can access data in any one out of 4 available segments, which l
Word data can be located at odd or even byte boundaries. The processor uses two memory acce
Stack memory can be placed anywhere in memory. The stack can be located at odd memory addre
Reserved locations:
• 0000h - 03FFh are reserved for interrupt vectors. Each interrupt vector is a 32-bit
• FFFF0h - FFFFFh - after RESET the processor always starts program execution at the
Interrupts
The processor has the following interrupts:
INTR is a maskable hardware interrupt. The interrupt can be enabled/disabled using STI/CLI
NMI is a non-maskable interrupt. Interrupt is processed in the same way as the INTR interru
Software interrupts can be caused by:
• INT instruction - breakpoint interrupt. This is a type 3 interrupt.
• INT <interrupt number> instruction - any one interrupt from available 256 interrupt
• INTO instruction - interrupt on overflow
• Single-step interrupt - generated if the TF flag is set. This is a type 1 interrupt
• Processor exceptions: divide error (type 0), unused opcode (type 6) and escape opco
Software interrupt processing is the same as for the hardware interrupts.
I/O ports
65536 8-bit I/O ports. These ports can be also addressed as 32768 16-bit I/O ports.
Registers
Most of the registers contain data/instruction offsets within 64 KB memory segment. There a
Code segment (CS) is a 16-bit register containing address of 64 KB segment with processor i
Stack segment (SS) is a 16-bit register containing address of 64KB segment with program sta
Data segment (DS) is a 16-bit register containing address of 64KB segment with program data
Extra segment (ES) is a 16-bit register containing address of 64KB segment, usually with pr
It is possible to change default segments used by general and index registers by prefixing
All general registers of the 8086 microprocessor can be used for arithmetic and logic opera
Accumulator register consists of 2 8-bit registers AL and AH, which can be combined togethe
Base register consists of 2 8-bit registers BL and BH, which can be combined together and u
Count register consists of 2 8-bit registers CL and CH, which can be combined together and
Data register consists of 2 8-bit registers DL and DH, which can be combined together and u
The following registers are both general and index registers:
Stack Pointer (SP) is a 16-bit register pointing to program stack.
Base Pointer (BP) is a 16-bit register pointing to data in stack segment. BP register is us
Source Index (SI) is a 16-bit register. SI is used for indexed, based indexed and register
Destination Index (DI) is a 16-bit register. DI is used for indexed, based indexed and regi
Other registers:
Instruction Pointer (IP) is a 16-bit register.
Flags is a 16-bit register containing 9 1-bit flags:
• Overflow Flag (OF) - set if the result is too large positive number, or is too smal
• Direction Flag (DF) - if set then string manipulation instructions will auto-decrem
• Interrupt-enable Flag (IF) - setting this bit enables maskable interrupts.
• Single-step Flag (TF) - if set then single-step interrupt will occur after the next
• Sign Flag (SF) - set if the most significant bit of the result is set.
• Zero Flag (ZF) - set if the result is zero.
• Auxiliary carry Flag (AF) - set if there was a carry from or borrow to bits 0-3 in
• Parity Flag (PF) - set if parity (the number of "1" bits) in the low-order byte of
• Carry Flag (CF) - set if there was a carry from or borrow to the most significant b
Instruction Set
8086 instruction set consists of the following instructions:
• Data moving instructions.
• Arithmetic - add, subtract, increment, decrement, convert byte/word and compare.
• Logic - AND, OR, exclusive OR, shift/rotate and test.
• String manipulation - load, store, move, compare and scan for byte/word.
• Control transfer - conditional, unconditional, call subroutine and return from subr
• Input/Output instructions.
• Other - setting/clearing flag bits, stack operations, software interrupts, etc.
Addressing modes
Implied - the data value/data address is implicitly associated with the instruction.
Register - references the data in a register or in a register pair.
Immediate - the data is provided in the instruction.
Direct - the instruction operand specifies the memory address where data is located.
Register indirect - instruction specifies a register containing an address, where data is l
Based - 8-bit or 16-bit instruction operand is added to the contents of a base register (BX
Indexed - 8-bit or 16-bit instruction operand is added to the contents of an index register
Based Indexed - the contents of a base register (BX or BP) is added to the contents of an i
Based Indexed with displacement - 8-bit or 16-bit instruction operand is added to the conte

Microprocessor 8086
Posted by Hafsal
Friday, November 7, 2008
Background
In 1972, Intel launched the 8008, the first 8-bit microprocessor. It implemented an instruc
Two years later, in 1974, Intel launched the 8080, employing the new 40-pin DIL packages or
The first x86 design
The 8086 was originally intended as a temporary substitute for the ambitious iAPX 432 proje
The 8086 was sequenced using a mix of random logic and microcode and was implemented using
The architecture was defined by Stephen P. Morse and Bruce Ravenel. Peter A.Stoll was lead
Architecture

Pin Diagram

Details

Buses and operation

All internal registers as well as internal and external data buses were 16 bits wide, firml
Some of the control pins, which carry essential signals for all external operations, had mo
Registers and instructions
The 8086 had eight (more or less general) 16-bit registers including the stack pointer, but
Due to a compact encoding inspired by 8085 and other 8-bit processors, most instructions we
Although the degree of generality of most registers were much greater than in the 8080 or 8
As mentioned above 8086 also featured 64 KB of 8-bit (or alternatively 32 K-word or 16-bit)
The processor had some new instructions (not present in the 8085) to better support stack b
Segmentation
There were also four sixteen-bit segment registers (CS, DS, SS, ES, standing for "code segm
Compilers for the 8086 commonly supported two types of pointer, "near" and "far". Near poin
To avoid the need to specify "near" and "far" on every pointer and every function which too
In principle the address space of the x86 series could have been extended in later processo
According to Morse et al, the designers of the 8086 considered using a shift of eight bits

Interview Questions
1.What are the flags in 8086?
- In 8086 Carry flag, Parity flag, Auxiliary carry flag, Zero flag, Overflow flag, Trace fl
2.What are the various interrupts in 8086?
- Maskable interrupts, Non-Maskable interrupts.
3.What is meant by Maskable interrupts?
- An interrupt that can be turned off by the programmer is known as Maskable interrupt.
4.What is Non-Maskable interrupts?
An interrupt which can be never be turned off (ie.disabled) is known as Non-Maskable inter
5.Which interrupts are generally used for critical events?
- Non-Maskable interrupts are used in critical events. Such as Power failure, Emergency, Sh
6.Give examples for Maskable interrupts?
- RST 7.5, RST6.5, RST5.5 are Maskable interrupts
7.Give example for Non-Maskable interrupts?
- Trap is known as Non-Maskable interrupts, which is used in emergency condition.
8.What is the Maximum clock frequency in 8086?
- 5 Mhz is the Maximum clock frequency in 8086.
9.What are the various segment registers in 8086?
- Code, Data, Stack, Extra Segment registers in 8086.
10.Which Stack is used in 8086?
- FIFO (First In First Out) stack is used in 8086.In this type of Stack the first stored in
11.What are the address lines for the software interrupts? -

12.What is SIM and RIM instructions?

- SIM is Set Interrupt Mask. Used to mask the hardware interrupts. RIM is Read Interrupt M
13.Which is the tool used to connect the user and the computer?
- Interpreter is the tool used to connect the user and the tool.
14.What is the position of the Stack Pointer after the PUSH instruction?
- The address line is 02 less than the earlier value.
15.What is the position of the Stack Pointer after the POP instruction?
- The address line is 02 greater than the earlier value.
16.Logic calculations are done in which type of registers?
- Accumulator is the register in which Arithmetic and Logic calculations are done.
17.What are the different functional units in 8086?
- Bus Interface Unit and Execution unit, are the two different functional units in 8086.
18.Give examples for Micro controller?
- Z80, Intel MSC51 &96, Motorola are the best examples of Microcontroller.
19.What is meant by cross-compiler?
- A program runs on one machine and executes on another is called as cross-compiler.
20.What are the address lines for the hardware interrupts? -

21.Which Segment is used to store interrupt and subroutine return address registers?
- Stack Segment in segment register is used to store interrupt and subroutine return addres
22.Which Flags can be set or reset by the programmer and also used to control the operation
- Trace Flag, Interrupt Flag, Direction Flag.
23.What does EU do?
- Execution Unit receives program instruction codes and data from BIU, executes these instr
24.Which microprocessor accepts the program written for 8086 without any changes?
- 8088 is that processor.
25.What is the difference between 8086 and 8088?
- The BIU in 8088 is 8-bit data bus & 16- bit in 8086.Instruction queue is 4 byte long in 8