PLANNING AN ADVANCED
TECHNICAL PROJECT REPORT
Topic:
Student:
TRUONG TUAN VU
STUDENT ID: U1469803
Instructor: DR B.MEHRDADI
CONTENTS
CONTENTS ................................................................................................................1
LIST OF FIGURES.....................................................................................................2
LIST OF TABLES ......................................................................................................3
Chapter 1.
Introduction .........................................................................................4
1.1.
Aims...............................................................................................................4
1.2.
Chapter 2.
Background .........................................................................................5
2.1.
2.2.
2.3.
2.4.
Chapter 3.
3.1.
3.2.
3.2.1.
3.2.2.
Programming Devices...........................................................................12
Chapter 4.
Chapter 5.
REFERENCES ..........................................................................................................18
LIST OF FIGURES
Figure 2.1: Signal on 2 wires of RS485 bus ...............................................................6
Figure 2.2: Twisted pair wires ....................................................................................6
Figure 2.3: RS485 network .........................................................................................7
Figure 2.4: Transmit status and control register[2] .....................................................8
Figure 2.5: Receive status and control register[2] ......................................................8
Figure 3.1: Network structure .....................................................................................9
Figure 3.2: Work breakdown structure .....................................................................10
Figure 3.3: MAX485 Top view [3] ...........................................................................11
Figure 3.4: Typical application circuit [3] ................................................................12
Figure 3.5: Message format from master and slave ..................................................13
Figure 3.6: Working principle of master ...................................................................13
Figure 3.7: Working principle of slave devices ........................................................14
Figure 4.1: Gantt chart of project plan ......................................................................15
LIST OF TABLES
Table 3.1: MAX485 Pin description [3] ...................................................................11
Table 5.1: Project resources ......................................................................................17
Chapter 1. Introduction
1.1.
Aims
The main purpose of this project is to create a network of a number of
identical PIC boards using RS485 connection. A master PIC will control the traffic
across the network. Slave PICs will gather information and execute actions when
there is command from the master.
1.2.
Project Specifications
Chapter 2. Background
This section describes the background knowledge about RS485 standard,
RS485 network and UART connection of PIC16F877A.
2.1.
the device. The significant features of RS485 is that it can support a network of up
to 32 stations on the same line, the baud rate can be up to 115.200 for a distance of
4000 feet (1200m). RS485 is used widely in industrial environments where noise is
high and the stability of the system is important.
With balanced transfer mode and the wires are twisted together, when noise
occurs in one wire, it also occurs in the others, i.e the two wires have the same
noise. This makes the voltage difference between the two wires change slightly.
Therefore, the receiver can receive signal properly by special features of the driver
that eliminates noise.
The balanced transmission system includes two signal wires A and B but no
ground wire. The reason is called the balanced system is that the signal in one wire
is reverse with the signal on the other. This means that if signal in wire A is at high
level, the signal in wire B must be at low level and vice versa.
With 2 balanced wires, the high TTL level signal is defined when the voltage
of wire A is higher than the voltage of wire B at least 200 mV. The low TTL level
signal is defined if the voltage of wire A is smaller than wire B at least 200 mV. If
VAB is in range from -200 mV to 200 mV, the signal is considered as in unstable
area.
2.2.
RS485 Network
This protocol allows a number of microcontrollers to be linked using a
2.3.
a check block behind the data blocks. CRC is a powerful technique to detect faults,
so it is widely used in all data communication system. The error detection using
CRC is very simple. In the transmission, the CRC is calculated based on the
information bytes and sent along. When the receiving ends, the receiver calculates
the CRC from information byte and compares with received CRC byte. If 2 CRC
bytes are same, the information is considered to have been received correctly. If the
two do not match, it indicates that there are errors in transmission.
Generally, CRC calculation is like arithmetic division where the quotient is
not cared and the remainder is the result. The difference is that CRC calculation
uses carry-less arithmetic. However, this calculation method is computationally
intensive. The easiest CRC is to exclusive OR each data byte with the next.
2.4.
UART Connection
The UART connection of microcontroller PIC16F877A is configured and
controller by some register: TXSTA (Transmit status and control register), RCSTA
(Receive status and control register) and SPBRG (Baud rate generator register)
The detailed functions of each register are shown in pictures below.
16 ( + 1)
3.1.
Problem Analysis
The main purpose of this project is to design a PIC network using RS485
3.2.
Proposed Solution
Name
RO
Function
Receive output: if A > B by 200mV, RO will be high; if A < B
by 200mV, RO will be low.
RE
is low; RO is
Receiver Output Enable. RO is enabled when RE
high impedance when
RE is high.
DE
DI
GND
Ground
Vcc
11
12
In contrast, the slave devices start with receiver mode to listen from the
master. After finishing receiving message, if the address is matched, they will
execute the request and switch to transmission mode to send the message back to
master device and then switch back to receiver mode. This process is also repeated
continually.
14
15
Until now, some activities were already finished such as researching relevant
knowledge, purchasing MAX485 chip and building test circuit on project board.
This test circuit will be used to test the connection between 2 devices. If this circuit
works, the PCB will be designed. After testing with 2 devices, the program will be
developed and tested for 3, 4 and 5 devices.
The planned finish date is 14th July, so there is a great deal of time for coping
with unexpected events before the submission date.
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Function
Source
Cost
Embedded
Free
boards
system
laboratory
MAX485
Driver chip
Electronic
components
circuit
Free
laboratory
Embedded
PIC
system
microcontroller
Free
laboratory
5
Proteus software
Free
whole system
Design PCB
There is not any ethical or legal issue that might be relevant to this project.
17
REFERENCES
[1] RS-485. Retrieved from http://en.wikipedia.org/wiki/RS-485
[2]
Microchip
PIC16F87XA
datasheet.
Retrieved
from
http://akizukidenshi.com/download/PIC16F87XA.pdf
[3]
MAX485
datasheet.
http://3egadgets.com/attachment.php?id_attachment=23
18
Retrieved
from