Service Guide
Service guide files and updates are available
on the CSD web: for more information,
Please refer to http: csd.acer.com.tw
Table of Contents
Chapter 1 Monitor Features.. 8
1.1 Test Conditions. 8
1.2 Features..... 8
1.3 LCD Panel Specification... 9
Chapter 4 Troubleshooting....27
4.1 Abnormal display Troubleshooting.. .27
4.2 Abnormal (On/Off, LCD Display, K/B) Troubleshooting...29
4.3 Abnormal (BIOS, OSD, Other Display) Troubleshooting. .30
4.4 Audio Abnormal.....31
Monitor Features
Chapter 1
Condition
Normal room temperature (252)
5010%
100V2V, 1202V, 60Hz / 2402V, 50Hz
Maximum with OSD setting
Middle with OSD setting
1680 x 1050 @60HZ
With OSD setting. (For TCO03 CCT test condition requirement, the brightness
setting on OSD shall be adjusted to meet 125 nit.)
Minolta CS-1000T Spectrometer and Photometer CA-210 or equivalent
Before measuring, Auto Adjust & Auto Balance must be done in advance
1.2 Features
22 wide WSXGA+ TFT LCD Panel
TN Mode Liquid Crystal
D-SUB/ DVI-D Input
Audio Function (Optional)
Support to 75Hz Refresh Rate
Support VESA-DCC 2B plug & play function
Support VESA-DPMS & DVI DMPM Power Management Function
Super Wide Viewing Angle
High Brightness & Contrast Ratio
High Brightness & Contrast Angular Dependent
Fast LC Response Time
Light Weight
Technical Specification
LCD panel
Graphic
Performance
Item
Active Area
Driver Element
Pixel Number
Pixel Pitch
Pixel Arrangement
Display Color
Transmissive Mode
Viewing Angle (H / V)
Brightness
Contrast Ratio
LC Response Time (Tr+Tf)
Separate Sync.
Horizontal Sync.
Vertical Sync.
Input Connector
Auto Adjust
Screen Scaling
Power Management
Color Adjustment
OSD Language
Specification
473.76 (H) x 296.1 (V) (22 wide diagonal)
a-si TFT Active Matrix
1680 x R.G.B. x 1050
0.282 (H) x 0.282 (V)
RGB Vertical Stripe
16.2M
Normally White
Typical 170 / 160
Typical 300
Unit
mm
pixel
mm
color
degree
2
cd/m
Typical 700
5 (Tr: 2 + Tf: 3)
TTL Level
Positive / Negative
Positive / Negative
D-Sub mini 15 pins, DVI-D 24 pins
Clock, Phase, H Position & V Position
VGA/SVGA/XGA/SXGA Full Screen Display
msec
-
W
W
W
degree
mm, kg
-
2W (max.)
N.A.
W
W
Function key
Function
V
Hz
mA
A
(1)
Normal
x = y = 0
yX- = 90
y+
x-
y+
x-
6 oclock
y- = 90
12 oclock direction
y+ = 90
x+
y-
x+
10
X+ = 90
(2)
: test point
X (Minolta CA-210)
Active area
Formula: Maximum [L (1), L (2), L (3), L (4), L (5), L (6), L (7), L (8), L (9), L (10), L (11),
L (12), L (13)]/Minimum [L (1), L (2), L (3), L (4), L (5), L (6), L (7), L (8), L (9), L (10),
L (11), L (12), L (13)]
11
(3)
100%
90%
Optical
Response
Gray Level 0
10%
0%
Time
TF
TR
66.67m
66.67ms
12
OPERATING INSTRUCTIONS
Chapter 2
2.1 Function Name
2.1.1 Front
No.
Key
Descriptions
Normal operation
Power Management
Power on
Power off
1`
LED
Indicator
Green
Orange
13
2.1.2 Back
No.
Name
Descriptions
D-Sub
DVI-D
10
AC-IN
AC Power Jack
11
Lock hole
Kensington
14
3. +/
adjustment
: Used to select the OSD function; when there is OSD menu, used to increase
function value.
Enter brightness control function directly when there is no OSD menu.
4. / : Used to select the OSD function; when there is OSD menu, used to decrease
function value.
Enter contract control function directly when there is no OSD menu.
6. Menu: Use to display OSD menu; when there is OSD menu, used to execute OSD
function or enter next layer of OSD menu; if executing OSD function, exit OSD
function and save the value adjusted.
15
OSD Setting
Auto Adjustment
Message
Restore
Exit
The OSD disappears several seconds after you stop pressing the buttons while
performing an adjustment.
Any changes are automatically saved in the memory when the OSD disappears.
Turning off the power should be avoided while using the menu.
Adjustments for clock, phase and positions are saved for each signal timing. Except for
these adjustments, all other adjustments have only one setting, which applies to all
signal timings.
The color will change from white to pink while the function is selected.
16
Secondary
Directory Items
Contrast
Brightness
Description
Adjust the contrast between the foreground and
background of an image on the screen
Adjust the background brightness of the screen
N/A
N/A
User Definition/Red
User
Definition/Green
User
Definition/Blue
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
English
Deutsch
Francis
Espanola
Italian
Horizontal
Vertical
N/A
N/A
Auto Adjustment
Analog
Digital
Select the input source you want (for DVI Input only)
Message
Restore
N/A
N/A
Exit
N/A
17
18
MACHINE DISASSEMBLY
AND ASSEMBLY
Chapter 3
Picture
Description
Push the hooks and stand bottom away
Completed
19
Completed
Remove FFC
Completed
Remove Cover AD
Completed
20
Completed
Completed
21
Remove FFC
Remove AD PCBA
Completed
22
23
Completed
Completed
Fasten 2 screws
Fasten 4 screws
24
Fasten 2 screws
Completed
Fasten 2 screws
Completed
Completed
25
Fasten 5 screws
Completed
26
Troubleshooting
Chapter 4
27
28
29
31
Connector Information
Chapter 5
3.3V
DVI-D
Digital Video
13.8V
Main Board
D-sub
Analog Video
LCD Module
Signal
LDO
DC-5V
AC Power
DC-13.8V
LIPS
Backlight
32
Pin No.
Pin Function
Pin No.
Pin Function
1
2
9
10
NC
Ground
11
No connection
NC
12
(SDA)
Ground
13
6
7
8
14
15
Vertical sync
(SCL)
5.3 DC Connector
33
Chapter 6
Part List
Picture
Vendor
Part No.
35-D003068
Lips
27-D008552
35-D007790
CABLES
32-D009095
CABLE
MONITOR
CABLE
FFC,CFC2128/862P0600 32-D008479
68D,36 Pins
Accessory Cable,DSub,BLACK
34
32F3018003
Picture
Vendor Part
No.
STAND
BASE
Stand Assy,A220Z1H02,
40-D009177
LCD
FRONT
BEZEL
Bezel Assy,A220Z1-H02
40-D009188
LCD BACK
COVER
Rear Assy,A220Z1-H02
40-D009181
40-D009177
Hinge Cover
Cover Hinge
Assy,A220Z1-H02
40-D009185
Support
Plate
Support Plate,A220Z1H02
41-D009178
Cover AD
Cover AD Assy,A190A2
41-D008025
35
36
Item
Qty
Parts Name
PANEL_ASSY_A220Z1-L01
1
1
PCBA for,A220Z1-Z01-T
FFC,CFC2128/862P060068D,36 Pins
SCREW,M3,P=0.5mm, L=2.5mm
1
2
3
SCREW,M3,P=0.5mm, L=4mm
SCREW,M4 ,P=0.7mm, L=8mm
13
1
10
FFC,15Pins,A220Z1-H02,OSD
11
Cover AD Assy,A190A2
12
13
Support Plate,A220Z1-H02
14
Bezel Assy,A220Z1-H02
15
16
Rear Assy,A220Z1-H02
17
SCREW_M3*8L_PWH_PHC
18
19
Stand Assy,A220Z1-H02
20
21
22
Seat Assy,A220Z1-H02
4
5
6
7
8
37
Schematic Diagram
Chapter 7
38
5
4
RESET_MCU
RESET_MCU
DDC_DAT
DDC_CLK
DDC_DAT
DDC_CLK
RTD_SCSB
RTD_SCLK
DDC_DAT
DDC_CLK
B3
BUS_POEWR
DDC2_SCL
DDC2_SDA
BUS_POEWR
DDC2_SCL
DDC2_SDA
3
2
GNDB
GNDG
GNDR
SOG
BIN
GIN
RIN
YOUT
YOUT
V18_ESD
RTD_SCSB
RTD_SCLK
VSYNC
HSYNC
RTD_SCSB
RTD_SCLK
FR2P
FR2N
FR1P
FR1N
FR0P
FR0N
FG2P
FG2N
FG1P
FG1N
FG0P
FG0N
FB2P
FB2N
FB1P
FB1N
FB0P
FB0N
BR2P
BR2N
BR1P
BR1N
BR0P
BR0N
STB
POL
STV
CKV
OE
VCM_PWM
INV_ADJ
VOL_ADJ
GVOFF
GVON
FSTHI
BSTHI
RTD_SDIO0
RTD_SDIO1
RTD_SDIO2
RTD_SDIO3
GNDB
GNDG
GNDR
SOG
BIN
GIN
RIN
RESET_RTD
GNDB
GNDG
GNDR
SOG
BIN
GIN
RIN
RTD_SDIO0
RTD_SDIO1
RTD_SDIO2
RTD_SDIO3
RX2P
RX2N
RX1P
RX1N
RX0P
RX0N
RXCP
RXCN
RESET_RTD
VSYNC
HSYNC
RX2P
RX2N
RX1P
RX1N
RX0P
RX0N
RXCP
RXCN
03_MCU
STB
POL
STV
CKV
OE
VCM_PWM
INV_ADJ
VOL_ADJ
GVOFF
GVON
FSTHI
BSTHI
FR2P
FR2N
FR1P
FR1N
FR0P
FR0N
FG2P
FG2N
FG1P
FG1N
FG0P
FG0N
FB2P
FB2N
FB1P
FB1N
FB0P
FB0N
BR2P
BR2N
BR1P
BR1N
BR0P
BR0N
BG2P
BG2N
BG1P
BG1N
BG0P
BG0N
BB2P
BB2N
BB1P
BB1N
BB0P
BB0N
STB
POL
STV
CKV
OE
VCM_PWM
INV_ADJ
VOL_ADJ
GVOFF
GVON
FSTHI
BSTHI
FR2P
FR2N
FR1P
FR1N
FR0P
FR0N
FG2P
FG2N
FG1P
FG1N
FG0P
FG0N
FB2P
FB2N
FB1P
FB1N
FB0P
FB0N
BR2P
BR2N
BR1P
BR1N
BR0P
BR0N
BG2P
BG2N
BG1P
BG1N
BG0P
BG0N
BB2P
BB2N
BB1P
BB1N
BB0P
BB0N
BCKP
BCKN
FCKP
FCKN
PWR_SW
PANEL_ON/OFF
AUTO_ADJ
SOURCE_SELECT
KEY_UP
KEY_DOWN
MENU
LED_ORG
LED_GRN
VSYNC
HSYNC
RX2P
RX2N
RX1P
RX1N
RX0P
RX0N
RXCP
RXCN
PWR_SW
PANEL_ON/OFF
AUTO_ADJ
SOURCE_SELECT
KEY_UP
KEY_DOWN
MENU
BCKP
BCKN
FCKP
FCKN
AUDIO_FUNCTION
INV_ON/OFF
LED_ORG
LED_GRN
BG2P
BG2N
BG1P
BG1N
BG0P
BG0N
RESET_RTD
AUDIO_FUNCTION
INV_ON/OFF
MUTE
DCDC_ON/OFF
BB2P
BB2N
BB1P
BB1N
BB0P
BB0N
BCKP
BCKN
FCKP
FCKN
PWR_SW
PANEL_ON/OFF
AUTO_ADJ
SOURCE_SELECT
KEY_UP
KEY_DOWN
MENU
DDC_CLK
DDC_DAT
CONNECT
VGA_5V
V33S
DDC2_SDA
DDC2_SCL
BUS_POWER
LED_ORG
LED_GRN
AUDIO_FUNCTION
INV_ON/OFF
MUTE
DCDC_ON/OFF
VGA_5V
CONNECT
V5A
5
2
1
B5
V33S
V5A
05_INTERFACE
D
MUTE
DCDC_ON/OFF
MCU1
B4
YOUT
RTD_SDIO0
RTD_SDIO1
RTD_SDIO2
RTD_SDIO3
04_SCALER
V18_ESD
RESET_MCU
V33S
B
B
B2
02_DVI
01_VGA
V18_ESD
V33S
CONNECT
VGA_5V
V5A
DWG NO
Title
A170E2-E03-H-S6(DIAGRAM)
A1702035S630101
DATE
2005/12/08
04
REV
1/6
SHEET
FB1
RAI+
R1
C1
RIN
RIN
DDC_DAT
12
HSI
1
6
2
7
3
8
4
9
5
10
VSI
DDC_CLK
13
14
15
RAI+
TP
TP2
TP
TP3
TP
TP4
TP
TP5
TP
TP6
TP
TP7
TP
RIN
1 GNDR
R2
C2
1
RAI-
D1
SOG
GAI+
GAIR3
BAI+
BAI-
RAI-
11
TP1
5
C3
1 GIN
D
GNDR
GNDR
GNDG
C4
GND_POWER
1 BIN
CON1
R5
R4
GND_POWER
CA1
SOG
SOG
GND_POWER
FB2
GAI+
C5
CONNECT
R7
R8
C6
V1
GNDB
GIN
GIN
R6
D2
GND_POWER
R9
GAI-
C7
GNDG
GNDG
BIN
GNDB
GND_POWER
C8
4
VGA_5V
GND_POWER
C
FB3
Z1
BAI+
R10
C9
BIN
R11
C10
1
D3
GND_POWER
R12
C11
BAI-
GNDB
C12
R13
V18_ESD
GND_POWER
C13
Z2
GND_POWER
GND_POWER
TP
TP8
R14
VSYNC
Z3
HSI
R16
HSYNC
L1
VSI
TP9
TP
TP10
TP
TP11
TP
HSYNC
1 VSYNC
B
C14
Z4
R17
C15
R15
GND_POWER
GND_POWER
GND_POWER
DDC_CLK
DDC_CLK
1DDC_DAT
GND_POWER
GND_POWER
DDC_CLK
V2
GND_POWER
4,5
DDC_DAT
DDC_DAT
4,5
V3
GND_POWER
GND_POWER
Title
A170E2-E03-H-S6(VGA)
DWG NO
A1702035S630101
APPROVED CHECKED
DESIGNER
DATE
DRAWER
2005/12/08
REV
04
SHEET
2/6
RX0P
RX0P
DATA0-
D4
RX0N
DATA0+
RX0N
D5
C16
C17
CON2
DATA1-
RX1N
RX1N
RX2N
D7
DATA0+
DATA0DATA1+
DATA1DATA2+
DATA2-
18
17
10
9
2
1
13
12
5
4
21
20
23
24
DDC2_SDA
DDC2_SCL
DATA2+
R18
RX2P
RX2P
DATA2-
D8
RX2N
11
3
19
22
C19
C18
D9
C21
C20
CLK+
CLKCLK+
RXCP
RXCP
CLK-
RXCN
D10
GND_POWER
C23
2
1
Z5
C22
BUS_POEWR
RXCN
D11
RX1P
DDC2_SCL
DDC2_SDA
RX1P
D6
DAT0+
DAT0DAT1+
DAT1DAT2+
DAT2DAT3+
DAT3DAT4+
DAT4DAT5+
DAT5clk+
clk-
DATA1+
1/3shield
2/4shield
0/5shield
clk shield
25
26
27
29
28
8
15
6
7
14
16
R
G
B
RGB GND
HSYNC
VSYNC
SYNC GND
DDC SCL
DDC SDA
+5V
HPD
GND_POWER
GND_POWER
5,6
V33S
Z6
C24
GND_POWER
Title
A170E2-E03-H-S6(DVI)
DWG NO
A1702035S630101
APPROVED CHECKED
DESIGNER
DATE
DRAWER
2005/12/08
REV
04
SHEET
3/6
DDC_CI_5V
DDC_CI_5V
D12
VGA_5V
BUS_POWER
Q1
8
7
6
5
BUS_POWER
RP1
1
2
3
4
D13
U1
3
3
2,5
2,5
3
6
8
11
DDC2_SDA
DDC2_SCL
DDC_CLK
DDC_DAT
1B
2B
3B
4B
DDC_CI_5V
14
7
VCC
GND
D14
2
5
9
12
1A
2A
3A
4A
DDC_CLK_OUT
V5A
V5A
1
4
10
13
1OE
2OE
3OE
4OE
D15
DDC_DAT_OUT
DDC_CI_5V
R21
D16
R20
R19
C25
Q2
GND_POWER
GND_POWER
DDC_CI_SEL
MCU_VCC
GND_POWER
3.1~3.6V
RTD_SDIO0
RTD_SDIO1
RTD_SDIO2
RTD_SDIO3
1
2
3
4
2
C26
D18
Q3
1
2
3
4
RESET_MCU
D17
6 PANEL_ON/OFF
1
2
3
4
R22
8
7
6
5
RP2
RP3
IICSCL
IICSDA
1
RP4
R24
8
7
6
5
R23
R34
VCC
P10
P11
P12
P13
P14
P15
P16
P17
43
42
41
40
39
38
37
36
GND_POWER
R36
R38
R39
RTD_SCSB 5
RTD_SCLK 5
V5A
RST
U2
BUS_POWER
RTD_SCSB
RTD_SCLK
R26
D19
1
33
34
35
12
23
32
31
30
29
28
27
26
25
24
13
11
P1.0/ET2
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P31
P30
VSS
DDC_DAT_OUT
DDC_CLK_OUT
R35
DDC_DAT
DDC_CLK
22
LED_GRN
LED_ORG
2,5
2,5
14
15
16
17
18
19
VSS
6
6
R33
P32
P33
P34
P35
P76
P77
XTAL1
RESET_RTD
XTAL2
NC
NC
NC
NC
NC
NC
MYSON MTV512MV64 VSYNC
P3.2/INT0
P6.7
PLCC 44
P3.3/INT1
P6.6/CLOK1
P3.4/T0
P6.5
P3.5/T1
P6.4
P7.6/CLKO2
P6.3/AD3
P7.7
P6.2/AD2
P6.1/AD1
HSDA1/P3.1/TXD
P6.0/AD0
HSCL1/P3.0/RxD
21
R29
R31
DDC_CI_SEL
DA0/P5.0
DA1/P5.1
DA2/P5.2
DA3/P5.3
DA4/P5.4
DA5/P5.5
P5.6/HSCL2
P5.7/HSDA2
X1
R27
2
3
4
5
6
7
8
9
20
R30
4
3
2
1
6
7
8
6
INV_ON/OFF
6 AUDIO_FUNCTION
2
CONNECT
6
MUTE
3
DDC2_SCL
3
DDC2_SDA
X2
GND_POWER
MCU_VCC
P50
P51
P52
P53
P54
P55
P56
P57
RST
5 RP5
VCC
GND_POWER
44
R25
Q4
10
GND_POWER
8
7
6
5
6 DCDC_ON/OFF
R32
P67
P66
P65
P64
P63
P62
P61
P60
MENU_ISP
MENU
6
YOUT
5
KEY_DOWN 6
KEY_UP
6
SOURCE_SELECT
AUTO_ADJ 6
PWR_SW 6
R37
Y1
MCU_VCC
GND_POWER
R40
RST
VCC
P10
P11
P12
P13
P14
P15
P16
P17
40
39
38
37
36
35
34
33
44
45
46
47
48
1
2
3
P30
P31
5
8
P32
P33
P34
P35
P76
P77
MYSON MTV512MG64
HSCL1/RXD/P3.0
HSDA1/TXD/P3.1
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
P7.6/CLKO2
P7.7
NC
NC
NC
NC
VSYNC
LQFP 48
P6.7
P6.6/CLKO1
P6.5
P6.4
P6.3/AD3
P6.2/AD2
P6.1/AD1
P6.0/AD0
32
31
30
29
28
27
26
25
24
23
22
21
20
P67
P66
P65
P64
P63
P62
P61
P60
Title
VSS
X2
X1
U4
15
16
X2
X1
9
10
11
12
13
14
DA0/P5.0
DA1/P5.1
DA2/P5.2
DA3/P5.3
DA4/P5.4
DA5/P5.5
P5.6/HSCL2
P5.7/HSDA2
NC
NC
GND_POWER
P50
P51
P52
P53
P54
P55
P56
P57
42
43
GND_POWER
P1.0/ET2
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
IICSDA
NC
NC
IICSCL
18
19
NC
NC
SCL
SDA
6
7
GND
C27
RST
A2
C29
8
7
VCC
VCC
TEST
VSS
A1
17
SEEPROM
C28
GND_POWER
A0
41
U3
R41
A170E2-E03-H-S6(MCU)
DWG NO A1702035S630101 DATE
APPROVED CHECKED DESIGNER DRAWER
2005/ 12/08
REV
04
SHEET
4/6
Q5
4
YOUT
V33S
XI
V33S
V18C
V33S
V33S
FBS1
C30
C31
C32
C33
R42
FB5
3,6
FB4
R43
C35
C34
GND_POWER
GND_POWER
R45
VOL_ADJ
R46
R47
PLL_TEST1
TMDS_TEST
5
6
7
8
9
10
11
12
13
14
15
16
17
18
RX2P
RX2N
R49
RX1P
RX1N
R48
(PWM0)
RX0P
RX0N
V33S
TMDS_V33
RXCP
RXCN
FB6
C37
60
71
84
96
107
AR1N
AR1P
AR2N
AR2P
AR3N
AR3P
AG1N
AG1P
AG2N
AG2P
C36
2
FB7
30
31
32
33
34
35
36
37
38
39
40
C39
C38
3
3
3
3
3
3
3
3
RX2P
RX2N
RX1P
RX1N
RX0P
RX0N
RXCP
RXCN
2
2
GND_POWER
AVS
AHS
VSYNC
HSYNC
50
51
RX2P
RX2N
RX1P
RX1N
RX0P
RX0N
RXCP
RXCN
B1- / V7
B1+ / V6
G1- / V5
G1+ / V4
SOG1 / V3
R1- / V2
R1+ / V1
ADC_GND
ADC_VDD
AHS1 / V0
AVS1 / VCLK
V18_ESD
124
123
122
121
120
119
118
115
114
113
112
111
110
109
106
105
104
103
102
101
100
99
98
97
94
93
92
91
90
89
88
87
86
85
82
81
80
79
78
77
76
75
74
73
RTD_SCLK 4
RTD_SCSB 4
RTD_SDIO3 4
RTD_SDIO2 4
RTD_SDIO1 4
RTD_SDIO0 4
A_R0N
A_R0P
A_R1N
A_R1P
A_R2N
A_R2P
A_G0N
A_G0P
A_G1N
A_G1P
A_G2N
A_G2P
A_CKN
A_CKP
A_B0N
A_B0P
A_B1N
A_B1P
A_B2N
A_B2P
B_R0N
B_R0P
B_R1N
B_R1P
B_R2N
B_R2P
B_G0N
B_G0P
B_G1N
B_G1P
TCON9
TCON4
GVOFF
GVON
6
6
TCON2
BSTHI
RIN
GIN
BIN
SOG
GNDR
GNDG
GNDB
R+
G+
B+
SOG
RGB-
2,4
2,4
R50
DDC_CLK
A_R0N
A_R0P
A_R1N
A_R1P
A_R2N
A_R2P
A_G0N
A_G0P
A_G1N
A_G1P
A_G2N
A_G2P
A_CKN
A_CKP
A_B0N
A_B0P
A_B1N
A_B1P
A_B2N
A_B2P
B_R1N
B_R1P
B_CKN
POL
TCON7
B_CKP
STB
TCON11
B_B0N
STV
TCON0
B_B0P
CKV
TCON12
B_B1N
FSTHI
V33S
B_G2P
TCON13
B_B1P
TCON3
OE
B_B2N
R75
R52
R53
6
6
BB1P
BB1N
6
6
BB0P
BB0N
6
6
BG2P
BG2N
6
6
BG1P
BG1N
6
6
BG0P
BG0N
6
6
BCKP
BCKN
6
6
BR2P
BR2N
6
6
BR1P
BR1N
6
6
BR0P
BR0N
6
6
B_G0N
B_G0P
B_G1N
B_G1P
B_G2N
B_G2P
B_CKN
B_CKP
B_B0N
B_B0P
B_B1N
B_B1P
B_B2P
B_B2N
B_B2P
FB2P
FB2N
6
6
FB1P
FB1N
6
6
FB0P
FB0N
6
6
FG2P
FG2N
6
6
FG1P
FG1N
6
6
FG0P
FG0N
6
6
FCKP
FCKN
6
6
FR2P
FR2N
6
6
FR1P
FR1N
6
6
FR0P
FR0N
6
6
PWM:47KHz(PWM2)
A
BJT_B
R55
VCM_PWM
PWM:230~300Hz(PWM1)
BB2P
BB2N
Q6
1
V18C
R54
INV_ADJ
GND_POWER
B_G2N
R51
DDC_DAT
B_R2N
B_R2P
2
2
2
2
2
2
2
R44
RESET_MCU
R74
B_R0N
B_R0P
48
49
58
61
62
63
64
65
66
67
68
69
70
SDIO[0] / TCON13
SDIO[1] / TCON7
SDIO[2] / TCON11
SDIO[3] / TCON0
SCSB / TCON12
SCLK / TCON3
B+
BSOG
G+
GR+
R-
AVS0
AHS0
ADC_VDD
ADC_GND
B0+
B0SOG0
G0+
G0R0+
R0-
DDCSCL1 / TCON4
DDCSDA1 / TCON9
19
20
21
22
23
24
25
26
27
28
29
52
53
54
55
56
57
AVS
AHS
GND_POWER
RESET_RTD
R28
33VRST_REF
RESET_OUT
TCON9 / PWM0
DDCSCL2 / VCLK / TCON4
DDCSDA2 / V7 / TCON6
SCLK / V6 / TCON3
SCSB / V5 / TCON7
SDIO[3] / V4 / TCON9
SDIO[2] / V3 / TCON5
SDIO[1] / V2 / TCON8
SDIO[0] / V1 / TCON10
V0 / TCON2
TCON13 / COUT
33VPNLOUT
PLL_TEST2
C
PGND
PGND
PGND
PGND
PGND
59
72
83
95
108
XO
XI
DPLL_VDD
DPLL_GND
APLL_GND
APLL_VDD
PLL_TEST1 / TCON0 / TCON3
PLL_TEST2 / TCON1 / TCON12
PVCC
PVCC
PVCC
PVCC
PVCC
127
128
125
126
1
2
3
4
47
116
GNDK
GNDK
GND_POWER
XI
VCCK
VCCK
46
117
2.5V
U5
Q14
Title
A170E2-E03-H-S6(SCALER)
DWG NO A1702035S630101 DATE
APPROVED CHECKED DESIGNER DRAWER
2005/ 12/08
REV
04
SHEET
5/6
TP12
V5A
V5A
V33D
VI(5V)
C41
VO(3.3V)
VO(3.3V)
(PANEL VCC)
V33D
2
4
C44
B1
2
5.0V
GND
C40
U6
TP
TP
1 1
V12A
F1
TP
V5A1
V5A
V12V1
C42
C43
C45
C46
GND_POWER
B2
1
GND_POWER
CN3
AUDIOL+
AUDIOLAUDIOR+
AUDIOR-
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
R56
V5A
AUDIO_DISABLE_INPUT
MUTE_INPUT
VOL_ADJ_INPUT
12V
AUDIO_FUNCTION
4
R57
INV_ON/OFF_INPUT
INV_ADJ_INPUT
V33S
1
Q8
R58
Q7
MUTE
R59
Q9
C47
TP13
4
V33S
INV_ON/OFF
TP
GND_POWER
B3
2
VI(5V)
VO(3.3V)
VO(3.3V)
V33S
2
4
V33S
3,5
(SCALER VCC)
GND
D20
GND_POWER
U7
C48
C49
C50
V33S
C51
V5A
C
B4
1
B5
R60
R61
B6
GND_POWER
R62
V12A
GND_POWER
VR
[INV_GND]
Q10
Q11
C52
+ C54
VOL_ADJ
C55
C53
INV_ADJ
GND_POWER
GND_POWER
GND_POWER
V5A
4 PANEL_ON/OFF
4 DCDC_ON/OFF
5
VCM_PWM
5
GVOFF
5
GVON
5
MENU
KEY_DOWN
KEY_UP
SOURCE_SELECT
AUTO_ADJ
LED_O
LED_G
PWR_SW
5
5
5
5
5
5
BSTHI1 TP
OE1
GVOFF1
D
C
B
A
D
C
B
A
D
C
B
A
MENU1 TP
AUTO_ADJ1 TP
TP
TP
MENU
KEY_DOWN1
TP
AUTO_ADJ
PWR_SW1
TP
1BSTHI
FSTHI1 TP
OE
GVOFF
POL1
TP
GVON1 TP
1 KEY_DOWN
KEY_UP1
1PWR_SW
FSTHI
POL
GVON
TP
LED_O1 TP
STV1
TP
STB1
TP
KEY_UP
LED_O
STV
TP14
CKV1
1
STB
TP
LED_G1 TP
TP
VCM_PWM1 TP
1 SOURCE_SELECT
LED_G
5
5
VCM_PWM
GND_POWER
BR0N
BR0P
BR1N
BR1P
BR2N
BR2P
BCKN
BCKP
BCKN
BCKP
1 CKV
CA
CA
5
6
7
8
CP2
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
BR0N
BR0P
BR1N
BR1P
BR2N
BR2P
5
5
5
5
5
5
BG0N
BG0P
BG1N
BG1P
BG2N
BG2P
5
5
5
5
5
5
BB0N
BB0P
BB1N
BB1P
BB2N
BB2P
BG0N
BG0P
BG1N
BG1P
BG2N
BG2P
BB0N
BB0P
BB1N
BB1P
BB2N
BB2P
5
6
7
8
D
C
B
A
CP1
4
3
2
1
8
7
6
5
8
7
6
5
BSTHI
BSTHI
CN4
4
3
2
1
MENU
KEY_DOWN
KEY_UP
SOURCE_SELECT
AUTO_ADJ
PWR_SW
4
MENU
4
KEY_DOWN
4
KEY_UP
4 SOURCE_SELECT
4
AUTO_ADJ
PWR_SW
LED_G 4
LED_O
AUDIORL3
AUDIOR+
L2
AUDIOLL5
AUDIOL+
L4
LP1
1
2
3
4
1
2
3
4
LP2
PANEL_ON/OFF
DCDC_ON/OFF
VCM_PWM
GVOFF
R63
GVON
R64
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
CN1
GND_POWER
GND_POWER
V33D
V33D
5
5
5
V33S
R70
5
5
POL
STB
5
5
FCKN
FCKP
Q12
LED_GRN
R71
1
Q13
3
LED_ORG
5
5
5
5
5
5
V33S
STV
CKV
OE
STV
CKV
OE
R73
R72
LED_G
LED_O
FSTHI
R69
R68
R65
FR0N
FR0P
FR1N
FR1P
FR2N
FR2P
FR0N
FR0P
FR1N
FR1P
FR2N
FR2P
POL
STB
R67
R66
FCKN
FCKP
5
5
5
5
5
5
FG0N
FG0P
FG1N
FG1P
FG2N
FG2P
5
5
5
5
5
5
FB0N
FB0P
FB1N
FB1P
FB2N
FB2P FSTHI
FG0N
FG0P
FG1N
FG1P
FG2N
FG2P
FB0N
FB0P
FB1N
FB1P
FB2N
FB2P
FSTHI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
CN2
Title
A170E2-E03-H-S6(I/F)
DWG NO
A1702035S630101
APPROVED CHECKED
DESIGNER
DATE
DRAWER
GND_POWER
2005/ 12/08
REV
04
SHEET
6/6