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TS3A24159
SCDS238D MARCH 2007 REVISED JULY 2015
3 Description
The TS3A24159 is a 2-channel single-pole doublethrow (SPDT) bidirectional analog switch that is
designed to operate from 1.65 V to 3.6 V. It offers low
ON-state resistance and excellent ON-state
resistance matching with the break-before-make
feature, to prevent signal distortion during the
transferring of a signal from one channel to another.
The device has excellent total harmonic distortion
(THD) performance, low ON-state resistence, and
consumes very low power. These are some of the
features that make this device suitable for a variety of
markets and many different applications.
Device Information(1)
PART NUMBER
TS3A24159
2 Applications
Cell Phones
PDAs
Portable Instrumentation
Audio and Video Signal Routing
Low-Voltage Data-Acquisition Systems
Communication Circuits
Modems
Hard Drives
Computer Peripherals
Wireless Terminals and Peripherals
PACKAGE
VSSOP (10)
3.00 mm 3.00 mm
VSON (10)
3.00 mm 3.00 mm
DSBGA (10)
1.86 mm 1.35 mm
SPDT
NC1
COM1
NO1
IN1
Logic
Control
SPDT
NC2
COM2
NO2
IN2
Logic
Control
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TS3A24159
SCDS238D MARCH 2007 REVISED JULY 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
6.11
7
8
1
1
1
2
3
5
8.1
8.2
8.3
8.4
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
17
17
17
17
21
21
21
21
21
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (February 2008) to Revision D
Page
Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
TS3A24159
www.ti.com
VCC
DRC Package
10-Pin VSON
Top View
VCC
10 NO2
10 NO2
NO1 2
COM2
COM1 3
IN1 4
IN2
NC2
NC2
GND
NC1 5
GND
NO1 2
COM2
COM1 3
IN2
IN1 4
NC1 5
NAME
I/O
DESCRIPTION
VCC
Power Supply
NO1
I/O
COM1
I/O
IN1
NC1
I/O
GND
Ground
NC2
I/O
IN2
COM2
I/O
10
NO2
I/O
TS3A24159
SCDS238D MARCH 2007 REVISED JULY 2015
www.ti.com
YZP Package
10-Pin DSBGA
Top-Through View
D
C
B
A
3
NO2
COM2
VCC
COM1
NO1
IN2
IN1
NC2
GND
NC1
NAME
A1
NC1
A2
A3
I/O
DESCRIPTION
I/O
GND
Ground
NC2
I/O
B1
IN1
B3
IN2
C1
COM1
I/O
C3
COM2
I/O
D1
NO1
I/O
D2
VCC
Power Supply
D3
NO2
I/O
TS3A24159
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
VCC
VNC
VNO
VCOM
II/OK
INC
INO
ICOM
VIN
IIK
ICC
IGND
Tstg
Storage temperature
(1)
(2)
(3)
(4)
(5)
(6)
(1) (2)
(4) (5)
VI < 0
MIN
MAX
0.5
3.6
0.5
VCC + 0.5
50
50
300
300
500
500
0.5
3.6
UNIT
mA
mA
V
50
mA
100
mA
100
mA
65
150
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All voltages are with respect to ground, unless otherwise specified.
The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
This value is limited to 5.5 V maximum.
Pulse at 1-ms duration <10% duty cycle
Electrostatic discharge
2000
1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
MAX
UNIT
VCC
Supply Voltage
1.65
3.6
VNC
VNO
VCOM
Signal Voltage
VCC
VIN
VCC
TS3A24159
SCDS238D MARCH 2007 REVISED JULY 2015
www.ti.com
DGS (VSSOP)
DRC (VSON)
YZP (DSBGA)
10 PINS
10 PINS
10 PINS
UNIT
RJA
154
49.4
90.9
C/W
RJC(top)
37.9
71.2
0.3
C/W
RJB
83.6
23.8
8.3
C/W
JT
1.4
2.2
3.2
C/W
JB
82.2
23.8
8.3
C/W
RJC(bot)
N/A
6.1
N/A
C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
(1)
TEST CONDITIONS
TA
VCC
MIN
ANALOG SWITCH
Analog signal
range
VCOM, VNO,
VNC
Peak ON
resistance
rpeak
ON-state
resistance
ron
ON-state
resistance match
between channels
ON-state
resistance flatness
ron
ron(flat)
0
0 (VNO or VNC) VCC,
ICOM = 100 mA,
Switch ON,
See Figure 10
25C
VNO or VNC = 2 V,
ICOM = 100 mA,
Switch ON,
See Figure 10
25C
Switch ON,
See Figure 10
Switch ON,
See Figure 10
Switch ON,
See Figure 10
NC, NO
OFF leakage
current
INC(OFF),
INO(OFF)
Switch OFF,
See Figure 11
NC, NO
ON leakage
current
INC(ON),
INO(ON)
Switch ON,
See Figure 12
COM
ON leakage
current
ICOM(ON)
Switch ON,
See Figure 12
Full
Full
0.2
2.7 V
0.26
2.7 V
0.01
2.7 V
0.01
3.6 V
25C
Full
3.6 V
25C
Full
0.04
0.05
25C
3.6 V
0.13
2.7 V
0.05
0.05
Full
Full
0.3
0.34
25C
25C
0.3
0.35
25C
Full
VCC
10
10
50
50
10
10
100
100
10
10
100
100
nA
nA
nA
VIH
Full
VIL
Full
Input leakage
current
IIH, IIL
(1)
(2)
25C
VI = 3.6 V or 0
Full
1.4
V
0.5
3.6 V
40
50
40
50
V
nA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All unused digital inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
TS3A24159
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TEST CONDITIONS
TA
VCC
MIN
DYNAMIC
VGEN = 0,
RGEN = 0,
CL = 1 nF,
See Figure 19
25C
3V
pC
CNC(OFF),
CNO(OFF)
See Figure 13
25C
3V
90
pF
NC, NO
ON capacitance
CNC(ON),
CNO(ON)
See Figure 13
25C
3V
224
pF
COM
ON capacitance
CCOM(ON)
See Figure 13
25C
3V
250
pF
See Figure 13
25C
3V
pF
Charge injection
QC
NC, NO
OFF capacitance
Digital input
capacitance
CI
Bandwidth
BW
RL = 50 ,
Switch ON,
See Figure 16
25C
3V
23
MHz
OFF isolation
OISO
RL = 50 ,
f = 1 MHz,
See Figure 17
25C
3V
72
dB
Crosstalk
XTALK
RL = 50 ,
f = 1 MHz,
See Figure 18
25C
3V
96
dB
Total harmonic
distortion
THD
RL = 600 ,
CL = 50 pF,
f = 20 Hz to
20 kHz,
See Figure 20
25C
3V
0.003%
25C
3.6 V
SUPPLY
Positive supply
current
ICC
15
Full
100
nA
A
(1)
TEST CONDITIONS
TA
VCC
MIN
ANALOG SWITCH
Analog signal
range
VCOM, VNO,
VNC
Peak ON
resistance
rpeak
ON-state
resistance
ron
ON-state
resistance match
between channels
ON-state
resistance flatness
ron
0
0 (VNO or VNC) VCC,
ICOM = 8 mA,
Switch ON,
See
Figure 10
25C
Switch ON,
See
Figure 10
25C
Switch ON,
See
Figure 10
25C
Switch ON,
See
Figure 10
Switch ON,
See
Figure 10
25C
Switch OFF,
See
Figure 11
25C
ron(flat)
NC, NO
OFF leakage
current
INC(OFF),
INO(OFF)
NC, NO
ON leakage
current
INC(ON),
INO(ON)
(1)
Full
Full
Full
0.45
2.3 V
0.4
2.3 V
0.01
0.05
0.05
0.05
0.05
2.3 V
0.03
Full
0.08
0.1
2.7 V
25C
Full
0.35
2.3 V
25C
Full
VCC
2.7 V
10
10
50
50
10
10
100
100
nA
nA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
TS3A24159
SCDS238D MARCH 2007 REVISED JULY 2015
www.ti.com
TEST CONDITIONS
TA
VCC
MIN
ICOM(ON)
25C
Full
2.7 V
10
10
100
100
nA
VIH
Full
VIL
Full
Input leakage
current
IIH, IIL
25C
VI = 2.7 V or 0
Full
1.25
V
0.5
2.7 V
40
50
40
50
V
nA
DYNAMIC
VGEN = 0,
RGEN = 0,
CL = 1 nF,
See
Figure 19
25C
2.5 V
pC
CNC(OFF),
CNO(OFF)
See
Figure 13
25C
2.5 V
90
pF
NC, NO
ON capacitance
CNC(ON),
CNO(ON)
See
Figure 13
25C
2.5 V
250
pF
COM
ON capacitance
CCOM(ON)
See
Figure 13
25C
2.5 V
250
pF
VI = VCC or GND,
See
Figure 13
25C
2.5 V
pF
Charge injection
QC
NC, NO
OFF capacitance
Digital input
capacitance
CI
Bandwidth
BW
RL = 50 ,
Switch ON,
See
Figure 16
25C
2.5 V
23
MHz
OFF isolation
OISO
RL = 50 ,
f = 1 MHz,
See
Figure 17
25C
2.5 V
72
dB
Crosstalk
XTALK
RL = 50 ,
f = 1 MHz,
See
Figure 18
25C
2.5 V
96
dB
THD
RL = 600 ,
CL = 50 pF,
f = 20 Hz to
20 kHz,
See
Figure 20
25C
2.5 V
0.003%
Total harmonic
distortion
SUPPLY
Positive supply
current
(2)
ICC
25C
VI = VCC or GND
Full
10
2.7 V
100
700
nA
All unused digital inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
(1)
TEST CONDITIONS
TA
VCC
MIN
ANALOG SWITCH
Analog signal
range
VCOM, VNO,
VNC
Peak ON
resistance
rpeak
ON-state
resistance
ron
(1)
0
0 (VNO or VNC) VCC,
ICOM = 2 mA,
Switch ON,
See Figure 10
25C
Switch ON,
See Figure 10
25C
Full
Full
1.65 V
1.65 V
VCC
0.4
0.7
0.8
0.3
0.45
0.5
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
TS3A24159
www.ti.com
TEST CONDITIONS
TA
VCC
MIN
25C
ron
ron(flat)
Switch ON,
See Figure 10
Switch ON,
See Figure 10
Full
0.02
1.65 V
0.05
25C
Switch ON,
See Figure 10
25C
25C
INC(OFF),
INO(OFF)
NC, NO
ON leakage
current
INC(ON),
INO(ON)
25C
COM
ON leakage
current
25C
ICOM(ON)
Full
Full
Full
0.13
1.65 V
0.08
Full
NC, NO
OFF leakage
current
0.04
0.15
0.2
1.95
1.95 V
1.95 V
10
10
50
50
10
10
100
100
10
10
100
100
nA
nA
nA
VIH
Full
VIL
Full
Input leakage
current
IIH, IIL
25C
VI = 1.95 V or 0
Full
V
0.4
1.95 V
40
50
40
50
V
nA
DYNAMIC
VGEN = 0,
RGEN = 0,
CL = 1 nF,
See Figure 19
25C
1.8 V
pC
CNC(OFF),
CNO(OFF)
See Figure 13
25C
1.8 V
90
pF
NC, NO
ON capacitance
CNC(ON),
CNO(ON)
See Figure 13
25C
1.8 V
250
pF
COM
ON capacitance
CCOM(ON)
See Figure 13
25C
1.8 V
250
pF
Charge injection
QC
NC, NO
OFF capacitance
Digital input
capacitance
CIN
VI = VCC or GND,
See Figure 13
25C
1.8 V
pF
Bandwidth
BW
RL = 50 ,
Switch ON,
See Figure 16
25C
1.8 V
23
MHz
OFF isolation
OISO
RL = 50 ,
f = 1 MHz,
See Figure 17
25C
1.8 V
73
dB
Crosstalk
XTALK
RL = 50 ,
f = 1 MHz,
See Figure 18
25C
1.8 V
97
dB
Total harmonic
distortion
THD
RL = 600 ,
CL = 50 pF,
f = 20 Hz to 20
kHz,
See Figure 20
25C
1.8 V
0.005%
SUPPLY
Positive supply
current
(2)
ICC
25C
VI = VCC or GND
Full
1.95 V
100
50
700
nA
All unused digital inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
TS3A24159
SCDS238D MARCH 2007 REVISED JULY 2015
www.ti.com
TEST CONDITIONS
TA
VCC
MIN
25C
2.5 V
Full
2.3 V
to
2.7 V
25C
2.5 V
Full
2.3 V
to
2.7 V
25C
2.5 V
Full
2.3 V
to
2.7 V
0.5
TYP MAX
UNIT
Dynamic
Turnon time
Turnoff time
Break-beforemake time
(1)
tON
VCOM = VCC,
RL = 50
CL = 35 pF,
See Figure 14
tOFF
VCOM = VCC,
RL = 50
CL = 35 pF,
See Figure 14
tBBM
CL = 35 pF,
See Figure 15
20
35
40
12
25
30
10
ns
ns
25
30
ns
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
(1)
TEST CONDITIONS
TA
VCC
MIN
TYP MAX
UNIT
Dynamic
Turnon time
Turnoff time
Break-beforemake time
(1)
tON
VCOM = VCC,
RL = 50
CL = 35 pF,
See Figure 14
tOFF
VCOM = VCC,
RL = 50
CL = 35 pF,
See Figure 14
tBBM
CL = 35 pF,
See Figure 15
25C
1.8 V
Full
1.65 V
to
1.96 V
25C
1.8 V
Full
1.65 V
to
1.96 V
23
45
50
17
27
30
25C
1.8 V
Full
1.65 V
to
1.96 V
14
ns
ns
30
35
ns
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
(1)
TEST CONDITIONS
TA
VCC
MIN
TYP MAX
UNIT
Dynamic
Turnon time
Turnoff time
Break-beforemake time
(1)
10
tON
VCOM = VCC,
RL = 50
CL = 35 pF,
See Figure 14
tOFF
VCOM = VCC,
RL = 50
CL = 35 pF,
See Figure 14
tBBM
CL = 35 pF,
See Figure 15
25C
1.8 V
Full
1.65 V
to
1.96 V
25C
1.8 V
Full
1.65 V
to
1.96 V
53
75
80
24
35
40
25C
1.8 V
Full
1.65 V
to
1.96 V
30
ns
ns
40
50
ns
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
TS3A24159
www.ti.com
0.400
0.450
0.350
0.400
0.300
0.350
0.250
ron ()
ron ()
0.300
0.250
0.200
0.200
0.150
0.150
40C
0.100
40C
0.100
25C
25C
0.050
0.050
85C
85C
VCOM (V)
VCOM (V)
0.350
50
0.300
2.21
2.07
1.93
1.79
1.66
1.52
1.38
1.24
1 .10
0.97
0.8 3
0.69
0.55
0 .41
0.28
0.14
1.58
1.49
1.39
1.29
1.19
1.09
0.99
0.89
0 .79
0.69
0.5 9
0.50
0.40
0 .30
0.20
0.10
0.00
0.00
0.000
0.000
1.8 V
2.5 V
3V
0.250
-50
QC (pC)
ron ()
0.200
0.150
0.100
40C
100
150
200
25C
0.050
85C
250
2.59
2.43
2.27
2.11
1.94
1.78
1.62
1.46
1 .30
1.13
0.9 7
0.81
0.65
0 .49
0.32
0.16
0.00
0.000
300
0
0.3
0.6
0.9
1.2
VCOM (V)
1.5
1.8
VCOM (V)
2.1
2.4
2.5
2.7
3.0
35
0
3.0 V
tON
30
tOFF
25
20
Gain (dB)
tON/tOFF (ns)
15
8
10
12
10
14
16
18
0
1.65
1.8
1.95
2.3
2.5
2.7
3.3
3.6
20
1E+04
1E+05
1E+06
1E+07
1E+08
1E+09
Frequency (Hz)
Figure 6. Bandwidth
11
TS3A24159
SCDS238D MARCH 2007 REVISED JULY 2015
www.ti.com
10
20
30
40
40
Attenuation (dB)
Attenuation (dB)
20
50
60
1.8 V
70
2.5 V
80
90
60
80
3.0 V
1.8V
100
1E+04
1E+05
1E+06
1E+07
1E+08
2.5V
1E+09
3.0V
Frequency (Hz)
120
1E+04
1E+05
1E+06
1E+07
1E+08
1E+09
Frequency (Hz)
Figure 8. Crosstalk
THD (%)
0.006
0.005
0.004
0.003
0.002
1.8 V
2.5 V
0.001
3.0 V
0.000
1E+00
1E+01
1E+02
1E+03
1E+04
1E+05
Frequency (Hz)
12
TS3A24159
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VNC NC
COM
+
VCOM
Channel ON
VNO NO
r on =
IN
VI
ICOM
I COM
VI = V IH or V IL
+
GND
VNC NC
COM
VCOM
+
VNO NO
IN
VI
+
GND
VNC NC
COM
VNO NO
VI
VCOM
ON-State Leakage Current
Channel ON
VI = V IH or V IL
IN
+
GND
13
TS3A24159
SCDS238D MARCH 2007 REVISED JULY 2015
www.ti.com
VCC
VNO
Capacitance
Meter
COM
NO
COM
BIAS
IN
NC or NO
VNC or V NO
NC or NO
CL(2)
TEST
RL
CL
VCOM
tON
50 W
35 pF
VCC
tOFF
50 W
35 pF
VCC
COM
VCOM
RL
IN
VI
CL(2)
RL
GND
(1)
VCC
Logic
Input
(VI)
50%
50%
0
tON
tOFF
90%
90%
(VNC or V NO)
(1)
All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr < 5 ns,
tf < 5 ns.
(2)
NC or NO
VCC
Logic
Input
(VI)
VNC or V NO
VCOM
50%
0
COM
NC or NO
CL(2)
VI
Logic
Input(1)
90%
RL
90%
(VCOM)
IN
tBBM
VNC or VNO = VCC
RL = 50
CL = 35 pF
GND
(1)
All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr < 5 ns,
tf < 5 ns.
(2)
14
TS3A24159
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VCC
Network Analyzer
50 W
VNC
NC
Source
Signal
VCOM
VI = VCC or GND
NO
Network Analyzer Setup
IN
VI
50 W
GND
DC Bias = 350 mV
Network Analyzer
50 W
VNC NC
COM
Source
Signal
50 W
VCOM
VI = VCC or GND
NO
Network Analyzer Setup
IN
Source Power = 0 dBm
(632-mV P-P at 50-Wload)
VI
50 W
GND
DC Bias = 350 mV
Network Analyzer
VNC
NC
VCOM
Source
Signal
VNO
VIN
50 W
NO
50 W
IN
GND
15
TS3A24159
SCDS238D MARCH 2007 REVISED JULY 2015
www.ti.com
VCC
RGEN
VIH
OFF
ON
OFF V
IL
NC or NO
COM
VGEN
Logic
Input
(VI)
VCOM
VCOM
NC or NO
DVCOM
CL(2)
VI
VGEN = 0 to VCC
IN
Logic
Input(1)
RGEN = 0
CL = 1 nF
QC = C L DVCOM
VI = V IH or V IL
GND
A.
All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr < 5 ns,
tf < 5 ns.
B.
VI = V IH or V IL
RL = 600 W
CL = 50 pF
V+/2
VCC
Audio Analyzer
RL
10 F
Source
Signal
10 F
NO
COM
600 W
600 W
CL(1)
VI
IN
GND
600 W
A.
16
TS3A24159
www.ti.com
8 Detailed Description
8.1 Overview
The TS3A24159 is a 2-channel single-pole double-throw (SPDT) bidirectional analog switch that is designed to
operate from 1.65 V to 3.6 V. It offers low ON-state resistance and excellent ON-state resistance matching with
the break-before-make feature, to prevent signal distortion during the transferring of a signal from one channel to
another. The device has excellent total harmonic distortion (THD) performance, low ON-state resistence, and
consumes very low power. These are some of the features make this device suitable for a variety of markets and
many different applications.
NC1
COM1
NO1
IN1
Logic
Control
SPDT
NC2
COM2
NO2
IN2
Logic
Control
NO TO COM,
COM TO NO
ON
OFF
OFF
ON
IN
17
TS3A24159
SCDS238D MARCH 2007 REVISED JULY 2015
www.ti.com
0.1 PF
VCC
TS3A24159
System
Controller
Switch
Control
Logic
IN1
IN2
NO1
Device 1
COM1
NC1
Device 2
NO2
Device 3
NC2
Device 4
Signal
Path
COM2
GND
COM4
MAX
VCC
Supply Voltage
1.65
3.6
VNC
VNO
VCOM
Signal Voltage
VCC
VIN
VCC
18
UNIT
TS3A24159
www.ti.com
0.300
0.250
ron ()
0.200
0.150
0.100
40C
25C
0.050
85C
2.59
2.43
2.27
2.11
1.94
1.78
1.62
1.46
1 .30
1.13
0.9 7
0.81
0.65
0 .49
0.32
0.16
0.00
0.000
VCOM (V)
19
TS3A24159
SCDS238D MARCH 2007 REVISED JULY 2015
www.ti.com
11 Layout
11.1 Layout Guidelines
To ensure reliability of the device, following common printed-circuit board layout guidelines is recommended.
Bypass capacitors must be used on power supplies. Short trace lengths should be used to avoid excessive
loading.
VCC
0603 Cap
To Device 3
VCC
NO2
To
Device 3
To Device 3 or 4
To Device 1
COM2
To Device
NO13
To Device
To Device 1 or 2
COM1
To Device
3
3
To System
TS3A24159
IN2
To
Device 3
To System
To Device 4
IN13
Device
NC2
To
Device 3
NC13
To Device
GND
To
Device 3
To
To Device 2
20
TS3A24159
www.ti.com
12.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Glossary
SLYZ022 TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
21
www.ti.com
13-Mar-2015
PACKAGING INFORMATION
Orderable Device
Status
(1)
Eco Plan
Lead/Ball Finish
(2)
(6)
(3)
Op Temp (C)
Device Marking
(4/5)
TS3A24159DGSR
ACTIVE
VSSOP
DGS
10
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
(L8Q ~ L8R)
TS3A24159DGSRG4
ACTIVE
VSSOP
DGS
10
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
(L8Q ~ L8R)
TS3A24159DRCR
ACTIVE
VSON
DRC
10
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
ZWS
TS3A24159DRCRG4
ACTIVE
VSON
DRC
10
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
ZWS
TS3A24159YZPR
ACTIVE
DSBGA
YZP
10
3000
Green (RoHS
& no Sb/Br)
Call TI | SNAGCU
Level-1-260C-UNLIM
-40 to 85
L87
(1)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 1
Samples
www.ti.com
13-Mar-2015
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
20-Feb-2015
Device
TS3A24159DGSR
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
3.4
1.4
8.0
12.0
Q1
VSSOP
DGS
10
2500
330.0
12.4
TS3A24159DRCR
VSON
DRC
10
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
TS3A24159YZPR
DSBGA
YZP
10
3000
178.0
9.2
1.49
1.99
0.63
4.0
8.0
Q2
Pack Materials-Page 1
5.3
B0
(mm)
20-Feb-2015
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TS3A24159DGSR
VSSOP
DGS
10
2500
358.0
335.0
35.0
TS3A24159DRCR
VSON
DRC
10
3000
367.0
367.0
35.0
TS3A24159YZPR
DSBGA
YZP
10
3000
220.0
220.0
35.0
Pack Materials-Page 2
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