Optical Random Access Memory

1. Introduction
The exponential growth of internet traffic has been the major driving force for the
increasing demand for transmission bandwidth. To increase the efficiency of the network and
to allow high data bit rates it is desirable that switching and routing can be carried out in the
physical layer, avoiding optical-to-electrical and electrical-to-optical converters. All-optical
devices provide data format transparency, and may provide lower power consumption and
higher-speed processing, compared to their electronic counterparts. Recent developments in
optical signal processing and in photonic switching have made it possible to reach bit rates in
the order of gigabits per second per wavelength and terabits per second per fibre. In this
context, all-optical flip-flops (AOFF) can be used to perform many optical signal processing
functions in future optical packet switching networks.

2. Need for Optical RAM

The evolving trend of chip multiprocessor (CMPs) utilization for extensive use of
parallelism along with multi core architectures have accelerated the demand of high-bandwidth
and low-latency interconnects in High-Performance Computing Systems (HPCS). Recent
improvements in interconnects have equipped data centers with energy efficient inter- and
intra-chip communication, resulting to powerful machines with up to 40 Gb/s line-rate
capabilities and Tb/s throughput [6] . However, given that HPCS are already entering the PetaFlops regime , a new set of challenges are expected to strain the data center networking
infrastructure as the increase of the processor throughput is exceeding the improvement rate
of memory speeds. From a design perspective, a balanced system requires equal improvements
in all functional subsystems besides data transmission gateways, including memory blocks.
However, electronic RAM has proven incapable of keeping pace with current processing
speeds. Limited memory bandwidth and long access times can degrade overall system
performance, forming a major bottleneck in systems performance that is commonly referred
to as the Memory Wall [2]. Memory needs of digital processing and computing has been
formed so far around the idiosyncrasy of electronic RAM. Between types of electronic
memories, static RAMs have been the preferred choice for performance-sensitive applications,
implementing cache memories on the processor chips of HPCS.
To overcome the long foreseen Memory Wall, research has shifted focus on
developing all optical RAM alternatives based on ultra-fast bistable latching and memory
elements. Figure 1 shows that there has been intensive research on optical flip-flops in the last

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Figure 1: IEEE Xplore annual citations with index terms referring to optical RAM.
few years. This fact can be explained mainly due to technology advances in monolithic and
hybrid integration, and the need for a high-speed and low-power memory.

3. Types of Optical Memory

3.1 Optical Read-Only Memory
In Optical ROM, data is stored on the disc as a series of microscopic indentations.
A laser is shone onto the reflective surface of the disc to read the pattern of pits and lands
("pits", with the gaps between them referred to as "lands"). Because the depth of the pits is
approximately one-quarter to one-sixth of the wavelength of the laser light used to read the
disc, the reflected beam's phase is shifted in relation to the incoming beam, causing destructive
interference and reducing the reflected beam's intensity. This pattern of changing intensity of
the reflected beam is converted into binary data. Examples are Compact Disc, Digital Video
Disc, Blu-ray Disc.

3.2 Optical Random Access Memory

Optical RAM allows stored data to be accessed directly in any random order. There are
two types of RAM.

3.2.1 Dynamic random-access memory (DRAM)

It

is

type

of random-access

memory that

stores

each bit of

data

in

separate capacitor within an integrated circuit. The capacitor can be either charged or
discharged; these two states are taken to represent the two values of a bit, conventionally
called 0 and 1. Since capacitors leak charge, the information eventually fades unless the

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capacitor charge is refreshed periodically. Because of this refresh requirement, it is

a dynamic memory as opposed to SRAM and other static memory. An optical DRAM can store
information in its optical format for a long term and can be demonstrated with a refreshable
WDM loop memory in place of capacitors.

3.2.2 Static random-access memory (SRAM)

It is a type of semiconductor memory that uses bistable latching circuitry to store each
bit. The term static differentiates it from dynamic RAM (DRAM) which must be
periodically refreshed. SRAM exhibits data remanence, but it is still volatile in the conventional
sense that data is eventually lost when the memory is not powered. Optical S-RAM is
implemented using Semiconductor Optical Amplifier (SOA) and Mach-Zehnder Interferometer
(MZI).

4. Comparison of SRAM and DRAM

Compared to DRAM, SRAM does not have a capacitor to store the data, hence SRAM
works without refreshing.

In SRAM the data is lost when the memory is not electrically powered.
SRAM is faster and more reliable than the more common DRAM.

While DRAM supports access times (access time is the time required to read or write
data to/from memory) of about 60 nanoseconds, SRAM can give access times as low as
10 nanoseconds.

Cycle time of SRAM is much shorter than that of DRAM because it does not need to
pause between accesses.
SRAM is much more expensive to produce than DRAM.
The operation of SRAM and DRAM are the same in both optical and electrical domains.
Only difference lies in the implementation of the fundamental block.

5. Basic S-RAM Block

A typical 2-dimensional arrangement of 4X4 static RAM bank is shown in Figure 2, where
16 separate single RAM cells are independently controlled and each row can store a 4-bit word.
Shared among the RAM cells of a single row, the Word signal grants simultaneous access for
Read or Write operation according to the logical value of the corresponding signal.
The most basic element in electronic RAM bank structures for static memory design has
been the 6-transistor (6T) RAM cell, the layout of which is shown in Figure 3. It consists of two

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pass gates for access control and two cross-coupled inverters with two possible states.
Although it has been widely used in electronic cache memories, its speed performance imposes
the major limit to the overall system processing speed.

Figure 2: 4X4 static RAM bank architecture

Figure 3: 6 Transistor electronic RAM Cell

Optical memory has to overcome innate limitations enforced by the neutral charge of
light particles that impedes their storage, making it impossible to mimic the respective
electronic memory modules that rely on the negative electron charge. Optical bit-level storage
without random access capabilities has been recently demonstrated by means of integrated
optical memory elements relying on coupled semiconductor lasers.
The proposed optical RAM cell consists of two Access Gates (AG) and a hybridly
integrated all-optical flip-flop (AOFF) as shown in figure 4, experimentally demonstrating
successful operation at 5Gb/s along with a performance analysis for reaching 40Gb/s
Read/Write speeds

Figure 4: Basic All-Optical RAM cell [1]

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6. Implementation of all-optical SRAM

The access transistors in electronic SRAM are replaced by access gates which is nothing
but a Semiconductor Optical Amplifier. Cross coupled inverters are replaced by an All-Optical
Flip-Flop. The way in which AOFF is implemented depends on the application. There are many
ways of implementing AOFF. Some are discussed below.

6.1 Coupled Ring Lasers and Arrayed Waveguide AOFF

Here, the AOFF is implemented using two coupled ring lasers and an arrayed waveguide
grating (AWG). AWG acts as the frequency selective element of each cavity as shown in figure
5(a). Each ring laser has its own gain element (SOA) and the light propagates bidirectionally in
the ring. Its operation principle is shown in figure 5(b) and is based on the gain quenching
concept.

Figure 5: a) Mask layout for two-state multi wavelength laser.

b) Operation of device showing laser [3]
In state 1, light from laser A flows in counterclockwise direction and saturates the gain
element of laser B, suppressing laser B from lasing. In this situation, the light from the dominant
laser (laser A) is sent to an output by the AWG. Thus, the AWG ensure isolation between the
device input and output.
In the same way, in state 2, only laser B is lasing, suppressing laser A from lasing. Thus,
only one of the lasers can be lasing at a time, due of the fact that the dominant laser suppresses

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the other laser through gain saturation. Lasing in the master can be turned off by injecting
external optical pulses, changing in this way the state of the system. The cavity length of this
AOFF scheme is about 4.5 mm, which cause speed limitation.

6.2 Coupled SOA-MZI AOFF

AOFF can also be implemented with Mach-Zehnder interferometers (MZIs) as the
coupled nonlinear optical elements and nonlinear polarization switches [4]. Figure 6 shows alloptical flip-flops demonstrated using two coupled Mach-Zehnder interferometers with
semiconductor optical amplifier (SOA-MZI) and two SOA fibre ring lasers, respectively. This
technology is also based on the gain quenching effect, in which the signal output from the
dominant laser suppresses the other laser, through gain saturation of the SOA.

Figure 6: Schematic diagram of optical flip-flop based on coupled SOA-MZI

The SOAs operate as Cross-Gain Modulation (XGM) switches controlling access to the
flip-flop configuration, whereas the optical flip-flop serves as the 1-bit memory element. Errorfree Read and Write functionality with true random access properties at 5 Gb/s can be achieved
in the optical domain.

6.3 Micro ring LASER based AOFF

In a micro-ring laser typically there exists two lasing modes, based on the direction that
laser light propagates- clockwise (CLKW) or counterclockwise (CCLKW) and depending on the
bias current, different operating regimes can occur. Also, ideally, the CLKW mode is not coupled
to the CCLKW mode and vice-versa.

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Figure 7: Optical flip-flop based on single micro-ring laser

The AOFF configuration is depicted in Figure 7. It has racetrack cavity geometry and it is
produced in an InGaAs/InGaA1As/InP Multi Quantum Well material. The AOFF exhibits
bistability between the counter-propagation cavity modes that can be switched by external
optical pulses. It has four inputs/outputs ports that are all-active, and can be use to inject or
extract optical signals.

7. Comparison between various AOFF technologies

Table 1: Comparison between various AOFF technologies

Parameter\Technology

Ring lasers and AWG

SOA-MZI

Single Micro Ring Laser

Switching Times

< 1 ns

< 200 ps

< 190 ps

Switching Energies

< 10 pJ

< 1 pJ

4 fJ

Extinction Ratio

35 dB SM

> 10 dB DM

> 20 dB SM

Integration Type

Monolithic

Hybrid

Monolithic

*Results shown above are for Asynchronous S-R Flip-Flops.

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8. Applications of All-Optical Flip-Flops

AOFFs are analogous to electronic flip-flops in optical domain, which implies that all the
circuits using electronic flip-flops can be implemented in optical domain using AOFFs
An all-optical flip-flop is an element that can be used to perform a variety of optical
signal processing functions that requires memory, such as a binary counter, optical shift register
and optical random access memory, among others.

8.1 All-Optical Signal Processing

All-optical signal processing is expected to overcome the limitations of electrical signal
processing and to lead optical communications to the next level. Therefore, it is essential to
develop all-optical sequential devices which allow an effective improvement of the all-optical
processing capabilities of future networks.
An all-optical flip-flop is an element that can be used to perform a variety of optical
signal processing functions that requires memory, such as a binary counter, optical shift register
and optical random access memory, among others.

8.1.1 All-Optical Binary Counter

Figure 8: Logic circuit for all-optical binary counter

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An all-optical binary counter can be used for header recognizing and payload processing
in optical packet-switching networks, besides working as a finite-state machine in optical
computing. The experimental setup [7] is shown in Figure 8. The scheme is composed by two
identical stages realized each one by an optical S-R latch and an optical AND logic gate based on
FWM in SOA.
Each stage has 3 ports: the input clock, the output (Qi) and the carry signal. The latches
output Q1 and Q2, represent, respectively, the less significant bit (LSB) and most significant bit
(MSB) of the counter output. In order to carry out two-bit counting operations, the two stages
are cascaded by using the "Carry 1" signal coming from stage 1, as input for the second stage.
Extension to N-bit counting can be performed by cascading N stages.

8.1.2 All-Optical Shift Register

A shift register is a device capable of retaining information in the form of a binary
number, i.e., the register can store a binary word. In addition of being used as temporary
memory, an optical shift register also have the ability to make successive shifts to the left or to
the right. An optical shift register scheme [8] is demonstrated in figure 9, which consists of an
optical converter in combination with two cascaded AOFFs.

Figure 9: Optical shift register scheme

The intensity modulated input data is transformed by the optical converter into
wavelength encoded data and, subsequently, injected into the port In1 of AOFF1, which is
cascaded with AOFF2. Each AOFF is based on two ring lasers, with a single active element and a
feedback arm [14]. The two cascaded AOFFs are controlled by optical clock pulses that are
required to clear the states of the optical flip-flops. The output from AOFF1 then sets the new

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state of AOFF2. After this operation, the delayed clock pulse is injected into the port In2 of
AOFF1 and subsequently clears its state. The signal encoded in wavelength that outputs from
the optical converter then sets the new state of AOFF1. Thus a compete shift function has
been realized.

8.2 All-Optical RAM

An all-optical RAM eliminates the need for optical-electrical-optical (O/E/O) conversion,
which Is the main cause of delays in the case of opto-electronic RAMs, where a large portion of
the time and energy is wasted due to repeated opto-Electronic conversions. Basic AO-RAMs
support error free Read/Write Speeds of 5 Gbps. More Complex AO-RAM systems making use
of WDM have been shown to support speeds of up to 160 Gbps (compared to 2 Gbps supported
by comparable e-RAMs)

8.3 All-Optical Packet Routing

An optical packet routing/switching scheme can forward optical packets to the
appropriate destination port, based on the address information that is encoded by the attached
labels. The information required for optical routing is carried together with the optical signal
(e.g. label) and since it can be extracted and added from the optical signal without opticalelectrical-optical (O/E/O) conversion, lower power consumptions can be expected

8.3.1 All-Optical Packet Switching

The optical flip-flop based on a single SOA-MZI, with a coupler inside the feedback loop,
can be used as an optical packet-forwarding unit, depending on the optical set/reset
information.
The setup [9] of the proposed packet switching scheme is shown in Figure 10 and data
flow is forwarded through the flip-flop, without compromise the latching operation. The
operation principle of this packet switching scheme is very simple: the packet comes out if the
flip-flop is ON, and is blocked otherwise.
Accordingly, if a packet is delimited with valid header and trailer, the address
recognition module will deliver a Set pulse at the beginning of the packet and a Reset pulse at
the end of packet. The first pulse will turn the flip-flop ON and allow the packet to propagate to
its destination. The second pulse will turn it OFF so that further packets with invalid addresses
are blocked.

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Figure 10: Packet forwarding gate based on flip-flop

8.3.2 All-Optical Content Resolution

The all-optical packet switching schemes, presented in 8.3.2, can forward one
packet at any given moment. However, when multiple packets arrive for the same
output port, at the same time, contention occurs. All-optical packet contention can be
solved in the wavelength, space and time domain. In the wavelength domain,
wavelength conversion is needed to prevent the collision of the packets. In the space
domain, space deflection provides separate routes, which avoids the contention of the
packets. Finally, in the time domain, when packets arrive at the same time, they are
routed to different optical delay lines (ODLs) and the collision is avoided.
In figure 11, an optical circuit is demonstrated, relying on the hybrid integrated
optical flip-flop that performs on-the-fly contention resolution between 40 Gb/s packets
of the same wavelength.

Figure 11: Contention resolution concept [10]

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9. Advantages of Optical Flip-Flops over Electronic Flip-Flops

Increased circuit simplicity

Increased Speed
Reduced number of active elements and associated power consumption

RAM bank implementations with smarter column/row encoders/decoder while enabling for
re-configurability in optical cache mapping.

10. Disadvantages of Optical Flip-Flops

Difficulty in fabrication since related technologies are still under research

As of now, commercially not viable.
Full potential cannot be exploited as of now.

11. Conclusion
Despite the proven high-speed potential of optical signal processing circuitry, photonic
processing devices still experience several difficulties in convincing about their functional
potential, one main reason for this being the absence of a reliable optical Random Access
Memory (RAM).
As network traffic continues to increase each year, unless Moores law reaches to a
limit, the power consumption in CMOS VLSI chips will soon consume hundreds of Watts. Optical
communication networks, with photonic integration capability, may provide higher speeds,
with reduced environmental impacts. Applications nowadays range from all-optical shift
registers to threshold functions and packet forwarding, being packet duration holding the most
common and immediate application. Integration and silicon photonics can bring a new age of
development for these devices in terms of cost and performance integration in more complex
functions, opening in this way a route for a next generation of applications and functionalities.

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[2] S. McKee, Reflections on the Memory Wall, in Proceedings of the 1st Conf. on Comp.
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[3] Hill M., Vries T., Dorren H. J. S., Leijtens X., Zantvoort J. H. C., Besten J., Smallbrugge B., Oei
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[6] Photonic RAM: The key for facilitating an Optical Router development, NTT Photonic
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Semiconductor Optical Amplifiers.Op. Letters, 2009, 34, (22), Pp. 35173519
[8] Zhang S., Li Z., Liu Y., Khoe G., Dorren H. J. S.: Optical Flip-Flop Shift Register Based On An
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[9] Brahmi H., Bougioukos M., Menif M., Maziotis A., Stamatiadis C., Kouloumentas C.,
Apostolopoulos D., Avramopoulos H., Erasme D.: Experimental Demonstration Of An AllOptical Packet Forwarding Gate Based On A Single Soa-Mzi At 40 Gb/S. Proc. Ofc/Nfoec 2011,
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[10] Stamatiadis C., Bougioukos M., Maziotis A., Bakopoulos P., Stampoulidis L., Avramopoulos
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