Anda di halaman 1dari 5

Graphene nanopore field effect transistors

Wanzhi Qiu and Efstratios Skafidas


Citation: Journal of Applied Physics 116, 023709 (2014); doi: 10.1063/1.4889755
View online: http://dx.doi.org/10.1063/1.4889755
View Table of Contents: http://scitation.aip.org/content/aip/journal/jap/116/2?ver=pdfcov
Published by the AIP Publishing
Articles you may be interested in
Substrate dielectric effects on graphene field effect transistors
J. Appl. Phys. 115, 194507 (2014); 10.1063/1.4879236
High carrier mobility in suspended-channel graphene field effect transistors
Appl. Phys. Lett. 103, 193102 (2013); 10.1063/1.4828835
Transfer-free fabrication of graphene field effect transistor arrays using solid-phase growth of graphene on a
SiO2/Si substrate
Appl. Phys. Lett. 103, 183114 (2013); 10.1063/1.4829137
Hysteretic response of chemical vapor deposition graphene field effect transistors on SiC substrates
Appl. Phys. Lett. 103, 053123 (2013); 10.1063/1.4816426
Phonon limited transport in graphene nanoribbon field effect transistors using full three dimensional quantum
mechanical simulation
J. Appl. Phys. 112, 094505 (2012); 10.1063/1.4764318

[This article is copyrighted as indicated in the article. Reuse of AIP content is subject to the terms at: http://scitation.aip.org/termsconditions. Downloaded to ] IP:
131.156.157.31 On: Sun, 23 Nov 2014 07:13:43

JOURNAL OF APPLIED PHYSICS 116, 023709 (2014)

Graphene nanopore field effect transistors


Wanzhi Qiu1,2 and Efstratios Skafidas1,2,a)
1

Centre for Neural Engineering, The University of Melbourne, 203 Bouverie Street, Carlton, Victoria 3053,
Australia
2
Department of Electrical and Electronic Engineering, The University of Melbourne, Parkville, Victoria 3010,
Australia

(Received 27 March 2014; accepted 27 June 2014; published online 11 July 2014)
Graphene holds great promise for replacing conventional Si material in field effect transistors
(FETs) due to its high carrier mobility. Previously proposed graphene FETs either suffer from low
ON-state current resulting from constrained channel width or require complex fabrication processes
for edge-defecting or doping. Here, we propose an alternative graphene FET structure created on
intrinsic metallic armchair-edged graphene nanoribbons with uniform width, where the channel
region is made semiconducting by drilling a pore in the interior, and the two ends of the nanoribbon
act naturally as connecting electrodes. The proposed GNP-FETs have high ON-state currents due
to seamless atomic interface between the channel and electrodes and are able to be created with
arbitrarily wide ribbons. In addition, the performance of GNP-FETs can be tuned by varying pore
size and ribbon width. As a result, their performance and fabrication process are more predictable
and controllable in comparison to schemes based on edge-defects and doping. Using first-principle
transport calculations, we show that GNP-FETs can achieve competitive leakage current of
70 pA, subthreshold swing of 60 mV/decade, and significantly improved On/Off current ratios
C 2014 AIP Publishing LLC.
on the order of 105 as compared with other forms of graphene FETs. V
[http://dx.doi.org/10.1063/1.4889755]
I. INTRODUCTION

Field effect transistors (FETs) are electronic current


controlling devices that play an important role in amplifiers,
digital circuits, and memory devices. As FETs are scaled
down to nano-meter sizes, it becomes very difficult for current
CMOS technology using conventional material Si and its oxide
(SiO2) to keep leakage current to an acceptably low level.1
Alternative materials with high carrier mobility have been considered for the replacement of Si so that power dissipation due
to leakage current can be minimized. One of the most promising materials in this regard is graphene due to its extraordinarily high electron mobility and low carrier effective mass.1
Graphene is a flat monolayer of carbon atoms tightly
packed into a two-dimensional (2D) honeycomb lattice.2 In
order to achieve certain transport properties for interconnecting and sensing applications, a range of 1D graphene
structures has been proposed38 that include graphene nanoribbons (GRs), L-shaped junctions, constrictions, wedgeshaped junctions, and graphene nanopores (GNPs).
Studies have shown that due to quantum confinement,
zigzag-edged GRs are always metallic and armchair-edged
GRs can be either metallic or semiconducting depending on
the width. In particular, armchair-edged GRs with
Na 3p 2 atoms in its width, where p is a positive integer,
are metallic, and otherwise semi-conducting.9 It has also
been shown that for a semi-conducting armchair-edged GR,
its bandgap is inversely proportional to its width.10
Graphene FETs utilizing these bandgap properties of
GRs have previously been proposed.1,1116 One form uses
a)

Author to whom correspondence should be addressed. Electronic mail:


sskaf@unimelb.edu.au.

0021-8979/2014/116(2)/023709/4/$30.00

semiconducting armchair-edged GRs as channel and zigzagedged GRs as electrodes with angled-ribbons between,
resulting in a Z-shaped nanoribbon junction structure.12,13
This structure requires extremely narrow GRs to open a gap
wide enough for good switch-off and, therefore, suffers from restricted ON-state current. Other schemes of graphene FETs
introduce carefully designed edge defects or doping into zigzagedged GRs to create semiconducting channels. 11,14,15 These
designs bring in additional complexity into the fabrication process and uncertainty in the performance of resulting FETs.
Here, we propose an alternative graphene FET structure
that is created on intrinsic metallic armchair-edged GRs with
uniform width, where the channel region is made semiconducting by drilling a pore in the interior, and the two ends of
the nanoribbon act naturally as connecting electrodes. The
proposed GNP-FETs will be shown to have remarkable ONstate currents due to seamless atomic interface between the
channel and electrodes and the option of being created with
arbitrarily wide ribbons. In addition, the performance of
GNP-FETs can be tuned by varying pore size and ribbon
width. As a result, their performance and fabrication process
are more predictable and controllable than that of schemes
based on edge-defects and doping.
II. THE PROPOSED GNP-FETs

Fig. 1 depicts the proposed GNP structure for FETs,


where L and W are the length and width, respectively, of the
metallic armchair-edged ribbon with M hexatomic rings in its
length and N atoms in its width. The pore is created in the
center of the ribbon and its length (Lp) and width (Wp) are
determined by the number of hexatomic rings (Mp) in its
length and number of atoms (Np) in its width, respectively. In

116, 023709-1

C 2014 AIP Publishing LLC


V

[This article is copyrighted as indicated in the article. Reuse of AIP content is subject to the terms at: http://scitation.aip.org/termsconditions. Downloaded to ] IP:
131.156.157.31 On: Sun, 23 Nov 2014 07:13:43

023709-2

W. Qiu and E. Skafidas

FIG. 1. Geometry of the proposed GNP structure for FETs prior to passivation. M and Mp are numbers of hexatomic rings in length of the ribbon and
pore, respectively. N and Np are numbers of atoms in width of the ribbon
and pore, respectively. Shown in this figure are M 10 and N 17 (corresponding to a ribbon of length L 4.1 nm and width W 2.0 nm), and
Mp 4 and Np 7 (corresponding to a pore of length Lp 1.6 nm and
width Wp 0.7 nm).

our quantum transport simulations, we employ the density


functional theory (DFT)17 and non-equilibrium Greens function method,18 where the local density approximation (LDA)
is used and mesh cutoff of carbon atoms is chosen to be100
Ry. All dangling bonds are passivated by hydrogen atoms.
Prior to transport calculations, the geometries are optimized
(i.e., energy relaxation) by relaxing the atom coordinates so
that the forces on individual atoms are minimized to be
. The commercial package Atomistix
smaller than 0.05 eV/A
ToolKit (ATK) from QuantumWise19 was utilized in our study.
Although the transport properties calculated using these models
can be affected by the non-equilibrium states and uncertain
boundary conditions associated with low-dimensionality of 1D
electrodes,20 the adopted methodology has been successful in
simulating various graphene nanostructures.19 Unless stated
otherwise, the following default GNP parameters were adopted:
M 14 (corresponding to ribbon length L 5.8 nm), N 17
(corresponding to ribbon width W 2.0 nm), Mp 4 (corresponding to pore length Lp 1.6 nm) and Np 7 (corresponding to pore width Wp 0.7 nm).
Supplementary information Figs. S1-S321 show three
optimized passivated GNPs with pore lengths Mp 3, 4, and
5, respectively. Fig. 2 shows the transmission spectrum of
these GNPs. It can be seen that the introduction of the nanopore into the metallic armchair-edged ribbon opens the
bandgap effectively. To understand this effect, we examine
the microscopic distribution of local density of states
(LDOS) using the GNP with Mp 4 as an example. Fig. 3(a)
shows the LDOS distribution at the Fermi level, where nonzero LDOS only appear around the two vertical pore-edges.
It is these nonbonding states7 that give rise to the transmission valley around the Fermi level (EF). As the energy deviates >0.2 eV from EF, significantly more energy states
exist that open hopping paths for electrons to cross the channel and thus provide substantial transmission, as shown in
Fig. 3(b) for energy 0.3 eV above the Fermi level.
We now investigate the switching performance of the
GNPs when used as FETs, starting with the abovementioned three GNPs that differ only in pore length with

J. Appl. Phys. 116, 023709 (2014)

FIG. 2. Transmission spectrum of GNPs with different pore lengths. GNP


parameters are M 14 (i.e., ribbon length L 5.8 nm), N 17 (i.e., ribbon
width W 2.0 nm), Np 7 (i.e., pore width Wp 0.7 nm), and Mp 3, 4,
and 5 (i.e., pore length Lp 1.1 nm, 1.6 nm and 2.0 nm), respectively. EF
denotes the Fermi level.

Mp 3, 4, and 5, respectively. Fig. 4 shows their current vs.


gate voltage curves under a bias voltage of Vbias 20 mV.
The extracted subthreshold swing (SS) for these FETs are
[70.0 66.8 65.2] mV/decade, which are close to the theoretical limit of conventional Si-based FETs (Ref. 22) and comparable to what obtained with other forms of graphene
FETs.1113 The sufficiently low OFF-state leakage currents
are [0.12 0.07 0.06] nA and impressively high ON-state currents are [1.34 1.23 1.26] uA, leading to ION/IOFF ratios of
[1.14 1.70 1.95]  104. This ION/IOFF performance significantly exceeds those achieved by most other schemes of graphene FETs.1113 The large ON-state currents manifest

FIG. 3. LDOS at different energies of the GNP with M 14, N 17,


Mp 4 and Np 7. (a) E EF. (b) E EF 0.3 eV. EF denotes the Fermi
level.

[This article is copyrighted as indicated in the article. Reuse of AIP content is subject to the terms at: http://scitation.aip.org/termsconditions. Downloaded to ] IP:
131.156.157.31 On: Sun, 23 Nov 2014 07:13:43

023709-3

W. Qiu and E. Skafidas

J. Appl. Phys. 116, 023709 (2014)

FIG. 4. Current vs. gate voltage of the GNP-FETs with different pore
lengths under a bias voltage of Vbias 20 mV. GNP parameters are M 14
(i.e., ribbon length L 5.8 nm), N 17 (i.e., ribbon width W 2.0 nm),
Np 7 (i.e., pore width Wp 0.7 nm), and Mp 3, 4, and 5 (i.e., pore
length Lp 1.1 nm, 1.6 nm and 2.0 nm), respectively.

FIG. 6. Current vs. gate voltage curves of the GNP-FETs with different ribbon widths under a bias voltage of Vbias 20 mV, where the pore size
(Lp 1.6 nm, Wp 0.7 nm) and ribbon length (L 5.8 nm) are kept constant. N 17, 29 and 41 corresponds to ribbon widths W 2.0 nm, 3.4 nm,
and 4.9 nm, respectively.

seamless atomic interface between the channel and electrodes in GNP-FETs. These results also indicate that increasing
the pore length leads to slight reduction of leakage current
and increase in ION/IOFF ratio. Fig. 5 plots the currents vs.
bias voltage curves under different gate voltages (Vg) for the
case Mp 4, where good Ohmic behaviour is observed for
relatively large gate voltages (0.30.5 V) and small bias
(<0.2 V).
We now study the situations when the same pore is created in increasingly wider ribbons. This is done by keeping
the pore size and ribbon length constant and setting N to 17,
29, and 41, respectively (corresponding to ribbon widths
2.0 nm, 3.4 nm, and 4.9 nm, respectively). Supplementary information Figs. S2, S4-S5 (Ref. 21) show the geometries of
these GNPs, and Fig. 6 shows the resulting current vs. gate
voltage curves. We see that increasing the ribbon width
raises ON-state current and, more significantly, OFF-current,
leading to performance degradation. The extracted SS and
ION/IOFF ratios for the three ribbon widths are [66.8 68.9

74.2] mV/decade and [1.701 0.056 0.013]  104, respectively. This effect can be understood by viewing the transmission spectrum of these GNPs, shown in the
supplementary information Fig. S6.21 There it can be seen
that bandgap decreases when ribbon width is increased. In
other words, the effectiveness of bandgap-opening of the
pore is reduced for wider ribbons.
Next, we demonstrate how the performance of wideribbon GNP-FETs can be improved by enlarging the pore. In
particular, we increase the pore width of the 4.9 nm wide
GNP-FET. Fig. 7 shows the current vs. gate voltage curves
for Np values 7, 19, and 31 (corresponding to pore widths
0.7 nm, 2.2 nm, and 3.7 nm). Supplementary information
Figs. S5, S7-S8 (Ref. 21) show the geometries of these
GNPs. It can be seen that enlarging the pore significantly
reduces the OFF-state current, leading to improved performance. The extracted SS and ION/IOFF ratios for the three pore

FIG. 5. Current vs. bias voltage curves of the GNP-FET with M 14 (i.e.,
ribbon length L 5.8 nm), N 17 (i.e., ribbon width W 2.0 nm), Mp 4
(i.e., pore length Lp 1.6 nm), and Np 7 (i.e., pore width Wp 0.7 nm).

FIG. 7. Current vs. gate voltage curves of the GNP-FETs with varying pore
width under a bias voltage of Vbias 20 mV, where the ribbon size
(L 5.8 nm, W 4.9 nm) and pore length (Lp 1.6 nm) are kept constant.
Np 7, 19 and 31 corresponds to pore widths Wp 0.7 nm, 2.2 nm, and
3.7 nm, respectively.

[This article is copyrighted as indicated in the article. Reuse of AIP content is subject to the terms at: http://scitation.aip.org/termsconditions. Downloaded to ] IP:
131.156.157.31 On: Sun, 23 Nov 2014 07:13:43

023709-4

W. Qiu and E. Skafidas

J. Appl. Phys. 116, 023709 (2014)

current changes slowly in response to gate voltage change.


In practice, the effects of possible edge defects due to limitations on the precision of fabrication processes need to be
properly evaluated and addressed.
III. SUMMARY

The proposed GNP-FET structure achieves comparable


OFF-state leakage current and switching speed as compared
with other graphene FET proposals and significantly outperforms them in the ION/IOFF ratio. In addition, they can be created on arbitrarily wide ribbons and do not require complex
fabrication process involved in doping or edge-defecting.
However, defect-induced performance changes need to be
taken into account when fabricating real devices.
FIG. 8. Current vs. gate voltage (Vbias 20 mV) of the perfect-edge
GNP_PER-FET (with GNP structure shown in supplementary information
Fig. S1) and GNP-FETs with vacancy defects (with GNP structures shown
in supplementary information Figs. S10S12).

widths are [74.2 65.5 63.2] mV/decade and [0.013 0.21 18.6]
 104, respectively. The transmission spectrum of these
GNPs, shown in the supplementary information Fig. S9,21
reveals that larger pores are more effective in bandgapopening. As can be seen from these results, as long as the
pore is adequately large, good OFF-state current and SS performances are achieved. In addition, the ION/IOFF ratio can
be made increasingly large by simultaneously widening the
ribbon and pore, which is a unique feature of GNP-FETs.
Finally, we evaluate the effects of graphene edge
defects. Three GNPs with vacancy defects are considered
where GNP_D1 has one broken pore-edge, GNP_D2 has two
broken pore-edges, and GNP_D3 has a circular pore.
Supplementary information Figs. S10-S1321 depict the geometries of these GNPs and their transmission spectra. There
it can be seen that all the three irregular pores are able to
open the bandgap. The defect-induced performance changes
can be observed in Fig. 8, where the current vs. gate voltage
curves of the corresponding GNP-FETs are shown. It can be
seen that, as compared to its perfect edge counterpart,
GNP_D1-FET has a deterioration of 15 mV/decade in SS
and an order of magnitude drop in ION/IOFF ratio due to
increased leakage current. While GNP_D2-FET and
GNP_D3-FET exhibit reasonably good SS and Ion/Ioff
ratios, the curves are no longer symmetric in respect to the
current minimum and there are low-slope regions where the

F. Chaudhry, Fundamentals of Nanoscaled Field Effect Transistors


(Springer, New York, 2013), pp. 169175.
2
A. K. Geim, Science 324(5934), 15301534 (2009).
3
F. Mu~
noz-Rojas, D. Jacob, J. Fernandez-Rossier, and J. J. Palacios, Phys.
Rev. B 74, 195417 (2006).
4
Y. Wu and P. A. Childs, Nanoscale Res. Lett. 6, 62 (2011).
5
S. Hong, Y. Yoon, and J. Guo, Appl. Phys. Lett. 92, 083107 (2008).
6
H. Li, L. Wang, and Y. Zheng, J. Appl. Phys. 105, 013703 (2009).
7
H. Yin, W. Li, X. Hu, and R. Tao, J. Appl. Phys. 107, 103706 (2010).
8
W. Qiu and E. Skafidas, Phys. Chem. Chem. Phys. 16, 14511459 (2014).
9
Y.-W. Son, M. L. Cohen, and S. G. Louie, Phys. Rev. Lett. 97, 216803
(2006).
10
M. Ezawa, Phys. Rev. B 73, 045432 (2006).
11
K.-T. Lam and G. Liang, in Proceedings of the IEEE 13th International
Workshop on Computational Electronics, Beijing, China, 2729 May 2009
(Institute of Electrical and Electronics Engineers, USA, 2009), pp. 13.
12
Q. Yan, B. Huang, J. Yu, F. Zheng, J. Zang, J. Wu, B.-L. Gu, F. Liu, and
W. Duan, Nano Lett. 7(6), 14691473 (2007).
13
K.-T. Lam, Y.-Z. Peck, Z.-H. Lim, and G. Liang, in Proceedings of the
IEEE 4th International Nanoelectronics Conference, Tao-Yuan, Taiwan,
2124 June 2011 (Institute of Electrical and Electronics Engineers, USA,
2009), pp 12.
14
Y. Zhang, S.-H. Wu, Y. P. Ke, Feng, and C. Zhang, Nanotechnology 22,
435702 (2011).
15
Q. Liang and J. Dong, Nanotechnology 19, 355706 (2008).
16
Y. An, X. Wei, and Z. Yang, Phys. Chem. Chem. Phys. 14, 15802 (2012).
17
J. M. Soler, E. Artacho, J. D. Gale, A. Garca, J. Junquera, P. Ordej
on, and
D. Sanchez-Portal, J. Phys.: Condens. Matter 14, 2745 (2002).
18
S. Datta, Quantum Transport: Atom to Transistor (Cambridge University
Press, Cambridge, 2005).
19
See www.quantumwise.com for Atomistix ToolKit version 12.8.2,
QuantumWise A/S.
20
Z. Qian, R. Li, S. Hou, and Z. Xue, J. Chem. Phys. 127, 194710 (2007).
21
See supplementary material at http://dx.doi.org/10.1063/1.4889755 for
structures, transmission spectrum and current vs. gate voltage curves of
some GNP-FETs under study.
22
S. M. Sze, Physics of Semiconductor Devices (Wiley, New York, 1981).

[This article is copyrighted as indicated in the article. Reuse of AIP content is subject to the terms at: http://scitation.aip.org/termsconditions. Downloaded to ] IP:
131.156.157.31 On: Sun, 23 Nov 2014 07:13:43

Anda mungkin juga menyukai