Microprocessor System Design Questions

AC23
MicroprocessorBasedSystemDesign
TYPICALQUESTIONS&ANSWERS
PARTI
OBJECTIVETYPEQUESTIONS
EachQuestioncarries2marks.
Choosethecorrectorbestalternativeinthefollowing:
Q.1
Ifthecrystaloscillatorisoperatingat15MHz,thePCLKoutputof8284is
(A)2.5MHz.
(B)5MHz.
(C)7.5MHz.
(D)10MHz.
Ans:(A)
Q.2
InwhichTstatedoestheCPUsendstheaddresstomemoryorI/OandtheALEsignal
fordemultiplexing
(A)T1.
(B)T2.
(C)T3.
(D)T4.
Ans,Duringthefirstclockingperiodinabuscycle,whichiscalledT1,theaddressof
thememoryorI/OlocationissentoutandthecontrolsignalsALE,DT/RandIO/M
arealsooutput.Henceansweris(A).
Q.3
Ifa1M1DRAMrequires4msforarefreshandhas256rowstoberefreshed,no
morethan__________oftimemustpassbeforeanotherrowisrefreshed.
(A)64ms.
(B)4ns.
(C)0.5ns.
(D)15.625s.
AnsAnsweris(B)
Q.4
InaDMAwriteoperationthedataistransferred
(A)fromI/Otomemory.
(B)frommemorytoI/O.
(C)frommemorytomemory.
(D)fromI/OtoI/O.
AnsADMAwritesoperationtransfersdatafromanI/Odevicetomemory.Hence
answeris(A).
Q.5
WhichtypeofJMPinstructionassemblesifthedistanceis0020hbytes
(A)near.
(B)far.
(C)short.
(D)noneoftheabove.
AnsThethreebytenearjumpallowsabranchorjumpwithin32Kbytes.Hence
answeris(A).
Q.6
AcertainSRAMhasCS0,WE0andOE1.Inwhichofthefollowing
modesthisSRAMisoperating
(A)Read
(B)Write
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(C)Standby
(D)Noneoftheabove
AnsForCS=WE=0,writeoperation.Henceansweris(B).
Q.7
WhichofthefollowingistruewithrespecttoEEPROM?
(A) contentscanbeerasedbytewiseonly.
(B) contentsoffullmemorycanbeerasedtogether.
(C) contentscanbeerasedusingultravioletrays
(D) contentscannotbeerased
AnsAnsweris(C).
Q.8
Pseudoinstructionsarebasically
(A) falseinstructions.
(B) instructionsthatareignoredbythemicroprocessor.
(C) assemblerdirectives.
(D) instructionsthataretreatedlikecomments.
Ans Pseudoinstructions are commands to the assembler. All pseudooperations start
withaperiod.Pseudoinstructionsarecomposedofapseudooperationwhichmaybe
followedbyoneormoreexpressions.Henceansweris(C).
Q.9
Numberofthetimestheinstructionsequencebelowwillloopbeforecomingoutof
loopis
MOVAL,00h
A1:INCAL
JNZA1
(A)00
(C)255
(B)01
(D)256
AnsAnsweris(D)
Q.10
WhatwillbethecontentsofregisterALafterthefollowinghasbeenexecuted
MOVBL,8C
MOVAL,7E
ADDAL,BL
(A) 0Aandcarryflagisset
(B)0Aandcarryflagisreset
(D)6Aandcarryflagisreset
(C) 6Aandcarryflagisset
Ans,Resultis1,0A.Henceansweris(A).
Q.11Directionflagisusedwith
(A) Stringinstructions.
(C) Arithmeticinstructions.
(B)Stackinstructions.
(D)Branchinstructions.
AnsThedirectionflagisusedonlywiththestringinstructions.Henceansweris(A).
Q.12
Readypinofamicroprocessorisused
(A) toindicatethatthemicroprocessorisreadytoreceiveinputs.
(B) toindicatethatthemicroprocessorisreadytoreceiveoutputs.
(C) tointroducewaitstates.
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(D)toprovidedirectmemoryaccess.
AnsThisinputiscontrolledtoinsertwaitstatesintothetimingofthemicroprocessor.
Henceansweris(C).
Q.13
ThesearetwowaysinwhichamicroprocessorcancomeoutofHaltstate.
(A)Whenholdlineisalogical1.
(B)Wheninterruptoccursandtheinterruptsystemhasbeenenabled.
(C)Whenboth(A)and(B)aretrue.
(D)Wheneither(A)or(B)aretrue.
AnsAnsweris(A)
Q.14
IntheinstructionFADD,Fstandsfor
(A)Far.
(B)Floppy.
(C)Floating.
(D)File.
AnsAddstwofloatingpointnumbers.Henceansweris(C).
Q.15
SDRAMrefersto
(A)SynchronousDRAM
(C)SemiDRAM
(B)StaticDRAM
(D)SecondDRAM
Ans,Answeris(A)
Q.16
IncaseofDVD,thespeedisreferredintermsofnX(forexample32X).Here,X
refersto
(A)150KB/s
(B)300KB/s
(C)1.38MB/s
(D)2.4MB/s
AnsAnsweris(C).
Q.17
ItaniumprocessorofIntelisa
(A)32bitmicroprocessor.
(C)128bitmicroprocessor.
(B)64bitmicroprocessor.
(D)256bitmicroprocessor.
AnsTheItaniumisa64bitarchitecturemicroprocessor.Henceansweris(B).
Q.18
LOCKprefixisusedmostoften
(A)duringnormalexecution.
(C)duringinterruptservicing.
(B)duringDMAaccesses
(D)duringmemoryaccesses.
AnsLOCKisaprefixwhichisusedtomakeaninstructionof8086noninterruptable.
Henceansweris(C).
Q.19
ThePentiummicroprocessorhas______executionunits.
(A)1
(B)2
(C)3
(D)4
AnsThePentiummicroprocessorisorganizedwiththreeexecutionunits.One
executesfloatingpointinstructions,andtheothertwo(UpipeandVpipe)execute
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integerinstructions.Henceansweris(C).
Q.20
EPROMisgenerallyerasedbyusing
(A)Ultravioletrays
(C)12Velectricalpulse
(B)infraredrays
(D)24Velectricalpulse
AnsTheEPROMiserasableifexposedtohighintensityultravioletlightforabout20
minutesorless.Henceansweris(A)
Q.21 SignalvoltagerangesforalogichighandforalogiclowinRS232Cstandardare
(A) Low=0voltto1.8volt,high=2.0voltto5volt
(B) Low=15voltto3vol,high=+3voltto+15volt
(D) Low=+3voltto+15volt,high=3voltto15volt
(E) Low=2voltto5.0volt,high=0voltto1.8volt
AnsAnsweris(B)
Q.22
ThePCIbusistheimportantbusfoundinallthenewPentiumsystemsbecause
(A) Ithasplugandplaycharacteristics
(B) Ithasabilitytofunctionwitha64bitdatabus
(C) AnyMicroprocessorcanbeinterfacedtoitwithPCIcontrollerorbridge
(D) Alloftheabove
Ans,Answeris(D).
Q.23
Whichofthefollowingstatementistrue?
(A) Thegroupofmachinecycleiscalledastate.
(B) Amachinecycleconsistsofoneormoreinstructioncycle.
(C) Aninstructioncycleismadeupofmachinecyclesandamachinecycle
ismadeupofnumberofstates.
(D) Noneoftheabove
AnsAninstructioncycleconsistsofseveralmachinecycles.HenceAnsweris(B).
Q.24
8251isa
(A) UART
(B) USART
(C) ProgrammableInterruptcontroller
(D) Programmableintervaltimer/counter
AnsTheIntel8251isaprogrammablecommunicationinterface.ItisUSART.
Q.25
8088microprocessorhas
(A)16bitdatabus
(C)6byteprefetchqueue
(B)4byteprefetchqueue
(D)16bitaddressbus
AnsThe8088isa16bitmicroprocessorwithan8bitdatabus.The16bitaddress
bus.Henceansweris(D).
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Q.26
(B)Two
(D)Four
Bywhatfactordoesthe8284Aclockgeneratordividethecrystaloscillatorsoutput
frequency?
(A)One
(C)Three
AnsWhenF/Cisatlogic0;Theoscillatoroutputissteeredthroughtothedivideby
3counter.Henceansweris(c).
Q.27
ThememorydatabuswidthinPentiumis
(A)16bit
(B)32bit
(C)64bit
(D)Noneofthese
AnsTheDatabuswidthis64bits.Henceansweris(C).
Q.28
Whenthe82C55isreset,itsI/Oportsareallinitializesas
(A)outputportusingmode0
(B)Inputportusingmode1
(C)outputportusingmode1
(D)Inputportusingmode0
AnsARESETinputtothe82C55causesallportstobesetupassimpleinputports
usingmode0operations.Henceansweris(D).
Q.29
WhichmicroprocessorpinsareusedtorequestandacknowledgeaDMAtransfer?
(A)resetandready
(B)readyandwait
(C)HOLDandHLDA
(D)Noneothese
Ans,TheHOLDpinisaninputthatisusedrequestaDMAactionandtheHLDA pin
isanoutputthatthatacknowledgestheDMAaction.Henceansweris(C).
Q.30 Whichofthefollowingstatementisfalse?
(A) RTOSperformstasksinpredictableamountoftime
(B) Windows98isRTOS
(C) InterruptsareusedtodevelopRTOS
(D) KernelistheoneofcomponentofanyOS
AnsOperatingsystems,likeWindows,defermanytasksanddonotguaranteetheir
executioninpredictabletime.Henceansweris(B).
Q.31
TheVESAlocalbusoperatesat
(A)8MHz
(C)16MHz
(B)33MHz
(D)Noneofthese
AnsTheVESAlocalbusoperatesat33MHz.Henceansweris(B).
Q.32
Thefirstmoderncomputerwascalled_____________.
(A)FLOWMATIC
(B)UNIVACI
(C)ENIAC
(D)INTEL
Ans,ENIAC(ElectronicNumericalIntegratorAndComputer)wasthefirstgeneral
purposeelectroniccomputer.ItwasaTuringcomplete,digitalcomputercapableof
beingreprogrammedtosolveafullrangeofcomputingproblems.ENIACwas
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designedtocalculateartilleryfiringtablesfortheU.S.Army'sBallisticResearch
Laboratory.Henceansweris(c).
Q.33
SoftwarecommandCLEARMASKREGISTERinDMA
(A) Disablesallchannels.
(B) Enablesallchannels.
(C) None.
(D) Clearsfirst/lastflipflopwithin8237.
AnsEnablesallfourDMAchannels.Henceansweris(B).
Q.34
(B)CONFIG.SYS
(D)SYSTEM.INI
ThefirsttaskofDOSoperatingsystemafterloadingintothememoryistousethefile
called___________.
(A)HIMEM.SYS
(C)AUTOEXEC.BAT
Ans,ThefirsttaskoftheDOSoperatingsystem,afterloadingintomemory,isto use
afilecalledtheCONFIG.SYSfile.Thisfilespecifiesvariousdriversthatloadintothe
memory,settinguporconfiguringthemachineforoperationunderDOS.
Q.35Iftheprogrammablecountertimer8254issetinmode1andistobeusedtocount six
events,theoutputwillremainatlogic0for_____numberofcounts
(A)5
(B)6
(C)0
(D)Alloftheabove
Ans.OUTcontinuesforthetotallengthofthecount.Henceansweris(B).
Q.36
Theflashmemoryisprogrammedinthesystemby12Vprogrammingpulse.
(A)TRUE
(B)FALSE
(B)FALSE
AnsTheflashmemorydevicerequiresa12Vprogrammingvoltagetoeraseandwrite
newdata.Henceansweris(A).
Q.37Aplugandplay(PnP)interfaceisonethatcontainsamemorythatholds
configurationinformationofthesystem.
(A)TRUE
AnsAnsweris(A)
Q.38Theacceleratedgraphicsport(AGP)allowsvirtuallyanymicroprocessortobe
interfacedwithPCIbusviatheuseofbridgeinterface.
(A)TRUE
(B)FALSE
Ans,thisportprobablywillneverbeusedforanydevicesotherthanthevideocard.
Henceansweris(B).
Q.39 ABuscycleisequaltohowmanyclockingperiods
(A)Two
(B)Three
(C)Four
(D)Six
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AnsTypically,thebuscycleofthe8086and8088processorsconsistoffourclock cycles
orpulses.Thus,durationofabuscycleis=4*T.HenceAnsweris(C).
Q.40 ThetimerequiredtorefreshatypicalDRAMis
(A)24us
(B)24ns
(C)24ms
(D)24ps
AnsThecapacitorCsdischargesthroughtheinternalresistanceoftheNMOStransistor
10
T1.TypicallyCs=0.2pFandtheinternalresistanceRin=10 ohms,so:
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10
3
CsxRin=0.2x10 x10 x10 ms=2ms
Sothetypicalrefreshtimeintervalis2ms.HenceAnsweris(C).
Q.41 Theno.ofaddresslinesrequiredtoaddressamemoryofsize32Kis
(A)15lines
(B)16lines
(C)18lines
(D)14lines
5
10
15
Ans32K=32X1024bits=2 X2 =2 Henceansweris(A).
Q.42 Theno.ofwaitstatesrequiredtointerface8279to8086with8MHzclockare
(A)Two
(B)Three
(C)One
(D)None
AnsTwowaitstatesusedsothatdevicecanfunctionwithan8MHz.Henceanswersis
(A).
Q.43 NMIinputis
(A)Edgesensitive
(C)Bothedgeandleveltriggered
(B)Levelsensitive
(D)edgetriggeredandlevelsensitive
AnsNonmaskableinterrupt(NMI)isanedgetriggeredinputthatrequestsan
interruptonthepositiveedge(0to1transition).
Q.44 DatarateavailableforuseonUSBis
(A)12Mbitspersecond
(C)Both(A)and(B)
(B)1.5Mbitspersecond
(D)Norestriction
AnsDatatransferspeedsare12Mbpsforfullspeedoperationand1.5Mbpsforslow
speedoperation.Henceansweris(c).
Q.45
In80186,thetimerwhichconnectstothesystemclockis
(A) timer0
(B)timer1
(C) timer2
(D)Anyonecanbeconnected
Ans.Timer2isinternalandclockedbythemasterclock.Henceansweris(c).
Q.46 Conversionofthe+1000decimalnumberintosignedbinarywordresults
(A)0000001111101000
(B)1111110000011000
(C)1000001111101000
(D)0111110000011000
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Ans
1000/2=>5000
500/2=>2500
250/2=>1250
125/2=>621
62/2=>310
31/2=>151
15/2=>717/2=>3
13/2=>11
16bitsignednumberis
1000,0011,1110,1000HenceAnsweris(C).
Q.47 Whatdothesymbols[]indicate?
(A)Directaddressing
(C)Indirectaddressing
(B)RegisterAddressing
(D)Noneoftheabove
AnsAnsweris(C).
Q.48 SDRAMrefersto
(A)staticDRAM
(C)sequentialDRAM
(B)synchronousDRAM
(D)semiDRAM
Ans,Answeris(B)
Q.49 WhichpinsaregeneralpurposeI/Opinsduringmode2operationofthe82C55?
(A)PA0PA7
(B)PB0PB7
(C)PC3PC7
(D)PC0PC2
AnsInmode2PortAcanbeprogrammedtooperateasbidirectionalport.Themode2
operationisonlyforPortA.HenceAnsweris(A)
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PARTII
Q.1
DESCRIPTIVES
DescribetheoperationperformedbytheinstructionOUT47h,AL.
(3)
Ans:IttransfersthecontentofALtoI/Oport47h.NoticethatI/Oportnumber appears
as0047honthe16bitaddressbusandthatdatafromALappearsonthedatabusofthe
microprocessor.
Q.2
Howis8255(ProgrammablePeripheralInterface)configuredifitscontrolregister
contains9Bh.
(3)
Ans
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9BH=>10011011=>
b6b5=00>Mode0
b4=0>PortAasinput.
b3=1>PortCasinput(PC7
PC4)b2=0>Mode0
b1=1>PortBasinput
b0=1>PortCasinput(PC3PC0).
Q.3
Writeacontrolwordforcounter1of8253/8254thatselectsthefollowingoptions:load
least significant byte only, mode 5 of operation and binary counting. Then write an
instructionsequencethatwillloadthecontrolwordinto8253/8254thatislocatedat
address01000hofmemoryaddressspace.Assumethat8253/8254isattachedtothe
I/ObusoftheCPUandtheaddressinputsA0andA1aresuppliedbyA2andA3
respectively.
Ans
10
(5)
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Basedontheabovegivenconditionsandassumingcounter0isused.Thecontrol
wordbecomes00011010h.
Identifytheportaddress
TheCSisenabledwhenA7=1
TheControlRegisterisselectedwhenA1andA0=1
AssumingunusedaddresslinesA6toA2areatlogic
0,Thenportaddresswillbeasfollows
ControlRegister=
83HCounter2=82H
MVIA,B0H
OUT83H
MVIA,LOWBYTE
OUT82H
MVIA,HIGHBYTE
OUT82H
LOOP:MVIA,80H
OUT83H
IN82H
MOVD,A
IN82H
ORAD
JNZLOOP
RET
Q.4
Pentiumprocessorhasasuperscalararchitecture.Explainthemeaningofthe
statement.
(4)
Ans
ThePentiummicroprocessorisorganizedwiththreeexecutionunits.Oneexecutes
floatingpointinstructions,andtheothertwo(UpipeandVpipe)executeinteger
instructions. This means that it is possible to execute three instructions
simultaneously.
Q.5WriteashortnoteonRS232C.
(8)
Ans
The RS232 standard is a collection of connection standards between different
piecesofequipment.TheEIARS232serialcommunicationstandardisauniversal
standard, originally used to connect teletype terminals to modem devices. In a
modernPCtheRS232interfaceisreferredtoasaCOMport.TheCOMportuses
a9pinDtypeconnector(ReferFig(a))toattachtotheRS232cable.TheRS232
standarddefinesa25pinDtypeconnector(ReferFig(b))butIBMreducedthis
connectortoa9pindevicesoastoreducecostandsize.
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Fig(a)Female&MaleDB9Connector
Fig1(b)Female&MaleDB25Connector
Q.6Explaintheterms:simplex,halfduplexandfullduplex.
(6)
Ans
SimplexTransmission
Datainasimplexchannelisalwaysoneway.Simplexchannelsarenotoftenused
becauseitisnotpossibletosendbackerrororcontrolsignalstothetransmitend.
Anexampleofasimplexchannelinacomputersystemistheinterfacebetween
thekeyboardandthecomputer,inthatkeycodesneedonlybesentonewayfrom
thekeyboardtothecomputersystem.
HalfDuplexTransmission
Ahalfduplexchannelcansendandreceive,butnotatthesametime.Itslikea
onelanebridgewheretwowaytrafficmustgivewayinordertocross.Onlyone
endtransmitsatatime,theotherendreceives.
FullDuplexTransmission
Datacantravelinbothdirectionssimultaneously.Thereisnoneedtoswitch
fromtransmittoreceivemodelikeinhalfduplex.Itslikeatwolanebridgeon
atwolanehighway.
Q.7
HowDRAMsaredifferentfromSRAMs?WhyDRAMsaresaidtoemploy
addressmultiplexing?
(4)
Ans
DynamicRAM(DRAM)isessentiallythesameasSRAM,exceptthatitretains
dataforonly2or4msonaninternalcapacitor.After2or4ms,thecontentsof
the DRAM must be completely rewritten (refreshed) because the capacitors,
which store logic 1 or logic 0, lose their charges. The entire content of the
memory is refreshed with 256 reads in a 2to4 ms interval. Refreshing also
occursduringawrite,areadorduringaspecialrefreshcycle.
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Q.8
Explaintheoperationof8279.Explainthefollowingterms:
(i)
NkeyRollover.
(ii)
Keyboarddebounce.
(iii) FIFORAM.
(9)
Ans
The8279isaprogrammablekeyboardanddisplayinterfacingcomponentthat
scans and encodes up to a 64key keyboard and controls up to a 16digit
numerical display. The keyboard interface has built in firstinfirstout (FIFO)
bufferthatallowsitstoreuptoeightkeystrokesbeforethemicroprocessormust
retrieveacharacter.Thedisplaysectioncontrolsupto16numericdisplaysfrom
aninternal16X8RAMthatstoresthecodeddisplayinformation.
Thekeyboardsectionconsistsofeightlinesthatcanbeconnectedtoeight
columns of a keyboard, plus two additional lines as well as to shift and
CNTL/STB keys. The key pressed are automatically debounced and the
keyboardcanoperateintwomodestwokeylockoutornkeyrollover.Iftwo
keysinthetwokeylockoutmodearepressedsimultaneously,onlyfirstkey
isrecognized.IntheNkeyrollovermode,simultaneouskeyarerecognized
andtheircodesarestoredintheinternalbuffer.
Q.9
WhatarethedifferencesbetweenCGAandVGAgraphicsadapters?
(4)
Ans
TheColorGraphicsAdapter(CGA),originallyalsocalledtheColor/Graphics
Adapter or IBM Color/Graphics Monitor Adapter introduced in 1981, was
IBM'sfirstcolorgraphicscard,andthefirstcolorcomputerdisplaystandard
fortheIBMPC.
The standard IBM CGA graphics card was equipped with 16 kilobytes of
videomemory,andcouldbeconnectedeithertoaNTSCcompatiblemonitor
orTVviaanRCAjack,ortoadedicated4bit"RBGI"interfaceCRTmonitor,
suchastheIBM5153colordisplay.
The term Video Graphics Array (VGA) refers specifically to the display
hardwarefirstintroducedwiththeIBMPS/2lineofcomputersin1987,but
through its widespread adoption has also come to mean either an analog
computerdisplaystandard,the15pinDsubminiatureVGAconnectororthe
640480resolutionitself.Whilethisresolutionhasbeensupersededinthe
personal computer market, it is becoming a popular resolution on mobile
devices.
VGAwasofficiallysupersededbyIBM'sXGAstandard,butinrealityitwas
supersededbynumerousslightlydifferentextensionstoVGAmadebyclone
manufacturersthatcametobeknowncollectivelyas"SuperVGA".
Q.10
WhatdoyoumeanbyA/Dconversion?Explainanyoneofthefollowing
A/Dtechniques:
(i) Successiveapproximation.
(ii) Parallel/flashconverter.
(5)
Ans
Theelectroniccircuit,whichtranslatesananalogsignalintoadigitalsignal,
isknownasAnalogtoDigitalconverter(ADC).
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(i) SuccessiveapproximationADC
OnemethodofaddressingthedigitalrampADC'sshortcomingsisthesocalled
successiveapproximationADC.Theonlychangeinthisdesignisaveryspecial
countercircuitknownasasuccessiveapproximationregister.Insteadofcounting
upinbinarysequence,thisregistercountsbytryingallvaluesofbitsstartingwith
themostsignificantbitandfinishingattheleastsignificantbit.Throughoutthe
countprocess,theregistermonitorsthecomparator'soutputtoseeifthebinary
countislessthanorgreaterthantheanalogsignalinput,adjustingthebitvalues
accordingly.Thewaytheregistercountsisidenticaltothe"trialandfit"method
ofdecimaltobinaryconversion,wherebydifferentvaluesofbitsaretriedfrom
MSBtoLSBtogetabinarynumberthatequalstheoriginaldecimalnumber.The
advantage to this counting strategy is much faster results: the DAC output
convergesontheanalogsignalinputinmuchlargerstepsthanwiththe0tofull
countsequenceofaregularcounter.
Withoutshowingtheinnerworkingsofthesuccessiveapproximationregister
(SAR),thecircuitlookslikethis:
Fig:SuccessiveApproximationADCCircuit
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ItshouldbenotedthattheSARisgenerallycapableofoutputtingthebinary
numberinserial(onebitatatime)format,thuseliminatingtheneedforashift
register.Plottedovertime,theoperationofasuccessiveapproximationADC
lookslikethis:
Fig:SuccessiveApproximationADCCircuitInputandoutputWaveforms
ii.Parallel/flashconverter.
Also called the parallel A/D converter, this circuit is the simplest to
understand.Itisformedofaseriesofcomparators,eachonecomparingthe
inputsignaltoauniquereferencevoltage.Thecomparatoroutputsconnectto
theinputsofapriorityencodercircuit,whichthenproducesabinaryoutput.
Thefollowingillustrationshowsa3bitflashADCcircuit:
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Fig:FLASHADCCircuit
Vrefisastablereferencevoltageprovidedbyaprecisionvoltageregulatoras
partoftheconvertercircuit,notshownintheschematic.Astheanaloginput
voltageexceedsthereferencevoltageateachcomparator,thecomparator
outputswillsequentiallysaturatetoahighstate.Thepriorityencodergenerates
abinarynumberbasedonthehighestorderactiveinput,ignoringallother
activeinputs.
Q.11
Whatdoyoumeanbyexternalandinternaldatabus? Howarethesetworelated
in8088processor.
(2)
AnsInternalDataBus:Abusthatoperatesonlywithintheinternalcircuitryof the
CPU,communicatingamongtheinternalcachesofmemorythatarepartofthe
CPUchipsdesign.Thisbusistypicallyratherquickandisindependentoftherest
ofthecomputersoperations.
ExternalDataBus:Abusthatconnectsacomputertoperipheraldevices.The
8088microprocessorhas16bitregisters,16bitinternaldatabusand20bit
addressbus,whichallowstheprocessoraddressupto1MBofmemory.
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Q.12
WhatisthedifferencebetweenXTandATcomputersystem?
(2)
Ans
XT>extendedandAT>AdvancedTechnology
SomedifferencesbetweenthePCandXTincludethetypeofpowersupply
originallyincluded63vs135watts;thenumberandspacingofexpansion
slots5vs8;thePChasacassettetapeinterfaceconnectorontheback.
Q.13
Whatareprograminvisibleregisters?
(2)
Anstheglobalandlocaldescriptortablesarefoundinthememorysystem.In
ordertoaccessandspecifytheaddressofthesetables,theprograminvisible
registersused.Theprograminvisibleregistersarenotdirectlyaddressedby
softwaresotheyaregivenname.
TheGDTR(globaldescriptortableregister)andIDTR(interruptdescriptor
tableregister)containthebaseaddressesofthedescriptortableanditslimit.
Thelimitofeachdescriptortableis16bitsbecausethemaximumtablelengthis
64Kbytes.Whentheprotectedmodeoperationisdesired,theaddressofthe
globaldescriptortableanditslimitareloadedintotheGDTR.
Q.14
Theinterruptvectortableisalwayscreatedinthefirst1Kareaofthememory.
Justifythestatement.
(2)
AnsWhentheCPUreceivesaninterrupttypenumberfromthePIC,itusesthis
numbertolookupthecorrespondinginterruptvectorinmemory.Thereare256
interrupttypes.Eachinterruptvectoroccupies4bytes.Therefore,atotalof4x
256=1Kbytesofmemoryisreservedatthebeginningoftheprocessormemory
addressspaceforstoringinterruptvectors.
Q.15
Whatisthepurposeofcarry(c)flagandzero(z)flag?
(2)
AnsCarryflagholdsthecarryafteradditionortheborrowaftersubtraction.The
carryflagalsoindicateserrorconditions,asdictatedbysomeprogramsand
procedures.
TheZeroflagshowsthattheresultofanarithmeticorlogicaloperationiszero.
IfZ=1,theresultiszero;ifZ=0,theresultisnotzero.
Q.16
Whatis16bitISA?Compareitwith8bitISAbus.
(6)
AnsTheonlydifferencebetweenthe8and16bitISAbusisthatanadditional
connectorisattachedbehindthe8bitconnector.16bitISAcardcontainstwo
edgeconnectors.Oneplugsintotheoriginal8bitconnectorandotherplugsinto
the16bitconnector.Theaddedfeaturesthataremostoftenusedarethe
additionalinterruptrequestinputsandDMArequestsignals.Interfacesfound
fortheISAbusaremodemsandsoundcards.
Q.17
ComparememorymappedI/OwithI/OmappedI/O.
AnsMemoryMappedI/OScheme:Inthisschemethereisonlyoneaddress
space.Addressspaceisdefinedasallpossibleaddressesthatmicroprocessor
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(4)
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cangenerate.Someaddressesareassignedtomemoriesandsomeaddressesto
I/Odevices.AnI/Odeviceisalsotreatedasamemorylocationandoneaddress
isassignedtoit.Inthisschemeallthedatatransferinstructionsofthe
microprocessorcanbeusedforbothmemoryaswellasI/Odevice.Thisscheme
issuitableforasmallsystem.
InI/OmappedI/Oschemetheaddressesassignedtomemorylocationscanalso
beassignedtoI/Odevices.Sincethesameaddressmaybeassignedtoa
memorylocationoranI/Odevice,themicroprocessormustissueasignalto
distinguishwhethertheaddressontheaddressbusisforamemorylocationor
anI/Odevice.
Q.18
Explaininbriefthefunctionsoftheclockgeneratorchip,8284.
(4)
Ans,8284Clockgenerator:
The8284isanancillarycomponenttothemicroprocessors.Withoutclock
generator,manyadditionalcircuitsarerequiredtogeneratetheclockinan
microprocessorbasedsystem.A8284providesthefollowingbasicfunctionsor
signals:Clockgeneration,RESETsynchronization,READYsynchronization,
andaTTLlevelperipheralclocksignal.
Q.19
WriteabriefnoteonMMXtechnology.
(4)
Ans,MMX(Multimediaextensions)technologyadds57newinstructionstothe
instructionsetofthePentium4microprocessors.TheMMXtechnologyalso
introducesnewgeneralpurposeinstructions.ThenewMMXinstructionsare
designedforapplicationsuchasmotionvideo,combinedgraphicswithvideo,
imageprocessing,audiosynthesis,speechsynthesisandcompression,
telephony,videoconferencing,2Dgraphics,and3Dgraphics.Thesenew
instructionsoperateinparallelwithotheroperationsastheinstructionforthe
arithmeticcoprocessor.
TheMMXarchitectureintroducesnewpackeddatatypes.Thedatatypesare
eightpacked,consecutive8bitbytes;fourpacked,consecutive16bitwords;
andtwopacked,consecutive32bitdoublewords.
Q.20
Whatarethedifferentmodesinwhich8255ProgrammablePeripheralInterface
(PPI)canoperate?Writethe8086initialisationroutinerequiredtoprogram
8255formode1withPortAandPortBasoutputPortsandPortCasaninput
port.Indicatealltherelevantsignals.
(6)
Ans
24I/Olinesin38bitportgroupsA,B,C
A,Bcanbe8bitinputoroutputports
Ccanserveas24bitinputoroutputports
3modesofoperation:
Mode0:A,B,Csimpleinputoroutputlevelsensitiveports
Mode1:A,BinputoroutputportswithstrobecontrolinC
Mode2:Aisbidirectionalwithcontrol/handshakeinBandC
A,Bcanonlychange1byteatatime
Chasindividualbitset/resetcapability
Advantage is nondedicated circuit can change port configuration with
softwareandnogluelogic
18
AC23
PortsA,B,andCareusedforI/Odata.
Thecontrolregisterisprogrammedtoselecttheoperationmodeofthe
threeportsA,B,andC.
Mode0:simpleI/Omode
AnyoftheportsA,B,CLandCUcanbeprogrammedasinputoroutput.
Nocontrolofindividualbits(allbitsareoutorallbitsarein)
Mode0:
Mode1:
19
AC23
Mode2:
Q.21
ExplaintheoperationofIRETinstruction.Whatmemorylocationscontainthe
vectorforanINT34instruction?(4)
Ans
TheInterruptreturn(IRET)instructionisusedonlywithsoftwareorhardware
interruptserviceprocedures.WheneveranIRETinstructionexecutes,itstores
thecontentsofIandTfromthestack.Thisisimportantbecauseitpreserves
thestateoftheflagbits.Ifinterruptswereenabledbeforeaninterruptservice
procedure,theyautomaticallyreenabledbytheIRETinstructionbecauseit
restorestheflagregister.
InterruptNumber20FFarestoredatanaddress803FFH.
Q.22
Explainthefollowingterms:
i. Branchpredictionlogic.
ii. Paging.
iii. Assembler.
iv. Microprocessordevelopmentsystem.
(8)
Ans
(i) Branch prediction logic in Pentium : The Pentium microprocessor uses
branchpredictionlogictoreducethetimerequiredforabranchcausedbyinternal
delays. These delays are minimized because when a branch instruction is
encountered,themicroprocessorbeginsprefetchinstructionatthebranchaddress.
Theinstructionsareloadedintotheinstructioncache,sowhenthebranchoccurs,
theinstructionsarepresentandallowthebranchtoexecuteinoneclockingperiod.
Ifforanyreasonthebranchpredictionlogicerrors,thebranchrequiresanextra
threeclockingperiodstoexecute.Inmostcases,thebranchpredictioniscorrect
andnodelayensues.
20
AC23
(ii) PagingUnit:Thepagingmechanismfunctionswith4Kbytememory pagesor

withanewextensionavailabletothePentiumwith4Mbytememorypages.Inthe
Pentium,withthenew4Mbytepagingfeaturememoryforthepagetablereduced
tosinglepagetable.
(iii)Assembler: An assembler or macroassembler generally forms a part of the
operating system. Which translates a assembly language program into machine
languageprogram.
(iv) Microprocessordevelopmentsystem:Computersystemshaveundergone many
changesrecently.Machinesthatoncefilledlargeareashavebeenreducedtosmall
desktopcomputersystemsbecauseofthemicroprocessor.Although
thesedesktopcomputersarecompact,theypossesscomputingpowerthatwas
onlydreamedofafewyearsago.
Theblocksofthemicroprocessorbasedsystemare
1. TheMemoryandI/OSystem
2. TheDOSOperatingSystem
3. TheMicroprocessor
Q.23
Explainthefollowinginstructions:
(i)TEST(ii)NEG(iii)CMP(iv)DAA.
(8)
Ans
(i) TEST:TheTESTinstructionperformstheANDoperation.Thedifferenceis
that the AND instruction changes the destination operand, while the TEST
instructiondoesnot.ATESTonlyaffectstheconditionoftheflagregister,
whichindicatestheresultofthetest.
(ii) NEG:Arithmeticsigninversionortwoscomplement(NEG).TheNEGinstruction
twoscomplementsanumber,whichmeansthatthearithmeticsignofasigned
numberchangesfrompositivetonegativeorfromnegativetopositive.
(iii)CMP:Thecomparisoninstruction(CMP)isasubtractionthatchangesonly the
flag bits; the destination operand never changes. A comparison is useful for
checkingtheentirecontentsofaregisteroramemorylocationagainstanother
value.ACMPisnormallyfollowedbyaconditionaljumpinstruction,whichtests
theconditionoftheflagbits
(iv)DAA:TheDAAinstructionfollowstheADDorADCinstructiontoadjust the
resultintoaBCDresult.TheDAAinstructionfunctionsonlywiththeALregister,
thisadditionmustoccureightbitsatatime.
Q.24
Withrespecttoserialcommunicationdefinethefollowing:
(i) baudrate.
(ii) asynchronouscommunication.
(iii) parity.
(iv) halfduplex.
(4)
21
AC23
Ans
HalfDuplexTransmission:Ahalfduplexchannelcansendandreceive,butnotat
thesametime.Itslikeaonelanebridgewheretwowaytrafficmustgivewayin
ordertocross.Onlyoneendtransmitsatatime,theotherendreceives.
Asynchronousmeans"nosynchronization",andthusdoesnotrequiresending
andreceivingidlecharacters.However,thebeginningandendofeachbyteof
datamustbeidentifiedbystartandstopbits.Thestartbitindicateswhenthe
data byte is about to begin and the stop bit signals when it ends. The
requirement to send these additional two bits causes asynchronous
communication to be slightly slower than synchronous however it has the
advantagethattheprocessordoesnothavetodealwiththeadditionalidle
characters.
Therateofdatatransferinserialdatacommunicationisdenotedinbps.Bits
persecond(bps)istherateoftransferofinformationbits.Baudisthenumber
of signal level changes per second in a line, regardless of the information
contentofthosesignals.Thebaudandbpsratesarenotnecessarilyequal.The
ratioofBPStobauddependsontheinformationcodingschemethatyouare
using.Forexample,eachcharacterinasynchronousRS232codingincludesa
startandstopbitthatarenotcountedasinformationbits,sotheBPSrateis
actuallylessthanthebaudrate.
Besides the synchronization provided by the use of start and stop bits, an
additionalbitcalledaparitybitmayoptionallybetransmittedalongwiththe
data.Figureshowstheinclusionofanadditionalparitybitforerrorcontrol
purposes.Aparitybitaffordsasmallamountoferrorchecking,tohelpdetect
datacorruptionthatmightoccurduringtransmission.Youcanchooseeven
parity,oddparity,markparity,spaceparityornoneatall.Whenevenorodd
parityisbeingused,thenumbersofmarks(logical1bit)ineachdatabyteare
counted, and a single bit is transmitted following the data bits to indicate
whetherthenumberof1bitjustsentisevenorodd.
'A'
'B'
'C'
P D7 D6 D5 D4 D3 D2 D1 D0
Stop
bit
Parity
bit
Start
bit
Character frame,11 bits in total
Fig.Frameddataincludingaparitybit
Forexample,whenevenparityischosen,theparitybitistransmittedwitha
valueof0ifthenumberofprecedingmarksisanevennumber.Forthebinary
valueof01100011theparitybitwouldbe0.Ifevenparitywereineffectand
thebinarynumber11010110weresent,thentheparitybitwouldbe1.
Q.25
22
WhatistheimportanceofRS232Cinserialcommunication?
applicationwhereyouseeitsuse.
Namesome
(4)
AC23
Ans RS232 stands for Recommend Standard number 232 and C is the latest
revisionofthestandard.Theserialportsonmostcomputersuseasubsetofthe
RS232Cstandard.ThefullRS232Cstandardspecifiesa25pin"D"connectorof
which 22 pins are used. Most of these pins are not needed for normal PC
communications, and indeed, most new PCs are equipped with male D type
connectorshavingonly9pins.Intheworldofserialcommunications,thereare
twodifferentkindsofequipment:
Q.26
DTEDataTerminalEquipment
DCEDataCommunicationsEquipment
Writeshortnoteson(AnyFOUR):
(i) 8259.
(ii) Realtimeclock.
(iii)Realandprotectedmode.
(iv) Superscalararchitecture.
(v) ComparisonbetweenMotorolaprocessorsandINTELprocessors.
(4x4=16)
Ans
(i) 8259:
The8259Aadds8vectoredpriorityencodedinterruptstothemicroprocessor.Itcan
beexpandedto64interruptrequestsbyusingonemaster8259Aand8slaveunits.CS
andWRmustbedecoded.Otherconnectionsaredirecttomicroprocessor.
ThepinsD7D0:thebidirectionaldataconnection,IR7IR0:Interruptrequest,
usedtorequestaninterrupt&connecttoaslaveinasystemwithmultiple8259A.
WR:Connectstoawritestrobesignal(lowerorupperina16bitsystem),RD
:Connects to the IORC signal , INT : Connects to the INTR pin on the
microprocessor from the master and is connected to a IR pin on a slave and
INTA:ConnectstotheINTApinonthemicroprocessor.Inasystemonlythe
masterINTAsignalisconnected
A0:Selectsdifferentcommandwordswithinthe8259A,CS:Chipselect
enablesthe8259Aforprogrammingandcontrol,SP/EN:SlaveProgram(1for
master,0forslave)/EnableBuffer(controlsthedatabustransceiversinalarge
microprocessorbasedsystemwheninbufferedmode)andCAS2CAS0:Usedas
outputsfromthemastertotheslavesincascadedsystems.
Fig:8259BlockDiagram
23
AC23
(ii) Realtimeclock:
Arealtimeclockkeepsthetimeinrealtimethatis,inhoursandminutes.
Thesoftwarefortherealtimeclockcontainsaninterruptserviceprocedure
that is called 60 times per second and a procedure that updates the count
locatedinfourmemorylocations.
Assemblerdirectives:
Anassembler directiveisastatementtogivedirectiontotheassemblerto
perform the task of assembly process. The assembler directives control
organization of the program and provide necessary information to the
assembler to understand assembly language programs to generate machine
codes.Theyindicatehowanoperandorsectionofaprogramistobeprocessed
bytheassembler.Anassemblersupportsdirectivestodefinedata,toorganize
segmentstocontrolprocedures,todefinemacrosetc.
(iii) Realandprotectedmode:
Operation of Real mode interrupt: When the microprocessor completes
executingthecurrentinstruction,itdetermineswhetheraninterruptisactiveby
checking (1) instruction execution, (2) single step, (3) NMI, (4) coprocessor
segmentoverrun,(5)INTR,and(6)INTinstructionintheorderpresented.Ifone
ormoreoftheseinterruptconditionsarepresent,thefollowingsequenceofevents
occurs:
1. Thecontentsoftheflagregisterarepushedontothestack
2. Boththeinterrupt(IF)andtrap(TF)flagsarecleared.Thisdisablesthe
INTRpinandthetraporsinglestepfeature.
3. Thecontentsofthecodesegmentregister(CS)arepushedontothe
stack.
4. Thecontentsoftheinstructionpointer(IP)arepushedontothestack.
5. Theinterruptvectorcontentsarefetched,andthenplacedintobothIP
and CSsothat the nextinstructionexecutes attheinterruptservice
procedureaddressedbythevector.
Protectedmodeinterrupt:
Intheprotectedmode,interruptshaveexactlythesameassignmentsasinreal
mode,buttheinterruptvectortableisdifferent.Inplaceofinterruptvectors,
protectedmodeusesasetof256interruptdescriptorsthatarestoredinan
interruptdescriptortable(IDT).
(iv).Superscalararchitecture:
The Pentium microprocessor is organized with three execution units. One
executes floatingpoint instructions, and the other two (Upipe and Vpipe)
executeinteger instructions. Thismeansthatit is possibleto executethree
instructionssimultaneously.
(v).ComparisonbetweenMotorolaprocessorsandINTELprocessors:
AMD/Intel processors are really about the same thing. They run the same
softwareandoperateinaverysimilarmanner.AMDisoftenlessexpensive
than Intel, and depending on what you use a computer for one may be
somewhatfasterthantheother.
Motorola has been largely relegated to the "alsoran" category of
microprocessor manufactures since Apple computer stopped using them in
favoroftheIBMPowerPCprocessor(ApplehassinceswitchedtoIntel).
24
AC23
Motorola had an excellent 32 bit processor design years before Intel.

Furthermore, the design of the Motorola 68000 processor line (from a
programmer'sperspective)wasimmenselybetter.Thetwomajorfeaturesof
the68000linethatmadethistruewere
1) Orthogonalityofregisteraccessand
2) Numberofregistersavailable.
ThesefeaturesmadewritingcodeforMotorolaCPUsmuchsimpler.
Q.27
Whatis(i)USB(ii)AGP(iii)XMS(iv)EMS(v)TSR(vi)EDORAM
(6)
Ans
(i). USB: The USB (UNIVERSAL SERIAL BUS) is intended to connect
peripheraldevicessuchaskeyboards,amouse,modems,andsoundcardsto
themicroprocessorthroughaserialdatapathandatwistedpairofwires.The
mainideaistoreducesystemcostbyreducingthenumberofwires.Another
advantageisthatthesoundsystemcanhaveaseparatepowersupplyfromthe
PC,whichmeanslessnoise.ThedatatransferratesthroughtheUSBare12
Mbpsatpresent.
(ii). AGP: Thelatestadditiontomanycomputersystemsistheinclusionof
the accelerated graphics port (AGP). The AGP operates at the bus clock
frequencyofthemicroprocessor.Itisdesignedsothatatransferbetweenthe
videocardandthesystemmemorycanprogressatamaximumspeed.The
AGPcantransferdataatamaximumrateof528Mbytespersecond.Thisport
probablywillneverbeusedforanydevicesotherthanthevideocard.
(iii).XMS:Thememorysystemisdividedintothreemainparts.TPA
(transient program area), system area, and XMS (extended memory
system).Thetypeofmicroprocessorinyourcomputerdetermineswhetheran
extendedmemorysystemexists.
(iv).EMS:TheareaatlocationC8000HDFFFFFHisoftenopenorfree.This
areaisusedfortheexpandedmemorysysteminaPCorXTsystem,orfor
theuppermemorysysteminanATsystem.TheEMSallowsa64Kbytepage
frameofmemorytobeusedbyapplicationprograms.
(v).TSR:TheTPAalsoholdsTSR(terminateandstayresident)programsthat
remaininmemoryinanactivestateuntilactivatedbyahotkeysequenceor
anothereventsuchasaninterrupt.
(vi).EDORAM:AslightmodificationtothestructureoftheDRAMchanges
thedeviceintoanEDO(extendeddataoutput)DRAMdevice.IntheEDO
memory,anymemoryaccess,includingarefresh,storesthe256bitsselected
byRASintolatches.Theselatchesholdthenext256bitsofinformation,so
inmostprograms,whicharesequentiallyexecuted,thatdataareavailable
withoutanywaitstates.
Q.28
Whatareprograminvisibleregisters? ExplainthepurposeoftheGDTR.Ifthe
microprocessorsendslinearaddress 00200000Htothepagingmechanism,
whichpagingdirectoryentryandwhichpagetableentryisaccessed?
(3)
25
AC23
Ans,theglobalandlocaldescriptortablesarefoundinthememorysystem.In
order to access and specify the address of these tables, the program invisible
registers used. The program invisible registers are not directly addressed by
softwaresotheyaregivenname.
TheGDTR(globaldescriptortableregister)andIDTR(interruptdescriptor
tableregister)containthebaseaddressesofthedescriptortableanditslimit.
Thelimitofeachdescriptortableis16bitsbecausethemaximumtablelength
is64Kbytes.Whentheprotectedmodeoperationisdesired,theaddressofthe
globaldescriptortableanditslimitareloadedintotheGDTR.
For linear address 00000000H 003FFFFFH, the first entry of the page
directory is accessed. Each page directory entry represents or repages a 4
Mbytesectionofthememorysystem.Thecontentsofthepagedirectoryselect
apagetablethatisindexedbythenext10bitsofthelinearaddress.This
meansthataddress00000000H00000FFFHselectspagedirectoryentry0
andpagetableentry0.
Q.29
Discussthesalientfeaturesofaparallelprogrammableinterface,8255.
(4)
Ans
24I/Olinesin38bitportgroupsA,B,C
A,Bcanbe8bitinputoroutputports
Ccanserveas24bitinputoroutputports
3modesofoperation:
Mode0:A,B,Csimpleinputoroutputlevelsensitiveports
Mode1:A,BinputoroutputportswithstrobecontrolinC
Mode2:Aisbidirectionalwithcontrol/handshakeinBandC
A,Bcanonlychange1byteatatime
Chasindividualbitset/resetcapability
Advantage is nondedicated circuit can change port configuration with
softwareandnogluelogic
PortsA,B,andCareusedforI/Odata.
Thecontrolregisterisprogrammedtoselecttheoperationmodeofthe
threeportsA,B,andC.
Mode0:simpleI/Omode
AnyoftheportsA,B,CLandCUcanbeprogrammedasinputoroutput.
Nocontrolofindividualbits(allbitsareoutorallbitsarein)
Mode 1: Ports A and B can be used as input or output ports with
handshaking.
Mode2:PortAcanbeusedasbidirectionalI/Oportwithhandshaking
Q.30
Whatdoyouunderstandbyassemblerdirectives?Whatdothefollowing
assemblerdirectivesdo?
(i) ASSUME
(ii) SEGMENT
(iii)DB
(iv)PUBLIC
(8)
Ans
(i)ASSUME:Thisdirectivewillbeusedtomapthesegmentregisternames
withmemoryaddresses.
TheSyntaxisasfollows:
26
AC23
ASSUME
SS:Stackseg,DS:Dataseg,CS:Codeseg
TheASSUMEwilltelltheassemblertousetheSSregisterwiththeaddressofthe
stacksegmentwhosenameisstackseg.
(ii)SEGMENT: Thisdirectivedefinestotheassemblerthestartofasegmentwith
namesegmentname.Thesegmentnameshouldbeuniqueandfollowstherulesofthe
assembler
SegmentNameSEGMENT{Operand(Optional)};Comment
.
.
.
SegmentName
ENDS.
(iii) DB(DefineByte):TheDBdirectivedefinesabytetypevariable(i.e.a
variablewhichoccupiesonebyteofmemoryspace).Inagivendirectivestatement,
theremaybesingleinitialvalueormultiplevaluesofthedefinedvariable.Ifthere
isoneinitialvalue,onebyteofmemoryspaceisreserved.Iftherearemultiple
values,onebyteofmemoryspaceisreservedforeachvalue.Thegeneralformat
is:
NameofVariable
DB Initialvalueorvalues.
(iv) The PUBLIC and EXTRN directives are very important to modular
programming.PUBLICusedtodeclarethatlabelsofcode,data,orentiresegmentsare
available to other program modules. EXTRN (external) declares that labels are
externaltomodules.Withoutthesestatements,modulescouldnotbelinkedtogetherto
createaprogrambyusingmodularprogrammingtechniques.Theymightlink,butone
modulewouldnotbeabletocommunicatetoanother.
The PUBLIC directive is placed in the opcode field of an assembly language
statement to define a label as public, so that the label can be used by other
modules.
Q.31Discusstheroleofabusarbiterinamultiprocessorconfiguration.
(4)
Ans,Busarbiter:Whichfunctionstoresolveprioritybetweenbusmastersand allows
onlyonedeviceatatimetoaccessthesharedbus.The8289busarbitercontrolsthe
interface of a bus master to a shared bus. This is designed to function with the
8086/8088microprocessors.Eachbusmasterormicroprocessorrequiresanarbiterfor
theinterfacetothesharedbus,whichIntelcallstheMULTIBUSandIBMcallsthe
MICROCHANNEL.
Thesharedbususedonlytopassinformationfromonemicroprocessortoanother;
otherwise,thebusmasterfunctionintheirownlocalbusmodesbyusingtheirown
localprograms,memory,andI/Ospace.Microprocessorsconnectedinthiskindof
systemareoftencalledparallelordistributedprocessorsbecausetheycanexecute
softwareandperformtasksinparallel.
Q.32ShowhowatypicalDMAcontrollercanbeinterfacedtoan8086/8085based maximum
modesystem.(8)Ans,For8088inmaximummode:
27
AC23
TheRQ/GT1andRQ/GT0pinsareusedtoissueDMArequestandreceive
acknowledgesignals.SequenceofeventsofatypicalDMAprocess
1) Peripheralassertsoneoftherequestpins,e.g.RQ/GT1orRQ/GT0(RQ/GT0has
higherpriority)
2) 8088completesitscurrentbuscycleandentersintoaHOLDstate
3) 8088grantstherightofbuscontrolbyassertingagrantsignalviathesamepinas
therequestsignal.
4) DMAoperationstarts
5)UponcompletionoftheDMAoperation,theperipheralassertstherequest/grant
pinagaintorelinquishbuscontrol.
Q.33
Whatisacoprocessor?Whatisitsuseinatypicalmicroprocessorbased
system.
(8)
Ans8087NDP(numericaldataprocessor)isalsoknownasmathcoprocessor
whichisusedinparallelwiththemainprocessorfornumbercrunching
applications,whichwouldotherwiserequirecomplexprogramming.Itisalso
fasterthan8086/8088processorinperformingmathematicalcomputation.Ithas
itsownspecializedinstructionsetstohandlemathematicalprograms.
Itisaprocessorwhichworksinparallelwiththemainprocessor.Ithasitsown
setofspecializedinstructions.Thenumbercrunchingpartoftheprogramis
executedby8087.Instructionfor8087arewritteninthemainprogram
interspersedwiththe8086instructions.Allthe8087instructioncodeshave
11011asthemostsignificantbitsoftheirfirstcodebyte.
Q.34
28
Whatissegmentation?Whatareitsadvantages?Howissegmentation
implementedintypicalmicroprocessors?
(8)
AC23
Ans
Segmentmemoryaddressingdividesthememoryintomanysegments.Eachof
thesesegmentscanbeconsideredasalinearmemoryspace.Eachofthesesegment
isaddressedbyasegmentregister.
Howeversincethesegmentregisteris16bitwideandthememoryneeds20bits
foranaddressthe8086appendsfourbitssegmentregistertoobtainthesegment
address.Therefore,toaddressthesegment10000Hby,saytheSSregister,theSS
mustcontain1000H.
Thefirst advantagethat memorysegmentationhas is thatonly16bitregisters are
requiredbothtostoresegmentbaseaddressaswellasoffsetaddress.Thismakesthe
internalcircuitryeasiertobuiltasitremovestherequirementfor20bitsregisterincase
thelinearaddressingmethodisused.Thesecondadvantageisrelocatability.
Q.35WhatisaPCIbus?Discussitsfeaturesandusage.
(6)
Ans
PeripheralComponentInterconnect(PCI):ThisbuswasdevelopedbyInteland
introducedin1993.Itisgearedspecificallytofifthandsixthgenerationsystems,
althoughthelatestgeneration486motherboardsusePCIaswell.
PCIbushasplugandplaycharacteristicsandtheabilitytofunctionwitha64bit
databus.APCIinterface containsseriesofregisters,locatedina smallmemory
deviceonthePCIinterfacethatcontainsinformationabouttheboard.
Q.36HowisEISAbusdifferentfromISAbus?
(4)
Ans
TheExtendedIndustryStandardArchitecture(EISA)isa32bitmodificationtothe
ISA bus. As computers became larger and had wider data buses, a new bus was
neededthatwouldtransfer32bitdata.Theclockingspeedlimitedupto8MHz.The
mostcommonapplicationfortheEISAbusisadiskcontrollerorasavideographics
adapter.Theseapplicationsbenefitfromthewiderdatabuswidthbecausethedata
transferrateforthesedevicesarehigh.
Q.37 Differentiatebetweensynchronousandasynchronoustypesofserialcommunication.
(6)
AnsSerialdatacommunicationusestwobasictypes,synchronousand asynchronous.
Withsynchronouscommunications,thetwodevicesinitiallysynchronizethemselvesto
eachother,andthencontinuallysendcharacterstostayinsync.Evenwhendataisnot
reallybeingsent,aconstantflowofbitsallowseachdevicetoknowwheretheotheris
atanygiventime.Thatis,eachcharacterthatissentiseitheractualdataoranidle
character.
Asynchronousmeans"nosynchronization",andthusdoesnotrequiresendingand
receivingidlecharacters.However,thebeginningandendofeachbyteofdatamust
beidentifiedbystartandstopbits.Thestartbitindicateswhenthedatabyteisabout
to begin and the stop bit signals when it ends. The requirement to send these
additionaltwobitscausesasynchronouscommunicationtobeslightlyslowerthan
synchronoushoweverithastheadvantagethattheprocessordoesnothavetodeal
withtheadditionalidlecharacters.
29
AC23
Q.38
Drawandexplaintheblockdiagramofprogrammableinterruptcontroller8259.
(8)
AnsThe8259Aadds8vectoredpriorityencodedinterruptstothe microprocessor.
Itcanbeexpandedto64interruptrequestsbyusingonemaster8259Aand8slave
units. CS and WR must be decoded. Other connections are direct to
microprocessor.
Q.39
Discussthevarioustypesofmemorydevicesthatyouarefamiliarwith.
(8)
Ans
Allofthememoryusedasmainstoreinamoderncomputerisimplementedas
semiconductorsfabricatedonwafersofsilicon.Semiconductormemoryisfast
andeasytouse.Tofulfiltheneedsofmoderncomputersystemsitisbecoming
increasinglydense(morebitsperchip)andcheap.
30
Asemiconductormemorychipconsistsofalargenumberofcellsorganizedinto
anarray,andthelogicnecessarytoaccessanyarrayinthecelleasily.Semi
conductormemorymaybeclassedaccordingtothemechanismusedbyeachcell
tostoredata.Thesimplesttypeofmemoryiscalledstaticmemory.Instatic
AC23
memoryeachcellusesaflipflopmadefromfourorsixtransistors.Thedatain
eachcellisremembereduntilthepowerisswitchedoff.Staticmemoryiseasyto
use and reliable, but is relatively bulky, slow and expensive. Most computer
systemsthereforeusedynamicmemoryastheirmainstore.Dynamicmemory
usesjustasingletransistorpercell,andisthereforedenser,fasterandcheaper.
Unfortunately each cell gradually forgets the data stored in it, and so extra
circuitrymustbeusedtocontinuallyrefreshthecells.
Memory, with regard to computers, most commonly refers to semiconductor
deviceswhosecontentscanbeaccessed(i.e.,readandwrittento)atextremely
highspeeds.Themaincharacteristicsofsemiconductormemoryarebasedon
capacity, organization and access time. In microprocessorbased systems
semiconductormemoriesareusedasprimarystorageforcodeanddata.
In contrasts with storage, which (1) retains programs and data regardless of
whethertheyarecurrentlyinuseornot,(2)retainsprogramsanddataafterthe
powersupplyhasbeendisconnected,(3)hasmuchsloweraccessspeedsand(4)
hasamuchlargercapacity(andamuchlowercost).Examplesofstoragedevices
are hard disk drives (HDD), floppy disks, optical disks (e.g., CDROMS and
DVDs)andmagnetictape.
The term memory as used in a computer context originally referred to the
magneticcorememorydevicesthatwereusedbeginninginthe1950s.Itwas
subsequentlyappliedtothesemiconductormemorydevicesthatreplacedcore
memoriesinthe1970s.
Computer memory today consists mainly of dynamic random access memory
(DRAM)chipsthathavebeenbuiltintomultichipmodulesthatare,inturn,
plugged into slots on the motherboard (the main circuit board on personal
computers and workstations). This DRAM is commonly referred to as RAM
(randomaccessmemory),anditconstitutesthemainmemoryofacomputer.
Therandominrandomaccessmemoryreferstothefactthatanylocationinsuch
memorycanbeaddresseddirectlyatanytime.Thiscontrastswithsequential
accessmedia,suchasmagnetictape,whichmustbereadpartiallyinsequence
regardlessofthedesiredcontent.
There are three basic kinds of memory used in microprocessor systems
commonlycalledROM,RAM,andhybrid.ROMandRAMare"ReadOnly
Memory"and"RandomAccessMemory".TheprogrammaybestoredinROM
orRAMtheprogramdoesnotnormallychangewhileitexecuteswhiledatais
storedintheregistersandRAM.Ofcourse,ifyouturnoffthechipandturniton
again,youhavelostallthecontentsoftheregisters,andRAM.
Inatypicalcomputer,asmuchaspossibleisinRAM,togivethemaximum
possibleflexibility;youhavebasicprogrammesallowingyoutointeractwith
discs,keyboardsandthedisplayinROM,andloadinasmuchofthesoftwareas
possiblewhenyouruntheprograms.
Q.40
WriteexplanatorynotesonMicroprocessordevelopmentsystem.
(16)
Ans,
Microprocessordevelopmentsystem:
Computersystemshaveundergonemanychangesrecently.Machinesthatoncefilled
largeareashavebeenreducedtosmalldesktopcomputersystemsbecauseof
31
AC23
themicroprocessor.Althoughthesedesktopcomputersarecompact,theypossess
computingpowerthatwasonlydreamedofafewyearsago.
Theblocksofthemicroprocessorbasedsystemare
1. TheMemoryandI/OSystem
2. TheDOSOperatingSystem
3. TheMicroprocessor
Q.41
DiscussDOSfunctioncallandBIOSfunctioncallwithoneexampleofeach. (5)
Ans
DOSfunctioncall:
InordertouseDOSfunctioncalls,alwaysplacethefunctionnumberintoregister
AHandloadallotherpertinentinformationintoregisters,asdescribedintheentry
datatable(ReferText1pageno809).Oncethisisaccomplished,followwithan
INT21HtoexecutetheDOSfunction.
Example:MOVAH,6
MOVDL,
AINT21H.
ExampleshowshowtodisplayanASCIIAontheCRTscreenatthecurrent
cursorpositionwithaDOSfunctioncall.
BIOstandsforBasicInputOutputSystem.Itisasetofprogramstoprovidemost
basic lowlevel services such as services keyboard, disks, serial port, printer,
display, and bootstrap. BIOS programs are stored in a ROM. When power is
switchedonROMBIOStakesthecontrolofacomputer.Firstofall,ROMBIOS
programsforpoweronselftestareexecuted.Thesetestscheckthatwhetherthe
computer is in proper working order after this test, the process of loading the
operating system into main memory is called booting. ROMBIOS contains a
programcalledbootstraploader,thisdirectsCPUtoreadfromthediskaspecific
programcalledbootandtoloaditintomainmemory.
BIOSfunctioncalls arefoundstoredinthesystemandvideoBIOSROMs.These
BIOSROMfunctiondirectlycontroltheI/Odevices,withorwithoutDOSloadedinto
asystem.
INT10H:ThisisaBIOSinterruptisoftencalledthevideoservicesinterruptbecauseit
directlycontrolsthevideodisplayinasystem.TheINT10Hinstructionusesaregister
AHtoselectvideoservicesprovidedbythisinterrupt.ThevideoBIOSROMislocated
onthevideoboardandvariesfromonevideocardtoanother.
INT11H:Thisfunctionusedtodeterminethetypeofequipmentinstalledinthe
system.
INT12H:ThememorysizeisreturnedbytheINT12Hinstructions.
INT13H:Thiscallcontrolsthediskettesandalsofixedorharddiskdrivesattached
tothesystem.
INT14H:ThiscallcontrolstheserialCOMportsattachedtothecomputer.
Q.42 DifferentiatebetweenrealandprotectedmodesofanIntelmicroprocessor.Discuss
protectedmodememoryaddressinginbrief.
(7)
Ans Operation of Real mode interrupt: When the microprocessor completes
executing the current instruction, it determines whether an interrupt is active by
checking(1)instructionexecution,(2)singlestep,(3)NMI,(4)coprocessorsegment
overrun,(5)INTR,and(6)INTinstructionintheorderpresented.Ifoneor
32
AC23
moreoftheseinterruptconditionsarepresent,thefollowingsequenceofevents
occurs:
stack.
Intheprotectedmode,interruptshaveexactlythesameassignmentsasinreal
mode,buttheinterruptvectortableisdifferent.Inplaceofinterruptvectors,
protectedmodeusesasetof256interruptdescriptorsthatarestoredinan
interruptdescriptortable(IDT).
Q.43
Whatdoyoumeanbythetermprocedure?Whatisthedifferencebetweennear
callandfarcall?
(4)
Ans
PROC:ThePROCandENDPdirectivesindicatethestartandendofaprocedure.
Thesedirectivesforcestructurebecausetheprocedureisclearlydefined.ThePROC
directiveindicatesthestartofaprocedure,mustalsobefollowedwithaNEARor
FAR.ANEARprocedureisonethatresidesinthesamecodesegmentasthe
program.AFARproceduremayresideatanylocationinthememorysystem.
Q.44
Designanaddressdecodinglogicusinga3:8decoder(74138)tointerfaceatotalof
64kmemorylocationsintheaddressrangefromF0000toFFFFF.Divide64k
memorylocationsineightblocksof8klocationseachandgenerateeightchipselect
signals.
(8)
Ans
Text1page350
Q.45
DrawandexplaintheblockdiagramofDMAcontroller.Alsoexplainthevarious
modesinwhichDMACworks.
(8)
Ans
Directmemoryaccess(DMA) isaprocessinwhichanexternaldevicetakesover the
controlofsystembusfromtheCPU.DMAisfor highspeeddatatransfer from/to
massstorageperipherals,e.g.harddiskdrive,magnetictape,CDROM,andsometimes
videocontrollers.Forexample,aharddiskmayboastsatransferrateof5Mbytesper
second,i.e.1bytetransmissionevery200ns.TomakesuchdatatransferviatheCPUis
bothundesirableandunnecessary.
ThebasicideaofDMAistotransferblocksofdatadirectlybetweenmemoryand
peripherals.Thedatadontgothroughthemicroprocessorbutthedatabusis
occupied.Normaltransferofonedatabytetakesupto29clockcycles.TheDMA
transferrequiresonly5clockcycles.
33
AC23
The modes of operation include demand mode, single mode, block mode, and
cascademode.DemandmodetransfersdatauntilanexternalEOPisinputoruntil
theDREQinputbecomesinactive.SinglemodereleasestheHOLDaftereachbyte
of data transferred. Block mode automatically transfers the number of bytes
indicatedbythecountregisterforthechannel.Cascademodeisusedwhenmore
thanone8237ispresentinasystem.
Q.46
WhatisDRAM?WhatdoyouunderstandbyDRAMrefreshing?Withthehelpofa
blockdiagram,showhowDRAMcanbeinterfacedtoamicroprocessor.
(6)
AnsDynamicRAM(DRAM)isessentiallythesameasSRAM,exceptthatitretains
dataforonly2or4msonaninternalcapacitor.After2or4ms,thecontentsofthe
DRAMmustbecompletelyrewritten(refreshed)becausethecapacitors,whichstore
logic1orlogic0,losetheircharges.Theentirecontentofthememoryisrefreshed
with256readsina2to4msinterval.Refreshingalsooccursduringawrite,areador
duringaspecialrefreshcycle.
Text1Fig(page342).
Q.47
34
Discussmode2(bidirectionalmode)of8255(ProgrammablePeripheral
Interface).
(6)
AC23
Ans
Q.48
Discussthefollowing:(ANYTHREE)(12)
(i) SomefeaturesofPentiumseriesofmicroprocessors.
(ii) Virtualmemory.
(iii)MMXTechnology.
(iv) Graphicsadapters.
Ans
(i).
SomefeaturesofPentiumseriesofmicroprocessors:
ThePentiumisa32bitsuperscalar,CISCmicroprocessor.Thetermsuperscalaris
usedfortheprocessorwhichcontainsmorethanonepipelinetoexecutemorethan
oneinstructionsimultaneouslyinparallel.
ThemainfeaturesofPentiumare,ithastwoALUs,onefloatingpointunit,two8
KBcache,prefetchbuffers,abranchtargetbuffer.TwoALUsmeansthatthereare
two pipelines. Each ALU contains five functional units. The two pipelines are
integerpipelines.TheyarenamedUandVpipeline.
WhenPentiumwasintroduced,itsoperatingfrequencywas60MHz.gradually;the
operating frequency was raised to 233 MHz. The Pentium uses 0.6 micron Bi
CMOSprocesstechnology.Itusespowermanagementfeature.
Thememorymanagementisimprovedbyaddingpagingunitandanewsystem
memorymanagementmode.
PagingUnit:Thepagingmechanismfunctionswith4Kbytememorypagesor
withanewextensionavailabletothePentiumwith4Mbytememorypages.Inthe
tosinglepagetable.
Memorymanagementmode:Thesystemmemorymanagementmode(SMM)is
onthesamelevelasprotectedmode,realmode,andvirtualmode,butitisprovided
tofunctionasamanager.TheSMMisnotintendedtobeusedasanapplicationora
systemlevelfeature.Itisintendedforhighlevelsystemfunctionssuchaspower
management.
35
AC23
(ii).Virtualmemory:
Thetermvirtualmemoryreferstosomethingwhichappearstobepresentbutactually
it is not. The virtual memory technique allows users to use more memory for a
programthantherealmemoryofacomputer.Aprogrammercanwriteaprogram
whichrequiresmorememoryspacethanthecapacityofthemainmemory.Sucha
program is executed by virtual memory technique. The program is stored in the
secondarymemory.Thememorymanagementunit(MMU)transfersthecurrently
neededpartoftheprogramfromthesecondarymemorytothemainmemoryfor
execution.Thispartoftheprogramisexecutedbytheprocessor.Afterexecutionthis
part of the program is sent back to the secondary memory together with the
immediate results. Thereafter, the CPU takes another part of the program for
execution.Thusthemainmemoryalwayskeepsonlythecurrentlyneededpartofthe
program.Thistypeoftoandfromovementinstructionsanddatabetweenthemain
memoryandsecondarymemoryiscalledswapping.Thusaprogramrequiringmore
memoryspacethanthecapacityofthemainmemorycanexecutedusingaswapping
technique.Thisconceptisknownavirtualmemorytechnique.
(iii).MMXTechnology:
MMX (Multimedia extensions) technology adds 57 new instructions to the
instruction set of the Pentium 4 microprocessors. The MMX technology also
introduces new general purpose instructions. The new MMX instructions are
designedforapplicationsuchasmotionvideo,combinedgraphicswithvideo,image
processing, audio synthesis, speech synthesis and compression, telephony, video
conferencing, 2D graphics, and 3D graphics. These new instructions operate in
parallelwithotheroperationsastheinstructionforthearithmeticcoprocessor.
TheMMXarchitectureintroducesnewpackeddatatypes.Thedatatypesareeight
packed,consecutive8bitbytes;fourpacked,consecutive16bitwords;andtwo
packed,consecutive32bitdoublewords.
(iv)Graphicsadapters:
Videocardconvertsdigitaloutputfromthecomputerintoananalogvideosignal
andsendsthesignalthroughacabletothemonitoralsocalledagraphicscard.
Thenumberofcoloursavideocarddisplaysisdeterminedbyitsbitdepth
Thevideocardsbitdepth,alsocalledthecolordepth,isthenumberofbitsituses
tostoreinformationabouteachpixel
i.e.8bitvideocarduses8bitstostoreinformationabouteachpixel;thisvideo
cardcandisplay256colors(2x2x2x2x2x2x2x2)
i.e.24bitvideocarduses24bitstostoreinformationabouteachpixelandcan
display16.7millioncolors
Thegreaterthenumberofbits,thebettertheresultingimage
VideoElectronicsStandardsAssociation(VESA) ,whichconsistsofvideocard
and monitor manufacturers, develops video stands to define the resolution,
numberofcolors,andotherdisplayproperties.
a. MonochromeDisplayAdapter(MDA)
b. HerculesGraphicsCard
c. ColourGraphicsAdapter(CGA)
d. EnhancedGraphicsAdapter(EGA)
e. VideoGraphicsAdapter(VGA)
f. SuperVGA(SVGA)andOtherStandardsBeyondVGA
36
AC23
Q.49
Writeexplanatorynoteson(ANYFOUR)
(i) Paging
(ii) 8284Clockgenerator
(iii)AssemblerDirectives
(iv) Harddiskdrivecontroller(16)
Ans
(i)Paging:
The memory paging mechanism located within the 80386 and above allows any
physicalmemorylocationtobeassignedtoanylinearaddress.Thelinearaddressis
definedas theaddressgeneratedbyaprogram. Withthememorypagingunit,the
linear address is invisibly translated into any physical address, which allows an
applicationwrittentofunctionataspecificaddresstobelocatedthroughthepaging
mechanism.Italsoallowsmemorytobeplacedintoareaswherenomemoryexists.
(ii)8284Clockgenerator:
The 8284 is an ancillary component to the microprocessors. Without clock
generator, many additional circuits are required to generate the clock in an
microprocessorbasedsystem.A8284providesthefollowingbasicfunctionsor
signals:Clockgeneration,RESETsynchronization,READYsynchronization,and
aTTLlevelperipheralclocksignal.
(iii)AssemblerDirectives:
Anassemblerdirectiveisastatementtogivedirectiontotheassemblertoperform
thetaskofassemblyprocess.Theassemblerdirectivescontrolorganizationofthe
program and provide necessary information to the assembler to understand
assembly languageprograms to generate machine codes. Theyindicate howan
operandorsectionofaprogramistobeprocessedbytheassembler.Anassembler
supportsdirectivestodefinedata,toorganizesegmentstocontrolprocedures,to
definemacrosetc.
(iv)Harddiskdrivecontroller:Thisconvertsinstructionsfromsoftwarerunningon
thecomputertotheelectricalsignalsrequiredtooperatetheharddisk.Thefunction
ofadiskcontrollerisdiskdriveselection,trackandsectorselection,headloading,
toparallelandparalleltoserialconversionofdata,errorcheckingetc.Thedata
recordedonamagneticdiskisthecombinationofclockanddata.Therefore,data
readmustbeseparatedfromtheclockinformation.ThedataprocessedbyaCPUor
stored inthe main memory isin the byte form. Thebytes tobe recorded on a
magneticdiskmustbeconvertedintoserialformat.
Q.50
WhatdoyoumeanbyMacro?DiscussmeritsanddemeritsofMacroover
procedures
.
(6)
AnsMACRO:Asequenceofinstructionstowhichanameisassignediscalled
macro.Macrosandsubroutinesaresimilar.Macrosareusedforshortsequenceof
instructions whereas subroutines for longer ones. Macros executes faster than
subroutines.
37
AC23
TheMACROdirectiveinformsassemblerthebeginningofamacroThisisused
withENDMdirectivetoencloseamacro.ThegeneralformatoftheMACRO
directiveis:
MacroName
MACRO
ARG1,ARG2,..,ARGN.
ThedifferenceisthataprocedureisaccessesviaaCALLinstruction,whilea
macroandalltheinstructionsdefinedinthemacro,areinsertedintheprogramat
thepointofusage.Creatingmacroisverysimilartocreatinganewopcodethat
canbeusedintheprogram.
Q.51
DrawanddiscusspowerfailuredetectioncircuitinterruptNMI.
(6)
Ans
Thenonmaskableinterrupt(NMI)isanedgetriggeredinputthatrequestsan
interruptonthepositiveedge.Afterapositiveedge,theNMIpinmustremain
logic1untilitisrecognizedbythemicroprocessor.
TheNMIinputisoftenusedforparityerrorsandothermajorsystemfaults,suchas
powerfailures.PowerfailureiseasilydetectedbymonitoringtheACpowerline
andcausinganNMIinterruptwheneverACpowerdropsout.Inresponsetothis
typeofinterrupt,themicroprocessorstoresalloftheinternalregisterinabattery
backedupmemoryoranEEPROM.Thebelowfigshowsapowerfailure
detectioncircuitthatprovidesalogic1totheNMIinputwheneverACpoweris
interrupted.
Q.52
Interfaced2kX8(i.e2716)EPROMusingmultipleinputNANDgatedecoderfor
memorylocationsFF800HFFFFFH.
(4)
Ans
SimpleNAND gateDecoder:Whenthe2kx8EPROM
isused,address
connectionA10A0ofthe8088areconnectedtoaddressinputsA10A0ofthe
EPROM.Theremainingnineaddresspins(A19A11)areconnectedtotheinputs
ofaNANDgatedecoder.ThedecoderselectstheEPROMfromoneofthemany
2Kbytesectionsoftheentire1Mbyteaddressrangeofthe8088microprocessor.
38
AC23
Inthiscircuit,asingleNANDgatedecodesthememoryaddress.Theoutputof
theNANDgateislogic0wheneverthe8088addresspinsattachedtoitsinputs
(A19A11)arealllogic1s.Theactivelow,logic0outputoftheNANDgate
decoderisconnectedtotheCEinputpinthatselects(enables)theEPROM.
Q.53
Explainthefunctionsofthefollowing:
(i)Debugger
(iii)Linker
(ii)Assembler
(6)
Ans
(i) Debugger:Itisaprogramwhichallowsusertotestanddebugprograms.All
computers including microprocessor kits provide debugging facility. To
detecterrorsaprogramcanbetestedinsinglesteps.Eachstepoftheprogram
isexecutedandtested.Thedebuggerallowstheusertoexaminethecontents
of registers and memory locations after each step of execution. This also
providesfacilitytoinsertbreakpointintheprograms.
(ii) Assembler:Anassemblerormacroassemblergenerallyformsapartofthe
operating system. Which translates a assembly language program into
machinelanguageprogram.
(iii)Linker:Alargeprogramisdividedinsmallerprogramsknownasmodules.A
linkerisaprogramwhichlinkssmallerprogramstogethertoformalarge
program.Whiledevelopingaprogramsubroutines,whicharestoredinlibrary
file, are frequently used in the program. The linker also links these
subroutineswiththemainprogram.
39
AC23
Q.54
DiscussDMAdefinitionandoperationinbrief
(4)
Ans
Directmemoryaccess(DMA) isaprocessinwhichanexternaldevicetakesover
the control of system bus from the CPU.DMA is for highspeed data transfer
from/tomassstorageperipherals,e.g.harddiskdrive,magnetictape,CDROM,and
sometimesvideocontrollers.Forexample,aharddiskmayboastsatransferrateof5
Mbytespersecond,i.e.1bytetransmissionevery200ns.Tomakesuchdatatransfer
viatheCPUis
bothundesirableandunnecessary.
ThebasicideaofDMAistotransferblocksofdatadirectlybetweenmemoryand
peripherals.Thedatadontgothroughthemicroprocessorbutthedatabusis
occupied.Normaltransferofonedatabytetakesupto29clockcycles.The
DMAtransferrequiresonly5clockcycles.
Nowadays,DMAcantransferdataasfastas60Mbytepersecond.Thetransfer
rateislimitedbythespeedofmemoryandperipheraldevices.
Q.55Writeanassemblylanguageprogramtofindaverageofnintegers.
Ans
40
MOVAX,0000;Initialsum0000
MOVBX,0000
MOVSI,0201H
MOVCX,[SI]
BACK:INCSI
INCSI
ADDAX,[SI]
JAEGO
(6)
AC23
INCBX
GO: LOOPBACK
MOV[0401],AX
MOV[0403],BX
INT3
Q.56
Explainfollowinginstructionsin8086familywithexampleandtheireffectonflag.
(i)CWD
(ii)IDIV
(iii)AAS
(iv)SAR
(v)LOOP
(vi)SAHF
(vii)BOUND
(viii)IMUL
(12)
Ans
(i) CWD (Convert signed word to signed double word): CWD instruction
extendsthesignbitofawordinAXregistertoallthebitsoftheDXregister.
ItisusedbeforeasignedwordinAXistobedividedbyanothersignedword
usingIDIVinstruction.Noflagsareaffected.
(ii) IDIV:Thisinstructionisusedtodividea16bitsignednumberbyan8bit
signednumberor32bitsignednumberbya16bitsignednumber.The32bit
dividendisplacedinDXandAXregisters.The16bitdivisorisplacedina
specified16bitregisterormemorylocations.Noflagsareaffected.
(iii)AAS:(ASCIIadjustaftersubtraction)ItisusedtoadjusttheAXregisterafter
asubtractionoperation.
(iv) SAR: (Shift each bit of operand right by specified number of bits), this
instructionshiftseachbitoftheoperandwhichiscontainedinan8bitor16
bitregisterormemorylocations,rightbythespecifiednumberofbits.The
LSBoftheoperandisshiftedintocarryflag.TheMSBwhichisasignbitfor
thesignoperandisretainedinMSBposition.
Flagsaffectedare:OF,SF,ZF,PFandCF.
(v) LOOP:(JumptospecifiedlabeluntilCX=0)thisisusedtorepeatasequence
ofinstructionsforthespecifiednumberoftimes.Thenumberoftimesthe
specifiedsequenceistoberepeatedisstoredinCXregister.Noflagsare
affected.
(vi) SAHF:(StoreAHregisterintoflagregister)Itisaninstructionusedtostore
thedataintheAHregisterintothelowereightbitsoftheflagregister.
(vii)
BOUND: The BOUND instruction, which has two operands,
comparesaregisterwithtwowordsofmemorydata.
(viii)IMUL:Thisisaninstructionformultiplicationoftwosignednumbers.The
resultisasignednumbers.TheOF(Overflow)andCF(Carryflag)areget
affected.
Q.57Explainkeyboardinterfacingto8088through8279.
(8)
41
AC23
Ans
The 8279 is a programmable keyboard and display interfacing component that
scansandencodesuptoa64keykeyboardandcontrolsuptoa16digitnumerical
display. The keyboardinterface has built in firstin firstout(FIFO) buffer that
allowsitstoreuptoeightkeystrokesbeforethemicroprocessormustretrievea
character.Thedisplaysectioncontrolsupto16numericdisplaysfromaninternal
16X8RAMthatstoresthecodeddisplayinformation.
Thekeyboardsectionconsistsofeightlinesthatcanbeconnectedtoeightcolumnsofa
keyboard,plustwoadditionallinesaswellastoshiftandCNTL/STBkeys.Thekey
pressedareautomaticallydebouncedandthekeyboardcanoperateintwomodestwo
keylockoutornkeyrollover.Iftwokeysinthetwokeylockoutmodearepressed
simultaneously,onlyfirstkeyisrecognized.IntheNkeyrollovermode,simultaneous
keyarerecognizedandtheircodesarestoredintheinternalbuffer.
ControlWord:000DDMMMModesetiscommandwithanopcodeof000and
twofieldsprogrammedtoselectthemodeofoperationforthe8279.TheDDfield
selectsthemodeofoperationforthedisplayandtheMMMfieldselectsthemode
ofoperationforthekeyboard.
D7
D6
D5
Function
ModeSet
Clock
ReadFIFO
Readdisplay
Writedisplay
Displaywrite
inhibit
Clear
Endinterrupt
Purpose
Selectsthenumberofdisplay
positions,leftorrightentry,
andtypeofkeyboardscan.
Programstheinternalclock
andsetsthescanandde
bouncetimes
SelectsthetypeofFIFOread
andtheaddressoftheread
Selectsthetypeofdisplay
readandaddressoftheread
Selectsthetypeofwriteand
addressofthewrite
Allowshalfbytestobe
blanked
ClearsthedisplayofFIFO
ClearstheIRQsignaltothe
microprocessor
The8279controlwordsummary
Q.58
Discusstheoperationofarealmodeinterruptandprotectedmodeinterrupt. (6)
Ans Operation of Real mode interrupt: When the microprocessor completes
executing the current instruction, it determines whether an interrupt is active by
checking(1)instructionexecution,(2)singlestep,(3)NMI,(4)coprocessorsegment
overrun,(5)INTR,and(6)INTinstructionintheorderpresented.Ifoneormoreof
theseinterruptconditionsarepresent,thefollowingsequenceofeventsoccurs:
42
AC23
stack.
In the protected mode, interrupts have exactly the same assignmentsas inreal
mode, but the interrupt vector table is different. In place of interrupt vectors,
protectedmodeusesasetof256interruptdescriptorsthatarestoredinaninterrupt
descriptortable(IDT).
Q.59Writeanassemblylanguage
complementofan8bitnumber
programtofindonescomplementandtwos
(4)
Ans
Onescomplementofan8bitnumber
LDA2501H
CMA
STA2502H
HLT.
Twoscomplementofan8bitnumber
LDA2501H
CMA
INRA
STA2502H
HLT.
Q.60
Discussthefollowingterms:(Anysix)
(i) BranchpredictionlogicinPentium
(ii) CachestructureinPentium
(iii)Threadedsystem
(iv) Superscalararchitecture
(v) Realtimeoperatingsystem
(vi)D/Aconversion
(12)
Ans,
(i) Branch prediction logic in Pentium : The Pentium microprocessor uses branch
predictionlogictoreducethetimerequiredforabranchcausedbyinternaldelays.These
delays are minimized because when a branch instruction is encountered, the
microprocessorbeginsprefetchinstructionatthebranchaddress.Theinstructionsare
loadedintotheinstructioncache,sowhenthebranchoccurs,theinstructionsarepresent
andallowthebranchtoexecuteinoneclockingperiod.Ifforanyreasonthebranch
predictionlogicerrors,thebranchrequiresanextrathreeclockingperiodstoexecute.In
mostcases,thebranchpredictioniscorrectandnodelayensues.
(ii) CachestructureinPentium:ThecacheinthePentiumhasbeenchangedfrom theone
foundinthe80486microprocessor.ThePentiumcontainstwo8Kbytecache
43
AC23
memoriesinsteadofoneasinthe80486.Thereisan8Kbytedatacacheandan8K
byteinstructioncache.Theinstructioncachestoresonlyinstructions,whilethedata
cachestoresdatausedbyinstructions.
(iii) Threaded system: At times we need to implement an operating system that can
processmultiplethreads.Multiplethreadsarehandledbythekernelusingarealtime
clockinterrupt.OnemethodforschedulingprocessesinasmallRTOSistouseatime
slicetoswitchbetweenvariousprocesses.Thebasictimeslicecanbeanydurationand
issomewhatdependentontheexecutionspeedofthemicroprocessor.Eachtimeslice
isactivatedbyatimerinterrupt.Theinterruptserviceproceduremustlooktoaqueue
toseewhetherataskisavailabletoexecute,andifitis,itmuststartexecutionofthe
newtask.Ifnonewtaskispresent,itmustcontinueexecutinganoldtaskorenteran
idlestateandwaitforanewtasktobequeued.Thequeueiscircularandmaycontain
anynumberoftasksforthesystemuptosomefinitelimit.
(iv) Super scalar architecture: The Pentium microprocessor is organized with three
executionunits.Oneexecutesfloatingpointinstructions,andtheothertwo(Upipe
andVpipe)executeintegerinstructions.Thismeansthatitispossibletoexecutethree
instructionssimultaneously.
(v) Realtimeoperatingsystem(RTOS): TheRTOSisanoperatingsystemused in
embedded applications that performs tasks in a predictable amount of time. RTOS
muchlikeanyotheroperatingsysteminthatitcontainsthesamebasicsections.
Therearethreecomponentstoalloperatingsystems:(1)initialization,(2)thekernel,
(3)dataandprocedures.Theinitializationsectionisusedtoprogramallhardware
components in the system, load drivers specific to a system, and program the
contentsofthemicroprocessorsregisters.Thekernelperformsthebasicsystem
task,providessystemcallsorfunctions,andcomprisestheembeddedsystem.The
dataandproceduresectionholdsallproceduresandanystaticdatausedbythe
operatingsystem.
(vi) D/A conversion: Digitaltoanalog and analogtodigital conversions are two very
importantaspectsofdigitaldataprocessing.Digitaltoanaloginvolvesconversionof
digitaldataintoequivalentanalogdata.Forexample,theoutputofadigitalsystem
mightbeconvertedtoanalogformusingaD/Aconverterfordrivingaservomotor,
whichdrivesthecursorarmofaplotterorapenrecorder.Itclearlyshowsinthis
exampleDACemulatingdecodingdeviceaction.
Q.61
Explainexplanatorynoteson(Anyfour)
(i) ComparisonofRS232CandRS422Astandards
(ii) 8259programmableinterruptcontroller
(iii)A/Dconversion
Ans
(i) ComparisonofRS232CandRS422Astandards:
(16)
44
AC23
RS232C
1.Standarddefinedfor
asynchronous
communications,wherethere
isspecifiedtimingbetween
databitsandnofixedtiming
betweenthecharactersthatthe
bitsform.
2.Thisstandarddefined25
signallinesand50ftisthe
maximumguaranteeddistance.
3.Thisstandarddefinesaserial
systemwithjustasinglewire
foreachdirection.
RS422A
1. DateRate:10Mbits/s
2. Drivingabilityupto4000ft
and10receivers
3. ItisDifferentialstandardi.e
Eachsignalisrepresentedbya
pairofwiresandvoltage
differenceacrossthesewiresis
whatissensedatthereceiver.
Thisminimizestheeffectof
groundnoiseorthevoltage
dropalongthesignalleads.
4. Signallevelsare:2to6V
and+2to+6V
4. Signal levels are : 25 to

3Vand+3to+25V.
(ii) 8259programmableinterruptcontroller:
microprocessorfromthemasterandisconnectedtoaIRpinonaslaveandINTA
:ConnectstotheINTApinonthemicroprocessor.Inasystemonlythemaster
INTAsignalisconnected
microprocessorbasedsystemwheninbufferedmode)andCAS2CAS0:Used
asoutputsfromthemastertotheslavesincascadedsystems.
45
AC23
(iii)A/Dconversion:
Fig:BlockDiagramRepresentationofADCOperation
The digital inventory are working a revolution in the field of technology,
microcontrollers, microprocessors are used more effectively than those of analog
circuitry. But the output of any sensors, which deals with physical equality like
temperature,humidity,pressure,viscosity,velocity,whichare,usedmostofthedata
acquisition flat forms are in the form of analog signals or continuous signals.
Microcontrollersandmicroprocessorsaredonothingwiththesesignals.Becausethey
requirethesignalintheformofbinarynumbers.Soweshouldconverttheseanalog
signalsintodigitalformat.ThefollowingpopularmethodsareusedforAnalogto
Digitalconversion.
1. FlashADC
2. DigitalRampADC
46
AC23
3. SuccessiveApproximationADC
4. TrackingADC
5. Slope(Integration)ADC.
Q.62
Explainwithproperdiagramallthesixmodesofoperationofprogrammable
intervaltimer8254.
(8)
Ans
Mode0Interruptonterminalcount
Mode1Programmableoneshot
Mode2RateGenerator
Mode3 Squarewaverategenerator
Mode4 Softwaretriggeredstrobe
Mode5 Hardwaretriggerstrobe
Mode0:Theoutputinthismodeisinitiallylow,andwillremainlowfor
thedurationofthecountifGATE=1.
Widthoflowpulse=NT
WhereNisthetheclockcountloadedintocounter,andTistheclockperiod
oftheCLKinput.
Whentheterminalcountisreached,theoutputwillgohighandremainhigh
untilanewcontrolwordornewcountnumberisloaded.Inthismode,if
GATEinputbecomeslowatthemiddleofthecount,thecountwillstopand
theoutputwillbelow.Thecountresumeswhenthegatebecomeshighagain.
Thisineffectaddstothetotaltimetheoutputislow.
Mode1:Thismodeisalsocalledhardwaretriggerableoneshot.Thetriggering
mustbedonethroughtheGATEinputbysendinga0to1pulsetoit.The
followingtwostepsmustbeperformed:
Loadthecountregisters.
A0to1pulsemustbesenttotheGATEinputtotriggerthecounter.Contrast
thiswithmode0,inwhichthecounterproducestheoutputimmediatelyafter
thecounterisloadedaslongasGATE=1.Inmode1aftersendingthe0to1
pulsetoGATE,OUTbecomeslowandstayslowfora
durationofNT,thenbecomeshighandstayshighuntilthegateistriggered
again.
Mode2:ThismodeisalsocalleddividebyNcounter.Inthismode,ifGATE
=1,OUTwillbehighfortheN Tclockperiod,goeslowforonlyoneclock
pulse, then the count is reloaded automatically, and the process continues
indefinitely.
Mode3:InthismodeifGATE=1,OUTisasquarewavewherethehighpulseis
equaltothelowpulseifNisanevennumber.Inthiscasethehighpartandlow
partofthepulsehavethesamedurationandareequalto(N/2) T(50%duty
cycle).IfNisanoddnumber,thehighpulseisoneclockpulselonger.Thismode
iswidelyusedasafrequencydividerandaudiotonegenerator.
Mode4:InthismodeifGATE=1,theoutputwillgohighuponloadingthecount.It
willstayhighforthedurationofNT.Afterthecountreacheszero(terminal
47
AC23
count),itbecomeslowforoneclockpulse,thengoeshighagainandstayshigh
untilanewcommandwordornewcountisloaded.Torepeatthestrobe,the
count must be reloaded again. Mode 4 is similar to mode 2, except that the
counterisnotreloadedautomatically.Inthismode,thecountstartsthemoment
thecountiswrittenintothecounter.
Mode5:Thismodeissimilartomode4exceptthatthetriggermustbedonewith
theGATEinput.Inthismodeafterthecountisloaded,wemustsendalowto
highpulsetothegatetostartthecounter.
Q.63
Whatisamacro?Discussdifferentconditionalconstructs/statementsusedwhile
programmingamacro.
(4)
AnsMACRO:Asequenceofinstructionstowhichanameisassignediscalled
instructionswhereassubroutinesforlongerones.Macrosexecutesfasterthan
subroutines.
directiveis:
MacroNameMACRO
ARG1,ARG2,..,ARGN.
Conditionalassemblylanguagestatementsareavailableforuseintheassembly
processandinmacrosequences.Theconditionalstatementscreateinstructionsthat
controltheflowoftheprogramandarevariationsoftheIFTHEN,IFTHEN
ELSE,DOWHILE,andREPEATUNTILconstructsusedinhighlevellanguage
programminglanguages.
;assembledportionwithWIDT=TRUEandLENGT=TRUE;
WIDE
LONG
Q.64
IFWIDT
DB72
ELSE
ENDIF
IFLENGT
DB1
ELSE
ENDIF
A450nsEPROMwon'tworkdirectlywitha5MHz8088.Why?Explain. (2)
Ans Whenthe8088isoperatedwitha5MHzclock,itallows460nsforthe
memorytoaccess data.Becauseofthedecodersaddedtimedelay12ns, it is
impossibleforthismemorytofunctionwithin460ns.
Q.65
Whatisaninterrupt?Discussallthefivesoftwareinterruptinstructions. (6)
Ans An interrupt is either a hardwaregenerated CALL or softwaregenerated
CALL.
TheINTELfamilymicroprocessorhassoftwareinterruptsINT,INT0,INT3
,BOUND and IRET. Out of these five interrupts INT and INT3 are very
similar, BOUND and INT0 are conditional, and IRET is special interrupt
returninstruction.
48
AC23
TheBOUNDinstruction,whichhastwooperands,comparesaregisterwithtwo
wordsofmemorydata.
INT0instructioncheckstheoverflowflag(OF).IfOF=1,theINT0instruction
callstheprocedurewhoseaddressisstoredininterruptvectortypenumber4.If
OF=0, then the INT0 instruction performs no operation and next sequential
instructionintheprogramexecutes.
INTninstructioncallstheinterruptserviceprocedurethatbeginsattheaddress
representedinvectornumbern.Forexample,anINT80HorINT128callsthe
interruptserviceprocedurewhoseaddressisstoredinvectortype80H(000200H
000203H).Todeterminethevectoraddress,justmultiplythevectornumber(n)
by4,whichgivesthebeginningaddressofthe4bytelonginterruptvector.For
example,anINT5=4x5=20(14H).ThevectorforINT5beginsataddress
000014Handcontinuesto000017H.TheonlyexceptionistheINT3instruction,
a1byteinstruction.
The IRET instruction is a special return instruction used to return for both
software and hardware interrupts. The IRET instruction is much like a RET,
becauseitretrievesthereturnaddressfromthestack.
Q.66
Discussprogrammablekeyboardanddisplayinterface8279controlword
summary.
(8)
Ans,
The8279isaprogrammablekeyboardanddisplayinterfacingcomponentthat
scansupto64keykeyboardandcontrolsuptoa16digitnumericaldisplay.This
interfacehasabuiltinFIFO(FirstInFirstOut)bufferthatallowsittostoreupto
eightkeystrokesbeforethemicroprocessormustretrieveacharacter.Thedisplay
sectioncontrolsupto16numericdisplaysfromaninternal16x8RAMthatstores
thecodeddisplayinformation.
ControlWord:000DDMMMModesetiscommandwithanopcodeof000and
twofieldsprogrammedtoselectthemodeofoperationforthe8279.TheDDfield
selectsthemodeofoperationforthedisplayandtheMMMfieldselectsthemode
ofoperationforthekeyboard.
49
AC23
D7
D6
D5
Function
Purpose
ModeSet
Selectsthenumberofdisplay
positions,leftorrightentry,and
typeofkeyboardscan.
Clock
Programstheinternalclockand
setsthescananddebounce
times
ReadFIFO
SelectsthetypeofFIFOread
andtheaddressoftheread
Readdisplay
Selectsthetypeofdisplayread
andaddressoftheread
Writedisplay
Selectsthetypeofwriteand
addressofthewrite
Displaywrite
inhibit
Allowshalfbytestobeblanked
Clear
ClearsthedisplayofFIFO
Endinterrupt
ClearstheIRQsignaltothe
microprocessor
The8279controlwordsummary
Q.67
StatetheimportanceofPUBLIC,EXTRNdirectivesinmodularprogramming. (4)
AnsThePUBLICandEXTRNdirectivesareveryimportanttomodular programming.
PUBLICusedtodeclarethatlabelsofcode,data,orentiresegmentsareavailableto
otherprogrammodules.EXTRN(external)declaresthatlabelsareexternaltomodules.
Withoutthesestatements,modulescouldnotbelinkedtogethertocreateaprogramby
usingmodularprogrammingtechniques.Theymightlink,butonemodulewouldnotbe
abletocommunicatetoanother.
The PUBLIC directive is placed in the opcode field of an assembly language
statementtodefinealabelaspublic,sothatthelabelcanbeusedbyothermodules.
The EXTRN statementappearsinbothdataandcodesegmentstodefinelabelsas
externaltothesegment.Ifdataaredefinedasexternal,theirsizesmustbedefined
asBYTE,WORDorDWORD.
Q.68
Whatisthemaindifferencebetween16bitand32bitversionsofC/C++whileusing
inlineassembler.
(4)
AnsThe32bitapplicationsarewrittenusingMicrosoftVisualC/C++for windowsand
the 16bit applications are written using Microsoft C/C++ for DOS. The main
differenceisthatVisualC/C++forwindowsismorecommontoday,butdoesnoteasily
callDOSfunctionssuchasINT21H.
Q.69ExplainhowmemorymanagementisimprovedinPentiumprocessors?
(4)
Ans Thememorymanagementisimprovedbyaddingpagingunitandanewsystem
memorymanagementmode.
PagingUnit:Thepagingmechanismfunctionswith4Kbytememorypagesorwith
a new extension available to the Pentium with 4M bytememory pages. In the
tosinglepagetable.
Memorymanagementmode:Thesystemmemorymanagementmode(SMM)ison
thesamelevelasprotectedmode,realmode,andvirtualmode,butitisprovidedto
functionasamanager.TheSMMisnotintendedtobeusedasanapplicationora
systemlevelfeature.Itisintendedforhighlevelsystemfunctionssuchaspower
managementandsecurity,whichmostPentiumsuseduringoperation.
Q.70Mentionhowdothefollowinginstructionsdifferintheirfunctionality
(i)
NEG&NOT
(ii)DIV&IDIV
(iii)AND&TEST
(iv)CMP&SUB
50
(4)
AC23
Ans,NOT:LogicalinversionortheonescomplementandNEG:arithmetic sign
inversionorthetwoscomplement.
DIV:UnsignednumbersdivisionandIDIV:Signednumberdivision.
AND: Performs the AND operation and changes the destination operand.
TEST: Test instruction performs the AND operation and it wont changes
destinationoperandbutitonlyaffectstheconditionoftheflagregister.
SUB:Performsthesubtractionoperationandchangesthedestinationoperand.
CMP:Comparisoninstructionisasubtractionthatchangesonlytheflagbits;
thedestinationoperandneverchanges.
Q.71
Whymemorydecodingisrequired?Describe74LS139memorydecoder (4)
AnsInordertoattachamemorydevicetothemicroprocessor,itisnecessaryto
decodetheaddresssentfromthemicroprocessor.Decodingmakesthememory
functionatauniquesectionorpartitionofthememorymap.Withoutanaddress
decoder,onlyonememorydevicecanbeconnectedtoamicroprocessor,which
wouldmakeitvirtuallyuseless.
The74LS139isadual2to4linedecoder.Itcontainstwoseparate2to4line
decoderseachwithitsownaddress,enable,andoutputconnections.
ThePinoutofthe74LS139
Q.72
Explaindataaddressingmodes(withexamples)availableinmicroprocessors. (8)
51
Ans,DirectMode:
Instructionincludesmemoryaccess.
CPU accesses that location in memory.
Example:
LDAC5
AC23
Readsthedatafrommemorylocation5,andstoresthedatainthe
CPUsaccumulator.
IndirectMode:
Addressspecifiedininstructioncontainsaddresswheretheoperandresides.
Example:
LDAC@5orLDAC(5)
Retrievescontentsoflocation5,usesittoaccessmemoryaddress.
RegisterDirectandRegisterIndirectModes
Doesnotspecifyamemoryaddress.Insteadspecifiesaregister.
Example:
LDACR
WhereRisaregistercontainingthevalue5.Theinstructioncopiesthevalue5
fromregisterandintotheCPUsaccumulator.
ImmediateMode
Theoperandspecifiedinthismodeistheactualdataitself.
Example:
LDAC#5
Movesthevalue5intotheaccumulator.
ImplicitMode
Doesnotexactlyspecifyanoperand.Instructionimplicitlyspecifies
theoperandbecauseitalwaysappliestoaspecificregister.
Example:
CLAC
Clearstheaccumulator,andsetsvaluetozero.Nooperandsneeded.
RelativeMode
Operandsuppliedisanoffset,nottheactualaddress.Addedtothecontents
oftheCPUsprogramcounterregistertogeneratetherequiredaddress.
Example:
LDAC $5 is located at memory location 10, and it takes up two blocks of
memory.Thusthevalueretrievedforthisinstructionwillbe12+5,andwillbe
storedintheaccumulator
IndexModeandBaseAddressMode
Addresssuppliedbytheinstructionisaddedtothecontentsofan
indexregister.
Baseaddressmodeissimilarexcept,theindexregisterisreplacedbya
baseaddressregister.
Example:
LDAC5(X)whereX=10
Readsdatafromlocation(5+10)=15andstoresitintheaccumulator.
Q.73Whatistheuseoftheseassemblerdirectives?
(i).MODEL
(ii)PROC
(2)
Ans
MACRO: Asequenceofinstructionstowhichanameisassignediscalledmacro.
Macrosandsubroutinesaresimilar.Macrosareusedforshortsequenceofinstructions
whereassubroutinesforlongerones.Macrosexecutesfasterthansubroutines.
TheMACROdirectiveinformsassemblerthebeginningofamacroThisisusedwith
ENDMdirectivetoencloseamacro.ThegeneralformatoftheMACROdirectiveis:
52
AC23
MacroNameMACRO
ARG1,ARG2,..,ARGN.
PROC:ThePROCandENDPdirectivesindicatethestartandendofaprocedure.
These directives force structure because the procedure is clearly defined. The
PROCdirectiveindicatesthestartofaprocedure,mustalsobefollowedwitha
NEARorFAR.ANEARprocedureisonethatresidesinthesamecodesegmentas
theprogram.AFARproceduremayresideatanylocationinthememorysystem.
Q.74
(i)Convertbinarynumberintwo'scomplimentform
(ii)ConverthexadecimalBCHtodecimal
01001000
(2)
Ans.
01001000=>10111000
BCH=>10111100=>188.
Q.75WhatisTPA(transientprogramarea)?DrawthememorymapofTPAinapersonal
computerandexplaindifferentareas.(6)
Ans
Thememorysystemisdividedintothreemainparts:TPA,SystemareandXMS
(extendedmemorysystem).
TheTPAholdstheDOSoperatingsystemandotherprogramsthatcontrolthe
computer system. The TPA also stores any currently active or inactive DOS
applicationprograms.ThelengthoftheTPAis640Kbytes.
9FFFF
9FFF0
MSDOSProgram
.
.
.
08E30
.
.
.
COMMAND.COM
Devicedriverssuch
asMOUSE.SYS
MSDOSProgram
IO.SYSProgram
DOSCommunication
area
BIOS
Communicationarea
08490
02530
01160
00700
00500
00400
00000
FreeTPA
InterruptVectors
ThememorymapoftheTPAinaPersonalComputer
Q.76Whatismemorypaging?Explainhowitisusedformemoryaddressing.
(6)
53
AC23
Ans
Thememorypagingmechanismlocatedwithinthe80386andaboveallowsany
physicalmemorylocationtobeassignedtoanylinearaddress.Thelinearaddressis
definedastheaddressgeneratedbyaprogram.Withthememorypagingunit,the
linear address isinvisibly translated into anyphysical address, which allows an
applicationwrittentofunctionataspecificaddresstobelocatedthroughthepaging
mechanism.Italsoallowsmemorytobeplacedintoareaswherenomemoryexists.
Q.77
DescribeindetailthesoftwareinterruptsavailableinINTELfamily.Howinterrupts
areexecutedinrealandprotectedmode.
(8)
Ans
TheINTELfamilymicroprocessorhassoftwareinterruptsINT,INT0,INT3,BOUND
andIRET.OutofthesefiveinterruptsINTandINT3areverysimilar,BOUNDand
INT0areconditional,andIRETisspecialinterruptreturninstruction.
The BOUND instruction, which has two operands, compares a register with two
wordsofmemorydata.
INT0instructioncheckstheoverflowflag(OF).IfOF=1,theINT0instructioncalls
theprocedurewhoseaddressisstoredininterruptvectortypenumber4.IfOF=0,
thentheINT0instructionperformsnooperationandnextsequentialinstructioninthe
programexecutes.
INT n instruction calls the interrupt service procedure that begins at the address
representedinvectornumbern.Forexample,anINT80HorINT128callstheinterrupt
serviceprocedurewhoseaddressisstoredinvectortype80H(000200H000203H).To
determinethevectoraddress,justmultiplythevectornumber(n)by4,whichgivesthe
beginningaddressofthe4bytelonginterruptvector.Forexample,anINT5=4x5=20
(14H).ThevectorforINT5beginsataddress000014Handcontinuesto000017H.The
onlyexceptionistheINT3instruction,a1byteinstruction.
TheIRETinstructionisaspecialreturninstructionusedtoreturnforbothsoftware
and hardware interrupts. The IRET instruction is much like a RET, because it
retrievesthereturnaddressfromthestack.
Q.78 Explainthenecessityofdecodingwhenmemorydeviceisattachedtoamicroprocessor?
WithneatdiagramindicatehowasimpleNANDgatedecoderisusedtoselecta2716
EPROMmemorycomponentformemorylocationsFF800HFFFFFH.
(5)
Ans
Inordertoattachamemorydevicetothemicroprocessor,itisnecessarytodecode
theaddresssentfromthemicroprocessor.Decodingmakesthememoryfunctionata
uniquesectionorpartitionofthememorymap.Withoutanaddressdecoder,onlyone
memorydevicecanbeconnectedtoamicroprocessor,whichwouldmakeitvirtually
useless.
SimpleNANDgateDecoder: Whenthe2kx8EPROMisused,addressconnection
A10A0ofthe8088areconnectedtoaddressinputsA10A0oftheEPROM.The
remainingnineaddresspins(A19A11)areconnectedtotheinputsofaNANDgate
54
AC23
decoder.ThedecoderselectstheEPROMfromoneofthemany2Kbytesectionsofthe
entire
1Mbyte
address
range
of
the
8088
microprocessor.
Inthiscircuit,asingleNANDgatedecodesthememoryaddress.Theoutputofthe
NANDgateislogic0wheneverthe8088addresspinsattachedtoitsinputs(A19
A11)arealllogic1s.Theactivelow,logic0outputoftheNANDgatedecoderis
connectedtotheCEinputpinthatselects(enables)theEPROM.
Q.79 WriteaPrograminassemblylanguagetofindthelargestofnnumbersstoredinthe
memory.
(8)
Ans
MOVAX,0000
MOVSI,0200
MOVCX,[SI]
BACK:INCSI
INCSI
CMPAX,[SI]
JAEGO
MOVAX,[SI]
GO:LOOPBACK
MOV[0251],AX
INT3.
Q.80
Definethefollowing
(i)IsolatedI/O
(iii)Handshaking
(ii)memorymappedI/O
(3)
Ans
Therearetwoschemesfortheallocationofaddressestomemoriesandinput/
outputdevices.
55
AC23
(i). Memory Mapped I/O Scheme: In this scheme there is only one address
space.Addressspaceisdefinedasallpossibleaddressesthatmicroprocessorcan
generate.SomeaddressesareassignedtomemoriesandsomeaddressestoI/O
devices.AnI/Odeviceisalsotreatedasamemorylocationandoneaddressis
assigned to it. In this scheme all the data transfer instructions of the
microprocessorcanbeusedforbothmemoryaswellasI/Odevice.Thisscheme
issuitableforasmallsystem.
(ii).InI/OmappedI/Oschemetheaddressesassignedtomemorylocationscan
alsobeassignedtoI/Odevices.Sincethesameaddressmaybeassignedtoa
memorylocationoranI/Odevice,themicroprocessormustissueasignalto
distinguishwhethertheaddressontheaddressbusisforamemorylocationor
anI/Odevice.
(iii). Hand shaking: In an ASYNCHRONOUS data transfer is not based on
predeterminedtimingpattern.Thistechniqueofdatatransferisusedwhenthe
speedofanI/Odevicedoesnotmatchthespeedofthemicroprocessor,andthe
timingcharacteristicofI/Odeviceisnotpredictable.Inthistechniquethestatus
oftheI/O devicei.e.whether the deviceisreadyornot,ischeckedbythe
microprocessorbeforethedataaretransferred.Themicroprocessorinitiatesthe
I/OdevicetogetreadyandthencontinuouslychecksthestatusoftheI/Odevice
tilltheI/Odevicebecomesreadytotransferdata.WhenI/Odevicebecomes
ready,themicroprocessorsendsinstructionstotransferdata.Thismodeofdata
transferisalsocalled handshaking modeofdatatransfer.Themicroprocessor
issues an initiating signal to the I/O device to get ready. When I/O device
becomesreadyitsendssignalstotheprocessortoindicatethatitisready.Such
signalsarecalledhandshakesignals.
Q.81Explainindetailtheoperationof8255inmode1takingsuitableexample.
(8)
Ans
Inmode1,PortsAandBareprogrammedasinputoroutputportsandPortCis
usedforhandshaking.
PA[7:0
PC
PC
PC
8255
PC
PC
PC
PC6,
Example:
56
STBA
IBFA
INTRA
PB[7:0
STBB
IBFB
INTRB
PA[7:0
8255
PC
PC
PC
PC
PC
PC
PC4,
OBFA
ACKA
INTRA
PB[7:0
OBFB
ACKB
INTRB
AC23
Q.82
57
Whatisthefunctionof8254ProgrammableIntervalTimer?Discussanyoneofits
applicationsindetail.
(8)
AC23
Ans
8253/54TimerDescriptionandInitialization
PTI(programmableIntervalTimer/Counter)
8253and8254haveexactlythesamepinout.
8254isasupersetofthe8253.
ItGeneratesaccuratetimedelays
It can be used for applications such as a realtime clock, an event

counter, a digitaloneshot, asquare wave generator and a complex
waveformgenerator
8254FunctionalDescription:
8254Programming:
58
AC23
8254Mode1Operation:
Q.83Discussthecontrolwords(ICWS)ofIC8259.
(5)
Ans
TheProgrammableinterruptcontrollerisusedwhenseveralI/Odevicestransfer
data using interrupt and they are connected to the same interrupt line of the
microprocessor.
TheIntel8259isasinglechipprogrammableinterruptcontroller.Itiscompatible
with8086,8088and8085microprocessor.Itisa28pinDIPI.Cpackageanduses
NMOStechnology.
8259ControlWordInitialization
59
AC23
60
AC23
Q.84WriteshortnoteonANYFOURofthefollowing
(i) ISABUS
(ii). GraphicAdapterandMONITOR
(iii). DMAcontroller
(iv). Protectedmodeaddressing
(16)
Ans
(i)TheISAorIndustryStandardArchitecture,bushasbeenaroundsincethe
verystartoftheIBMcompatiblepersonalcomputersystem.Infact,anycard
fromtheveryfirstpersonalcomputerwillplugintoandfunctioninanyofthe
modernPentium4basedcomputers.ThisisallmadepossiblebytheISAbus
interfacefoundinallthesemachines,whichisstillcompatiblewiththeearly
personalcomputers.
ISAbushasevolvedfromitsoriginal8bitstandardtothe16bitstandard
foundinmostsystemstoday.TheISAbusconnectorcontainstheentirede
multiplexedaddressbus(A19A0)forthe1Mbyte8088system,the8bitdata
bus(D7D0),andthefourcontrolsignalsMEMR,MEMW,IORandIOW
forcontrollingI/Oandanymemorythatmightbeplacedontheprintedcircuit
card.ISACardonlyoperatesat8MHzrate.
(ii)Videocardconvertsdigitaloutputfromthecomputerintoananalogvideo
signal and sends the signal through a cable to the monitor also called a
graphicscard.
Thenumberofcolorsavideocarddisplaysisdeterminedbyitsbitdepth
Thevideocardsbitdepth,alsocalledthecolordepth,isthenumberof
bitsitusestostoreinformationabouteachpixel
i.e.8bitvideocarduses8bitstostoreinformationabouteachpixel;this
videocardcandisplay256colors(2x2x2x2x2x2x2x2)
i.e.24bitvideocarduses24bitstostoreinformationabouteachpixeland
candisplay16.7millioncolors
Thegreaterthenumberofbits,thebettertheresultingimage
Video Electronics Standards Association (VESA) , which consists of video
card and monitor manufacturers, develops video stands to define the
resolution,numberofcolors,andotherdisplayproperties.
g. MonochromeDisplayAdapter(MDA)
h. HerculesGraphicsCard
i. ColorGraphicsAdapter(CGA)
j. EnhancedGraphicsAdapter(EGA)
k. VideoGraphicsAdapter(VGA)
l. SuperVGA(SVGA)andOtherStandardsBeyondVGA
(iii)ADMAcontrollerinterfaceswithseveralperipheralsthatmayrequestDMA.
The controller decides the priority of simultaneous DMA requests
communicates with the peripheral and the CPU, and provides memory
addressesfordatatransfer.DMAcontrollercommonlyusedwith8088isthe
8237programmabledevice.
The8237isinfactaspecialpurposemicroprocessor.Normallyitappearsas
partofthesystemcontrollerchipsets.The8237isa4channeldevice.Each
61
AC23
channelisdedicatedtoaspecificperipheraldeviceandcapableofaddressing64
Kbytessectionofmemory.
Memoria
principala
UCP
HOLD
HOLDA
Magistraladeadrese
MA
Magistraladedate
MD
Magistraladecomenzi
MC
HRQ
HLDA
DRQ
DACK
ControlerDMA
PI/E
DispozitivPeriferic
(iv).Thisaddressingallowsaccesstodataandprogramslocatedabovethefirst
1Mbyteofmemory,aswellaswithinthefirst1Mbyteofmemory.Addressing
thisextendedsectionofthememorysystemrequiresachangetothesegment
plus an offset addressing scheme used with real mode memory addressing.
Whendataandprogramsareaddressedinextendedmemory,theoffsetaddress
isstillusedtoaccessinformationlocatedwithinthememorysegment.
The segment register contains a selector that selects a descriptor from a
descriptor table. The descriptor describes the memory segments location,
length,andaccessrights.
Q.85
CompareRS232CandRS422Astandards.
Ans
RS232C
1. Standarddefinedfor
asynchronouscommunications,
wherethereisspecifiedtiming
betweendatabitsandnofixed
timingbetweenthecharacters
thatthebitsform.
2. Thisstandarddefined25
signallinesand50ftisthe
maximumguaranteeddistance.
3. Thisstandarddefinesaserial
systemwithjustasinglewirefor
eachdirection.
4. Signallevelsare:25to3V
and+3to+25V.
Q.86
62
DiscussthefeatureofPentiuminbrief.
RS422A
1.
DateRate:10Mbits/s
2.
Drivingabilityupto4000ft
and10receivers
3.
ItisDifferentialstandard
i.eEachsignalisrepresentedby
apairofwiresandvoltage
differenceacrossthesewiresis
whatissensedatthereceiver.
Thisminimizestheeffectof
groundnoiseorthevoltagedrop
alongthesignalleads.
4.
Signallevelsare:2to
6Vand+2to+6V
AC23
Ans
ThePentiumisa32bitsuperscalar,CISCmicroprocessor.Thetermsuperscalaris
usedfortheprocessorwhichcontainsmorethanonepipelinetoexecutemorethan
oneinstructionsimultaneouslyinparallel.
ThemainfeaturesofPentiumare,ithastwoALUs,onefloatingpointunit,two8
KBcache,prefetchbuffers,abranchtargetbuffer.TwoALUsmeansthatthere
aretwopipelines.EachALUcontainsfivefunctionalunits.Thetwopipelinesare
integerpipelines.TheyarenamedUandVpipeline.
WhenPentiumwasintroduced,itsoperatingfrequencywas60MHz.gradually;
theoperatingfrequencywasraisedto233MHz.ThePentiumuses0.6micronBi
CMOSprocesstechnology.Itusespowermanagementfeature.
Q.87
Discussthefollowingassemblerdirectiveswithexample
i. DWORD
ii. OFFSET
iii. SEGMENT
iv. MACRO
v. ASSUME
vi. ENDP
Ans
(i).DWORD:Itdefineswordtypevariable.Thedefinedvariablemayhaveoneor
moreinitialvaluesinthedirectivestatement.Ifthereisonevalue,twobytesof
memoryspacearereserved.Thegeneralformatis
NameofvariableDWInitialvalueorvalues.
(ii).OFFSET:Itisanoperatortodeterminetheoffset(displacement)ofavariable
orprocedurewithrespecttothebaseofthesegmentwhichcontainsthenamed
variableorprocedure.Theoperatorcanbeusedtoloadaregisterwiththe
offsetofavariable.
Theoperatorcanbeusedasfollows:
MOVSI,OFFSETARRAY
(iii). SEGMENT: Thisdirectivedefinestotheassemblerthestartofasegment
withnamesegmentname.Thesegmentnameshouldbeuniqueandfollows
therulesoftheassembler
SegmentNameSEGMENT
{Operand(Optional)};Comment
.
.
.
SegmentNameENDS.
(iv). MACRO:Asequenceofinstructionstowhichanameisassignediscalled
instructions whereas subroutines for longer ones. Macros executes faster than
subroutines.
63
AC23
directiveis:
MacroNameMACRO
ARG1,ARG2,..,ARGN.
(v).ASSUME:Thisdirectivewillbeusedtomapthesegmentregisternameswith
memoryaddresses.
ASSUMESS:Stackseg,DS:Dataseg,CS:Codeseg
TheASSUMEwilltelltheassemblertousetheSSregisterwiththeaddressofthe
stacksegmentwhosenameisstackseg.
(vi). ENDP: (End Procedure) It informs assembler the end of a procedure. In
assemblylanguageprogramming,subroutinesarecalledprocedures.Aprocedure
maybeanindependentprogrammoduletogivecertainresultortherequiredvalue
tothecallingprogram.ThisdirectiveisusedtogetherwithPROCdirectiveto
encloseprocedure.ThegeneralformatofENDPdirectiveis:
ProcedureName
ENDP
Q.88
DiscussSteppermotorinterfacedtothe82C55.
Ans
Asteppermotorrotatesinstepsinresponsetodigitalpulseinput.Theshaftofthe
motor rotates in equal increments when a train of input pulses is applied. To
controldirection,numbersofstepstoappropriatepulsesareappliedtothestator
windingsofthemotor.
12 V supply is used to energize the poles. Pulses sent by the microprocessor
switchonratedvoltagetothewindingsofthedesiredpoles.Adelaysubroutineis
incorporatedintheprogram.Afterenergizingonesetofpolewindingssomedelay
isprovided,thenthepowersupplyisswitchedontotheothersetofpolewindings.
Thisdelaygovernsthespeedofmotor.
64
AC23
Q.89
DiscusstheEISAbusandneedofPCIbus.
Ans
TheExtendedIndustryStandardArchitecture(EISA)isa32bitmodificationto
theISAbus.Ascomputersbecamelargerandhadwiderdatabuses,anewbus
was needed that would transfer 32bit data. The clocking speed limited up to
8MHz.ThemostcommonapplicationfortheEISAbusisadiskcontrollerorasa
videographicsadapter.Theseapplicationsbenefitfromthewiderdatabuswidth
becausethedatatransferrateforthesedevicesarehigh.
PeripheralComponentInterconnect(PCI):ThisbuswasdevelopedbyInteland
introducedin1993.Itisgearedspecificallytofifthandsixthgenerationsystems,
althoughthelatestgeneration486motherboardsusePCIaswell.
PCIbushasplugandplaycharacteristicsandtheabilitytofunctionwitha64
bit data bus. A PCI interface contains series of registers, located in a small
memorydeviceonthePCIinterface,thatcontainsinformationabouttheboard.
Q.90
ExplaincascadingofmultiplePIC8259.
Ans
Fig:8259PinDiagram
65
AC23
Fig:cascadingmultiple8259
Q.91
66
DiscussneedofPipeliningandCaches.
AC23
Ans
Thesimplesttechniqueforimprovingperformancethroughhardwareparallelism
ispipelining.Pipeliningconsistsofbreakinguptheoperationstobeperformed
intosimplerindependentoperations,sortoflikethebreakinguptheoperationsof
assemblingacarinanassemblyline.Atypicalprocessorpipelineconsistsof4
pipelinestages(1)Instructionfetch,(2)Instructiondecode(3)Instructionexecute
and (4) Register file writeback/memory access. In practice however, real
architectures have many more physical pipeline stages, with multiple physical
stagescorrespondingtooneoftheabovestages.Forexampletheexecutestage
mightoccupy4physicalpipelinestages
Theprimaryadvantagesofpipeliningare
Parallelism
Smallercyclestime
Cachesaretheotherbigthingdoneinthelast2decadestoimproveperformance.
Keepthingslocallyiftheyaregoingtobeusedsoon.Fromaphysicspointof
view,anaccesstomemorywhichisalmostexclusivelyoffchipwillmeansignals
havetotravelthatmuchfurtherinonecycle.Inpractice,sincewedonotwantto
makethesystemasslowasitsslowestcomponent(memory),andthecycletimeis
not determined by the memory access time, and rather memory takes several
cyclestocomplete.
Q.92
ExplaininbriefstepstodevelopaMicroprocessorbasedcomputersystem
Ans
Thedesignofamicrocomputersystemmustbeginwiththe CPUmodule. This
moduleestablishesthebasicsystemtiming,provideanorderlymeansofstarting
uptheprocessor,andprovideaccesstothesystembuses.
ThesecondstepisaddingMemory,itisessentialtothestoredprogramcomputer.
FromthisunitthattheCPUfetchesinstructionsdirectingitinsometask.But
withinaparticularcomputersystemtheremaybeseveraltypesofmemorieseach
withitsownhierarchy.
Thethirdstepisadding input/output:Thisisalsoknownhasuserinterface.
Therearebasicallytwohardwaretechniquesforgettingdataintoandoutofa
computer. The first is the parallel interface and is the most natural for
microprocessor.Thesecondtechniqueistheserialinterface.
67

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(ii) PagingUnit:Thepagingmechanismfunctionswith4Kbytememory pagesor

Character frame,11 bits in total

Motorola had an excellent 32 bit processor design years before Intel.

4. Signal levels are : 25 to

It can be used for applications such as a realtime clock, an event

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