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PWM Switching Strategy for the Elimination of

Common Mode Voltage of a Two-level Inverter


Drive with an Open-end Winding Induction Motor
Configuration
P. Srinivasan,B. Venugopal Reddy,Student

Members,

IEEE, V. T. Somasekhar.

D
Abstract--Adjustable

speed

drives

are

known

to

generate

common mode voltages which cause motor shaft voltages and

absence of neutral point fluctuation and redundant switching

bearing

state combinations. Exploiting these advantages, the complete

currents.

It

was

demonstrated

that

two

two-level

inverters connected to either sides of an open-end winding


induction motor is capable of achieving the functionally of a three
level inverter. The common mode voltage generated by a three
level inverter can be eliminated by switching only the voltage
space vector combinations which do not produce the common
mode voltage.

A PWM switching strategy to eliminate the

elimination of common mode voltage is procured.


The high dV/dt due to the power device switching in PWM
inverters is mainly responsible for common mode voltage. It
creates the so called shaft voltages.

The steep rising and

falling pulses of this voltage can excite the capacitive coupling

common mode voltages using an open-end winding induction

between the stator winding and the stator frame and the rotor.

motor drive is presented in this paper, which tends to avoid the

This paper presents a PWM switching strategy to dual two

electrostatic coupling of the stator and rotor reducing the bearing


currents and leakage currents. The present scheme uses single
DC-link

with

about

58%

of

the

DC-voltage

compared

to

conventional two-level VSI.

mode Voltages, Space vector modulation, Bearing Currents.

drives have gained popularity in the recent past

et al [1] with low power device ratings as

that of two level inverters. With the use of multilevel inverters


the harmonic content in the output voltage can be reduced
enables

operation

at

lesser

frequency

with

lesser

switching losses.
Stemmler and Guggenbach [2] instigated that three-level
functionality

can

be

open-end

winding

induction motor to

index.

EFFECT OF PWM INVERTERS ON INDUCTION MOTOR


BEARINGS

INTRODUCTION

after the introduction of three-level neutral point clamped

which

fed

bearing and leakage currents without applying devices to the

II.

Ultilevel inverters for high voltage, high power

inverter by Nabae

inverter

motor, adding passive components, or limiting the modulation

Index Terms--Open-end winding, Induction motor, Common

I.

level

eliminate the motor common-mode voltage and resulting

realized

with an open-end winding

induction motor driven by two-level inverters from either sides.


This circuit configuration offers principal advantages such as

Conventional

inverters

generate

alternating

common

mode voltages within the motor windings that cause an


electrostatic (capacitive) coupling between the rotor and the
stator windings and frame, enabling voltage to build up on
the motor shaft [3]-[5]. The bearings are not in electrical
contact with the inner and outer races because the grease used
has

partial

insulating

effect.

Therefore, the

charge

accumulates on the rotor assembly until it exceeds the


dielectric capability of the bearing grease.

The resulting

effect is a frequently repeated flashover current that in time


can

damage

the

bearing

surfaces

due

to

the

Electric

Discharge Machining (EDM) effect, or electroplating of the


race

steel

and

bearing

ball

(pitting

and

fluting).

The

phenomenon of shaft voltages producing circulating shaft


currents has been recognized since 1920s.
Since the introduction of the IGBT technology, there has

P. Srinivasan and B. Venugopal Reddy are Researchers with


Department of Electrical Engineering, National Institute of Technology,
Warangai, Andhra Pradesh, India 506004
(e-mail: spradabane2000@yah00 .co.in& bvenugopaJ.reddi@gmail.cm).
V. T. Somasekhar is with Department of Electrical Engineering, National
Institute of Technology, Warangal, Andhra Pradesh, India 506004 (e-mail:
vtsomasekhar@rediffinaiLcom).

been a documented increase in electrically induced bearing


failures; and shortening mechanical life of bearings. In spite
of the extended study of the problem over the past few years
[6]-[9], there
phenomenon.

is

no

satisfactory

explanation

for

this

3,

In Fig.
III. D UAL INVERTER FED OPEN-END WINDING INDUCTION

MOTOR CONFIGURATION WITH COMMON DC-LINK


The schematic of a dual two-level inverter fed three-phase
open-end winding induction motor fed from a single power
supply is shown in Fig. 1. In this scheme, each of the dual
two-level inverters can produce eight space vector locations
independent of the other as shown in Fig.

2, resulting in a

total of 64 space vector combinations spread over the 19


space locations as shown in Fig.
denote the states assumed by

3 [10]. The numbers 1 - 8

INVI and I' - 8' denotes the

same for INV2. The switching states of the two inverters are
tabulated in Table 1.

][

'V

Fig.I . Dual inverter fed open-end winding induction motor drive

IOAI represents the DC-link voltage of individual

inverters which is equal to

Vdd2 and IOGI represents the DC

link voltage of the equivalent three-level inverter which is


equal to Vdc. From Fig.
it may be seen that there are 19

space vector locations, which form vertices of 24 equilateral


sectors.

Six

hexagons

namely

OBHGSF, OCJIHA,

ODLKJB, OENMLC, OFQPND and OASRQE may be


identified with their centers at A, B, C, D, E and F
respectively,within the outer hexagon GIKMPR.

TABLE I
SWITCHING STATES OF THE INDIVIDUAL INVERTERS
State of
Inverter-2

1 (+ --)

Switches
tumed on
S6, SI, S2

1'(+--)

Switches
tumed on
S6" Sp, S2'

2(++-)

Slo S2, S3

2' (++ -)

Sp, S2', S3'

3( -+ -)

S2, S3, S4

3'(-+-)

S2', S3" S4'

4(-++)

S3, S4, S5

4' ( -++)

S3" S4', S5'

5(--+)

S4, S5, S6

5' (--+)

S4', S5" S6'

6(+-+ )

S5, S6, SI

6' ( +-+ )

S5" S6" Sp

7(+++)

Slo S3, S5

7'(+++)

SI', S3" S5'

8( - - -)

S2, S4, S6

8' ( - - -)

S2', S4', S6'

State of
Inverter-l

Any leg of the two inverters can independently attain levels

o or Vdel2. The voltage across a particular phase winding can

4(++)f---:1::---'-:1hr-.-- (+-) 4(.++)f---::::-:-:-:-llf--=-:-----i!, 1'(+-)


,,
,,
,,
,,
,

I
t

,,
,,
,,
,,
,

6(+-+) :

}+--Vdcl2-+:

:
I

:+--Vd

Fig.2. Voltage vectors for inverter-I (Left) and inverter-2(Right)


A

'+'

indicates that the top switching device in a leg of a

given inverter is turned 'ON', whereas a '-' indicates that the

be obtained by

(1)

VAA,=VAO-VA,O
VBB, =VBO -VB'O
VCC' =vCO -Vc,o
TABLE II

POLE AND PHASE VOLTAGES OF THE 3-LEVEL INVERTER

bottom switching device in a leg of the given inverter is


turned 'ON'. The symbols

VAO, VBO and VCO denote the three


INVI whereas the symbols VA'O, VB'O
and VC'O denote the same for INV2 as in Fig. 1.
phase pole voltages of

M (41')

---:':

':.---4 G(14')

Pole-voltage of
INVl(VAo )

Pole-voltage of
INV2(VA'o )

VocI4
-VocI4

Vd./4

VocI4

-Vdcl2

Vd./4
VocI4

Vd./4
-Vd.!4

0
Vdc12

Motor phase voltage


VAA'=VAO-VA'O

The phase windings can attain one of the levels, -V del2,


o and +Vdci2. The combined effect of the voltages in the
three windings can be represented by a voltage space vector

VSf as defined by

(
r=VAA'+ B,e

j27l'/3)

(j47l'/3)
V
+ CC' e

(4)

From eqn. (4) the voltage space vector locations for


different switching combinations are shown in fig

3.

This

voltage space vector can be equivalently represented as the

Fig.3.Space vector locations with the combinations of the dual-inverter


scheme

sum of the voltage space vectors generated by the two


two-level inverters.

If

Vsl and Vs2 are the voltage space

vectors generated by

INVI and INV2, respectively, the

computing the switching times of the switching devices of the


dual-inverter.

resultant voltage space vector is

(5)

V".sr =V".s1 -V".s2

This

switching

algorithm

is

based

on

the

imaginary switching time periods T as, T bs and Tcs which are


proportional

to

the

three

instantaneous

phase

reference

voltages

In this drive, the two inverters are operated with a


common DC-link voltage.

INVI and INV2 are operated with


VruJ2. Thus, the sum of the DC-link
voltages is equal to Vdc, which is the DC-link voltage of
a DC-link voltage of

an equivalent conventional two-level inverter drive.

This

Va, Vb and Vc, the constant of proportionality being


equal to (TslVdc) [11]. The symbols Tmax, Tmid and Tmin,
respectively, denote the maximum, median and minimum
values among the three imaginary switching times. Recently, a
space vector-based

PWM switching scheme for the three-level,

dual-inverter

open-end winding induction motor

fed

drive circuit configuration along with suitable switching

proposed using this switching algorithm

combinations is capable of mitigating the common mode

briefly reviewed in the following paragraph.

voltages at the locations A,

was

[12]. This switching is

B, and H, along with tight

switching.
IV.

PROPOSED PWM SCHEME FOR THE ELlMlNAnON OF


COMMON MODE VOLTAGE
D-------A(U'

The reference space vector for the space vector modulation


is denoted as

Vsr is resolved into two components Va and Vp.


The voltages Va, Vb and Vc denote the instantaneous phase
reference voltages required for realizing Vsr. They are obtained
by projecting the tip of Vsr onto a, b and c-phase axes
respectively,

and

are

given

by

the

classical

phase

transformation as given below

2/3
-113 11../3
-113 -11../3

:..-- v.. ----.l

Fig.4. Space vector locations with the combinations of the dual-inverter


scheme
either

(6)

end

of

an

open-end

winding

PWM scheme is

PWM scheme proposed in


[11]. From Kim and SuI, the symbols Tl and T2

denote the time duration for which the active vectors along the
leading and trailing edges of the sector in which the tip of

TABLEm
COMBINATIONS

-V<ic/4

-V<ic/6

-V<ic/12

Vsr

8-4'
8-6'

denotes the time duration for which the null vector is switched

space vector modulation is equal to the sum of the time


durations, T h T2 and To. The symbols Tga' Tgb and Tgc,

5-5'

1-4',2-5',

3-5'

3-6',5-2',

3-3'

8-7', 5-4',

8-5'

during which the output phases of the inverter are connected to

8-3'

5-1 '

3-4', 5-6',

the positive rail of the DC-link.

8-1 '

3-1 '

3-2', 16',

5-8'

1-5'

1-2', 4-5',

3-8'

1-3'

4-3',4-1',

1-8'

1-1'

6-5',6-3',

4-8'

2-3', 2-1',

6-8'

7-8',6-1'

v""'.

C
IatIuctIoa
m8tor

v"",.

Fig.4. Conventional two-level Voltage Source Inverter


The basic switching algorithm described in Kim and SuI

[11] for the classical two-level inverter feeding three-phase


induction motor is extended to the dual-inverter system for

2-8'
5-3'

V<ic/6

V<ic/4

1-7'

respectively, denote a, b and c-phase switching time periods

8-8'

V<ic/12

5-7'

8-2'

along with the active vectors. The sampling interval Ts for this

is

COMMON MODE VOLTAGE CONTRIBUTIONS FROM DIFFERENT

is situated are switched for its realization. The symbol To

motor

From fig 3, IOGI represents the dc link voltage of the dual

proposed which is based on the

v..

induction

capable of achieving the functionality of a three level inverter.


inverters.

In this paper, a space vector-based


Kim and SuI

i
As mentioned earlier, two two-level inverters connected to

[vVba**] [ 0] [;:]
Vc*
=

3-7'
4-4'
4-6'
6-4'
2-4'
4-2'
6-2'
2-6'
2-2'
7-5'
7-3'
6-6'
7-1 '

4-7'
7-4'
7-6'
6-7'
7-2'
2-7'

7-7'

The common-mode voltage of the dual inverter drive


defined with reference to the motor frame, which is earthed, is
given by:

G)

(7)

(VA' + VB' + Vc, +VA" + VB" + Vc',)

The points G, I, K, M, P, and R are the locations


corresponding to inverter state combinations 14',25',36',41',
52', 63', where the common mode voltage becomes zero as
shown below and

the

possibility

of

bearing currents and

leakage currents due to electrostatic coupling and its associated


problems are also avoided. The common mode voltage is given
by [14]
Table- III presents

the

common

mode

voltages

corresponding to all of the space vector combinations of the


open-end winding induction motor drive shown in fig. 1.

voltage rating of the overall string of the devices as shown in


fig. 5.
However, the static and dynamic balancing of
voltages of individual devices in the string could be
cumbersome and could call for devices, which are exactly
matched for a successful operation in the series connection.
The advantage of the dual inverter driven open-end
winding induction motor drive with the proposed PWM
strategy is that it avoids the series connection of individual
switching devices to achieve the operability off a high DC
link voltage. At the same time,it also achieves the avoidance
of common-mode voltage and its undesirable effects which
were described earlier. By resorting to the SAZE PWM
technique described in [22],it is possible to operate the dual
inverter drive with a single DC power supply as shown in
Fig.I. However, the resulting drive system is still equivalent
to a two level inverter drive.

Considering a space vector combination 14', where 1 (+--)

represents the state of inverter 1 and 4' (-++) represents the

V. SIMULATION RESULTS

state of inverter 2. Upon calculating common mode voltage


from (7), it is evident that common mode voltage becomes

The proposed PWM scheme for the dual inverter fed open

zero for the space vector combination 14'; similarly, it is the


same for the other combinations such as 25', 36', 41',

end winding induction motor drive is validated with simulation

52'and 63'. In the work presented in this paper, these

studies

locations are used exclusively to eliminate the common mode

modulating wave for the proposed common mode elimination

voltages.

scheme. Fig. 7 shows the pole voltages for the two inverters.

It may be observed that, this is same as the maximum


value of peak fundamental phase voltage generated by the
conventional two-level inverter (which has common mode
voltages and its associated problems) with Sinusoidal Pulse
Width

Modulation.

This

maximum

value

of

using

MATLAB/Simulink.

Fig.

shows

8 shows the phase voltage at the motor terminals. From

Fig.

Fig. 9,it is evident that common mode voltage is eliminated to


zero using the proposed PWM switching strategy.

peak

fundamental phase voltage is 15% less than to the peak


fundamental amplitude that can be generated with the space
vector

based

pulse

compensated with

an

width

modulation.

This

can

be

additional boost in the dc-link voltage.

Hence it can be verified that with a dc-link voltage of 0.57


(15% boost over) the proposed scheme with common mode
elimination, can generate the same maximum fundamental
amplitude of the phase voltage equivalent to that generated
by a conventional two-level inverter which uses a dc-link
voltage of

Vde as in Fig. 4.
L---O.O05--O.Ol--O.Ol5--O.O2--O.M=5----O.

Fig. 6.Modulating wavefonn


Vdd4

Yd.

Vdd4

Fig. S.VSI with Series connected switches


It is a known fact that the voltage rating of a given power
semiconductor device limits the DC-link voltage in a two
level inverter. If a higher DC-link voltage is employed, one
is constrained to connect the devices in series to increase the

the

1:tr(IDUJfU]u1J{ntu]
l:tllifumrtWInrrmJ
o

0.005

0.01

0.015

0.02

0.025

0.03

0.035

0.04

0.045

0.005

0.01

0.015

0.02

0.025

0.03

0.035

0.04

0.045

0.005

0.01

0.015

0.02

0.025
Time

0.03

0.035

0.04

0.045

Fig. 7.Pole Voltage of INVI(top) and INV2(bottom)

100
0

I I

I i II I I

Jill

II

II

I
TIme

Fig. 8.Phase Voltage of the Two -Level Inverter


1
o. 8
o. 6
o.
o. 2
0
0. 2
0.
0. 6
.(). 8
1

10

Fig. 9 .Common Mode Voltage

VII.
A

space

vector

CONCLUSION
based

PWM

to

eliminate

alternating common mode voltage for a dual-inverter fed open


end winding induction motor drive is presented in this paper.
With the proposed scheme, the shaft voltages do not occur in
the machine as no common mode voltage exists in the phase
windings and the dual inverter can be operated from a single
power supply. The proposed drive has a simple power circuit
consisting of two standard two-level inverters. The proposed
scheme uses a single dc-link with half the voltage of the
common mode elimination scheme based on the conventional
three-level inverter. Even though three-level configuration
setup is necessary, the proposed scheme is as that of a two
level inverter, owning into the advantages such as half dc-link
voltage is sufficient, half the value of switch ratings, and the
more predominant common mode voltage is being eliminated.
VII.

REFERENCES

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PWM Inverter," IEEE Trans.Ind.Applicat.,Vol.lA- 17, pp 518-523,
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[6] P. Link, "Minimizing electric bearing currents in ASD systems,"
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open-end winding induction motor drive with a switched neutral," lEE
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based PWM switching scheme for the reduction of common-mode
voltages for a dual inverter fed open-end winding induction motor
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[13] M. R. Baiju, K K. Mohapatra, R. S. Kanchan, K Gopakumar, "A
Dual Two-Level Inverter Scheme with Common Mode Voltage
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Dual-Bridge Inverter
Approach to Eliminating Common Mode Voltages and Bearing and
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59 1-600, Jul. 2007

Srinivasan Prada bane received his graduate


degree from Pondicheny University in 2005 and
the post graduate degree from Anna University in
2008, his area of specialization being Power
Electronics and Drives. Presently he is a Doctoral
Candidate at National Institute of Technology,
Warangal. His research interests are Multilevel
Inverters and AC Drives.

Mr. B.Venugopal Reddy received his graduate


degree in Electrical Engineering from JNTU
College of Engineering ,Hyderabad and the post
graduate degree from NIT, Warangal in 2001 and
2005 respectively. He is currently working towards
his Ph.D degree from National Institute of
Technology, Warangal, India. His research interests
are Multi-level inverters, Multi-level PWM
Switching Strategies, Multi-level inversion realized
through Open-end winding Induction motor drives,

DC & AC drives etc.


Dr. V. T. Somasekhar received his graduate degree
from Regional Engineering College Warangal
(presently the National Institute of Technology) in
1988 and the post graduate degree from the Indian
Institute of Technology, Bombay in 199 0, his area
of specialization being Power Electronics. He
worked as an R&D engineer at Mis Perpetual Power
Technologies, Bangalore and as a senior engineer at
Mis Kirloskar Electric Co. Ltd., Mysore. He joined
the faculty of electrical engineering at the National
Institute of Technology in 1993, where he is currently serving. He received
his doctoral degree from the Indian Institute of Science in 2003. His current
interests are multilevel inversion with open-end induction motors, AC drives
and PWM strategies.