Circuit
Theory:
The field-effect transistor (FET) is a transistor that relies on an
electric field to control the shape and hence the conductivity of a 'channel'
in a semiconductor material. FETs are sometimes used as voltage-controlled
resistors. The concepts related to the field effect transistor predated
those of the bipolar junction transistor (BJT). Nevertheless, FETs were
implemented only after BJTs due to the simplicity of manufacturing BJTs
over FETs at the time
Procedure:
The circuit was set up as shown in the circuit diagram. The
1K resistor was connected to Drain. The Source and the Gate terminals
were grounded. To measure the VDS a voltmeter was connected across the
transistor , similarly an ammeter to measure the current.
Finally after taking all precautions into account I got up the readings and
plotted them into chart given below:
Observations chart
VDS (V)
2
3
4
5
6
10
12
14
16
18
20
IDS (mA)
3.25
3.35
3.45
3.55
3.5
3.5
3.5
3.5
3.5
3.5
3.5
We see VP = 5V
Uses:
The most commonly used FET is the MOSFET. The CMOS
(complementary-symmetry metal oxide semiconductor) process technology is
the basis for modern digital integrated circuits. This process technology
uses an arrangement where the (usually "enhancement-mode") p-channel
MOSFET and n-channel MOSFET are connected in series such that when one
is on, the other is off. In CMOS logic devices, the p-channel device pulls up
the output and the n-channel device pulls down the output. The great
advantage of CMOS circuits is that they allow no current to flow (ideally),
except during the transition from one state to the other, which is very
short. The gates are capacitive, and the charging and discharging of the
gates each time a transistor switches states is the primary source of power
usage in fast CMOS logic circuits. However as integrated circuits become
smaller, parasitic resistances are becoming more power consumptive than
switching capacitance.