Equipment
V200R003C00
Hardware Description
Issue
01
Date
2013-10-31
Notice
The purchased products, services and features are stipulated by the contract made between Huawei and the
customer. All or part of the products, services and features described in this document may not be within the
purchase scope or the usage scope. Unless otherwise specified in the contract, all statements, information,
and recommendations in this document are provided "AS IS" without warranties, guarantees or representations
of any kind, either express or implied.
The information in this document is subject to change without notice. Every effort has been made in the
preparation of this document to ensure accuracy of the contents, but all statements, information, and
recommendations in this document do not constitute a warranty of any kind, express or implied.
Website:
http://www.huawei.com
Email:
support@huawei.com
Issue 01 (2013-10-31)
Version
l ATN 910
V200R003C00
l ATN 910I
l ATN 910B
l ATN 950B
Intended Audience
This document describes the equipment structure, chassis structure, and board classification.
This document also describes each board of these classes in details.
This document helps you get the detailed information about the equipment hardware.
This document is intended for:
l
Symbol Conventions
Symbol
Description
Indicates an imminently hazardous situation which, if not
avoided, will result in death or serious injury.
Indicates a potentially hazardous situation which, if not
avoided, could result in death or serious injury.
Issue 01 (2013-10-31)
ii
Symbol
Description
Indicates a potentially hazardous situation which, if not
avoided, may result in minor or moderate injury.
Indicates a potentially hazardous situation which, if not
avoided, could result in equipment damage, data loss,
performance deterioration, or unanticipated results.
NOTICE is used to address practices not related to personal
injury.
Calls attention to important information, best practices and
tips.
NOTE is used to address information not related to personal
injury, equipment damage, and environment deterioration.
Command Conventions
Convention
Description
Boldface
Italic
[]
{ x | y | ... }
[ x | y | ... ]
{ x | y | ... }*
[ x | y | ... ]*
GUI Conventions
Issue 01 (2013-10-31)
Convention
Description
Boldface
iii
Convention
Description
>
Change History
Updates between document issues are cumulative. Therefore, the latest document issue contains
all updates made in previous issues.
Issue 01 (2013-10-31)
iv
Contents
Contents
About This Document.....................................................................................................................ii
1 ATN 910 Chassis............................................................................................................................1
1.1 Appearance.....................................................................................................................................................................2
1.2 Slot Distribution.............................................................................................................................................................2
1.3 Installation Information..................................................................................................................................................3
1.4 Heat Dissipation.............................................................................................................................................................7
1.5 Safety Labels..................................................................................................................................................................8
Contents
vi
Contents
5.9.4 Specifications...........................................................................................................................................................102
5.10 AND2ML1A/AND2ML1B - 16 Channels E1 Interface Board................................................................................102
5.10.1 Front Panel.............................................................................................................................................................103
5.10.2 Functions and Features..........................................................................................................................................105
5.10.3 Working Principle and Signal Flow......................................................................................................................106
5.10.4 Technical Specifications........................................................................................................................................108
5.11 AND1MD1A/AND1MD1B - 32 Channels E1 Interface Board...............................................................................109
5.11.1 Front Panel.............................................................................................................................................................109
5.11.2 Functions and Features..........................................................................................................................................112
5.11.3 Working Principle and Signal Flow......................................................................................................................113
5.11.4 Technical Specifications........................................................................................................................................115
5.12 AND1MO1C - 8 Channels T1 Interface Board .......................................................................................................116
5.12.1 Front Panel.............................................................................................................................................................116
5.12.2 Functions and Features..........................................................................................................................................117
5.12.3 Working Principle and Signal Flow......................................................................................................................118
5.12.4 Technical Specifications........................................................................................................................................120
5.13 AND1AVD8A - 8 Channels ADSL2+ Service Interface Board..............................................................................121
5.13.1 Front Panel.............................................................................................................................................................121
5.13.2 Functions and Features..........................................................................................................................................122
5.13.3 Working Principle and Signal Flow......................................................................................................................123
5.13.4 Technical Specifications .......................................................................................................................................125
5.14 AND1AVD8B - 8 Channels VDSL2 Service Interface Board.................................................................................125
5.14.1 Front Panel.............................................................................................................................................................125
5.14.2 Functions and Features..........................................................................................................................................127
5.14.3 Working Principle and Signal Flow......................................................................................................................127
5.14.4 Technical Specifications .......................................................................................................................................129
5.15 AND1SHD4 - 4 Channels G.SHDSL Service Interface Board ...............................................................................130
5.15.1 Front Panel.............................................................................................................................................................130
5.15.2 Functions and Features..........................................................................................................................................131
5.15.3 Working Principle and Signal Flow......................................................................................................................132
5.15.4 Technical Specifications .......................................................................................................................................133
5.16 AND1SHD4I - 4 Channels G.SHDSL Interface Board for IMA Mode ..................................................................133
5.16.1 Front Panel.............................................................................................................................................................133
5.16.2 Functions and Features..........................................................................................................................................135
5.16.3 Working Principle and Signal Flow......................................................................................................................135
5.16.4 Technical Specifications .......................................................................................................................................138
5.17 TNC1PIU - Power Interface Board..........................................................................................................................138
5.17.1 Front Panel.............................................................................................................................................................138
5.17.2 Functions and Features..........................................................................................................................................139
5.17.3 Working Principle and Signal Flow......................................................................................................................140
5.17.4 Technical Specifications........................................................................................................................................141
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vii
Contents
viii
Contents
ix
Contents
10 Cables.........................................................................................................................................259
10.1 Power Supply Cables and Ground Cables................................................................................................................260
10.1.1 -48 V Power Supply Cable....................................................................................................................................260
10.1.2 Power Cable...........................................................................................................................................................261
10.1.3 PGND Cables........................................................................................................................................................262
10.2 Management Cables.................................................................................................................................................263
10.3 Alarm Input/Output Cables......................................................................................................................................264
10.4 Clock Cables.............................................................................................................................................................265
10.4.1 External Clock Cables...........................................................................................................................................265
10.4.2 Clock Bridging Cable............................................................................................................................................267
10.5 Service Cables..........................................................................................................................................................269
10.5.1 Ethernet Cables......................................................................................................................................................269
10.5.2 75-Ohm 8 x E1 Cables...........................................................................................................................................273
10.5.3 120-Ohm 8 x E1 Cables.........................................................................................................................................274
10.5.4 75-Ohm 16 x E1 Cables.........................................................................................................................................277
10.5.5 120-Ohm 16 x E1 Cables.......................................................................................................................................280
10.5.6 xDSL Cables..........................................................................................................................................................283
10.6 Optical Fibers...........................................................................................................................................................285
Issue 01 (2013-10-31)
Contents
11 Equipment Support.................................................................................................................287
11.1 Cabinet Support........................................................................................................................................................288
11.1.1 APM30H Outdoor Cabinet....................................................................................................................................288
11.1.2 IMB Network Cabinet...........................................................................................................................................289
11.1.3 19-inch Open Rack................................................................................................................................................291
11.1.4 N63E Cabinet........................................................................................................................................................292
11.2 Power Distribution Equipment.................................................................................................................................293
11.2.1 Power Distribution.................................................................................................................................................293
11.2.2 EPS30-4815AF Power System..............................................................................................................................294
11.2.3 27S48D Power System..........................................................................................................................................299
11.2.4 HW-100-48AC14D-1 Power System....................................................................................................................301
11.2.5 Lead-Acid Battery.................................................................................................................................................302
11.3 Heater........................................................................................................................................................................303
12 Quick Reference.......................................................................................................................305
12.1 Indicators..................................................................................................................................................................306
12.2 Dimensions and Weight............................................................................................................................................314
12.3 Power Consumption.................................................................................................................................................317
12.4 Interface Specifications............................................................................................................................................320
12.4.1 Specifications of STM-1 Optical Interfaces..........................................................................................................320
12.4.2 Specifications of FE Optical Interfaces.................................................................................................................322
12.4.3 Specifications of GE Optical Interfaces................................................................................................................324
12.4.4 Specifications of 10GE Optical Interfaces............................................................................................................329
12.4.5 Specifications of GE and FE Electrical Interfaces................................................................................................331
12.4.6 Specifications of E1 Electrical Interfaces..............................................................................................................331
12.4.7 Specifications of T1 Electrical Interfaces..............................................................................................................332
12.4.8 Specifications of the ADSL2+ Interface...............................................................................................................332
12.4.9 Specifications of the VDSL2 Interface..................................................................................................................332
12.4.10 Specifications of the G.SHDSL Interface............................................................................................................333
Issue 01 (2013-10-31)
xi
The fan board provides three fans, ensuring proper heat dissipation even when a fan is
faulty.
1.1 Appearance
The ATN 910 provides 6 slots and all boards are swappable. The ATN 910 provides six slots
and all boards are swappable. A chassis has a mounting ear at each side and can be installed in
different cabinets and racks.
1.2 Slot Distribution
This section describes slot distribution on the ATN 910.
1.3 Installation Information
ATN 910 provides multiple installation positions for mounting ears and supports various
mounting ears, so ATN 910 can be installed in multiple types of cabinets.
1.4 Heat Dissipation
ATN 910 dissipates heat by drawing in air from the left and expelling out the air from the right.
1.5 Safety Labels
The equipment has various safety labels. This section describes the suggestions and locations
of these safety labels.
Issue 01 (2013-10-31)
1.1 Appearance
The ATN 910 provides 6 slots and all boards are swappable. The ATN 910 provides six slots
and all boards are swappable. A chassis has a mounting ear at each side and can be installed in
different cabinets and racks.
Figure 1-1 shows the appearance of the ATN 910 that has boards fully configured.
Figure 1-1 Appearance of the ATN 910 that has boards fully configured
Figure 1-2 shows the appearance of the ATN 910 that does not have boards fully configured.
Figure 1-2 Appearance of the ATN 910 that does not have boards fully configured
SLOT 3 (2 x GE)
SLOT 4 (2 x GE)
Table 1-1 describes priorities of slots where boards supported by the ATN 910 can be inserted.
Issue 01 (2013-10-31)
Valid Slot
ANC2CXPI/ANC2CXPL
AND1EF8T/AND1EF8F
slot 3 or slot 4
slot 3 - slot 4
slot 3 or slot 4
slot 4 - slot 3
AND1MO1C
slot 3 or slot 4
slot 3 - slot 4
AND1AVD8A/
AND1AVD8B
slot 3 or slot 4
slot 3 - slot 4
TNC1PIU
slot 5
ANC1FAN
slot 6
AND1EG2
AND1EG4F
AND2ML1A/AND2ML1B
AND1MD1A/AND1MD1B
AND1SHD4/AND1SHD4I
Note: The ANC2CXPI or ANC2CXPL each house two slots. Slot 1 and slot 2 house one
ANC2CXPI or ANC2CXPL.
Applicable
Cabinet
Standard
Applicable
Huawei Cabinet
Remarks
IEC60297
N66E
N68E
N610E
19-inch open rack
IMB network
cabinet
APM30H outdoor
cabinet
Issue 01 (2013-10-31)
Mounting Ear
Applicable
Cabinet
Standard
Applicable
Huawei Cabinet
Remarks
ETSI300-119
N63E
N66T
IEC60297 (23inch)
ATN 910 provides three installation positions for mounting ears. Users can determine an
installation position for mounting ears based on the depth of the cabinet. Figure 1-4 shows the
installation positions of mounting ears. Position 1 shows a pair of mounting ears delivered with
ATN 910.
Figure 1-4 Installation positions of mounting ears
Already installed
mounting ears
Determine an installation position for mounting ears based on the cabinet depth. The following
figures show the installation dimensions when mounting ears are installed in different positions.
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465.1
224
208
132.5
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515
241.5
225.5
150
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566.7
217.5
201.5
126
NOTE
When installing the ATN 910 in the cabinet, reserve 80 mm space at the front of the panel for cabling.
Issue 01 (2013-10-31)
Heat dissipation holes of air intake and exhaust vents on ATN 910 must be kept clean and
unblocked.
A distance of at least 50 mm must be reserved at the air intake/exhaust vent on ATN 910
to ensure good ventilation.
Filler panels must be installed on unused slots. In addition, on ATN 910, heat must be
dissipated by drawing in air from the left and expelling out the air from the right.
The ambient temperature of ATN 910 must be within the range of -20C to +60C. When
ATN 910 is installed in a cabinet, temperature inside the cabinet must be within the
temperature range and the air duct of the cabinet must be consistent with that of ATN 910.
Label Position
Figure 1-9 shows positions of labels on the chassis.
Figure 1-9 Label position
ATN 910
POWER RATING:
N14036
-48-60V;4A
1
Class 1 Laser Product
/QUALIFICATION CARD
A
VCCI-A
HUAWEI
M ADE IN C HIN A
MADE IN CHINA
Label Description
There are labels on the chassis and boards. See Table 1-3.
Issue 01 (2013-10-31)
Type
Description
Qualification label
!
/QUALIFICATION CARD
HUAWEI
MADE IN CHINA
ATN 910
POWER RATING:
N14036
-48-60V;4A
1
Class 1 Laser Product
VCCI-A
MADE IN CHINA
ATN 910
POWER RATING:
-48-60V;4A
V C C I ------ A
1
Class 1 Laser Product
MADE IN CHINA
Issue 01 (2013-10-31)
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10
2.1 Appearance
The ATN 910I integrates boards and modules, which are not swappable. A chassis has a
mounting ear at each side and can be installed in different cabinets and racks.
Table 2-1 describes multiple models of the ATN 910I.
Table 2-1 Description of the ATN 910I models
Model/
Silkscreen
Builtin
Contro
l
Board
Power
Suppl
y
Interface
Temperature
1588
ACR
POE
ATN 910I AC
ANF1C
XPI
AC
4GE(Oa)+4GE/FE(O)+4GE/
FE(Eb)
-20C to +60C
(fan cooling)
Not
supported
Not
supported
ATN 910I-C
AC
ANF1C
XPB
AC
4GE(O)+4GE/FE(O)+4GE/
FE(E)+16E1
-20C to +60C
(fan cooling)
Supported
Not
supported
ATN 910IPOE
ANF2C
XPA
AC
4GE(O)+4GE/FE(O)+4GE/
FE(E)
-20C to +65C
(fan cooling)
Not
supported
Supported
ATN 910I DC
ANF1C
XPI
DC
4GE(O)+4GE/FE(O)+4GE/
FE(E)
-20C to +60C
(fan cooling)
Not
supported
Not
supported
ANF1C
XPA
DC
4GE(O)+4GE/FE(O)+4GE/
FE(E)+16E1
-20C to +60C
(fan cooling)
Not
supported
Not
supported
ANF1C
XPB
DC
4GE(O)+4GE/FE(O)+4GE/
FE(E)+16E1
-40C to +65C
(fan cooling)
Supported
Not
supported
ATN 910I-TC
DC
NOTE
The following figures show the appearance of the ATN 910I of different models.
Figure 2-1 Appearance of the ATN 910I AC with interfaces 4GE(O)+4GE/FE(O)+4GE/FE(E)
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11
12
Description
E1 interface function
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13
Description
NOTE
l If the SFP interface houses an electrical module, the interface does not support synchronous Ethernet
or IEEE 1588v2.
l When using an electrical interface at 10 Mbit/s, the interface does not support synchronous Ethernet
clock or IEEE 1588v2.
l Only some models of the ATN 910I support the 1588 ACR clock. For details, see 2.1 Appearance.
Auxiliary
interface
module
Time/clock
signals
Power
module
Clock
module
To other function
modules
Communication control
module
To other function
modules
4 x GE optical signals
4 x FE/GE optical signals
4 x FE/GE electrical signals
Service
scheduling and
processing
module
Fan
module
16 x E1 signals
4 x FE electrical signals
FE pinch board
Transmit Direction
After buffering and scheduling the service packets, the service scheduling and processing
module performs coding/decoding and serial/parallel conversion. Then the interfaces on the
panel send Ethernet electrical/optical signals and E1 signals out.
Issue 01 (2013-10-31)
14
Receive Direction
The service access interfaces on the panel receive Ethernet electrical/optical signals and E1
signals. Then the service scheduling and processing module performs serial/parallel conversion
and coding/decoding, and buffers and schedules service packets.
NM serial interface/NM interface used to communicate with the NMS and to manage and
query network elements
Schedules services with the switching capacity of 12 Gbit/s in full duplex mode.
Clock Module
The clock module provides the following functions:
l
Only some models of the ATN 910I support the 1588 ACR clock. For details, see 2.1 Appearance.
Power Module
The power module supplies power for other modules.
NOTE
The ATN 910I supports AC and DC power supplies. For details about power supplies supported by each
product model, see 2.1 Appearance.
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15
Fan Module
The fan module implements heat dissipation for the system.
2.4 Panel
There are indicators, buttons, and interfaces on the ATN 910I panel.
STAT
ETH/OAM
ALM
RST
GE0-GE3
CLK
FE/GE0-FE/GE3
TOD
ALMI/ALMO
FE/GE4-FE/GE7
E1(0-15)
Indicator
The ATN 910I provides the following indicators:
System indicator
l
STAT indicator, red, green, or orange, which indicates the working status
Interface indicator
l
LINK/ACT, green or orange, which indicates the connection status/data transceiving status
on the SFP interface.
LINK indicator, green, which indicates the connection status of a service port
ACT indicator, orange, which indicates the receive/transmit status of a service port
Button
There is only one RST button on the ATN 910I for resetting the device.
The RST button can also be used to clear the passwords and configuration files on the ATN
910I. Once you press the RST button, the device begins to reset. Then you press and hold down
the RST button for about 10s until the PWR, STA, and ALM indicators blink green. The device
begins to automatically clear the passwords and configuration files. If you hold down the RST
button 15s or more than 15s, the device only resets and does not clear the passwords and
configuration files.
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16
Interface
Table 2-3 describes the interfaces on the ATN 910I and their functions.
Table 2-3 Interfaces on the ATN 910I
Interface
Name
Interface
Type
Function
ETH/OAM
RJ-45
CLK
RJ-45
TOD
RJ-45
ALMI/O
RJ-45
GE0 to GE3
SFP
FE/GE0 to
FE/GE3
SFP
FE/GE4 to
FE/GE7
RJ-45
E1 (0 to 15)
Anea 96
NOTE
The SFP interface can connect to cables only after an optical module or an electrical module is installed.
As shown in Table 2-5, the three groups of interfaces on the ATN 910I are controlled by the
license (LANFGEPAYG01 and LANFCOMBO01).
l
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17
Group 1
Group 2
Group 3
Pin Assignments
Table 2-4 Pins for the ETH/OAM interface
Front View
87654321
Pin
Function
Unspecified
87654321
Issue 01 (2013-10-31)
Pin
Working Mode
Unspecified
Unspecified
Unspecified
Unspecified
18
Pin
87654321
Working Mode
External Time
Input
External Time
Output
(1 PPS+Time
Information)
(1 PPS+Time
Information)
Unspecified
Unspecified
Unspecified
Unspecified
(RS422 level)
(RS422 level)
Ground end
Ground end
Ground end
Ground end
(RS422 level)
(RS422 level)
(RS422 level)
(RS422 level)
(RS422 level)
(RS422 level)
NOTE
The TOD interface can work only in one mode.
87654321
Issue 01 (2013-10-31)
Pin
Function
Boolean input
Ground end
Boolean input
Boolean input
Ground end
Ground end
19
Front View
Pin
Function
87654321
Pin
Usage
87654321
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Pin
Function
Unspecified
Unspecified
Unspecified
Unspecified
20
Connector Pin
Usage
Connector Pin
Usage
Rx0
25
Tx0
2
3
26
Rx1
4
5
Rx2
Rx3
Rx4
Rx5
Rx6
Rx7
Rx8
Rx9
R x 10
R x 11
R x 12
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39
Tx7
41
Tx8
43
Tx9
45
T x 10
47
T x 11
73
T x 12
74
R x 13
52
53
Tx6
48
50
51
37
46
24
49
Tx5
44
22
23
35
42
20
21
Tx4
40
18
19
33
38
16
17
Tx3
36
14
15
31
34
12
13
Tx2
32
10
11
29
30
8
9
Tx1
28
6
7
27
75
T x 13
76
R x 14
77
T x 14
21
Front View
Connector Pin
Usage
Connector Pin
54
Usage
78
55
R x 15
79
56
T x 15
80
Applicable
Cabinet
Standard
Applicable
Huawei Cabinet
Remarks
IEC60297
N66E
N68E
N610E
19-inch open rack
IMB network
cabinet
APM30H outdoor
cabinet
ETSI300-119
N63E
N66T
IEC60297 (23inch)
Issue 01 (2013-10-31)
Heat dissipation holes of air intake and exhaust vents on ATN 910I must be kept clean and
unblocked.
A clearance of at least 50 mm must be reserved at the air intake/exhaust vent on ATN 910I
to ensure good ventilation.
The ambient temperature of the ATN 910I-TC DC must be within the range of -40C to
65C, and that of ATN 910I in other models must be within the range of -20C to +60
C.ATN 910I When ATN 910I is installed in a cabinet, temperature inside the cabinet must
be within the permitted temperature range and the air duct of the cabinet must be consistent
with that of ATN 910I.
When ATN 910I is installed in a cabinet, temperature inside the cabinet must be within the
temperature range and the air duct of the cabinet must be consistent with that of ATN 910I.
For details about temperature range by each product model, see 2.1 Appearance.
Label Position
Figure 2-11 shows positions of labels on the chassis.
Issue 01 (2013-10-31)
23
N1 4036
/QUALIFICATION CARD
1
Class 1 Laser Product
HUAWEI
M ADE IN C HIN A
MADE IN CHINA
Label Description
There are labels on the chassis. See Table 2-12.
Table 2-12 Label description
Figure
/QUALIFICATION CARD
Type
Description
Qualification label
HUAWEI
MADE IN CHINA
Issue 01 (2013-10-31)
24
Figure
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Type
Description
25
Issue 01 (2013-10-31)
26
3.1 Appearance
The ATN 910B integrates boards and modules, which are not swappable. A chassis has a
mounting ear at each side and can be installed in different cabinets and racks.
Table 3-1 describes multiple models of the ATN 910B.
Table 3-1 Description of the ATN 910B models
Silkscreen
Built-in
Control
Board
Interface
CrossConnect
Capacity
1588 ACR
ATN 910B-A DC
ANG1CXPA
2x10GE(O)+8xGE/FE(O)+8xFE/GE(E)
+16E1
36 Gbit/s
Supported
ATN 910B-B DC
ANG1CXPB
2x10GE(O)+16xGE/FE(O)+8xFE/GE(E)
44 Gbit/s
Not
supported
NOTE
l (O) indicates an XFP interface for 10GE services or an SFP interface for GE/FE services.
l (E) indicates an RJ-45 electrical interface.
Figure 3-1 and Figure 3-2 show the appearance of the ATN 910B of different models.
Figure 3-1 Appearance of the ATN 910B-A with interfaces 2x10GE(O)+8xGE/FE(O)+8xFE/
GE(E)+16E1
27
Description
E1 interface function
NOTE
l If the SFP interface houses an electrical module, the interface does not support synchronous Ethernet
or IEEE 1588v2.
l When using an electrical interface at 10 Mbit/s, the interface does not support synchronous Ethernet
clock or IEEE 1588v2.
l Among the two ATN 910B models, only ATN 910B-A supports 1588 ACR.
Issue 01 (2013-10-31)
28
Auxiliary
interface
module
Time/clock
signals
Power
module
Clock
module
To other function
modules
Communication control
module
16 x E1 signals
To other function
modules
Service
scheduling and
processing
module
Fan
module
Transmit Direction
After buffering and scheduling the service packets, the service scheduling and processing
module performs coding/decoding and serial/parallel conversion. Then the interfaces on the
panel send Ethernet electrical/optical signals and E1 signals out.
Receive Direction
The service access interfaces on the panel receive Ethernet electrical/optical signals and E1
signals. Then the service scheduling and processing module performs serial/parallel conversion
and coding/decoding, and buffers and schedules service packets.
29
NM serial interface/NM interface used to communicate with the NMS and to manage and
query network elements
Clock Module
The clock module provides the following functions:
l
Power Module
The power module supplies power for other modules.
Fan Module
The fan module implements heat dissipation for the system.
3.4 Panel
There are indicators, buttons, and interfaces on the ATN 910B panel.
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30
PWRA
PWRB
FE/GE: 8|10|12|14
E1(8-15)
E1(0-7)
Indicator
The ATN 910B provides the following indicators:
System indicator
l
STAT indicator, red, green, or orange, which indicates the working status
Interface indicator
l
LINK/ACT, green or orange, which indicates the connection status/data transceiving status
on the SFP interface and XFP interface.
LINK indicator, green, which indicates the connection status of a service port
ACT indicator, orange, which indicates the receive/transmit status of a service port
Button
There is only one RST button on the ATN 910B for resetting the device.
The RST button can also be used to clear the passwords and configuration files on the ATN
910B. Once you press the RST button, the device begins to reset. Then you press and hold down
the RST button for about 10s until the PWR, STA, and ALM indicators blink green. The device
begins to automatically clear the passwords and configuration files. If you hold down the RST
button 15s or more than 15s, the device only resets and does not clear the passwords and
configuration files.
Interface
Table 3-3 describes the interfaces on the ATN 910B and their functions.
Issue 01 (2013-10-31)
31
Interface
Type
Function
ETH/OAM
RJ-45
CLK
RJ-45
TOD
RJ-45
ALMI/
ALMO
RJ-45
OUT0 IN0
OUT1
IN1
XFP
FE/GE0
FE/GE7
(ATN
910B-A)
SFP
FE/GE0
FE/GE15
(ATN
910B-B)
SFP
FE/GE8
FE/GE15
(ATN
910B-A)
RJ-45
FE/GE16
FE/
GE23 (ATN
910B-B)
RJ-45
E1 (015)
(ATN
910B-A)
DB44
NOTE
The SFP interface can connect to cables only after an optical module or an electrical module is installed.
The XFP interface can connect to cables only after an optical module is installed.
10GE interfaces on the ATN 910B are under license control (LANG2XGE01). If the license is not loaded,
10GE interfaces are unavailable. GE interfaces are also under license control (LANGGEPAYG01 and
LANG4GEPAYG01). If the license is not loaded, only a maximum of eight interfaces can be used.
Issue 01 (2013-10-31)
32
Pin Assignments
Table 3-4 Pins for the ETH/OAM interface
Front View
87654321
Pin
Function
Unspecified
Pin
Working Mode
Unspecified
Unspecified
Unspecified
Unspecified
87654321
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33
Pin
87654321
Working Mode
External Time
Input
External Time
Output
(1 PPS+Time
Information)
(1 PPS+Time
Information)
Unspecified
Unspecified
Unspecified
Unspecified
(RS422 level)
(RS422 level)
Ground end
Ground end
Ground end
Ground end
(RS422 level)
(RS422 level)
(RS422 level)
(RS422 level)
(RS422 level)
(RS422 level)
NOTE
The TOD interface can work only in one mode.
87654321
Issue 01 (2013-10-31)
Pin
Function
Boolean input
Ground end
Boolean input
Boolean input
Ground end
Ground end
34
Front View
Pin
Function
87654321
Pin
Usage
44
Pin
Usage
Pin
Usage
38
R0
15
T0
23
37
30
R1
22
36
R2
R3
R4
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12
T3
11
T4
26
R5
18
32
T2
27
19
33
13
28
20
34
T1
29
21
35
14
10
T5
25
R6
T6
35
Front View
Pin
Usage
17
31
Pin
Usage
24
R7
16
T7
Applicable
Cabinet
Standard
Applicable
Huawei Cabinet
Remarks
IEC60297
N66E
N68E
N610E
19-inch open rack
IMB network
cabinet
APM30H outdoor
cabinet
ETSI300-119
N63E
N66T
IEC60297 (23inch)
Issue 01 (2013-10-31)
50 mm
50 mm
Heat dissipation holes of air intake and exhaust vents on ATN 910B must be kept clean
and unblocked.
A clearance of at least 50 mm must be reserved at the air intake/exhaust vent on ATN 910B
to ensure good ventilation.
The ambient temperature of ATN 910B must be within the range of -40 C to +65 C. When
ATN 910B is installed in a cabinet, temperature inside the cabinet must be within the
permitted temperature range and the air duct of the cabinet must be consistent with that of
ATN 910B.
Label Position
Figure 3-6 shows positions of labels on the chassis.
Figure 3-6 Label position
O ptiX P TN 910-F
POWER RATING: ~100-240V;50/60Hz;0.8A MAX
N1 4036
/QUALIFICATION CARD
1
Class 1 Laser Product
HUAWEI
Issue 01 (2013-10-31)
M ADE IN C HIN A
MADE IN CHINA
37
Label Description
There are labels on the chassis. See Table 3-11.
Table 3-11 Label description
Figure
/QUALIFICATION CARD
Type
Description
Qualification label
HUAWEI
MADE IN CHINA
Issue 01 (2013-10-31)
38
The fan board provides six fans, ensuring proper heat dissipation even when a fan is faulty.
4.1 Appearance
The ATN 950B provides 11 slots and all boards are swappable. A chassis has a mounting ear at
each side and can be installed in different cabinets and racks.
4.2 Slot Distribution
This section describes slot distribution on the ATN 950B.
4.3 Installation Information
ATN 950B provides multiple installation positions for mounting ears and supports various
mounting ears, so ATN 950B can be installed in multiple types of cabinets.
4.4 Heat Dissipation
ATN 950B dissipates heat by drawing in air from the left and expelling out the air from the right.
4.5 Safety Labels
The equipment has various safety labels. This section describes the suggestions and locations
of these safety labels.
Issue 01 (2013-10-31)
39
4.1 Appearance
The ATN 950B provides 11 slots and all boards are swappable. A chassis has a mounting ear at
each side and can be installed in different cabinets and racks.
Figure 4-1 shows the appearance of the ATN 950B that has boards fully configured.
Figure 4-1 Appearance of the ATN 950B that has boards fully configured
Figure 4-2 shows the appearance of the ATN 950B that does not have boards fully configured.
Figure 4-2 Appearance of the ATN 950B that does not have boards fully configured
Issue 01 (2013-10-31)
40
Figure 4-3 Slot distribution of the ATN 950B equipped with AND1CXPA or AND1CXPB
SLOT
10
SLOT
11
SLOT
9
SLOT 7
SLOT 8
SLOT 5 (10GE/GE)
SLOT 6 (10GE/GE)
SLOT 1 (8 x GE)
SLOT 2 (8 x GE)
NOTE
When ATN 950B is equipped with the AND1CXPA board, each of slots 3 and 4 has a bandwidth of 4 x
GE and does not support 10GE interface boards.
Figure 4-4 shows the slot distribution of the ATN 950B equipped with the AND2CXPA,
AND2CXPB, or AND2CXPE board.
Figure 4-4 Slot distribution of the ATN 950B equipped with AND2CXPA/AND2CXPB/
AND2CXPE
SLOT
10
SLOT
11
SLOT
9
SLOT 7
SLOT 8
Table 4-1 describes priorities of slots where boards supported by the ATN 950B can be inserted.
Table 4-1 Priorities of available slots
Name
Valid Slot
AND1CXPA/
AND1CXPB
Slot 7, slot 8
slot 7 - slot 8
AND1EM8T/
AND1EM8F
slot 1 or slot 2
slot 1 - slot 2
AND1EM4T/
AND1EM4F/
AND1EM4C
AND2CXPA/
AND2CXPB/
AND2CXPE
41
Name
Valid Slot
AND2CQ1B
slot 1 to slot 6
AND2PQ1
AND1EX1
slot 1 to slot 6
TND1PIU
Slot 9, slot 10
AND1FAN
slot 11
AND3ML1A/
AND3ML1B
AND2MD1A/
AND2MD1B
Applicable
Cabinet
Standard
Applicable
Huawei Cabinet
Remarks
IEC60297
N66E
N68E
N610E
19-inch open rack
IMB network
cabinet
APM30H outdoor
cabinet
Issue 01 (2013-10-31)
42
Mounting Ear
Applicable
Cabinet
Standard
Applicable
Huawei Cabinet
Remarks
ETSI300-119
N63E
N66T
IEC60297 (23inch)
ATN 950B provides three installation positions for mounting ears. Users can determine an
installation position for mounting ears based on the depth of the cabinet. Figure 4-5 shows the
installation positions of mounting ears. Position 1 shows a pair of mounting ears delivered with
ATN 950B.
Figure 4-5 Installation positions of mounting ears
Already installed
mounting ears
Determine an installation position for mounting ears based on the cabinet depth. The following
figures show the installation dimensions when mounting ears are installed in different positions.
Issue 01 (2013-10-31)
43
Unit: mm
220
76.2
465.1
224
208
132.5
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44
Unit: mm
220
50
515
241.5
225.5
150
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45
Unit: mm
220
76.2
566.7
218
202
126.5
NOTE
When installing the ATN 950B in the cabinet, reserve 80 mm space at the front of the panel for cabling.
46
Heat dissipation holes of air intake and exhaust vents on ATN 950B must be kept clean
and unblocked.
A distance of at least 50 mm must be reserved at the air intake/exhaust vent on ATN 950B
to ensure good ventilation.
Filler panels must be installed on unused slots. In addition, on ATN 950B, heat must be
dissipated by drawing in air from the left and expelling out the air from the right.
The ambient temperature of ATN 950B must be within the range of -20C to +60C. When
ATN 950B is installed in a cabinet, temperature inside the cabinet must be within the
temperature range and the air duct of the cabinet must be consistent with that of ATN 950B.
Label Position
Figure 4-10 shows positions of labels on the chassis.
Figure 4-10 Label position
ATN 950
POWER RATING:
N14036
-48-60V;8A
1
Class 1 Laser Product
/QUALIFICATION CARD
A
VCCI -A
HUAWEI
M ADE IN C HIN A
MADE IN CHINA
Issue 01 (2013-10-31)
47
Label Description
There are labels on the chassis and boards. See Table 4-3.
Table 4-3 Label description
Figure
Type
Description
Qualification label
!
/QUALIFICATION CARD
HUAWEI
MADE IN CHINA
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48
49
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50
Board Structure
Figure 5-1 shows the structure of a board (using the AND1EG4F board as an example).
Figure 5-1 Board structure
PCB
The PCB houses various functional chips of the board and is the most important part of the
board. Through the front panel, the PCB provides indicators, buttons, and ports.
NOTE
Different boards provide different indicators, buttons, and ports; not all boards support a daughter
board. For details, see the description of each board.
Front panel, including the captive screws, ejector levers, indicators, buttons, and interfaces.
Captive screws: secure the board in the subrack.
Ejector levers: used for inserting or removing the board. Bar codes are also attached on
the ejector levers.
NOTE
The ejector lever on the left side of the front panel of a board is attached with a label marking the bar code
of the board. The bar code of a control board will be retrieved by ATN 910 as the equipment serial number
(ESN).
The ESN is used for applying for a license. ATN 910 automatically reads the bar code of the backplane or
control board as the device ESN. Generally, the bar code of the backplane takes precedence over that of
the control board.
Board Naming
NOTE
The preceding only describes how to roughly identify a board. For details on board specifications, see board
descriptions.
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51
A board name mainly consists of the board functional version and short name. A short name can
roughly identify a board. The short name of a control board, power board, and fan board is CXPx,
PIU, and FAN respectively. The following mainly describes how to quickly identify a physical
interface board through the short name of a board.
As shown in Figure 5-2, the short name of a board consists of an abbreviated board name and
an extended name. An abbreviated board name includes the board type, interface quantity, and
interface rate. When boards have the same abbreviated board name, they can be differentiated
using extended names. An extended name does not have special meanings and can be omitted.
Figure 5-2 Board short name (using ML1A as an example)
ML1A
Extended name
Interface rate
Interface quantity
Board type
Board type M indicates an E-carrier or T-carrier interface board. The interface quantity is
represented using O, L or D, indicating 8, 16 or 32 respectively. The interface rate is
represented using 1, indicating E1 or T1.
Board type AVD indicates an ADSL2+, VDSL2, or ADSL2+/VDSL2 interface board. The
interface quality is represented using an Arabic numeral, but the interface rate is not
represented.
Board type SHD indicates a G.SHDSL interface board. The interface quality is represented
using an Arabic numeral, but the interface rate is not represented.
Board type E indicates an Ethernet interface board. The interface quality is represented
using an Arabic numeral. The interface rate is represented using F or G, indicating FE or
GE respectively. Extended name F or T is used to indicate an optical interface or electrical
interface respectively.
NOTE
For the name of an Ethernet interface board, the interface rate and quantity rate are in an order opposite
to those for the names of other boards. For example, in EG4F (a name of an Ethernet interface board),
interface rate G comes before interface quantity 4.
Board Relationship
A control board mainly implements system control and service grooming, and receives and
processes various services by working with physical interface boards. A power board provides
power inputs for the system. A fan board blows air to dissipate heat generated during system
operation. Figure 5-3 shows the board relationship.
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52
User side
Control and
management module
Network side
Clock module
FE
FE
GE
GE
FE
GE
E1
E1
T1
EF8F/EF8T
EF8F/EF8T
EG2/EG4F
EG2/EG4F
ML1/ML1A/ML1B
MD1A/MD1B
Service
processing and
switching module
ML1/ML1A/ML1B
MD1A/MD1B
MO1C
MO1C
AVD8A
AVD8B
SHD4/SHD4I
FE
GE
E1
E1
T1
ADSL2+
VDSL2
G.SHDSL
Control board
CXPI/CXPL
Fan board
FAN
The control board of the ATN 910 also provides the Ethernet service interface. For details about applications
of the service interface boards, see the Ethernet service interface board.
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53
Board Description
Supported
Version
ANC2CXPI
V200R002C00
ANC2CXPL
V200R002C00
Board Description
Supported Version
AND1EF8T
V200R001C00
AND1EF8F
V200R001C00
AND1EG2
V200R001C00
AND1EG4F
V200R001C00
AND1EG4T
V200R001C01
Table 5-3 E1/T1 service interface boards supported by the ATN 910
Issue 01 (2013-10-31)
Board Name
Board Description
Supported Version
AND1ML1
V200R001C01
AND1ML1A
V200R001C01
AND2ML1A
V200R001C00
AND2ML1B
V200R001C00
AND1MD1A
V200R001C00
54
Board Name
Board Description
Supported Version
AND1MD1B
V200R001C00
AND1MO1C
V200R001C01
Table 5-4 xDSL service interface boards supported by the ATN 910
Board Name
Board Description
Supported Version
AND1AVD8A
V200R001C01
AND1AVD8B
V200R003C00
AND1SHD4
V200R001C01
V200R001C01
Power Board
Power boards lead in power for supplying power to the device. For details about power
distribution, see Power Distribution.
Table 5-5 Power boards supported by the ATN 910
Board Name
Board Description
Supported Version
TNC1PIU
V200R001C00
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Board Name
Board Description
Supported Version
ANC1FAN
Fan board
V200R001C00
55
Interface Description
AND1EG4T
AND1EF4T
4 x FE electrical interface
AND1EG2
2 x GE SFP interface
AND1EG4F
AND1EF8F
8 x FE SFP interface
ANC2CXPI
4 x FE electrical interface
4 x FE SFP interface
2 x GE SFP interface
ANC2CXPL
NOTE
l Electrical interfaces:
l FE electrical interfaces support signals at 10 Mbit/s and 100 Mbit/s.
l FE/GE electrical interfaces support signals at 10 Mbit/s and 100 Mbit/s and 1000 Mbit/s.
l SFP interfaces:
l FE SFP interfaces support FE optical modules and FE electrical modules.
l GE SFP interfaces support GE optical modules and GE electrical modules.
l FE/GE SFP interfaces support GE optical modules and GE electrical modules, FE optical
modules and FE electrical modules.
56
ATM
Figure 5-4 shows the application of the E1 service interface board using the ATM protocol.
Figure 5-4 Application of the E1 service interface board using the ATM protocol
An ATN device uses the E1 service interface board on the user side to support ATM over E1.
When the ATM service access rate is between E1 and E3, multiple E1 links are bound into an
IMA group to increase service bandwidth. On the network side, the E1 service interface board
implements ATM service emulation and transparently transmits the ATM services over the
packet switched network (PSN), such as MPLS or Ethernet. For detailed information, see the
chapter "ATM IMA application" in the Feature Description.
PPP
Figure 5-5 and Figure 5-6 show the applications of the E1/T1 service interface board using the
PPP protocol.
Figure 5-5 Application of the E1/T1 service interface board using the PPP protocol (user side)
Figure 5-6 Application of the E1 service interface board using the PPP protocol (network side)
The ATN device uses the E1/T1 service interface board to support IP/MPLS services carried
over ML-PPPs on both user side and network side. For example, in the Offload scenario, services
(such as voice service) that require high reliability can be carried over an SDH network through
E1 private lines using ML-PPP.
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57
NOTE
An independent PPP link cannot carry service. PPP links must be added to an ML-PPP group to carry
services.
TDM
Figure 5-7 shows the application of the E1/T1 service interface board using the TDM protocol.
Figure 5-7 Application of the E1 service interface board using the TDM protocol
The ATN device uses the E1 service interface board to access the TDM service, encapsulate the
service signals into packets, and transparently transmit the packets through PWs over the PSN
network. This achieves CES service emulation. For detailed information, see the chapter "CES
application" in the Feature Description.
AND1ML1
AND2ML1A
AND1MD1A
AND1ML1A
AND2ML1B
AND1MD1B
Interface
type
E1
E1
E1
T1
Number of
interfaces
16
16
32
Interface
impedance
AND1ML1: 75 ohm
AND2ML1A: 75 ohm
AND1MD1A: 75 ohm
100 ohm
AND1ML1A: 120
ohm
AND2ML1B: 120
ohm
AND1MD1B: 120
ohm
Interface
clock mode
Master/slave clock
mode
Master/slave clock
mode
Master/slave clock
mode
Link-layer
protocols
PPP, TDM
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AND1MO1C
58
Function
Minimum
number of
timeslots in
CE1 mode
AND1ML1
AND2ML1A
AND1MD1A
AND1ML1A
AND2ML1B
AND1MD1B
AND1MO1C
ADSL2+: has a long delay and asymmetric upstream and downstream bandwidth. The
downstream bandwidth is higher than the upstream bandwidth. Therefore, the ADSL2+ is
suitable to carry data services, especially HSDPA services.
VDSL2 is compatible with ADSL2+. VDSL2 has symmetrical upstream and downstream
bandwidths, and 100 Mbit/s transmission in a short distance within 300 m. It is suitable to
carry voice services, data services, and video services.
G.SHDSL: has a stable delay and symmetric upstream and downstream bandwidth.
Compared with the ADSL2+, the G.SHDSL is suitable to carry high-priority services, such
as voice services.
The combination of ADSL2+ line and G.SHDSL line meets requirements on data and voice
services access. In addition, the Offload is also an important scenario in the mobile
communication network. In other words, the received base station services are classified and
transmitted by ATN devices. Traditional voice services (2G, 3G R99 CS) are transmitted using
the E1 private line to ensure high QoS, low delay, and high reliability. High-bandwidth packet
services, such as HSDPA services with low requirements on delay, are backhauled using the
xDSL technology. For detailed information, see the chapter "xDSL application" in the Feature
Description.
Issue 01 (2013-10-31)
59
Table 5-9 shows the xDSL service interface boards supported by ATN devices and the
differences between the boards.
Table 5-9 xDSL service interface boards
Item
AND1AVD8A
AND1AVD8A
AND1SHD4
AND1SHD4I
xDSL technology
ADSL2+
VDSL2
G.SHDSL
G.SHDSL
Number of
interfaces
Number of binding
groups
Working mode
ATM mode
PTM mode
ATM mode
IMA mode
EFM mode
Maximum upstream
rate
1.024 Mbit/s
50 Mbit/s
5.7 Mbit/s
2.3 Mbit/s
Maximum
downstream rate
24 Mbit/s
100 Mbit/s
5.7 Mbit/s
2.3 Mbit/s
NTR clock
Not supported
Not supported
Supported
Supported
NOTE
The AND1SHD4 in ATM mode supports SHDSL.bis.
Both the AND1SHD4 and AND1SHD4I support one binding group. The difference is as follows:
l When the AND1SHD4 is in ATM mode, interface binding needs to be manually configured. When the AND1SHD4 is in EFM
mode, the ATN device automatically adapts to the interface binding configuration on the DSLAM.
l The IMA binding group of the AND1SHD4I has a fixed number of member links, that is, 4. No manual configuration is
required.
60
Indicators
The following indicators are present on the front panel of the ANC1CXPI:
l
STAT indicator, red, green, or orange, which indicates the working status
PROG indicator, red or green, which indicates the running status of the program
SYNC indicator, red or green, which indicates the clock synchronization status
GE L/A0 to GE L/A1, FE L/A0 to FE L/A3 indicators, orange or green, which indicate the
connection status of the port
NOTE
l Five pairs of Link and ACT indicators located above ETH/OAM interfaces and four FE service
interfaces on the ANC2CXPI, which indicate the connection status of the Ethernet interface.
l Five pairs of Link and ACT indicators located above ETH/OAM interfaces and four FE service
interfaces on the ANC2CXPL, which indicate the connection status of the Ethernet interface.
Buttons
The following buttons are present on the front panel of the ANC1CXPI:
l
RST button, which is used for warm reset of the board. When you press the RST button
and then release it, the board is reset (warm).
CF RCV button, which is used to restore the configuration data from the CF card. When
you hold down the CF RCV button for five seconds, the equipment automatically restores
the configuration data from the CF card.
LAMP button, which is used to test the indicators. When you press the LAMP button,
except the service port indicators on the AND1EF8T, AND1EF8F, AND1AVD8A,
AND1SHD4, AND1SHD4I, all the board indicators on the NE are on.
Issue 01 (2013-10-31)
61
Interfaces
Table 5-10 lists the types and usage of the interfaces on the ANC2CXPI/ANC2CXPL.
Table 5-10 Interfaces on the ANC2CXPI/ANC2CXPL
Board
Interface
Name
Interface
Type
Usage
Corresponding
Cable
ANC2CXPI
ETH/OAM
RJ-45
RJ-45
ANC2CXPL
CLK0/
TOD0
CLK1/
TOD1
ANC2CXPI
ALMI/O
RJ-45
GE0, GE1
SFP
ANC2CXPI
FE0 to FE3
SFP
ANC2CXPL
FE/GE0 to
FE/GE3
SFP
ANC2CXPI
FE4 to FE7
RJ-45
ANC2CXPL
FE/GE4 to
FE/GE7
RJ-45
ANC2CXPL
ANC2CXPI
ANC2CXPL
ANC2CXPI
ANC2CXPL
87654321
Issue 01 (2013-10-31)
Pin
Usage
62
Front View
Pin
Usage
Unspecified
87654321
Pin
Working Mode
External
Clock
(1PPS + Time
Information)
(1PPS + Time
Information)
Receive
negative of the
CLK
Unspecified
Unspecified
Receive
positive of the
CLK
Unspecified
Unspecified
Unspecified
(RS422 level)
(RS422 level)
Transmit
negative of the
CLK
Grounding end
Grounding end
Transmit
positive of the
CLK
Grounding end
Grounding end
Unspecified
(RS422 level)
(RS422 level)
(RS422 level)
(RS422 level)
(RS422 level)
(RS422 level)
Unspecified
Unspecified
NOTE
The CLK0/TOD0 and CLK1/TOD1 interfaces can be configured so that they can work in one of the preceding three working
modes.
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63
87654321
Pin
Usage
Grounding end
Grounding end
Grounding end
Supported
Modules
Interface
Type
Usage
GE0, GE1
GE optical module
LC
GE electrical
interface
RJ-45
FE0 to FE3
FE optical module
LC
FE/GE0 to FE/
GE3
FE optical module
LC
GE optical module
LC
GE electrical
interface
RJ-45
NOTE
The GE SFP interface on the front panel can function as either an optical interface or an electrical interface.
When the SFP interface functions as an optical interface, it needs to be used with an optical module; when the SFP interface
functions as an electrical interface, it needs to be used with an electrical module.
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64
87654321
Pin
Usage
Unspecified
Unspecified
Unspecified
Unspecified
87654321
Pin
Usage
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65
Description
Basic function
Cross-connect capacity
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66
Description
NOTE
l If the SFP interface houses an electrical module, the interface does not support synchronous Ethernet
or IEEE 1588v2.
l When using an electrical interface at 10 Mbit/s, the interface does not support synchronous Ethernet
clock or IEEE 1588v2.
Alarm input/output
interface
Auxiliary
interface
module
Alarm
Two external
time/clock signals
Each
module
on the
board
Clock
signal
Clock signal
Clock
module
Interface
boards
NMS
signal
signal
Control and
communication
module
Management bus
Interface
boards
Management bus
2 x GE signals
4 x FE/GE optical signals
4 x FE/GE electrical signals
Service
grooming and
processing
module
Service bus
3.3V
Each module
on the board
Power
supply
module
12V
-48V/-60V
-48V/-60V
Issue 01 (2013-10-31)
Interface
boards
Interface
boards
FAN
System
power supply
System
power supply
67
Provides two interfaces for inputting and outputting the external clock/time.
Provides one NM serial port or NM network port for communicating with the NMS,
managing the equipment, and querying the equipment.
Grooms services with 6.8 Gbit/s switching capacity in the full-duplex mode.
Grooms services with 6.8 Gbit/s (ANC2CXPI) and 12 Gbit/s (ANC2CXPL) switching
capacity in the full-duplex mode.
Clock Module
This module performs the following functions:
l
Provides the system clock signals and processes the clock signals from the service boards
and the external clock/time interfaces.
68
DIP Switch
ON DIP
1 2 3 4
CF Card
The size of the CF card on ANC2CXPI/ANC2CXPL is 512 MB. The CF card is used to backup
data and load packages.
Issue 01 (2013-10-31)
69
DIP Switch
NOTICE
l This operation should be executed with caution. Use it under the guidance of technical
personnel.
l After the configuration file is deleted, reset the DIP switches to 0, 0, 0, and 0. In this way,
you do not need to delete the configuration file at each startup.
l The numeral indicates 1, and the letter indicates 0.
l The device password is deleted when the configuration file is deleted.
You can use the DIP switches to delete the configuration file loaded on the device.
Set DIP switches on ANC2CXPI/ANC2CXPL to 1, 1, 0, and 1. During startup, the device deletes
the loaded configuration file based on the DIF switch status.After the password is deleted, you
are required to enter a new password when a PC is connected to the device through the console
interface.
NOTE
If no PC is connected to the device through the console interface, you can check whether the password is
deleted based on the indicator status. The password is deleted at the stage when the BIOS is guiding the
upper-layer software during the device startup. At this stage, the green PROG indicator is on for 300 ms
and off for 300 ms.
To reset the DIP switches to 0, 0, 0, and 0, you are advised to remove the board after the STAT and PROG
indicators become green.
Interface Specifications
l
For the specifications of the FE/GE electrical interface, see Table 5-19.
The specifications of an SFP interface on a board depend on the optical/electrical module on the board.
For the specifications of the optical/module modules on a board, see 9 Swappable Optical/Electrical
Modules.
Issue 01 (2013-10-31)
70
Specification Requirement
Interface rate
Specification Requirement
Interface rate
Remarks
S4015755
S4015715
Two-fiber
bidirectional
34060282
34060363
34060364
Commercial
Single-fiber
bidirectional
Commercial
Issue 01 (2013-10-31)
Code
Remarks
34060286
34060473
Two-fiber
bidirectional
S4016954
34060360
34060483
34060481
34060479
34060482
Commercial
Two-fiber
bidirectional
CWDM
Commercial
71
Code
34060478
34060476
34060477
34060480
34060475
34060470
34060539
34060540
34060595
34060596
Remarks
Single-fiber
bidirectional
Commercial
34100101
34100080
34100052
Other Specifications
Board dimensions (mm): 20.3 (H) x 226.0 (D) x 388.4 (W)(0.80 in.8.90 in.15.29 in.)
Board weight: 1.08 kg(2.38 lb)
Power consumption (W, room temperature): 28.0 (ANC2CXPI), 29.5 (ANC2CXPL)
Issue 01 (2013-10-31)
72
Indicator
The following indicators are present on the front panel of the AND1EG4T board:
l
STAT indicator, red, green, or orange, which indicates the working status
LINK indicator, green, which indicates the connection status of the port
ACT indicator, yellow, which indicates the data transceiving status of the port
NOTE
There are four LINK indicators and eight ACT indicators. One LINK indicator and one ACT indicator are
present above each FE/GE service interface.
Interfaces
On the AND1EG4T board, four interfaces are present. Table 5-24 lists the types and usage of
the interfaces.
Issue 01 (2013-10-31)
73
Interfac
e Type
Usage
Pin
Corresponding
Cable
FE/GE0FE/GE3
RJ-45
Input/output
interfaces for FE/GE
electrical signals
For details,
see10.5.1 Ethernet
Cables.
87654321
Pin
Usage
Unspecified
Unspecified
Unspecified
Unspecified
Pin
Usage
87654321
Issue 01 (2013-10-31)
74
Front View
Pin
Usage
Description
Basic function
Interface function
Clock
NOTE
When using an electrical interface at 10 Mbit/s, the interface does not support synchronous Ethernet clock
or IEEE 1588v2.
On the front panel of the AND1EG4T, the first two FE/GE interfaces are considered as one group and the
other two FE/GE interfaces on the back are considered as another group.
The service access ability of the AND1EG4T is 2 Gbit/s and that of each interface group is 1 Gbit/s. The
two interfaces of each group share the group bandwidth.
Issue 01 (2013-10-31)
75
Service access
module
Service signals
Service
processing
module
Management bus
Management bus
Management
module
Service signals
CXP
Clock signals
Clock module
Clock signals
CXP
Management bus
CXP
3.3 V
3.0 V
2.5 V
1.2 V
Power supply
module
-48 V/-60 V
System power
supply
-48 V/-60 V
System power
supply
Issue 01 (2013-10-31)
In the receive direction, it receives FE/GE services through FE/GE ports on the front panel,
performs O/E conversion, serial/parallel conversion, and coding/decoding, and then sends
the service packets to the service processing module.
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
76
In the transmit direction, it receives the service packets from the service processing module,
performs coding/decoding, parallel/serial conversion, and E/O conversion, and then sends
the service packets through FE/GE ports on the front panel.
In the receive direction, it receives and buffers service packets from the interface conversion
module. Then, it schedules the service packets based on the service access capability of the
EG4T board and access bandwidth configurations at each port. Finally, it sends the service
packets through backplane interfaces.
In the transmit direction, it receives service packets from the control board, identifies the
destination ports for the packets, buffers and schedules them based on the service access
capability of the board and bandwidth configurations at each port. Finally, it sends the
service packets to the service access module.
Management Module
This module works with the control board to manage and control each module on the board.
Clock Module
This module performs the following functions:
l
Provides the working clock for each module on the EG4T board.
3.3 V
3.0 V
2.5 V
1.2 V
Interface Specifications
Table 5-28 lists the specifications of the electrical interfaces on the AND1EG4T board.
Issue 01 (2013-10-31)
77
Specification Requirement
Interface rate
Physical Specifications
Board dimensions (mm): 20.32 (height) x 225.75 (depth) x 193.8 (width)(0.80 in.8.89 in.7.63
in.)
Weight (kg): 0.50(1.10 lb)
Power consumption at room temperature (W): 10.0
Indicator
The following indicators are present on the front panel of the AND1EF8T:
l
STAT indicator, red, green, or orange, which indicates the working status
LINK indicator, green, which indicates the connection status of the port
ACT indicator, yellow, which indicates the data transceiving status of the port
Issue 01 (2013-10-31)
78
NOTE
There are eight LINK indicators and eight ACT indicators. One LINK indicator and one ACT indicator
are present above each FE service interface.
Interface
Table 5-29 lists the types and usage of the interfaces on the AND1EF8T.
Table 5-29 Types and usage of interfaces on the AND1EF8T
Interface on
the Front
Panel
Interface
Type
Usage
Pin
Correspondin
g Cable
FE0 - FE7
RJ45
Input/output interfaces
for FE electrical signals
NOTE
The FE0 to FE7 interfaces support auto-adaptation to a straight-through cable or a crossover cable.
87654321
Pin
Usage
Unspecified
Unspecified
Unspecified
Unspecified
79
Description
Basic function
Interface function
Clock
NOTE
When using an electrical interface at 10 Mbit/s, the interface does not support synchronous Ethernet clock
or IEEE 1588v2/IEEE 1588 ACR.
Access and
convergence
module
Service
bus
Management bus
Control
driver
module
Service bus
CXP
CXP
Clock signals
Clock signals
3.3 V
1.2 V
Issue 01 (2013-10-31)
Clock
module
Power
supply
module
Clock signals
-48 V/-60 V
-48 V/-60 V
CXP
System
power supply
System
power supply
80
Clock Module
This module performs the following functions:
l
Interface Specifications
Table 5-32 lists the specifications of the electrical interfaces of the AND1EF8T.
Table 5-32 Specifications of the FE electrical interface
Issue 01 (2013-10-31)
Item
Specification Requirement
Interface rate
81
Item
Specification Requirement
Physical Specifications
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)(0.80 in.8.89 in.7.63 in.)
Weight (kg): 0.53(1.17 lb)
Power consumption (W, room temperature): 9.0
Indicators
The following indicators are present on the front panel of the AND1EG2.
l
STAT indicator, red, green, or orange, which indicates the working status
LINK0 to LINK1 indicators, green, which indicate the connection status of the port
ACT0 to ACT1 indicators, yellow, which indicate the data transceiving status of the port
Interfaces
Two SFP interfaces are present on the AND1EG2. Table 5-33 list the types and usage of the
interfaces on the AND1EG2.
Issue 01 (2013-10-31)
82
Interf
ace
Type
Usage
Correspond
ing Fiber
Optical
module
LC
For details,
see 10.6
Optical
Fibers.
IN0,
IN1
LC
Description
Basic function
Interface function
Clock
Issue 01 (2013-10-31)
83
2 x GE signals
Interface
conversion
module
Service bus
Management bus
Control
driver
module
CXP
Service bus
CXP
Clock signals
Clock signals
Clock
module
3.3 V
1.2 V
Power
supply
module
Clock signals
CXP
-48 V/-60 V
System
power supply
-48 V/-60 V
System
power supply
Clock module
This module performs the following functions:
Issue 01 (2013-10-31)
84
Interface Specifications
For information about the swappable optical modules supported by SFP interfaces on the
AND1EG2 board, see Table 5-35. The interface specifications depend on the optical modules
on the board. For details on the optical modules, see 9 Swappable Optical/Electrical
Modules.
Table 5-35 Information about GE optical modules
Issue 01 (2013-10-31)
Code
Remarks
34060286
34060473
Two-fiber
bidirectional
S4016954
34060360
34060483
34060481
34060479
34060482
34060478
34060476
34060477
34060480
34060475
34060470
Commercial
Two-fiber
bidirectional
CWDM
Commercial
Single-fiber
bidirectional
85
Code
Remarks
34060539
Commercial
34060540
34060595
34060596
Physical Specifications
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W) (0.80 in. x 8.89 in. x 7.63 in.)
Weight (kg): 0.52(1.15 lb)
Power consumption (W, room temperature): 5.9
Indicators
The following indicators are present on the front panel of the AND1EG4F:
l
STAT indicator, red, green, or orange, which indicates the working status
L/A0 to L/A3 indicators, green or orange, which indicate the port connection status and
data transmit/receive status
86
Interfaces
There are four SFP interfaces on the AND1EG4F. Table 5-36 lists the types and usage of the
interfaces.
Table 5-36 Types and usage of interfaces on the AND1EG4F
Interface on the Front
Panel
Interface
Type
Usage
Correspo
nding
Cable
Optical
module
LC
For details,
see 10.6
Optical
Fibers.
IN0 to IN3
LC
Electrical
module
OUT0 IN0,
OUT3 IN3
RJ-45
For details,
see 10.5.1
Ethernet
Cables.
NOTE
The GE SFP interface on the front panel can function as either an optical interface or an electrical interface.
When the SFP interface functions as an optical interface, it needs to be used with an optical module; when
the SFP interface functions as an electrical interface, it needs to be used with an electrical module.
Issue 01 (2013-10-31)
87
Description
Basic function
Interface function
Clock
NOTE
On the front panel of the AND1EG4F, the first two FE/GE interfaces are considered as one group and the
other two FE/GE interfaces on the back are considered as another group.
The service access ability of the AND1EG4F is 2 Gbit/s and that of each interface group is 1 Gbit/s. The
two interfaces of each group share the group bandwidth.
If the SFP interface houses an electrical module, the interface does not support synchronous Ethernet or
IEEE 1588v2/IEEE 1588 ACR.
Service access
module
Service signals
Service
processing
module
Management bus
Management bus
Management
module
Service signals
CXP
Clock signals
Clock module
Clock signals
CXP
Management bus
CXP
Issue 01 (2013-10-31)
3.3 V
3.0 V
2.5 V
1.2 V
Power supply
module
-48 V/-60 V
System power
supply
-48 V/-60 V
System power
supply
88
Transmit Direction
The service packets from the control board are sent to the service processing module through
the backplane-side interface of the AND1EG4F. The service processing module identifies the
destination interfaces for the packets, and buffers and schedules the packets. Then, the service
processing module sends the processed packets to the service access module, where coding/
decoding, serial/parallel conversion, and E/O conversion are performed. Finally, the service
access module outputs the packets through the FE/GE interfaces on the front panel.
Receive Direction
The FE/GE interfaces on the front panel receive FE/GE service signals. Then, the service access
module performs O/E conversion, serial/parallel conversion, and coding/decoding on the
services, and then sends the services to the service processing module. The service processing
module buffers the service packets, schedules the packets based on the service access capability
of the EG4F and the access bandwidth setting at each interface, and finally outputs the packets
through the backplane-side interface.
In the receive direction, this module receives the FE/GE services from the interfaces on the
front panel, performs O/E conversion, serial/parallel conversion, and coding/decoding, and
then sends the services to the service processing module.
In the transmit direction, this module receives the service packets from the service
processing module, performs coding/decoding, serial/parallel conversion, and E/O
conversion on the packets, and then outputs the packets through the FE/GE interfaces on
the front panel.
In the receive direction, this module receives and buffers the service packets from the
interface conversion module. Then, this module schedules packets from different interfaces
based on the access capability of the EG4F and the access bandwidth settings at these
interfaces. Finally, this module outputs the packets through the backplane-side interface.
In the transmit direction, this module receives service packets from the control board,
identifies the destination interfaces of the packets, and buffers and schedules the packets
based on the access capability of the EG4F and the access bandwidth setting at each
interface. Finally, this module outputs the packets to the service access module.
Management Module
This module is used with the control board to manage and control each module on the EG4F.
Issue 01 (2013-10-31)
89
Clock Module
This module performs the following functions:
l
3.3 V
3.0 V
2.5 V
1.2 V
Interface Specifications
For information about the swappable FE/GE optical/electrical modules supported by SFP
interfaces on the AND1EG4F board, see Table 5-38, Table 5-39, Table 5-40, Table 5-40, and
Table 5-41. The interface specifications depend on the optical/electrical modules on the board.
For details on the optical/electrical modules, see 9 Swappable Optical/Electrical Modules.
Table 5-38 Information about FE optical modules
Code
Remarks
S4015755
S4015715
Two-fiber
bidirectional
34060282
34060363
34060364
Commercial
Single-fiber
bidirectional
Commercial
Issue 01 (2013-10-31)
Code
Remarks
34060286
Two-fiber
bidirectional
90
Code
Remarks
34060473
Commercial
S4016954
34060360
34060483
34060481
34060479
34060482
34060478
34060476
34060477
34060480
34060475
34060470
34060539
34060540
34060595
34060596
Two-fiber
bidirectional
CWDM
Commercial
Single-fiber
bidirectional
Commercial
34100101
34100080
34100052
Physical Specifications
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W) (0.80 in. x 8.89 in. x 7.63 in.)
Issue 01 (2013-10-31)
91
Indicators
The following indicators are present on the front panel of the AND1EF8F:
l
STAT indicator, red, green, or orange, which indicates the working status
LINK0 to LINK7 indicators, green, which indicate the connection status of the port
Interfaces
Eight SFP interfaces are present on the AND1EF8F. Table 5-42 lists the types and usage of the
interfaces.
Issue 01 (2013-10-31)
92
Interface
Type
Usage
Corresponding
Fiber
IN0 - IN7
LC
OUT0 OUT7
LC
NOTE
The SFP interface should be used with an optical module.
l When a two-fiber bidirectional optical module is used, two LC interfaces are provided on the left and
right sides of the optical module. Each interface uses one fiber, which is used to transmit or receive
service signals.
l When a single-fiber bidirectional optical module is used, only one LC interface is provided on the left
side of the optical module. This optical interface uses only one fiber, which is used to transmit and
receive service signals at the same time.
Description
Basic function
Interface function
Clock
Issue 01 (2013-10-31)
93
Description
Supports IEEE 1588v2 and IEEE 1588 ACR.
NOTE
If the SFP interface houses an electrical module, the interface does not support synchronous Ethernet or
IEEE 1588v2.
8 x FE optical signals
Access and
convergence
module
Service
bus
Management bus
Control driver
module
Service bus
CXP
CXP
Clock signals
Clock signals
Clock module
3.3 V
1.2 V
Clock signals
Power
supply
module
CXP
-48 V/-60 V
System power
supply
-48 V/-60 V
System power
supply
94
Clock Module
This module performs the following functions:
l
Interface Specifications
For information about the swappable FE/GE optical/electrical modules supported by SFP
interfaces on the AND1EF8F board, see Table 5-44 and Table 5-45. The interface specifications
depend on the optical/electrical modules on the board. For details on the optical/electrical
modules, see 9 Swappable Optical/Electrical Modules.
Table 5-44 Information about FE optical modules
Issue 01 (2013-10-31)
Code
Remarks
S4015755
S4015715
Two-fiber
bidirectional
34060282
34060363
34060364
Commercial
Single-fiber
bidirectional
Commercial
95
34100101
Physical Specifications
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W) (0.80 in. x 8.89 in. x 7.63 in.)
Weight (kg): 0.55(1.21 lb)
Power consumption (W, room temperature): 12.9
The AND1ML1 and AND1ML1A have the same functions and features except for the matched impedance
(AND1ML1: 75 ohms E1; AND1ML1A: 120 ohms E1).
Figure 5-24 shows the appearance of the front panel of the AND1ML1A.
Figure 5-24 Front panel of the AND1ML1A
Issue 01 (2013-10-31)
96
Indicators
The following indicators are present on the front panel of the AND1ML1/AND1ML1A:
l
STAT indicator, red, green, or orange, which indicates the working status
Interfaces
There is one Anea 96 interface on the front panel of the AND1ML1/AND1ML1A. Table
5-46 lists the type and usage of the interface. For cables corresponding to the interfaces, see
10.5.4 75-Ohm 16 x E1 Cables and 10.5.5 120-Ohm 16 x E1 Cables.
Table 5-46 Type and usage of the interface on the front panel of the ML1
Interface
on the
Front
Panel
Interface
Type
Usage
AND1ML1
AND1ML1A
1 - 16
Anea 96
Connector Pin
Usage
Connector Pin
Usage
Rx0
25
Tx0
2
3
26
Rx1
4
5
Rx2
Rx3
Issue 01 (2013-10-31)
Tx2
31
Tx3
32
Rx4
10
11
29
30
8
9
Tx1
28
6
7
27
33
Tx4
34
Rx5
35
Tx5
97
Front View
Connector Pin
Usage
12
13
Rx6
Rx7
Rx8
Rx9
R x 10
R x 11
R x 12
R x 13
56
Tx9
45
T x 10
47
T x 11
73
T x 12
75
T x 13
76
R x 14
54
55
43
74
52
53
Tx8
48
50
51
41
46
24
49
Tx7
44
22
23
39
42
20
21
Tx6
40
18
19
37
38
16
17
Usage
36
14
15
Connector Pin
77
T x 14
78
R x 15
79
T x 15
80
Issue 01 (2013-10-31)
98
Remarks
Basic function
Provides 16 E1 interfaces.
Supports the hot swappable function.
Detects the temperature and voltage of the board.
Interface function
AND1ML1: 75 ohm
AND1ML1A: 120 ohm
16
16
Maximum number of E1
links in each IMA group
16
Encapsulates ATM VPC/VCC service to the PWE3 in the Nto-1 (N32) or 1-to-1 format.
Supports the ATM bundle function.
TDM
256
32
64
Issue 01 (2013-10-31)
99
Remarks
PPP
Clock
16
16
16
16 x E1 signals
Line-side
processing
module
Service
bus
-48 V/-60 V
1.26 V
System-side
Service
bus
processing module
Backplane
interface
module
Management bus
Management bus
To each module
Issue 01 (2013-10-31)
Clock signals
-48 V/-60 V
Power supply
module
2.5 V
3.3 V
Control module
Clock module
3.3 V
Service bus
Service bus
Serial
management
bus
Active CXP
Standby CXP
CXP
Clock signals
CXP
100
In Transmit Direction
The AND1ML1/AND1ML1A first distributes the signals in Ethernet packets from the backplane
to different protocol processing chips according to the service types. The system-side processing
module decapsulates the concatenated services and buffers the services in queues. Then, this
module schedules the egress queues according to the service types, processes and converts the
services, and finally sends the services to the line-side processing module. The line-side
processing module performs coding, dejitter, pulse shaping, and line driving for the services,
and finally sends the services to E1 interfaces.
In Receive Direction
The line processing module performs impedance match, signal equalization, signal level
conversion, clock data recovery, dejitter, and decoding for the accessed E1 signals. Then, the
signals are sent into the system-side processing module, which frames the signals, encapsulates
the IMA, CES, and ML-PPP services in PWE3, and schedules PWs. Finally, this module sends
the signals in Ethernet packets to the backplane interface module.
Control Module
This module controls the reading and writing on the chip, resets the chip, and detects faults in
the chip. When used with the control board, this module controls the board.
Clock Module
This module provides various clock signals for the board to operate normally, detects clocks,
and selects the line recovery clock.
101
5.9.4 Specifications
The technical specifications of the AND1ML1/AND1ML1A include the interface
specifications, dimensions, weight, and power consumption.
Table 5-49 lists the specifications of the interfaces on the AND1ML1/AND1ML1A.
Table 5-49 Specifications of the interfaces on the AND1ML1/AND1ML1A
Item
Specification Requirement
2048
Interface impedance
75 ohms (AND1ML1)
120 ohms (AND1ML1A)
Interface code
HDB3
0 to 6
Output jitter
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)(0.80 in.8.89 in.7.63 in.)
Weight (kg): 0.56(1.23 lb)
Power consumption (W, room temperature): 13.1
The mapping impedance of an interface on the AND2ML1A is 75 ohm, and the mapping impedance of an
interface on the AND2ML1B is 120 ohm. Except the difference of mapping impedance, the functions and
features of the AND2ML1A and AND2ML1B are the same.
Issue 01 (2013-10-31)
102
Indicators
The following indicators are present on the front panel of the AND2ML1A/AND2ML1B:
l
STAT indicator, red, green, or orange, which indicates the working status
Interfaces
There is one Anea 96 interface on the front panel of the AND2ML1A/AND2ML1B. Table
5-50 lists the type and usage of the interfaces. 10.5.4 75-Ohm 16 x E1 Cables and 10.5.5 120Ohm 16 x E1 Cables list the cables corresponding to the interfaces.
Table 5-50 Type and usage of the interfaces on the front panel of the AND2ML1A/AND2ML1B
Issue 01 (2013-10-31)
Interface
on the
Front
Panel
Interface
Type
Usage
AND2ML1A
AND2ML1B
0 - 15
Anea 96
103
Connector Pin
Usage
Connector Pin
Usage
Rx0
25
Tx0
2
3
26
Rx1
4
5
Rx2
Rx3
Rx4
Rx5
Rx6
Rx7
Rx8
Rx9
R x 10
R x 11
Issue 01 (2013-10-31)
Tx6
39
Tx7
41
Tx8
43
Tx9
45
T x 10
47
T x 11
48
R x 12
50
51
37
46
24
49
Tx5
44
22
23
35
42
20
21
Tx4
40
18
19
33
38
16
17
Tx3
36
14
15
31
34
12
13
Tx2
32
10
11
29
30
8
9
Tx1
28
6
7
27
73
T x 12
74
R x 13
75
T x 13
104
Front View
Connector Pin
Usage
52
53
Usage
76
R x 14
54
55
Connector Pin
77
T x 14
78
R x 15
56
79
T x 15
80
Remarks
Basic function
Provides 16 E1 interfaces.
Supports the hot swappable function.
Detects the temperature and voltage of the board.
Interface function
AND2ML1A: 75 ohms
AND2ML1B: 120 ohms
Issue 01 (2013-10-31)
16
16
Maximum number of E1
links in each IMA group
16
105
Remarks
Encapsulates ATM VPC/VCC service to the PWE3 in the Nto-1 (N32) or 1-to-1 format.
Supports the ATM bundle function.
TDM
256
32
64
PPP
Clock
16
16
16
Issue 01 (2013-10-31)
106
Service access
module
Service signal
Management bus
Line clocks
3.3V
.
.
.
Service signal
CXP
Management bus
Management
module
Clock
module
Service
processing
module
.
.
.
1V
Power
supply
module
-48V/-60V
System
power supply
-48V/-60V
System
power supply
System clocks
Line clocks
CXP
CXP
CXP
Transmit Direction
The service signals from the control board are sent to the service processing module. The service
processing module performs PWE3 decapsulation and PW scheduling for the service signals,
processes the service signals based on the IMA/ATM, CES, and ML-PPP protocols, performs
the E1 framing function, and sends the service signals to the service access module. The service
access module performs encoding and line drive for the signals and outputs the signals through
the backplane-side interfaces.
Receive Direction
The board accesses service signals through the backplane-side interfaces, and then the signals
are sent to the service access module. The service access module performs interference isolation,
lightning-proof, impedance matching, level conversion, signal balancing, decoding, and then
sends the processed signals to the service processing module. The service processing module
performs E1 framing, processes service signals based on the IMA/ATM, CES, and ML-PPP
protocols, implements PWE3 encapsulation and PW scheduling, and sends the signals to the
control board through the backplane-side interfaces.
In the receive direction, this module isolates common mode interference, protects circuits
against transient failures, matches the impedance in the receive direction with the internal
impedance, and performs level conversion, balancing, and decoding for the service signals.
Finally, this module sends the processed signals to the service processing module.
In the transmit direction, this module receives the service signals from the service
processing module, encodes the signals, drives the line, and outputs the service signals
through the backplane-side interfaces.
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In the receive direction, this module receives the signals from the service access module
and performs E1 framing. This module also identifies protocol types of the service signals,
processes the service signals based on the IMA/ATM, CES, and ML-PPP protocols (for
example, addition and deletion of IMA group members, VP/VC switching and
concatenation of ATM cells, vacant slot compression of CES services, and setup of MLPPP groups). Then, this module performs PWE3 encapsulation and PW scheduling, Finally,
this module converts the processed signals to high-rate signals, and then sends the signals
to the control board through the backplane-side interfaces.
In the transmit direction, this module receives the high-rate signals from the control board
through the backplane-side interfaces and recovers low-rate service signals. Then, this
module performs PWE3 decapsulation, identifies different protocols and processes the
service signals, and completes E1 framing. Finally, this module sends the processed signals
to the service access module.
Management Module
This module manages and controls each module on the board.
Clock Module
This module performs the following functions:
l
When used with the control board, processes the recovered line clock.
Interface Specifications
Table 5-53 lists the specifications of the interfaces on the AND2ML1A/AND2ML1B.
Table 5-53 Specifications of the interfaces on the AND2ML1A/AND2ML1B
Item
Specification Requirement
2048
Interface impedance
75 ohms (ML1A)
120 ohms (ML1B)
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108
Item
Specification Requirement
Interface code
HDB3
0 to 6
Output jitter
Physical Specifications
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)(0.80 in.8.89 in.7.63 in.)
Weight (kg): 0.44(0.97 lb)
Power consumption (W, room temperature): 9.5
The mapping impedance of an interface on the AND1MD1A is 75 ohms, and the mapping impedance of
an interface on the AND1MD1B is 120 ohms. Except the difference of mapping impedance, the functions
and features of the AND1MD1A and AND1MD1B are the same.
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109
Indicators
The following indicators are present on the front panel of the AND1MD1A/AND1MD1B:
l
STAT indicator, red, green, or orange, which indicates the working status
Interfaces
There are two Anea 96 interfaces on the front panel of the AND1MD1A/AND1MD1B. Table
5-54 lists the type and usage of the interfaces. 10.5.4 75-Ohm 16 x E1 Cables and 10.5.5 120Ohm 16 x E1 Cables list the cables corresponding to the interfaces.
Table 5-54 Type and usage of the interfaces on the front panel of the AND1MD1A/AND1MD1B
Interfac
e on the
Front
Panel
Interfac
e Type
Usage
AND1MD1A
AND1MD1B
0 to 15
Anea 96
16 to 31
Anea 96
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110
Connector Pin
Usage
Connector Pin
Usage
Rx0
25
Tx0
2
3
26
Rx1
4
5
Rx2
Rx3
Rx4
Rx5
Rx6
Rx7
Rx8
Rx9
R x 10
R x 11
R x 12
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39
Tx7
41
Tx8
43
Tx9
45
T x 10
47
T x 11
73
T x 12
74
R x 13
52
53
Tx6
48
50
51
37
46
24
49
Tx5
44
22
23
35
42
20
21
Tx4
40
18
19
33
38
16
17
Tx3
36
14
15
31
34
12
13
Tx2
32
10
11
29
30
8
9
Tx1
28
6
7
27
75
T x 13
76
R x 14
77
T x 14
111
Front View
Connector Pin
Usage
54
55
Connector Pin
Usage
78
R x 15
56
79
T x 15
80
Remarks
Basic function
Provides 32 E1 interfaces.
Supports the hot swappable function.
Detects the temperature and voltage of the board.
Interface function
AND1MD1A: 75 ohms
AND1MD1B: 120 ohms
32
32
Maximum number of E1
links in each IMA group
16a
Encapsulates ATM VPC/VCC service to the PWE3 in the Nto-1 (N32) or 1-to-1 format.
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112
Remarks
Supports the ATM bundle function.
TDM
512
64
128
PPP
Clock
16
32
32
16
16b
NOTE
a: In the case of the AND1MD1A/AND1MD1B, the links corresponding to the former 16 and latter 16 E1
ports cannot be bundled to an IMA group.
b: In the case of the AND1MD1A/AND1MD1B, the links corresponding to the former 16 and latter 16 E1
ports cannot be bundled to an ML-PPP group.
Issue 01 (2013-10-31)
113
Service access
module
Service signal
Management bus
Line clocks
3.3V
.
.
.
Service signal
CXP
Management bus
Management
module
Clock
module
Service
processing
module
.
.
.
1V
Power
supply
module
-48V/-60V
System power
supply
-48V/-60V
System power
supply
System clocks
Line clocks
CXP
CXP
CXP
Transmit Direction
The service signals from the control board are sent to the service processing module. The service
processing module performs PWE3 decapsulation and PW scheduling for the service signals,
processes the service signals based on the IMA/ATM, CES, and ML-PPP protocols, performs
the E1 framing function, and sends the service signals to the service access module. The service
access module performs encoding and line drive for the signals and outputs the signals through
the backplane-side interfaces.
Receive Direction
The board accesses service signals through the backplane-side interfaces, and then the signals
are sent to the service access module. The service access module performs interference isolation,
lightning-proof, impedance matching, level conversion, signal balancing, decoding, and then
sends the processed signals to the service processing module. The service processing module
performs E1 framing, processes service signals based on the IMA/ATM, CES, and ML-PPP
protocols, implements PWE3 encapsulation and PW scheduling, and sends the signals to the
control board through the backplane-side interfaces.
In the receive direction, this module isolates common mode interference, protects circuits
against transient failures, matches the impedance in the receive direction with the internal
impedance, and performs level conversion, balancing, and decoding for the service signals.
Finally, this module sends the processed signals to the service processing module.
In the transmit direction, this module receives the service signals from the service
processing module, encodes the signals, drives the line, and outputs the service signals
through the backplane-side interfaces.
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114
In the receive direction, this module receives the signals from the service access module
and performs E1 framing. This module also identifies protocol types of the service signals,
processes the service signals based on the IMA/ATM, CES, and ML-PPP protocols (for
example, addition and deletion of IMA group members, VP/VC switching and
concatenation of ATM cells, vacant slot compression of CES services, and setup of MLPPP groups). Then, this module performs PWE3 encapsulation and PW scheduling, Finally,
this module converts the processed signals to high-rate signals, and then sends the signals
to the control board through the backplane-side interfaces.
In the transmit direction, this module receives the high-rate signals from the control board
through the backplane-side interfaces and recovers low-rate service signals. Then, this
module performs PWE3 decapsulation, identifies different protocols and processes the
service signals, and completes E1 framing. Finally, this module sends the processed signals
to the service access module.
Management Module
This module manages and controls each module on the board.
Clock Module
This module performs the following functions:
l
When used with the control board, processes the recovered line clock.
Interface Specifications
Table 5-57 lists the specifications of the interfaces on the AND1MD1A/AND1MD1B.
Table 5-57 Specifications of the interfaces on the AND1MD1A/AND1MD1B
Item
Specification Requirement
2048
Interface impedance
75 ohms (MD1A)
120 ohms (MD1B)
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115
Item
Specification Requirement
Interface code
HDB3
0 to 6
Output jitter
Physical Specifications
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)(0.80 in.8.89 in.7.63 in.)
Weight (kg): 0.49(1.08 lb)
Power consumption (W, room temperature): 12.1
Indicator
The following indicators are present on the front panel of the AND1MO1C board:
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116
STAT indicator, red, green, or orange, which indicates the working status
Port Name
Table 5-58 lists the number of interfaces, types, and usage of the interfaces on the AND1MO1C
board.
Table 5-58 Interfaces on the AND1MO1C board
Interfac
e on the
Front
Panel
Interfac
e Type
Usage
Pin
Required Cable
T1 0-T1 7
RJ-45
Input/output
interfaces for T1
electrical signals
87654321
Pin No.
Usage
Unspecified
Unspecified
Grounding terminal
Grounding terminal
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117
Description
Basic function
Interface function
PPP
Clock
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118
Service access
module
Service signal
Management bus
Line clocks
3.3V
3.3V
2.5V
1.8V
1.2V
1V
Service signal
CXP
Management bus
Management
module
Clock
module
Service
processing
module
.
.
.
Power
supply
module
Line clocks
CXP
-48V/-60V
System
power supply
-48V/-60V
System
power supply
System clocks
CXP
CXP
In the receive direction, this module isolates signals from common-mode interference,
protects circuit against transient states, matches resistance, converts signal levels, balances
and decodes the signals. Finally, this module sends the signals to the service processing
module.
In the transmit direction, this module receives service signals from the service processing
module, encodes the signals, drives the line, and outputs signals through interfaces on the
front panel.
119
In the receive direction, this module receives signals from the service access module and
frames E1 signals. Then it identifies the protocol type of the signals and processes the
signals accordingly. For example, if the protocol type is ML-PPP, this module creates an
ML-PPP group. After that, it performs PWE3 encapsulation and schedules PWs. Finally,
this module converts the signals into high-rate signals and sends them to the control board
through backplane interfaces.
In the transmit direction, this module receives high-rate service signals from the control
board through backplane interfaces and recovers low-rate service signals. Then it performs
PWE3 decapsulation, identifies the protocol type, and processes the signals accordingly.
Finally, this module frames T1 signals and sends the signals to the service access module.
Management Module
This module manages and controls other modules on the board.
Clock Module
This module performs the following functions:
l
Works with the control board to process the recovered line clock signals.
Interface Specifications
Table 5-61 lists the specifications of interfaces on the AND1MO1C board.
Table 5-61 Specifications of interfaces on the AND1MO1C board
Issue 01 (2013-10-31)
Item
Specification
1544 kbit/s
Interface impedance
100 ohm
Code
B8ZS
Anti-interference capability of
input port
120
Item
Specification
Output jitter
Physical Specifications
Board dimensions (mm): 20.32 (height) x 225.75 (depth) x 193.8 (width)
Weight (kg): 0.59(1.30 lb)
Power consumption at room temperature (W): 10.6
Front Panel
Figure 5-33 shows the appearance of the front panel of the AND1AVD8A.
Figure 5-33 Front panel of the AND1AVD8A
Indicators
The following indicators are present on the front panel of the AND1AVD8A.
l
STAT indicator, red, green, or orange, which indicates the working status
NOTE
There are eight LINK indicators, which are present above each service interface.
Interfaces
There are eight ADSL2+ interfaces on the front panel of the AND1AVD8A. Table 5-62 lists
types and usage of these interfaces.
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Interface Type
Usage
Cable
DSL0-DSL7
RJ-45
Accesses ADSL2+
service signals.
87654321
Pin
Description
Unspecified
Unspecified
Unspecified
TIP
RING
Unspecified
Unspecified
Unspecified
Description
Basic function
Interface function
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122
Description
Supports the ETHoA-LLC and ETHoA-VCMUX modes.
Supports two xDSL protocol modes: Annex A and Annex M. (The
xDSL protocol mode is unconfigurable. The protocol mode
configured on the DSLAM applies.)
NOTE
The following groups of ADSL2+ ports are present on the board:
l Group 1: port 0 and port 1
l Group 2: port 2 and port 3
l Group 3: port 4 and port 5
l Group 4: port 6 and port 7
The AND1AVD8A board provides insufficient upstream bandwidth and forwards packets with a long
delay, which may affect voice services carried on it. Therefore, it is not recommended to use the
AND1AVD8A board to carry base station voice services.
Service Access
Module
Service signals
Service
processing
module
Management bus
Management bus
12V
.
.
.
1.2V
CXP
Management bus
Management
module
Service signals
CXP
Clock signals
Clock C
module
CXP
-48V/-60V
Power supply
module
-48V/-60V
PIU
PIU
Transmit Direction
The control board sends signals to the service processing module through the backplane-side
interfaces. When receiving the service signals, the service processing module encapsulates the
service packets in ETHOA mode, and then sends the packets to the service access module, where
Issue 01 (2013-10-31)
123
encoding and D/A conversion are performed. Finally, the signals are output through the
backplane-side interfaces.
Receive Direction
The service access module accesses ADSL2+ service signals through the backplane-side
interfaces. The service access module performs A/D conversion and decoding on the signals,
and then sends the signals to the service processing module. The service processing module
decapsulates the service packets in ETHOA mode, and then sends the processed packets to the
control board.
In the receive direction, this module accesses ADSL2+ service signals through the
backplane-side interfaces, performs amplification, filtering, A/D conversion, balancing,
decoding, and verification on the signals, and then sends the signals to the service
processing module.
In the transmit direction, this module receives the service signals from the service
processing module, performs framing, encoding, D/A conversion, filtering, amplification,
and line driving on the signals, and outputs the signals through the backplane-side
interfaces.
When the DSLTRUNK attribute of the interfaces on the board is Bundled Group, this
module implements the ADSL link bundling function.
This module extracts the NTR clock from the ADSL2+ service signals, and then sends the
clock to the clock module.
In the receive direction, this module receives signals from the service access module,
extracts ATM cells, and rearranges service packets. Then, this module works with the
control board to decapsulate the service packets in ETHOA mode. Finally, this module
outputs the high-rate service packets through the backplane-side interfaces.
In the transmit direction, this module receives the service packets accessed through the
backplane-side interfaces, performs AAL5 SAR on the service packets, and encapsulates
the service packets into ATM cells. In this manner, this module encapsulates the service
packets in ETHOA mode when working with the control board. Finally, this module outputs
the service packets to the service access module.
Management Module
When used with the system control board, this module manages and controls each module on
the AND1AVD8A.
Clock Module
This module performs the following functions:
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124
Receives the NTR clock from the service access module, and processes the clock when
used with the control board.
Max.
Transmission
Distance
ADSL2+
2.5 Mbit/s
24 Mbit/s
6.5 km
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.8 (W)(0.80 in.8.89 in.7.63 in.)
Weight (kg): 0.50(1.10 lb)
Power consumption at room temperature (W):19.6 W
Front Panel
Figure 5-35 shows the appearance of the front panel of the AND1AVD8B.
Figure 5-35 Front panel of the AND1AVD8B
Issue 01 (2013-10-31)
125
Indicators
The following indicators are present on the front panel of the AND1AVD8B.
l
STAT indicator, red, green, or orange, which indicates the working status
NOTE
There are eight LINK indicators, which are present above each service interface.
Interfaces
There are eight ADSL2+/VDSL2 interfaces on the front panel of the AND1AVD8B. Table
5-66 lists types and usage of these interfaces.
Table 5-66 Interfaces on the AND1AVD8B
Interface on the
Front Panel
Interface Type
Usage
Cable
DSL0-DSL7
RJ-45
Accesses VDSL2
service signals.
87654321
Issue 01 (2013-10-31)
Pin
Description
Unspecified
Unspecified
Unspecified
TIP
RING
Unspecified
Unspecified
Unspecified
126
Description
Basic function
Interface function
NOTE
The following groups of VDSL2 ports are present on the board:
l Group 1: port 0 and port 1
l Group 2: port 2 and port 3
l Group 3: port 4 and port 5
l Group 4: port 6 and port 7
Issue 01 (2013-10-31)
127
Figure 5-36 Block diagram for the working principle of the AND1AVD8B
Backplane
8 x VDSL2 signals
Service Access
Module
Service signals
Service
processing
module
Management bus
Service signals
CXP
Management bus
Management
module
Management bus
CXP
Clock signals
To each module on the AVD8B
12V
.
.
.
1.2V
Clock C
module
CXP
-48V/-60V
Power supply
module
-48V/-60V
PIU
PIU
Transmit Direction
The control board sends signals to the service processing module through the backplane-side
interfaces. When receiving the service signals, the service processing module encapsulates the
service packets, and then sends the packets to the service access module, where encoding and
D/A conversion are performed. Finally, the signals are output through the backplane-side
interfaces.
Receive Direction
The service access module accesses VDSL2 service signals through the backplane-side
interfaces. The service access module performs A/D conversion and decoding on the signals,
and then sends the signals to the service processing module. The service processing module
decapsulates the service packets, and then sends the processed packets to the control board.
In the receive direction, this module accesses VDSL2 service signals through the
backplane-side interfaces, performs amplification, filtering, A/D conversion, balancing,
decoding, and verification on the signals, and then sends the signals to the service
processing module.
In the transmit direction, this module receives the service signals from the service
processing module, performs framing, encoding, D/A conversion, filtering, amplification,
and line driving on the signals, and outputs the signals through the backplane-side
interfaces.
128
In the receive direction, this module receives signals from the service access module,
extracts PTM cells, and rearranges service packets. Then, this module works with the
control board to decapsulate the service packets. Finally, this module outputs the high-rate
service packets through the backplane-side interfaces.
In the transmit direction, this module receives the service packets accessed through the
backplane-side interfaces, and encapsulates the service packets into PTM cells. In this
manner, this module encapsulates the service packets when working with the control board.
Finally, this module outputs the service packets to the service access module.
Management Module
When used with the system control board, this module manages and controls each module on
the AND1AVD8B.
Clock Module
This module performs the following functions:
l
Receives the NTR clock from the service access module, and processes the clock when
used with the control board.
Max.
Transmission
Distance
VDSL2
50 Mbit/s
100 Mbit/s
3.5 km
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.8 (W)(0.80 in.8.89 in.7.63 in.)
Weight (kg): 0.50(1.10 lb)
Power consumption at room temperature (W):19.6 W
Issue 01 (2013-10-31)
129
Indicators
l
STAT indicator, red, green, or orange, which indicates the working status
Interfaces
Table 5-70 lists the types of the interfaces on the AND1SHD4 and their respective usage.
Table 5-70 Types and usage of the interfaces on the AND1SHD4
Interface
Interface
on the
Type
Front Panel
Usage
Corresponding
Cable
SHDSL0 SHDSL3
RJ-11
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130
6543 21
Pin No.
Usage
Unspecified
Unspecified
TIP
RING
Unspecified
Unspecified
Description
Basic function
Interface function
NOTE
The AND1SHD4 supports one binding group.
l When the AND1SHD4 is in ATM mode, interface binding needs to be manually configured.
l When the AND1SHD4 is in EFM mode, the ATN device automatically adapts to the interface binding
configuration on the DSLAM.
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131
Signal
voltage
and
performs
protection
module
4 x G.SHDSL
signals
Clock signals
Clock module
Service bus
Service
encapsulation
and bundling Management
bus
module
Logic
control
unit
Clock signals
Parallel/serial
converting
module
Service
bus
CXP
CXP
CXP
CXP
To each
module
1.2 V
1.5 V
3.3 V
Power supply
module
-48V/-60V
System power
supply
-48V/-60V
System power
supply
The service access module transforms the signal voltage and performs protection for the
access signals. Then, the service encapsulation and bundling module bundles four channels
of G.SHDSL signals, strips the ATM AAL5 adaptation layer, and finally outputs the service
signals.
The interface converting and control module sends the service to the service encapsulation
and bundling module, which then performs ATM AAL5 adaptation and encapsulation, and
finally outputs the G.SHDSL service.
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132
Clock Module
The clock module provides working clock for each module on the AND1SHD4.
Max.
Upstream
Rate
Max.
Downstream
Rate
Max. Four-Line
Bundling Rate
Max.
Transmission
Distance
G.SHDSL
5.7 Mbit/s
5.7 Mbit/s
23 Mbit/s
5.25 km
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)(0.80 in.8.89 in.7.63 in.)
Weight (kg): 0.60(1.32 lb)
Power consumption (W, room temperature): 7.4
133
Indicator
The following indicators are present on the front panel of the AND1SHD4I:
l
STAT indicator, red, green, or orange, which indicates the working status
LINK0, LINK1, LINK2 and LINK3 indicators, green, which indicate the port connection
status.
Interface
Table 5-74 lists the types of the interfaces on the AND1SHD4I and their respective usage.
Table 5-74 Types and usage of the interfaces on the AND1SHD4I
Interface on the
Front Panel
Interface
Type
Usage
Corresponding
Cable
SHDSL0SHDSL3
RJ-11
6 5 4 3 2 1
Issue 01 (2013-10-31)
Pin No.
Usage
Unspecified
Unspecified
TIP
RING
Unspecified
Unspecified
134
Description
Basic Function
Interface function
NOTE
The IMA binding group of the AND1SHD4I has a fixed number of member links, that is, 4. No manual
configuration is required.
The AND1SHD4I supports one IMA binding group, but two VE interfaces can be created for the active
and standby service trails to protect services.
Issue 01 (2013-10-31)
135
Figure 5-40 Block diagram for the working principle of the AND1SHD4I
Management and
control bus
IMA processing
module
4 x G.SHDSL signals
Service access
module
Backplane
Service signals
Interface
converting and
control module
Serial
management bus
Management
and control bus
CXP
CXP
CXP
To each module
on the SHD4I
3.3 V
1.8 V
1.5 V
1.2 V
Clock module
Power supply
module
Clock signals
CXP
-48 V/-60 V
System
power supply
-48 V/-60 V
System
power supply
In the receive direction, this module converts the serial packets to parallel packets, and
sends the parallel packets to the interface converting and control module.
In the transmit direction, this module receives the IMA service signals from the interface
converting and control module, converts the serial IMA service signals to parallel IMA
service signals, and finally sends the parallel IMA service signals to the G.SHDSL
interfaces.
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136
In addition, this module extracts the NTR clock signals from the G.SHDSL service signals
received and sends the clock signals to the clock module.
In the receive direction, this module receives the IMA service signals from the service
access module, converts the IMA service signals, and sends the service signals to the IMA
processing module, which multiplexes the service signals. Then, this module receives the
ATM cells from the IMA processing module, decapsulates the ATM frames, converts the
parallel signals to serial signals, converges the signals to one channel service signal, and
finally sends the service signal to the backplane.
In the transmit direction, this module receives the service signal from the backplane,
converts the serial signal to parallel signal, encapsulates the service signal into ATM
frames, and sends the ATM cells to the IMA processing module, which inversely
multiplexes the ATM signals. Then, this module receives IMA signals from the IMA
processing module and finally sends the IMA signals to the service access module.
In addition, this module works with the control board to manage and control each module
on the AND1SHD4I.
In the receive direction, this module receives the IMA service signals from the interface
converting and control module, multiplexes the service signals as ATM signals, and finally
sends the ATM signals to the interface converting and control module, which converges
the signals.
In the transmit direction, this module receives the service signals from the backplane after
the interface converting and control module processes the service signals. Then, this module
inversely multiplexes the ATM signals and sends the IMA service signals to the interface
converting and control module.
Clock Module
This module performs the following functions:
l
Selects a clock source from the four channels of NTR clock signals and uploads the clock
signals to the control board.
Provides working clock signals for each module on the SHD4I board.
3.3 V
1.8 V
1.5 V
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1.2 V
Max.
Upstream Rate
(Mbit/s)
Max.
Downstream
Rate (Mbit/s)
Max. Rate of
Four Bundled
Interfaces
(Mbit/s)
Max.
Transmission
Distance (km)
G.SHDSL
2.3
2.3
9.2
5.25
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.82 (W)(0.80 in.8.89 in.7.63 in.)
Board weight (kg): 0.60(1.32 lb)
Power consumption (W, room temperature): 7.5
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Indicators
The following indicator is present on the front panel of the PIU.
PWRA/PWRB, green, which indicates the power supply status. When PWRA/PWRB is on and
green, it indicates that power is accessed.
For details on indications of indicators, see 12.1 Indicators.
Interfaces
The PIU accesses two power supplies. Table 5-78 lists the types of the interfaces on the PIU
and their respective usage. For cable corresponding to the interfaces, see 10.1 Power Supply
Cables and Ground Cables.
Table 5-78 Types and usage of the interfaces on the PIU
Interface on the Front Panel
Usage
NEG1(-)
RTN1(+)
NEG2(-)
RTN2(+)
Label
Operation warning label: indicates the following precautions , which should be taken for removal
or insertion of the PIU board.
NOTICE
Multiple power supplies are accessed for the equipment. When powering off the equipment,
make sure that these power supplies are disabled.
Do not remove or insert the board with power on.
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Description
Power access
Power protection
The PIU protects the power supply against overcurrent and short
circuit. In this way, the overcurrent is prevented from shocking
board and components on it.
Surge protection
Power backup
-48 V/-60 V
Backplane
Each board
Each board
Inter-board
communication bus
CXP
Board in-position
signals
CXP
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140
Technical Specification
Weight (kg)
0.12
0.5
-38.4 to -72.0
Indicators
The following indicators are present on the front panel of the FAN:
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Handle
The handle is used for pushing the FAN into or pulling the FAN out of the chassis during board
replacement.
Label
The following labels are present on the front panel of the FAN:
l
Fan warning label, which says that do not touch the fan leaves before the fan stops rotating.
Provides start-delay for the power supply of the fans and protects fans against overcurrent.
Intelligently adjusts the rotating speed of fans to ensure proper heat dissipation of the
system.
Reports information about the fan rotating speed, environment temperature, alarms, version
number, and board in-position information.
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Figure 5-44 Block diagram for the working principle of the ANC1FAN
Fans x 3
12 V
Backplane
12 V
12 V
CXP
Fan-speed
reporting module
PWM signals
12V
Start-delay module
Inter-board
communication bus
CXP
Fan-speed signals
CXP
PWM driver
module
Intelligent fan speed
adjustment module
Board in-position
module
CXP
Fan in-position
signals
CXP
Start-delay Module
This module has the function of provides start-delay to the power supply for fans and protects
fans against overcurrent.
143
Technical Specification
Weight (kg)
0.20
12 V DC power
Appearance
Figure 5-45 shows the appearance of a filler panel.
Figure 5-45 Appearance of a filler panel
Valid Slots
A filler panel can be housed in any of slots 3-4 of a chassis.
Performs electromagnetic shielding and ensures that the chassis meets the requirement of
electromagnetic radiation.
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ATN 910I has integrated with boards that are not swappable.
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ATN 910B has integrated with boards that are not swappable.
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working with the AND1CXPA/AND1CXPB) and in any of slots 1 to 6 (when working with the
AND2CXPA/AND2CXPB/AND2CXPE).
8.8 AND1EM4C: 4 Channels GE/FE Combo Board
The AND1EM4C (EM4C for short) board is a 4 x FE/GE Combo board and its functional version
is AND1. The AND1EM4C is housed in any of slots 1 to 4 (when working with the AND1CXPA/
AND1CXPB) and in any of slots 1 to 6 (when working with the AND2CXPA/AND2CXPB/
AND2CXPE).
8.9 AND1EM8F - 8 Channels GE/FE Optical Interface Board
The AND1EM8F (EM8F for short) is an eight channels FE/GE optical interface board. The
function version of the EM8F is AND1. The AND1EM8F is housed in any of slots 1 to 2.
8.10 AND1EX1 - 1 Channel 10 GE Optical Interface Board
The AND1EX1 (EX1 for short) is a one channel 10 GE optical interface board. The function
version of the EX1 is AND1. The AND1EX1 is housed in any of slots 5 to 6 (when working
with the AND1CXPA), in any of slots 3 to 6 (when working with the AND1CXPB), and in any
of slots 1 to 6 (when working with the AND2CXPA/AND2CXPB/AND2CXPE).
8.11 AND2CQ1B - 4 Channels Channelized OC-3c/STM-1c POS Optical Interface Board
This section describes the AND2CQ1B, a 4 channels channelized OC-3c/STM-1c POS optical
interface board, in terms of the overview, functions, features, working principle, front panel, and
technical specifications.
8.12 AND2PQ1: 4 Channels OC-3/STM-1 POS Optical Interface Board
The AND2PQ1 (PQ1 for short) board is a 4 x OC-3/STM-1 POS optical interface board and its
functional version is AND2. It is configured in any of slots 1 to 6 in a chassis.
8.13 AND1ML1/AND1ML1A - 16 Channels E1 Electrical Interface Board
The functional version of the AND1ML1/AND1ML1A is AND1..
8.14 AND3ML1A/AND3ML1B - 16 Channels E1 Interface Board
The AND3ML1A/AND3ML1B (ML1A/ML1B for short) is a 16 channels E1 interface board.
The function version of the ML1A/ML1B is AND3. The AND3ML1A/AND3ML1B is housed
in slots 1 to 6.
8.15 AND2MD1A/AND2MD1B - 32 Channels E1 Interface Board
The AND2MD1A/AND2MD1B (MD1A/MD1B for short) is a 32 channels E1 interface board.
The function version of the MD1A/MD1B is AND2. The AND2MD1A/AND2MD1B is housed
in slots 1 to 6.
8.16 TND1PIU - Power Interface Board
The TND1PIU (PIU for short) is a power interface board. The function version of the PIU is
TND1. The PIU is housed in slot 9 or slot 10.
8.17 AND1FAN - Fan Board
The AND1FAN (FAN for short) is an FAN board. The function version of the FAN is AND1.
The FAN is housed in slot 11.
8.18 Filler Panel
A filler panel is used to cover any vacant slot in a chassis.
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Board Structure
Figure 8-1 shows the structure of a board (using the AND1EM4F board as an example).
Figure 8-1 Board structure
PCB
The PCB houses various functional chips of the board and is the most important part of the
board. Through the front panel, the PCB provides indicators, buttons, and ports.
NOTE
Different boards provide different indicators, buttons, and ports; not all boards support a daughter
board. For details, see the description of each board.
Front panel, including the captive screws, ejector levers, indicators, buttons, and interfaces.
Captive screws: secure the board in the subrack.
Ejector levers: used for inserting or removing the board. Bar codes are also attached on
the ejector levers.
NOTE
The ejector lever on the left side of the front panel of a board is attached with a label marking the bar code
of the board (for a control board, the bar code label is above the ejector level on the front panel). The bar
code of a control board will be retrieved by ATN 950B as the equipment serial number (ESN).
The ESN is used for applying for a license. ATN 950B automatically reads the bar code of the backplane
or control board as the device ESN. Generally, the bar code of the backplane takes precedence over that
of the control board.
Board Naming
NOTE
The preceding only describes how to roughly identify a board. For details on board specifications, see board
descriptions.
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A board name mainly consists of the board functional version and short name. A short name can
roughly identify a board. The short name of a control board, power board, and fan board is CXPx,
PIU, and FAN respectively. The following mainly describes how to quickly identify a physical
interface board through the short name of a board.
As shown in Figure 8-2, the short name of a board consists of an abbreviated board name and
an extended name. An abbreviated board name includes the board type, interface quantity, and
interface rate. When boards have the same abbreviated board name, they can be differentiated
using extended names. An extended name does not have special meanings and can be omitted.
Figure 8-2 Board short name (using ML1A as an example)
ML1A
Extended name
Interface rate
Interface quantity
Board type
Board type M indicates an E-carrier interface board. The interface quantity is represented
using L or D, indicating 16 or 32 respectively. The interface rate is represented using 1,
indicating E1.
Board type C indicates a CPOS interface board. The interface quantity is represented using
Q, indicating 4. The interface rate is represented using 1, indicating STM-1.
Board type P indicates a POS interface board. The interface quantity is represented using
Q, indicating 4. The interface rate is represented using 1, indicating STM-1.
Board type E indicates an Ethernet interface board. The interface quality is represented
using an Arabic numeral. The interface rate is represented using M or X, indicating FE/GE
or 10GE respectively. Extended name F or T is used to indicate an optical interface or
electrical interface respectively.
NOTE
For the name of an Ethernet interface board, the interface rate and quantity rate are in an order opposite
to those for the names of other boards. For example, in EM4F (a name of an Ethernet interface board),
interface rate M comes before interface quantity 4.
Board Relationship
A control board mainly implements system control and service grooming, and receives and
processes various services by working with physical interface boards. A power board provides
power inputs for the system. A fan board blows air to dissipate heat generated during system
operation. Figure 8-3 shows the board relationship.
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User side
Control and
management module
Network side
Clock module
FE/GE
FE/GE
10GE
E1
E1
CPOS
STM-1
POS
STM-1
EM4F/EM4T
EM4F/EM4T
FE/GE
EM8F/EM8T
EM8F/EM8T
FE/GE
EX1
EX1
Service
processing and
switching module
10GE
ML1/ML1A/ML1B
E1
MD1A/MD1B
E1
CQ1B
CQ1B
CPOS
STM-1
PQ1
PQ1
POS
STM-1
ML1/ML1A/ML1B
MD1A/MD1B
Control board
CXPA/CXPB/CXPE
Fan board
FAN
ATN 950B is equipped with active and standby control boards, which form a hot backup. A dual
feeding and selective receiving mechanism is used for service interaction between physical
interface boards and the two control boards.
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Board Description
Supported Version
AND1CXPA
V200R001C02
AND2CXPA
V200R003C00
AND1CXPB
V200R001C02
AND2CXPB
V200R003C00
AND2CXPE
V200R003C00
Board Description
Supported Version
AND1EM4T
V200R001C02
AND1EM8T
V200R001C02
AND1EM4F
V200R001C02
AND1EM8F
V200R001C02
AND2EM4C
V200R003C10
AND1EX1
V200R001C02
Table 8-3 E1 service interface boards Supported by the ATN 950B and Valid Slots
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Board Name
Board Description
Supported Version
AND1ML1
V200R001C02
AND1ML1A
V200R001C02
AND3ML1A
V200R001C02
AND3ML1B
V200R001C02
153
Board Name
Board Description
Supported Version
AND2MD1A
V200R001C02
AND2MD1B
V200R001C02
Table 8-4 STM-1 service interface boards supported by the ATN 950B
Board Name
Board Description
Supported Version
AND2CQ1B
V200R002C00
AND2PQ1
V200R002C01
Power Board
Power boards lead in power for supplying power to the device. For details about power
distribution, see Power Distribution.
Table 8-5 Power boards supported by the ATN 950B
Board Name
Board Description
Supported Version
TND1PIU
V200R001C02
Board Description
Supported Version
AND1FAN
Fan board
V200R001C02
154
The Ethernet service interface board supports Layer 2 services, Layer 3 services, and hybrid
transmission of Layer 2 and Layer 3 services. (When the main interface is in Layer 2 mode,
configure the sub-interface to transmit Layer 2/Layer 3 services.)
Table 8-7 shows the Ethernet service interface boards supported by the ATN 950B and the
differences between the boards.
Table 8-7 Ethernet service interface boards
Board
Interface Description
AND1EM4T
AND1EM8T
AND1EM4F
AND1EM8F
AND1EX1
1 x 10 GE XFP interface
NOTE
Ethernet service interface boards have similar service functions, but differ in the interface quantity and
interface type.
l FE/GE electrical interfaces support signals at 10 Mbit/s, 100 Mbit/s and 1000 Mbit/s.
l FE/GE SFP interfaces support GE optical modules, GE electrical modules, FE optical modules, and
FE electrical modules.
l 10GE XFP interfaces support 10GE optical modules.
ATM
Figure 8-4 shows the application of the E1 service interface board using the ATM protocol.
Figure 8-4 Application of the E1 service interface board using the ATM protocol
An ATN device uses the E1 service interface board on the user side to support ATM over E1.
When the ATM service access rate is between E1 and E3, multiple E1 links are bound into an
IMA group to increase service bandwidth. On the network side, the E1 service interface board
implements ATM service emulation and transparently transmits the ATM services over the
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packet switched network (PSN), such as MPLS or Ethernet. For detailed information, see the
chapter "ATM IMA application" in the Feature Description.
PPP
Figure 8-5 shows the application of the E1 service interface board using the PPP protocol.
Figure 8-5 Application of the E1 service interface board using the PPP protocol (user side)
The ATN device uses the E1 service interface board to support IP services carried over MLPPPs on user side.
NOTE
An independent PPP link cannot carry service. PPP links must be added to an ML-PPP group to carry
services.
An ML-PPP does not support MPLS services.
TDM
Figure 8-6 shows the application of the E1 service interface board using the TDM protocol.
Figure 8-6 Application of the E1 service interface board using the TDM protocol
The ATN device uses the E1 service interface board to access the TDM service, encapsulate the
service signals into packets, and transparently transmit the packets through PWs over the PSN
network. This achieves CES service emulation. For detailed information, see the chapter "CES
application" in the Feature Description.
156
AND1ML1
AND2ML1A
AND1MD1A
AND1ML1A
AND2ML1B
AND1MD1B
Interface type
E1
E1
E1
Number of
interfaces
16
16
32
Interface
impedance
AND1ML1: 75 ohm
AND2ML1A: 75 ohm
AND1MD1A: 75 ohm
Interface clock
mode
Link-layer
protocols
Minimum
number of
timeslots in CE1
mode
Node B
MSTP
POS/CPOS STM-1
Board
CXP
ATN
PIC
CX600
RNC
Node B
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157
Figure 8-8 Application of the STM-1 service interface board (network side)
PIC
Node B
CXP
ATN
STM-1
Board
POS/CPOS
CX600
CX600
RNC
The AND2CQ1B on the ATN 950B is used as the STM-1 service interface board, which provides
four CPOS interfaces. Each CPOS interface supports 63 E1 channels. The supported services
are almost the same as those of the E1 service interface board.
On ATN 950B, AND2PQ1 and AND2CQ1B are the interface boards that support STM-1
services. The AND2PQ1 board provides 4 POS interfaces. It uses the SONET as the physicallayer protocol and PPP to control links at the data link layer. The AND2PQ1 board runs IP
services at the network layer. The AND2CQ1B board provides 4 CPOS interfaces. The CPOS
physical ports are no longer used as service ports, but the channelized 63 E1 channels are used
as synchronization serial ports that support the same services as an E1 service interface board.
l
The AND2PQ1 board can be used on the user or network side. It carries IP services over
POS interfaces.
The AND2CQ1B board can be used on the user or network side. It supports ML-PPP and
carries IP services over E1 channels on CPOS interfaces.
The AND2CQ1B board on the user side can access and converge ATM and TDM services
over E1 channels on CPOS interfaces. It implements service emulation and transparent
transmission over a packet switched network, achieving ATM PWE3 and TDM PWE3
(CES) services.
NOTE
Services supported by the E1 channel on the CPOS interface are basically the same as those provided by
the E1 service interface board. The differences are listed as follows:
l The E1 channel of the AND2CQ1B supports IP and MPLS services carried over ML-PPPs; the E1
service interface board only supports IP services.
l The E1 channel of the AND2CQ1B does not support fractional E1; the E1 service interface board
supports fractional E1 when the TDM protocol is used.
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Cross-Connect Capacity
1588 ACR
AND1CXPA
44 Gbit/s
Supported
AND1CXPB
56 Gbit/s
Supported
Indicator
The following indicators are present on the front panel of the AND1CXPA/AND1CXPB:
l
STAT indicator, red, green, or orange, which indicates the working status
PROG indicator, red or green, which indicates the running status of the program
SYNC indicator, red or green, which indicates the clock synchronization status
ACTX indicator, green, which indicates the cross-connection or clock active/standby status
ACTC indicator, green, which indicates the active/standby system control board
Button
The following buttons are present on the front panel of the AND1CXPA/AND1CXPB:
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RRST button, which is used for reset on the board. When you press the RST button and
then release it, the board is reset.
LAMP button, which is used to test the indicators. When you press the LAMP button, all
the board indicators on the NE are on.
Interface
Table 8-10 lists the types and usage of the interfaces on the AND1CXPA/AND1CXPB.
Table 8-10 Types and usage of the interfaces on the AND1CXPA/AND1CXPB
Interface
on the
Front
Panel
Interface
Type
Usage
Pin
Correspondi
ng Cable
ETH/
OAM
RJ45
10M/100M auto-sensing
Ethernet NM interface or
Console interface
Refer to Table
8-11.
Refer to 10.2
Management
Cables.
CLK
RJ45
Refer to Table
8-12.
Refer to 10.4
Clock Cables.
TOD
RJ45
Refer to Table
8-13.
Refer to 10.4
Clock Cables.
ALMI/O
RJ45
Refer to Table
8-14.
87654321
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Pin
Usage
Unspecified
160
Front View
Pin
Usage
87654321
Pin
Usage
Unspecified
Unspecified
Unspecified
Unspecified
Pin
87654321
(1PPS + Time
Information)
(1PPS + Time
Information)
Unspecified
Unspecified
Unspecified
Unspecified
(RS422 level)
(RS422 level)
Grounding end
Grounding end
Grounding end
Grounding end
(RS422 level)
(RS422 level)
(RS422 level)
(RS422 level)
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Working Mode
161
Front View
Pin
Working Mode
External Time Input
(1PPS + Time
Information)
(1PPS + Time
Information)
(RS422 level)
(RS422 level)
NOTE
The TOD interfaces can be configured so that they can work in one of the preceding two working modes.
87654321
Pin
Usage
Grounding end
Grounding end
Grounding end
Description
Basic funtion
Cross-connect capacity
AND1CXPA: 44 Gbit/s
AND1CXPB: 56 Gbit/s
162
Description
Supports the board-level 1+1 backup function.
Tact switches
Provides two tact switches. When you rotate the ejector levers
to remove the board, the two tact switches are triggered to
start the active/standby protection switching.
NOTE
When you rotate only one ejector lever, the protection switching is not triggered. The protection switching
is triggered only when you rotate the two ejector levers.
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NM
communication
Auxiliary
interface
module
NM
serial interface
Alarm input/output
interface
System control
module
Active/standby board
communication bus
CPU control
unit
Management
bus
Clock
signals
Time
signals
Clock
processing
module
Logic control
unit
Time signals
Serial
management bus
Clock signals
PICs
Management
bus
Service signals
Under-voltage/overvoltage detection bus
Power supply
module
Service
communication bus
PICs
The other CXP
-48V/-60V
System
power supply
-48V/-60V
System
power supply
12V
3.3V
FAN
Interface cards
Supports automatic switching and manual switching of the active and standby boards.
The CPU control unit works with the logic control unit to detects alarms and hardware
faults, control boards, process overhead, and manage the equipment.
The logic control unit provides interfaces through which the CPU control unit connects to
other chips on the board. The logic control unit specifies the working states of chips,
initializes chips, and operates the register. In addition, the logic control unit achieves log
control on active/standby switching, monitors the working state of the board, and detects
the states of other boards.
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Provides working clock signals for the key chips on the AND1CXPA/AND1CXPB.
Supports the physical-layer clock synchronization, and provides system clock signals for
each boards.
Provides one time input/output interface and one time input/output interface.
Detects and reports overvoltage and undervoltage of two input power supplies.
Supplies 3.3 V working power for the local board and the PIC boards in a centralized
manner.
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165
ON DIP
1 2 3 4
CF Card
DIP Switch
CF Card
The size of the CF card on AND1CXPA/AND1CXPB is 512 MB. The CF card is used to backup
data and load packages.
DIP Switch
You can use the DIP switches to delete the configuration file loaded on the device.
Set DIP switches on AND1CXPA/AND1CXPB to 1, 1, 0, and 1. During startup, the device
deletes the loaded configuration file based on the DIF switch status.
NOTICE
l This operation should be executed with caution. Use it under the guidance of technical
personnel.
l After the configuration file is deleted, reset the DIF switches to 0, 0, 0, and 0. In this way,
you do not need to delete the configuration file at each startup.
l The numeral indicates 1, and the letter indicates 0.
l The device password is deleted when the configuration file is deleted.
166
Cross-Connect Capacity
1588 ACR
AND2CXPA
44 Gbit/s
Not supported
AND2CXPB
56 Gbit/s
Not supported
AND2CXPE
56 Gbit/s
Supported
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167
Indicator
The following indicators are present on the front panel of the AND2CXPA/AND2CXPB/
AND2CXPE:
l
STAT indicator, red, green, or orange, which indicates the working status
PROG indicator, red or green, which indicates the running status of the program
SYNC indicator, red or green, which indicates the clock synchronization status
ACTX indicator, green, which indicates the cross-connection or clock active/standby status
ACTC indicator, green, which indicates the active/standby system control board
Button
The following buttons are present on the front panel of the AND2CXPA/AND2CXPB/
AND2CXPE:
l
RRST button, which is used for reset on the board. When you press the RST button and
then release it, the board is reset.
LAMP button, which is used to test the indicators. When you press the LAMP button, all
the board indicators on the NE are on.
Interface
Table 8-17 lists the types and usage of the interfaces on the AND2CXPA/AND2CXPB/
AND2CXPE.
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168
Interface
Type
Usage
Pin
Correspondi
ng Cable
ETH/
OAM
RJ45
10M/100M auto-sensing
Ethernet NM interface or
Console interface
Refer to Table
8-18.
Refer to 10.2
Management
Cables.
CLK
RJ45
Refer to Table
8-19.
Refer to 10.4
Clock Cables.
TOD
RJ45
Refer to Table
8-20.
Refer to 10.4
Clock Cables.
ALMI/O
RJ45
Refer to Table
8-21.
87654321
Pin
Usage
Unspecified
87654321
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Pin
Usage
Unspecified
169
Front View
Pin
Usage
Unspecified
Unspecified
Unspecified
Pin
87654321
Working Mode
External Time Input
(1PPS + Time
Information)
(1PPS + Time
Information)
Unspecified
Unspecified
Unspecified
Unspecified
(RS422 level)
(RS422 level)
Grounding end
Grounding end
Grounding end
Grounding end
(RS422 level)
(RS422 level)
(RS422 level)
(RS422 level)
(RS422 level)
(RS422 level)
NOTE
The TOD interfaces can be configured so that they can work in one of the preceding two working modes.
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87654321
Pin
Usage
Grounding end
Grounding end
Grounding end
Description
Basic function
Cross-connect capacity
AND1CXPA: 44 Gbit/s
AND1CXPB: 56 Gbit/s
AND1CXPE: 56 Gbit/s
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171
Description
Tact switches
Provides two tact switches. When you rotate the ejector levers
to remove the board, the two tact switches are triggered to
start the active/standby protection switching.
NOTE
When you rotate only one ejector lever, the protection switching is not triggered. The protection switching
is triggered only when you rotate the two ejector levers.
NM
communication
Auxiliary
interface
module
NM
serial interface
Alarm input/output
interface
System control
module
Active/standby board
communication bus
CPU control
unit
Management
bus
Clock
signals
Time
signals
Clock
processing
module
Time signals
Logic control
unit
Serial
management bus
Clock signals
PICs
Management
bus
Service signals
Under-voltage/overvoltage detection bus
Power supply
module
Service
communication bus
-48V/-60V
System
power supply
-48V/-60V
System
power supply
12V
3.3V
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PICs
FAN
Interface cards
172
Supports automatic switching and manual switching of the active and standby boards.
The CPU control unit works with the logic control unit to detects alarms and hardware
faults, control boards, process overhead, and manage the equipment.
The logic control unit provides interfaces through which the CPU control unit connects to
other chips on the board. The logic control unit specifies the working states of chips,
initializes chips, and operates the register. In addition, the logic control unit achieves log
control on active/standby switching, monitors the working state of the board, and detects
the states of other boards.
Provides working clock signals for the key chips on the AND2CXPA/AND2CXPB/
AND2CXPE.
Supports the physical-layer clock synchronization, and provides system clock signals for
each boards.
Provides one time input/output interface and one time input/output interface.
Detects and reports overvoltage and undervoltage of two input power supplies.
Supplies 3.3 V working power for the local board and the PIC boards in a centralized
manner.
Issue 01 (2013-10-31)
173
1 2 3 4
ON DIP
You can use the DIP switches to delete the configuration file loaded on the device.
Set DIP switches on AND2CXPA/AND2CXPB/AND2CXPE to 1, 1, 0, and 1. During startup,
the device deletes the loaded configuration file based on the DIF switch status.
NOTICE
l This operation should be executed with caution. Use it under the guidance of technical
personnel.
l After the configuration file is deleted, reset the DIF switches to 0, 0, 0, and 0. In this way,
you do not need to delete the configuration file at each startup.
l The numeral indicates 1, and the letter indicates 0.
l The device password is deleted when the configuration file is deleted.
174
Indicator
The following indicators are present on the front panel of the AND1EM4T:
l
STAT indicator, red, green, or orange, which indicates the working status
LINK indicator, green, which indicates the connection status of the port
ACT indicator, yellow, which indicates the data transceiving status of the port
NOTE
Above each service interface, there is a service port connection status indicator (LINK) and a service port
transmit/receive status indicator (ACT).
Interface
Table 8-23 lists the types and usage of the interfaces on the AND1EM4T.
Issue 01 (2013-10-31)
175
Interfac
e Type
Usage
Pin
Corresponding
Cable
FE/GE0
to FE/
GE3
RJ45
FE/GE auto-sensing
electrical interface
Refer to 10.5.1
Ethernet Cables.
87654321
Pin
Usage
Description
Basic function
Interface function
Issue 01 (2013-10-31)
176
Function and
Feature
Description
Supports the traffic control function.
Supports Layer 2 and Layer 3 working modes.
Clock
NOTE
When using an electrical interface at 10 Mbit/s, the interface does not support synchronous Ethernet clock
or IEEE 1588v2.
Back plane
Service access
module
Management bus
Service signals
Service
processing
module
Management bus
Management
module
Service signals
CXP
Clock signals
Clock
module
Clock signals
Management bus
3.3V
3.0V
2.5V
1.2V
CXP
CXP
Power
supply
module
-48V/-60V
System power
supply
-48V/-60V
System power
supply
Transmit Direction
The service packets from AND1CXPA/AND1CXPB are sent to the service processing module
through the backplane-side interface of the AND1EM4T. The service processing module
identifies the destination interfaces for the packets, and buffers and schedules the packets. Then,
the service processing module sends the processed packets to the service access module, where
coding/decoding and serial/parallel conversion are performed. Finally, the service access module
outputs the packets through the GE/FE interfaces on the front panel.
Issue 01 (2013-10-31)
177
Receive Direction
The GE/FE interfaces on the front panel receive GE/FE service signals. Then, the service access
module performs serial/parallel conversion and coding/decoding on the services, and then sends
the services to the service processing module. The service processing module buffers the service
packets, schedules the packets, and finally outputs the packets through the backplane-side
interface.
In the receive direction, this module receives the GE/FE services from the interfaces on the
front panel, performs serial/parallel conversion and coding/decoding, and then sends the
services to the service processing module.
In the transmit direction, this module receives the service packets from the service
processing module, performs coding/decoding, and serial/parallel conversion on the
packets, and then outputs the packets through the GE/FE interfaces on the front panel.
In the receive direction, this module receives and buffers the service packets from the
interface conversion module. Then, this module schedules packets from different
interfaces. Finally, this module outputs the packets through the backplane-side interface.
In the transmit direction, this module receives service packets from the AND1CXPA/
AND1CXPB, identifies the destination interfaces of the packets, and buffers and schedules
the packets based on the access capability of the EM4T and the access bandwidth setting
at each interface. Finally, this module outputs the packets to the service access module.
Management Module
This module is used with the CXP to manage and control each module on the EM4T.
Clock Module
This module performs the following functions:
l
3.3 V
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
178
3.0 V
2.5 V
1.2 V
Interface Specifications
Table 8-26 lists the specifications of the electrical interfaces on the AND1EM4T board.
Table 8-26 Specifications of the FE/GE electrical interface
Item
Specification Requirement
Interface rate
Physical Specifications
Board dimensions (mm): 22.86 (H) x 225.75 (D) x 193.80 (W)
Weight (kg): 0.44
Power consumption (W, room temperature): 10.4
Issue 01 (2013-10-31)
179
Indicator
The following indicators are present on the front panel of the AND1EM8T:
l
STAT indicator, red, green, or orange, which indicates the working status
LINK indicator, green, which indicates the connection status of the port
ACT indicator, yellow, which indicates the data transceiving status of the port
NOTE
Above each service interface, there is a service port connection status indicator (LINK) and a service port
transmit/receive status indicator (ACT).
Interface
Table 8-27 lists the types and usage of the interfaces on the AND1EM8T.
Table 8-27 Types and usage of the interfaces on the AND1EM8T
Interfac
e on the
Front
Panel
Interfac
e Type
Usage
Pin
Corresponding
Cable
FE/GE0
to FE/
GE7
RJ45
FE/GE auto-sensing
electrical interface
Refer to 10.5.1
Ethernet Cables.
87654321
Issue 01 (2013-10-31)
Pin
Usage
180
Description
Basic function
Interface function
Clock
NOTE
When using an electrical interface at 10 Mbit/s, the interface does not support synchronous Ethernet clock
or IEEE 1588v2.
Issue 01 (2013-10-31)
181
Back plane
Service access
module
Management bus
Service signals
Service
processing
module
Management bus
Management
module
Service signals
CXP
Clock signals
Clock
module
Clock signals
Management bus
3.3V
3.0V
2.5V
1.8V
1.2V
CXP
CXP
Power
supply
module
-48V/-60V
System power
supply
-48V/-60V
System power
supply
Transmit Direction
The service packets from AND1CXPA/AND1CXPB are sent to the service processing module
through the backplane-side interface of the AND1EM8T. The service processing module
identifies the destination interfaces for the packets, and buffers and schedules the packets. Then,
the service processing module sends the processed packets to the service access module, where
coding/decoding and serial/parallel conversion are performed. Finally, the service access module
outputs the packets through the GE/FE interfaces on the front panel.
Receive Direction
The GE/FE interfaces on the front panel receive GE/FE service signals. Then, the service access
module performs serial/parallel conversion and coding/decoding on the services, and then sends
the services to the service processing module. The service processing module buffers the service
packets, schedules the packets, and finally outputs the packets through the backplane-side
interface.
In the receive direction, this module receives the GE/FE services from the interfaces on the
front panel, performs serial/parallel conversion and coding/decoding, and then sends the
services to the service processing module.
In the transmit direction, this module receives the service packets from the service
processing module, performs coding/decoding, and serial/parallel conversion on the
packets, and then outputs the packets through the GE/FE interfaces on the front panel.
182
In the receive direction, this module receives and buffers the service packets from the
interface conversion module. Then, this module schedules packets from different
interfaces. Finally, this module outputs the packets through the backplane-side interface.
In the transmit direction, this module receives service packets from the AND1CXPA/
AND1CXPB, identifies the destination interfaces of the packets, and buffers and schedules
the packets based on the access capability of the EM8T and the access bandwidth setting
at each interface. Finally, this module outputs the packets to the service access module.
Management Module
This module is used with the CXP to manage and control each module on the EM8T.
Clock Module
This module performs the following functions:
l
3.3 V
3.0 V
2.5 V
1.8 V
1.2 V
Interface Specifications
Table 8-30 lists the specifications of the electrical interfaces on the AND1EM8T board.
Table 8-30 Specifications of the FE/GE electrical interface
Issue 01 (2013-10-31)
Item
Specification Requirement
Interface rate
183
Physical Specifications
Board dimensions (mm): 22.86 (H) x 225.75 (D) x 193.80 (W)
Weight (kg): 0.46
Power consumption (W, room temperature): 21.1
Indicator
The following indicators are present on the front panel of the AND1EM4F:
l
STAT indicator, red, green, or orange, which indicates the working status
L/A0 to L/A3 indicators, green or orange, which indicate the port connection status and
data transmit/receive status
Interface
Four SFP interfaces are present on the EM4F. Table 8-31 lists the types and usage of the
interfaces on the EM4F.
Issue 01 (2013-10-31)
184
Interface
Type
Usage
Correspo
nding
Fiber
Optical
module
LC
Refer to
10.6
Optical
Fibers.
IN0 to IN3
LC
Electrical
module
OUT0 IN0,
OUT3 IN3
RJ-45
For details,
see 10.5.1
Ethernet
Cables.
NOTE
The GE SFP interface on the front panel can function as either an optical interface or an electrical interface.
When the SFP interface functions as an optical interface, it needs to be used with an optical module; when
the SFP interface functions as an electrical interface, it needs to be used with an electrical module.
Description
Basic function
Issue 01 (2013-10-31)
185
Basic function
Description
Interface function
Clock
NOTE
If the SFP interface houses an electrical module, the interface does not support synchronous Ethernet or
IEEE 1588v2.
Back plane
Service access
module
Management bus
Service signals
Service
processing
module
Management bus
Management
module
Service signals
CXP
Clock signals
Clock
module
Clock signals
Management bus
3.3V
3.0V
2.5V
1.2V
CXP
CXP
Power
supply
module
-48V/-60V
System power
supply
-48V/-60V
System power
supply
Transmit Direction
The service packets from AND1CXPA/AND1CXPB are sent to the service processing module
through the backplane-side interface of the EM4F. The service processing module identifies the
destination interfaces for the packets, and buffers and schedules the packets. Then, the service
processing module sends the processed packets to the service access module, where coding/
Issue 01 (2013-10-31)
186
decoding, serial/parallel conversion, and E/O conversion are performed. Finally, the service
access module outputs the packets through the GE/FE interfaces on the front panel.
Receive Direction
The GE/FE interfaces on the front panel receive GE/FE service signals. Then, the service access
module performs O/E conversion, serial/parallel conversion, and coding/decoding on the
services, and then sends the services to the service processing module. The service processing
module buffers the service packets, schedules the packets, and finally outputs the packets through
the backplane-side interface.
In the receive direction, this module receives the GE/FE services from the interfaces on the
front panel, performs O/E conversion, serial/parallel conversion, and coding/decoding, and
then sends the services to the service processing module.
In the transmit direction, this module receives the service packets from the service
processing module, performs coding/decoding, serial/parallel conversion, and E/O
conversion on the packets, and then outputs the packets through the GE/FE interfaces on
the front panel.
In the receive direction, this module receives and buffers the service packets from the
service access module. Then, this module schedules packets from different interfaces.
Finally, this module outputs the packets through the backplane-side interface.
In the transmit direction, this module receives service packets from the AND1CXPA/
AND1CXPB, identifies the destination interfaces of the packets, and buffers and schedules
the packets. Finally, this module outputs the packets to the service access module.
Management Module
This module is used with the AND1CXPA/AND1CXPB to manage and control each module on
the EM4F.
Clock Module
This module performs the following functions:
l
Issue 01 (2013-10-31)
187
3.3 V
3.0 V
2.5 V
1.2 V
Remarks
S4015755
S4015715
Two-fiber
bidirectional
34060282
34060363
34060364
Commercial
Single-fiber
bidirectional
Commercial
Issue 01 (2013-10-31)
Code
Remarks
34060286
34060473
Two-fiber
bidirectional
S4016954
34060360
34060483
34060481
34060479
34060482
Commercial
Two-fiber
bidirectional
CWDM
Commercial
188
Code
34060478
34060476
34060477
34060480
34060475
34060470
34060539
34060540
34060595
34060596
Remarks
Single-fiber
bidirectional
Commercial
34100101
34100080
34100052
Physical Specifications
Board dimensions (mm): 22.86 (H) x 225.75 (D) x 193.80 (W)
Weight (kg): 0.44
Power consumption (W, room temperature): 12.0
189
Appearance
Figure 8-24 shows the appearance of the front panel of the EM4C board.
Figure 8-24 Front panel of the EM4C board
Indicators
The following indicators are present on the front panel of the EM4C board:
l
STAT indicator, red, green, or orange, which indicates the working status
Status indicators (L/A0 to L/A3), green or orange, which indicate the port connection status
and data receiving and transmission status
ACT indicator, yellow, which indicates the data receiving and transmission status of the
port
NOTE
There are four LINK indicators and four ACT indicators on the EM4C board. One LINK indicator and one
ACT indicator are present above each FE/GE electrical interface (RJ-45).
Interfaces
Table 8-37 describes the types and functions of the interfaces on the EM4C board.
Table 8-37 Interfaces on the EM4C board
Interfaces
Interface
Type
Function
Required Cable
OUT0 IN0 to
OUT3 IN3
SFP
FE/GE0 to FE/
GE3
RJ-45
Issue 01 (2013-10-31)
190
NOTE
The four SFP interfaces and four electrical interfaces are numbered from 0 to 3. Each SFP interface
corresponds to the electrical interface with the same number and the two interfaces are considered as a
group (for example, OUT0 IN0 and FE/GE0). The two interfaces in each group cannot be used at the same
time.
Supported
Pluggable
Modules
Interface
Type
Function
OUT0 IN0
to OUT3
IN3
FE optical
modules
LC
GE optical
modules
87654321
Pin
Function
Issue 01 (2013-10-31)
191
Description
Basic functions
Interfaces
Clocks
NOTE
l The four FE/GE SFP interfaces and four FE/GE electrical interfaces are numbered from 0 to 3. Each
FE/GE SFP interface corresponds to the FE/GE electrical interface with the same number and the two
interfaces are considered as a group (for example, OUT0 IN0 and FE/GE0). The two interfaces in each
group cannot be used at the same time.
l When using a 10 Mbit/s electrical interface, the board does not support synchronous Ethernet or IEEE
1588v2.
Issue 01 (2013-10-31)
192
AND1EM4C
SFP
ETH
Module
SFP
SFP
ETH
Module
SFP
RJ-45
ETH
Module
RJ-45
RJ-45
ETH
Module
RJ-45
1 x GE
CLK
1 x GE
CLK
1 x GE
Service
logic
4 x GE Signal
selection
CXP
CLK
CLK
CXP
1 x GE
CLK
Control
logic
Control
Logic Module
Clock
Module
Power
Module
CXP
-48V/-60V PIU
-48V/-60V
PIU
ETH Module
The Ethernet processing module performs the following functions:
l
Issue 01 (2013-10-31)
193
Logic Module
The logic module includes a service logic and a control logic.
l
The control logic works with the system control boards to manage and control each module
on the board.
Clock Module
The clock module provides the working clock for each module on the board.
Power Module
The power module provides a DC voltage for each module on the board.
Interface Specifications
l
For information about the swappable FE/GE optical modules supported at FE/GE (SFP)
interfaces, see Table 8-42 and Table 8-43. The interface specifications depend on the
optical/electrical modules on the board. For details on the specifications of optical/electrical
modules, see 9 Swappable Optical/Electrical Modules.
Specification Requirement
Interface rate
Issue 01 (2013-10-31)
Code
Remarks
S4015755
Two-fiber
bidirectional
194
Code
Remarks
S4015715
Commercial
34060282
34060363
34060364
Single-fiber
bidirectional
Commercial
Remarks
34060286
34060473
Two-fiber
bidirectional
S4016954
34060360
34060483
34060481
34060479
34060482
34060478
34060476
34060477
34060480
34060475
34060470
34060539
34060540
34060595
34060596
Commercial
Two-fiber
bidirectional
CWDM
Commercial
Single-fiber
bidirectional
Commercial
Physical Specifications
Dimensions (mm): 20.32 (H) x 193.80 (W) x 225.75 (D)
Weight (kg): 0.46
Issue 01 (2013-10-31)
195
Indicator
The following indicators are present on the front panel of the AND1EM8F:
l
STAT indicator, red, green, or orange, which indicates the working status
L/A0 to L/A7 indicators, green or orange, which indicate the port connection status and
data transmit/receive status
Interface
Eight SFP interfaces are present on the EM8F. Table 8-44 lists the types and usage of the
interfaces on the EM8F.
Issue 01 (2013-10-31)
196
Interface
Type
Usage
Correspo
nding
Cable
Fiber
Optical
interface
LC
Refer to
10.6
Optical
Fibers.
IN0 to IN7
LC
Electrical
module
OUT0 IN0,
OUT7 IN7
RJ-45
For details,
see 10.5.1
Ethernet
Cables.
NOTE
The GE SFP interface on the front panel can function as either an optical interface or an electrical interface.
When the SFP interface functions as an optical interface, it needs to be used with an optical module; when
the SFP interface functions as an electrical interface, it needs to be used with an electrical module.
Description
Basic function
Issue 01 (2013-10-31)
197
Description
Detects the temperature and voltage of the board.
Interface function
Clock
NOTE
If the SFP interface houses an electrical module, the interface does not support synchronous Ethernet or
IEEE 1588v2.
Back plane
Service access
module
Management bus
Service signals
Service
processing
module
Management bus
Management
module
Service signals
CXP
Clock signals
Clock
module
Clock signals
Management bus
3.3V
3.0V
2.5V
1.8V
1.2V
CXP
CXP
Power
supply
module
-48V/-60V
System power
supply
-48V/-60V
System power
supply
Transmit Direction
The service packets from AND1CXPA/AND1CXPB are sent to the service processing module
through the backplane-side interface of the EM8F. The service processing module identifies the
destination interfaces for the packets, and buffers and schedules the packets. Then, the service
Issue 01 (2013-10-31)
198
processing module sends the processed packets to the service access module, where coding/
decoding, serial/parallel conversion, and E/O conversion are performed. Finally, the service
access module outputs the packets through the GE/FE interfaces on the front panel.
Receive Direction
The GE/FE interfaces on the front panel receive GE/FE service signals. Then, the service access
module performs O/E conversion, serial/parallel conversion, and coding/decoding on the
services, and then sends the services to the service processing module. The service processing
module buffers the service packets, schedules the packets, and finally outputs the packets through
the backplane-side interface.
In the receive direction, this module receives the GE/FE services from the interfaces on the
front panel, performs O/E conversion, serial/parallel conversion, and coding/decoding, and
then sends the services to the service processing module.
In the transmit direction, this module receives the service packets from the service
processing module, performs coding/decoding, serial/parallel conversion, and E/O
conversion on the packets, and then outputs the packets through the GE/FE interfaces on
the front panel.
In the receive direction, this module receives and buffers the service packets from the
service access module. Then, this module schedules packets from different interfaces.
Finally, this module outputs the packets through the backplane-side interface.
In the transmit direction, this module receives service packets from the AND1CXPA/
AND1CXPB, identifies the destination interfaces of the packets, and buffers and schedules
the packets. Finally, this module outputs the packets to the service access module.
Management Module
This module is used with the AND1CXPA/AND1CXPB to manage and control each module on
the EM8F.
Clock Module
This module performs the following functions:
l
Issue 01 (2013-10-31)
199
3.3 V
3.0 V
2.5 V
1.8 V
1.2 V
Interface Specifications
For information about the swappable FE/GE optical/electrical modules supported at SFP
interfaces on the AND1EM8F board, see Table 8-46, Table 8-47, Table 8-48, and Table
8-49. The interface specifications depend on the optical/electrical modules on the board. For
details on the specifications of optical/electrical modules, see 9 Swappable Optical/Electrical
Modules.
Table 8-46 Information about FE optical modules
Code
Remarks
S4015755
S4015715
Two-fiber
bidirectional
34060282
34060363
34060364
Commercial
Single-fiber
bidirectional
Commercial
Issue 01 (2013-10-31)
Code
Remarks
34060286
34060473
Two-fiber
bidirectional
S4016954
34060360
34060483
Commercial
Two-fiber
bidirectional
200
Code
Remarks
34060481
CWDM
34060479
34060482
34060478
34060476
34060477
34060480
34060475
34060470
34060539
34060540
34060595
34060596
Commercial
Single-fiber
bidirectional
Commercial
34100101
34100080
34100052
Physical Specifications
Board dimensions (mm): 22.86 (H) x 225.75 (D) x 193.80 (W)
Weight (kg): 0.46
Power consumption (W, room temperature): 18.7
Issue 01 (2013-10-31)
201
Indicator
The following indicators are present on the front panel of the AND1EX1:
l
STAT indicator, red, green, or orange, which indicates the working status
L/A indicators, green or orange, which indicate the port connection status and data transmit/
receive status
Interface
One SFP interface is present on the AND1EX1. Table 8-50 lists the types and usage of the
interfaces on the AND1EX1.
Table 8-50 Types and usage of the interfaces on the AND1EX1
Issue 01 (2013-10-31)
Interface
Type
Usage
Correspo
nding
Fiber
Optical
interface
IN
LC
OUT
LC
Refer to
10.6
Optical
Fibers.
202
Description
Basic function
Interface function
Clock
Service access
module
Management bus
Service signals
Service
processing
module
Management bus
Management
module
Service signals
CXP
Clock signals
Clock
module
Clock signals
Management bus
Issue 01 (2013-10-31)
5.0V
3.3V
1.8V
1.2V
CXP
CXP
Power
supply
module
-48V/-60V
System power
supply
-48V/-60V
System power
supply
203
Transmit Direction
The service packets from AND1CXPA/AND1CXPB are sent to the service processing module
through the backplane-side interface of the EX1. The service processing module buffers and
schedules the packets. Then, the service processing module sends the processed packets to the
service access module, where coding/decoding, and serial/parallel conversion are performed.
Finally, the service access module outputs the packets through the 10 GE interface on the front
panel.
Receive Direction
The 10 GE interface on the front panel receives 10 GE service signals. Then, the service access
module performs serial/parallel conversion, and coding/decoding on the services, and then sends
the services to the service processing module. The service processing module buffers and
schedules the service packets, and finally outputs the packets through the backplane-side
interface.
In the receive direction, this module receives the 10 GE services from the interfaces on the
front panel, performs serial/parallel conversion, and coding/decoding, and then sends the
services to the service processing module.
In the transmit direction, this module receives the service packets from the service
processing module, performs coding/decoding, and serial/parallel conversion on the
packets, and then outputs the packets through the 10 GE interfaces on the front panel.
In the receive direction, this module receives and buffers the service packets from the
interface conversion module. Then, this module schedules packets based on the access
capability of the EX1 and the access bandwidth settings at the interface. Finally, this module
outputs the packets through the backplane-side interface.
In the transmit direction, this module receives service packets from the AND1CXPA/
AND1CXPB, buffers and schedules the packets. Finally, this module outputs the packets
to the service access module.
Management Module
This module is used with the AND1CXPA/AND1CXPB to manage and control each module on
the EX1.
Clock Module
This module performs the following functions:
Issue 01 (2013-10-31)
204
5.0 V
3.3 V
1.8 V
1.2 V
Interface Specifications
For information about the swappable optical modules supported at XFP interfaces on the
AND1EX1 board, see Table 8-52. The interface specifications depend on the optical modules
on the board. For details on the specifications of optical modules, see 9 Swappable Optical/
Electrical Modules.
Table 8-52 Information about 10GE optical modules
Issue 01 (2013-10-31)
Code
Remarks
S4015772
S4015776
Two-fiber
bidirectional
S4015794
34060547
34060548
34060549
34060550
34060551
34060552
34060553
34060554
Commercial
Two-fiber
bidirectional
CWDM
Commercial
205
Code
Remarks
34060568
Two-fiber
bidirectional
34060532
34060515
34060504
34060503
34060534
34060628
34060627
34060626
34060531
34060514
34060502
34060501
34060533
34060625
34060624
34060623
DWDM
Commercial
Physical Specifications
Board dimensions (mm): 22.86 (H) x 225.75 (D) x 193.80 (W)
Weight (kg): 0.42
Power consumption (W, room temperature): 13.1
Issue 01 (2013-10-31)
206
Indicator
The following indicators are present on the front panel of the AND2CQ1B board:
l
STAT indicator, red, green, or orange, which indicates the working status
LOS1 to LOS4 indicators, red or green, which indicate the port status
Interfaces
Four SFP interfaces are present on the front panel of the AND2CQ1B board. Table 8-53 lists
the types and usage of the interfaces. For details on fiber connections to these interfaces, see
10.6 Optical Fibers.
Table 8-53 Types and usage of the interfaces on the AND2CQ1B board
Interface on the Front
Panel
Interface Type
Usage
IN0 to IN1
LC
OUT0 to OUT1
LC
NOTE
The SFP interface should be used with an optical module.
l When a two-fiber bidirectional optical module is used, two LC interfaces are provided on the left and
right sides of the optical module. Each interface uses one fiber, which is used to transmit or receive
service signals.
l When a single-fiber bidirectional optical module is used, only one LC interface is provided on the left
side of the optical module. This optical interface uses only one fiber, which is used to transmit and
receive service signals at the same time.
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Remarks
Basic function
CPOS interface
function
CPOS-Trunk
interface
Number of CPOS-Trunk
member interfaces
The E1 channel supports the serial interface in the E1 and CE1 modes.
The Trunk-serial interface supports the TDM and PPP protocols.
ATM
252
128
Maximum number of E1
links supported by each
IMA group
32
1024
208
Function and
Feature
TDM
PPP
Remarks
Number of supported local
ATM CCCs
128
Number of supported
remote ATM PWE3s
256
126
Number of supported
remote TDM PWE3s
252
252
64
16
64
16
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209
SDH
processing
module
Service
signal
Logic processing
module
Management bus
Service
signal
Service signals
Data processing
module
Management bus
Clock
module
Power
supply
module
CXP B
Management bus
Management bus
Management
module
3.3 V
3.0 V
2.5 V
1.5V
1.2 V
1.0 V
0.75 V
CXP A
Service signals
CXP
-48 V/-60 V
-48 V/-60 V
CXP
PIU
PIU
Upstream Direction
In the receive direction, the SDH processing module accesses 4 x channelized STM-1 services
through the interface on the front panel. This module decapsulates the VC-12 timeslots from the
STM-1 signals, recovers the E1 signals, processes the overhead bytes, pointers, and alarm
signals, and sends the processed signals to the logic processing module. Then, the logic
processing module rearranges the E1 frames, processes the rearranged signals, and sends the
signals to the data processing module for PWE3 encapsulation and PW scheduling. Finally, the
signals are sent to the main control board through the interface on the backplane.
Transmit Direction
In the transmit direction, the data processing module receives the signals from the the main
control board, identifies the signals, performs the PWE3 decapsulation, and then sends the
signals to the logic processing module. The logic processing module processes various signals,
schedules queues, and sends the processed signals to the SDH processing module. The SDH
processing module maps the E1 signals to the VC-12 timeslots, multiplexes the VC-12 timeslots
to the STM-1 signals, adds the overhead bytes and pointers, processes the alarm signals, and
sends out the STM-1 signals through the interface on the front panel.
In the receive direction, this module recovers clock or data from the received 4 channels
STM-1(VC12) signals, align frames, descrambles signals, processes SOHs, adjusts
pointers, processes POHs. Then it sends the signals to the logic processing module over a
bus for further processing.
In the transmit direction, this module receives service signals from the logic processing
module, reframes VC-3 or VC-4 signals, adds overheads and pointers, processes alarms,
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210
and sends 4 channels STM-1(VC12) signals to other boards through the interfaces on the
front panel.
l
This module performs LMSP protection switching to protect services against failures.
In the receive direction, this module receives the signals from the SDH processing module,
rearranges the frames of the E1 signals, performs processing and suppression of timeslots
of the CES services. Then, the processed signals are sent to the data processing module.
In the transmit direction, this module receives the signals from the data processing module,
and sends the processed signals to the SDH processing module.
In the receive direction, this module obtains PW information about the service, encapsulates
signals in PWE3, schedules PWs, and sends the signals to main control board through the
backplane-side interfaces.
In the transmit direction, this module receives service signals from main control board,
determines the service signal type, decapsulates PWE3 signals, and schedules the signals.
Management Module
This module works with main control board to manage and control other modules on the board.
Clock Module
This module performs the following functions:
l
Receives the system clock from main control board and provides the working clock for
each module on the board.
3.3 V
3.0 V
2.5 V
1.5 V
1.2 V
1.0 V
0.75 V
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Interface Specifications
For information about the swappable optical modules supported by SFP interfaces on the
AND2CQ1B board, see Table 8-55. The interface specifications depend on the optical modules
on the board. For details on the optical modules, see 9 Swappable Optical/Electrical
Modules.
Table 8-55 Information about FE optical modules
Code
Remarks
S4015755
S4015715
Two-fiber
bidirectional
34060282
34060363
34060364
Commercial
Single-fiber
bidirectional
Commercial
Other Specifications
Board dimensions (mm): 20.32 (H) x 193.80 (W) x 225.75 (D)
Weight (kg): 0.47
Power consumption (W): 11.50
Appearance
Figure 8-32 shows the appearance of the front panel of the PQ1 board.
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212
Indicators
The following indicators are present on the front panel of the PQ1 board:
l
STAT indicator, red, green, or orange, which indicates the working status
LOS0, LOS1, LOS2, and LOS3, red or green, which indicate the port status
Interfaces
There are four SFP interfaces on the PQ1 board. Table 8-56 describes the types and functions
of the interfaces. For details on the required optical fibers, see 10.6 Optical Fibers.
Table 8-56 Interfaces on the PQ1 board
Interfaces
Interface Type
Function
IN0 to IN3
LC
OUT0 to OUT3
LC
NOTE
The SFP interface should be used with an optical module.
l When a two-fiber bidirectional optical module is used, two LC interfaces are provided on the left and
right sides of the optical module. Each interface uses one fiber, which is used to transmit or receive
service signals.
l When a single-fiber bidirectional optical module is used, only one LC interface is provided on the left
side of the optical module. This optical interface uses only one fiber, which is used to transmit and
receive service signals at the same time.
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Description
Basic functions
Interfaces
AND2PQ1
SFP
STM-1
STM-1
4 x VC4
SDH
STM-1 Module
SFP
STM-1
SFP
Service
logic
4 x VC4
Data
Module
Control
logic
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1 x GE
CXP
Control
Logic
Module
Clock
Module
Signal selection
SFP
Power
Module
CXP
-48V/-60V
PIU
-48V/-60V PIU
214
Logic Module
The service logic of the logic module transparently transmits VC-4 services.
The control logic works with the system control boards to manage and control each module on
the board.
Dually transmits and selectively receives data from/to the active and standby system control
boards.
Clock Module
The clock module provides the working clock for each module on the board.
Power Module
The power module provides a DC voltage for each module on the board.
Interface Specifications
For information about the swappable optical modules supported at SFP interfaces on the
AND2PQ1 board, see Table 8-58. The interface specifications depend on the optical modules
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215
on the board. For details on the specifications of optical modules, see 9 Swappable Optical/
Electrical Modules.
Table 8-58 Information about FE optical modules
Code
Remarks
S4015755
S4015715
Two-fiber
bidirectional
34060282
34060363
34060364
Commercial
Single-fiber
bidirectional
Commercial
Other Specifications
Dimensions (mm): 20.32 (H) x 193.80 (W) x 225.75 (D)
Weight (kg): 0.47
Power consumption (W): 11.50
The AND1ML1 and AND1ML1A have the same functions and features except for the matched impedance
(AND1ML1: 75 ohms E1; AND1ML1A: 120 ohms E1).
Figure 8-35 shows the appearance of the front panel of the AND1ML1A.
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216
Indicators
The following indicators are present on the front panel of the AND1ML1/AND1ML1A:
l
STAT indicator, red, green, or orange, which indicates the working status
Interfaces
There is one Anea 96 interface on the front panel of the AND1ML1/AND1ML1A. Table
8-59 lists the type and usage of the interface. For cables corresponding to the interfaces, see
10.5.4 75-Ohm 16 x E1 Cables and 10.5.5 120-Ohm 16 x E1 Cables.
Table 8-59 Type and usage of the interface on the front panel of the ML1
Interface
on the
Front
Panel
Interface
Type
Usage
AND1ML1
AND1ML1A
1 - 16
Anea 96
Connector Pin
Usage
Connector Pin
Usage
Rx0
25
Tx0
2
3
26
Rx1
4
5
6
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27
Tx1
28
Rx2
29
Tx2
30
217
Front View
Connector Pin
Usage
Connector Pin
Usage
Rx3
31
Tx3
8
9
32
Rx4
10
11
Rx5
Rx6
Rx7
Rx8
Rx9
R x 10
R x 11
R x 12
R x 13
56
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43
Tx9
45
T x 10
47
T x 11
73
T x 12
75
T x 13
76
R x 14
54
55
Tx8
74
52
53
41
48
50
51
Tx7
46
24
49
39
44
22
23
Tx6
42
20
21
37
40
18
19
Tx5
38
16
17
35
36
14
15
Tx4
34
12
13
33
77
T x 14
78
R x 15
79
T x 15
80
218
Remarks
Basic function
Provides 16 E1 interfaces.
Supports the hot swappable function.
Detects the temperature and voltage of the board.
Interface function
AND1ML1: 75 ohm
AND1ML1A: 120 ohm
16
16
Maximum number of E1
links in each IMA group
16
Encapsulates ATM VPC/VCC service to the PWE3 in the Nto-1 (N32) or 1-to-1 format.
Supports the ATM bundle function.
TDM
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256
32
64
219
Remarks
Supports the timeslot compression function. For services in
CESoPSN mode, a minimum of 2 timeslots can be bundled
during serial port configuration.
Supports the fractional E1. Different timeslots of an E1 can
be bound to different CES PWs.
PPP
Clock
16
16
16
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220
Figure 8-36 Block diagram for the working principle of the AND1ML1/AND1ML1A
Backplane
1.2 V
To each module
16 x E1 signals
Line-side
processing
module
Service
bus
-48 V/-60 V
1.26 V
System-side
Service
bus
processing module
Backplane
interface
module
Management bus
Management bus
To each module
Clock signals
-48 V/-60 V
Power supply
module
2.5 V
3.3 V
Control module
Clock module
3.3 V
Service bus
Service bus
Serial
management
bus
Active CXP
Standby CXP
CXP
Clock signals
CXP
In Transmit Direction
The AND1ML1/AND1ML1A first distributes the signals in Ethernet packets from the backplane
to different protocol processing chips according to the service types. The system-side processing
module decapsulates the concatenated services and buffers the services in queues. Then, this
module schedules the egress queues according to the service types, processes and converts the
services, and finally sends the services to the line-side processing module. The line-side
processing module performs coding, dejitter, pulse shaping, and line driving for the services,
and finally sends the services to E1 interfaces.
In Receive Direction
The line processing module performs impedance match, signal equalization, signal level
conversion, clock data recovery, dejitter, and decoding for the accessed E1 signals. Then, the
signals are sent into the system-side processing module, which frames the signals, encapsulates
the IMA, CES, and ML-PPP services in PWE3, and schedules PWs. Finally, this module sends
the signals in Ethernet packets to the backplane interface module.
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221
Control Module
This module controls the reading and writing on the chip, resets the chip, and detects faults in
the chip. When used with the control board, this module controls the board.
Clock Module
This module provides various clock signals for the board to operate normally, detects clocks,
and selects the line recovery clock.
8.13.4 Specifications
The technical specifications of the AND1ML1/AND1ML1A include the interface
specifications, dimensions, weight, and power consumption.
Table 8-62 lists the specifications of the interfaces on the AND1ML1/AND1ML1A.
Table 8-62 Specifications of the interfaces on the AND1ML1/AND1ML1A
Item
Specification Requirement
2048
Interface impedance
75 ohms (AND1ML1)
120 ohms (AND1ML1A)
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Interface code
HDB3
0 to 6
222
Item
Specification Requirement
Output jitter
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)(0.80 in.8.89 in.7.63 in.)
Weight (kg): 0.56(1.23 lb)
Power consumption (W, room temperature): 13.1
The mapping impedance of an interface on the AND3ML1A is 75 ohm, and the mapping impedance of an
interface on the AND3ML1B is 120 ohm. Except the difference of mapping impedance, the functions and
features of the AND3ML1A and AND3ML1B are the same.
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Indicators
The following indicators are present on the front panel of the AND3ML1A/AND3ML1B:
l
STAT indicator, red, green, or orange, which indicates the working status
Interfaces
There is one Anea 96 interface on the front panel of the AND3ML1A/AND3ML1B. Table
8-63 lists the type and usage of the interfaces. 10.5.4 75-Ohm 16 x E1 Cables and 10.5.5 120Ohm 16 x E1 Cables list the cables corresponding to the interfaces.
Table 8-63 Type and usage of the interfaces on the front panel of the AND3ML1A/AND3ML1B
Interface
on the
Front
Panel
Interface
Type
Usage
AND3ML1A
AND3ML1B
0 - 15
Anea 96
Connector Pin
Usage
Connector Pin
Usage
Rx0
25
Tx0
2
3
26
Rx1
4
5
Rx2
Rx3
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Tx2
31
Tx3
32
Rx4
10
11
29
30
8
9
Tx1
28
6
7
27
33
Tx4
34
Rx5
35
Tx5
224
Front View
Connector Pin
Usage
12
13
Rx6
Rx7
Rx8
Rx9
R x 10
R x 11
R x 12
R x 13
56
Tx9
45
T x 10
47
T x 11
73
T x 12
75
T x 13
76
R x 14
54
55
43
74
52
53
Tx8
48
50
51
41
46
24
49
Tx7
44
22
23
39
42
20
21
Tx6
40
18
19
37
38
16
17
Usage
36
14
15
Connector Pin
77
T x 14
78
R x 15
79
T x 15
80
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225
Remarks
Basic function
Provides 16 E1 interfaces.
Supports the hot swappable function.
Detects the temperature and voltage of the board.
Interface function
AND3ML1A: 75 ohm
AND3ML1B: 120 ohm
16
16
Maximum number of E1
links in each IMA group
16
Encapsulates ATM VPC/VCC service to the PWE3 in the Nto-1 (N32) or 1-to-1 format.
Supports the ATM bundle function.
TDM
256
32
64
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226
PPP
Clock
Remarks
Number of supported local
TDM CCCs
16
16
16
Service access
module
Service signal
Management bus
Line clocks
3.3V
.
.
.
1V
Service signal
CXP
Management bus
Management
module
Clock
module
Service
processing
module
.
.
.
Power
supply
module
-48V/-60V
System
power supply
-48V/-60V
System
power supply
System clocks
Line clocks
CXP
CXP
CXP
Transmit Direction
The service signals from the control board are sent to the service processing module. The service
processing module performs PWE3 decapsulation and PW scheduling for the service signals,
processes the service signals based on the IMA/ATM, CES, and ML-PPP protocols, performs
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227
the E1 framing function, and sends the service signals to the service access module. The service
access module performs encoding and line drive for the signals and outputs the signals through
the backplane-side interfaces.
Receive Direction
The board accesses service signals through the backplane-side interfaces, and then the signals
are sent to the service access module. The service access module performs interference isolation,
lightning-proof, impedance matching, level conversion, signal balancing, decoding, and then
sends the processed signals to the service processing module. The service processing module
performs E1 framing, processes service signals based on the IMA/ATM, CES, and ML-PPP
protocols, implements PWE3 encapsulation and PW scheduling, and sends the signals to the
control board through the backplane-side interfaces.
In the receive direction, this module isolates common mode interference, protects circuits
against transient failures, matches the impedance in the receive direction with the internal
impedance, and performs level conversion, balancing, and decoding for the service signals.
Finally, this module sends the processed signals to the service processing module.
In the transmit direction, this module receives the service signals from the service
processing module, encodes the signals, drives the line, and outputs the service signals
through the backplane-side interfaces.
In the receive direction, this module receives the signals from the service access module
and performs E1 framing. This module also identifies protocol types of the service signals,
processes the service signals based on the IMA/ATM, CES, and ML-PPP protocols (for
example, addition and deletion of IMA group members, VP/VC switching and
concatenation of ATM cells, vacant slot compression of CES services, and setup of MLPPP groups). Then, this module performs PWE3 encapsulation and PW scheduling, Finally,
this module converts the processed signals to high-rate signals, and then sends the signals
to the control board through the backplane-side interfaces.
In the transmit direction, this module receives the high-rate signals from the control board
through the backplane-side interfaces and recovers low-rate service signals. Then, this
module performs PWE3 decapsulation, identifies different protocols and processes the
service signals, and completes E1 framing. Finally, this module sends the processed signals
to the service access module.
Management Module
This module manages and controls each module on the board.
Clock Module
This module performs the following functions:
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228
When used with the control board, processes the recovered line clock.
Interface Specifications
Table 8-66 lists the specifications of the interfaces on the AND3ML1A/AND3ML1B.
Table 8-66 Specifications of the interfaces on the AND3ML1A/AND3ML1B
Item
Specification Requirement
2048
Interface impedance
75 ohm (ML1A)
120 ohm (ML1B)
Interface code
HDB3
0 to 6
Output jitter
Physical Specifications
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)(0.80 in.8.89 in.7.63 in.)
Weight (kg): 0.44(0.97 lb)
Power consumption (W, room temperature): 9.5
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229
The mapping impedance of an interface on the AND2MD1A is 75 ohm, and the mapping impedance of an
interface on the AND2MD1B is 120 ohm. Except the difference of mapping impedance, the functions and
features of the AND2MD1A and AND2MD1B are the same.
Indicators
The following indicators are present on the front panel of the AND2MD1A/AND2MD1B:
l
STAT indicator, red, green, or orange, which indicates the working status
Interfaces
There are two Anea 96 interfaces on the front panel of the AND2MD1A/AND2MD1B. Table
8-67 lists the type and usage of the interfaces. 10.5.4 75-Ohm 16 x E1 Cables and 10.5.5 120Ohm 16 x E1 Cables list the cables corresponding to the interfaces.
Issue 01 (2013-10-31)
230
Table 8-67 Type and usage of the interfaces on the front panel of the AND2MD1A/AND2MD1B
Interfac
e on the
Front
Panel
Interfac
e Type
Usage
AND2MD1A
AND2MD1B
0 to 15
Anea 96
16 to 31
Anea 96
Connector Pin
Usage
Connector Pin
Usage
Rx0
25
Tx0
2
3
26
Rx1
4
5
Rx2
Rx3
Rx4
Rx5
16
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Tx3
33
Tx4
35
Tx5
36
Rx6
14
15
31
34
12
13
Tx2
32
10
11
29
30
8
9
Tx1
28
6
7
27
37
Tx6
38
Rx7
39
Tx7
40
231
Front View
Connector Pin
Usage
Connector Pin
Usage
17
Rx8
41
Tx8
18
19
42
Rx9
20
21
R x 10
R x 11
R x 12
R x 13
T x 11
73
T x 12
75
T x 13
76
R x 14
54
55
47
74
52
53
T x 10
48
50
51
45
46
24
49
Tx9
44
22
23
43
77
T x 14
78
R x 15
56
79
T x 15
80
Remarks
Basic function
Provides 32 E1 interfaces.
Supports the hot swappable function.
Detects the temperature and voltage of the board.
Interface function
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AND2MD1A: 75 ohm
232
Remarks
AND2MD1B: 120 ohm
Supports the E1 and CE1 modes.
Supports the master/slave clock mode.
Supports the HDB3 line coding (unconfigurable).
Supports inloops and outloops.
Supports the PRBS function in framed or unframed mode of
an E1 interface in the receive/transmit direction.
ATM
32
32
Maximum number of E1
links in each IMA group
16a
Encapsulates ATM VPC/VCC service to the PWE3 in the Nto-1 (N32) or 1-to-1 format.
Supports the ATM bundle function.
TDM
512
64
128
PPP
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16
32
32
233
Clock
Remarks
Number of supported MLPPP groups
16
16b
NOTE
a: In the case of the AND2MD1A/AND2MD1B, the links corresponding to the former 16 and latter 16 E1
ports cannot be bundled to an IMA group.
b: In the case of the AND2MD1A/AND2MD1B, the links corresponding to the former 16 and latter 16 E1
ports cannot be bundled to an ML-PPP group.
Service access
module
Service signal
Management bus
Line clocks
Clock
module
.
.
1V
Service signal
CXP
Management bus
Management
module
3.3V
.
Service
processing
module
.
.
.
Power
supply
module
-48V/-60V
System power
supply
-48V/-60V
System power
supply
System clocks
Line clocks
CXP
CXP
CXP
Transmit Direction
The service signals from the control board are sent to the service processing module. The service
processing module performs PWE3 decapsulation and PW scheduling for the service signals,
processes the service signals based on the IMA/ATM, CES, and ML-PPP protocols, performs
the E1 framing function, and sends the service signals to the service access module. The service
access module performs encoding and line drive for the signals and outputs the signals through
the backplane-side interfaces.
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Receive Direction
The board accesses service signals through the backplane-side interfaces, and then the signals
are sent to the service access module. The service access module performs interference isolation,
lightning-proof, impedance matching, level conversion, signal balancing, decoding, and then
sends the processed signals to the service processing module. The service processing module
performs E1 framing, processes service signals based on the IMA/ATM, CES, and ML-PPP
protocols, implements PWE3 encapsulation and PW scheduling, and sends the signals to the
control board through the backplane-side interfaces.
In the receive direction, this module isolates common mode interference, protects circuits
against transient failures, matches the impedance in the receive direction with the internal
impedance, and performs level conversion, balancing, and decoding for the service signals.
Finally, this module sends the processed signals to the service processing module.
In the transmit direction, this module receives the service signals from the service
processing module, encodes the signals, drives the line, and outputs the service signals
through the backplane-side interfaces.
In the receive direction, this module receives the signals from the service access module
and performs E1 framing. This module also identifies protocol types of the service signals,
processes the service signals based on the IMA/ATM, CES, and ML-PPP protocols (for
example, addition and deletion of IMA group members, VP/VC switching and
concatenation of ATM cells, vacant slot compression of CES services, and setup of MLPPP groups). Then, this module performs PWE3 encapsulation and PW scheduling, Finally,
this module converts the processed signals to high-rate signals, and then sends the signals
to the control board through the backplane-side interfaces.
In the transmit direction, this module receives the high-rate signals from the control board
through the backplane-side interfaces and recovers low-rate service signals. Then, this
module performs PWE3 decapsulation, identifies different protocols and processes the
service signals, and completes E1 framing. Finally, this module sends the processed signals
to the service access module.
Management Module
This module manages and controls each module on the board.
Clock Module
This module performs the following functions:
l
When used with the control board, processes the recovered line clock.
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Interface Specifications
Table 8-70 lists the specifications of the interfaces on the .
Table 8-70 Specifications of the interfaces on the
Item
Specification Requirement
2048
Interface impedance
75 ohm (MD1A)
120 ohm (MD1B)
Interface code
HDB3
0 to 6
Output jitter
Physical Specifications
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W)(0.80 in.8.89 in.7.63 in.)
Weight (kg): 0.49(1.08 lb)
Power consumption (W, room temperature): 12.1
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236
Indicators
The following indicator is present on the front panel of the PIU.
PWR, green, which indicates the power supply status. When PWR is on and green, it indicates
that power is accessed.
For details on indications of indicators, see 12.1 Indicators.
Interfaces
The PIU accesses one power supply. Table 8-71 lists the types of the interfaces on the PIU and
their respective usage. For cable corresponding to the interfaces, see 10.1 Power Supply Cables
and Ground Cables.
Table 8-71 Types and usage of the interfaces on the PIU
Issue 01 (2013-10-31)
Usage
NEG(-)
RTN(+)
237
Label
Operation warning label: indicates the following precautions , which should be taken for removal
or insertion of the PIU board.
NOTICE
Multiple power supplies are accessed for the equipment. When powering off the equipment,
make sure that these power supplies are disabled.
Before removing the PIU board, ensure that all power inputs are disconnected from the board.
Description
Power access
Each of the two PIU accesses one -48 V DC (or -60 V DC) power
supply for the equipment.
Power protection
The PIU protects the power supply against overcurrent and short
circuit. In this way, the overcurrent is prevented from shocking
board and components on it.
Surge protection
Power backup
Two PIUs for a hot backup. One PIU is capable of supplying power
for the entire chassis.
Issue 01 (2013-10-31)
238
Figure 8-43 Block diagram for the working principle of the PIU
Backplane
-48 V/-60 V
Communication unit
module
Each board
Inter-board
Surge protection and failure communication bus
detection module
Slot ID module
Board in-position
signals
CXP
CXP
Slot ID signals
CXP
Slot ID Module
This module reports the slot ID information to the control board.
8.16.4 Specifications
The technical specifications of the PIU cover the board dimensions, weight, power consumption,
and input voltage.
Table 8-73 lists the technical specifications of the PIU.
Table 8-73 Technical specifications of the PIU
Issue 01 (2013-10-31)
Item
Technical Specification
Weight (kg)
0.12
0.5
239
Item
Technical Specification
-38.4 to -72.0
Indicators
The following indicators are present on the front panel of the FAN:
l
Issue 01 (2013-10-31)
240
The CRIT, MAJ, and MIN indicators on the front panel of the FAN indicate the current alarm
severity of the subrack.
For details on indications of indicators, see 12.1 Indicators.
Handle
The handle is used for pushing the FAN into or pulling the FAN out of the chassis during board
replacement.
Label
The following labels are present on the front panel of the FAN:
l
Fan warning label, which says that do not touch the fan leaves before the fan stops rotating.
Provides start-delay for the power supply of the fans, protects fans against overcurrent, and
filters the lower frequency.
Intelligently adjusts the rotating speed of fans to ensure proper heat dissipation of the
system.
Reports information about the fan rotating speed, environment temperature, alarms, version
number, and board in-position information.
Issue 01 (2013-10-31)
241
Figure 8-45 Block diagram for the working principle of the AND1FAN
Fans x 6
12 V
12 V
12 V
Filter module
Start-delay
Combiner
CXP
CXP
Combiner/
12 V
soft-start module
12 V
12 V power shut signals
Communication unit
module
Fan speed
reporting module
PWM signals
CXP
PWM driver
module
CXP
CXP
Start-delay/Combiner Module
This module provides start delay to the combined two 12 V power supplies and protecting fans
against overcurrent.
Filter Module
This module filters the LC low frequency to enhance the EMC feature of the system.
Issue 01 (2013-10-31)
242
8.17.4 Specifications
The technical specifications of the FAN cover the board dimensions, weight, power
consumption, and input voltage.
Table 8-74 lists the technical specifications of the FAN.
Table 8-74 Technical specifications of the FAN
Item
Technical Specification
Weight (kg)
0.302
12 V DC power
Appearance
Figure 8-46 shows the appearance of a filler panel.
Figure 8-46 Appearance of a filler panel
Valid Slots
The filler panel of a control board can be housed in slot 7 or 8 of a chassis and the filler panel
of an interface board can be housed in any of slots 1-6 of a chassis. Table 8-75 provides the
dimensions of the filler panel for a control board and dimensions of the filler panel for an interface
board.
Issue 01 (2013-10-31)
243
Dimensions (H x W x D)
Performs electromagnetic shielding and ensures that the chassis meets the requirement of
electromagnetic radiation.
Issue 01 (2013-10-31)
244
Issue 01 (2013-10-31)
245
9.1 Overview
Optical and electrical modules for ATN devices are hot swappable. Optical modules transmit
services using optical signals over fibers and electrical modules transmit services using electrical
signals over Ethernet cables.
Classification
Optical modules for ATN devices can be classified as follows:
l
Electrical modules for ATN devices are all SFP modules, which are used to support FE or GE
services.
Appearance
Optical and electrical modules have different appearance because they use different packaging
and cable interfaces.
SFP and eSFP optical modules have the same appearance. Currently eSFP optical modules are
used on most of ATN devices. Figure 9-1 shows the eSFP optical module appearance.
Issue 01 (2013-10-31)
246
Single-fiber
bidirectional
Two-fiber
bidirectional
Issue 01 (2013-10-31)
247
Application
An optical or electrical module can be used at an optical interface if its packaging and service
rate can match the interface.
Packaging:
l
Service rate:
l
In most cases, an optical or electrical module can be used at an optical interface if its packaging and service
rate can match the interface. Certain boards may not support electrical modules. For information about the
modules that a board supports, see the Functions and Features topic for the board.
Issue 01 (2013-10-31)
Item
Specification
Optical interface
type
100BASE-FX
100BASE-FX
(15 km)
(40 km)
(80 km)
Encapsulation type
eSFP
eSFP
eSFP
Fiber type
Single-mode
Single-mode
Single-mode
Working wavelength
range (nm)
1261 to 1360
1263 to 1360
1480 to 1580
Mean launched
optical power (dBm)
-15 to -8
-5 to 0
-5 to 0
Receiving sensitivity
(dBm)
-28
-34
-34
Minimum overload
(dBm)
-8
-10
-10
Minimum extinction
ratio (dB)
8.2
10
10
248
Item
Specification
S4015755
S4015715
34060282
Specification
100BASE-FX
STM-1
STM-1
(15 km)
(10 km)
Encapsulation type
eSFP
eSFP
Fiber type
Single-mode
Single-mode
-15 to -8
-32
-32
-8
-8
8.5
8.5
34060363
34060364
Usage description
Used together.
NOTE
A single-fiber bidirectional module receives and transmits optical signals using different working
wavelength ranges over a single optical fiber. The receiving and transmitting working wavelength ranges
of single-fiber bidirectional modules at both ends must match. As shown in Table 9-2, 34060363 and
34060364 are used together.
Issue 01 (2013-10-31)
Item
Specification
Optical interface
type
249
Item
Specification
100BASE-FX
100BASE-FX
100BASE-FX
(15 km)
(40 km)
(80 km)
Encapsulation type
eSFP
eSFP
eSFP
Fiber type
Single-mode
Single-mode
Single-mode
Working wavelength
range (nm)
1261 to 1360
1263 to 1360
1480 to 1580
Mean launched
optical power (dBm)
-15 to -8
-5 to 0
-5 to 0
Receiving sensitivity
(dBm)
-28
-34
-34
Minimum overload
(dBm)
-8
-10
-10
Minimum extinction
ratio (dB)
8.2
10
10
S4015755
S4015715
34060282
Issue 01 (2013-10-31)
Item
Specification
1000BASE-BX40-D
(40 km)
(40 km)
Encapsulation type
eSFP
eSFP
Fiber type
Single-mode
Single-mode
-3 to 2
-24
-24
-3
-3
250
Item
Specification
34060638
34060639
Usage description
Used together.
NOTE
A single-fiber bidirectional module receives and transmits optical signals using different working
wavelength ranges over a single optical fiber. The receiving and transmitting working wavelength ranges
of single-fiber bidirectional modules at both ends must match. As shown in Table 9-4, 34060638 and
34060639 are used together.
Issue 01 (2013-10-31)
Item
Specification
Optical
interface type
1000BASELX
1000BASEVX
1000BASEZX
1000BASECWDM
(0.5 km)
(10 km)
(40 km)
(80 km)
(80 km)
Encapsulatio
n type
eSFP
eSFP
eSFP
eSFP
eSFP
Fiber type
Multi-mode
Single-mode
Single-mode
Single-mode
Single-mode
Working
wavelength
range (nm)
770 to 860
1270 to 1360
1260 to 1360
1500 to 1580
For details,
see
wavelength
allocation of
1000BASECWDM
optical
interfaces
and related
optical
module code.
Mean
launched
optical power
(dBm)
-9.5 to 0
-11 to -3
-5 to 0
-2 to 5
0 to 5
251
Item
Specification
Receiving
sensitivity
(dBm)
-17
-19
-23
-23
-28
Minimum
overload
(dBm)
-3
-3
-3
-9
Minimum
extinction
ratio (dB)
8.2
Optical
module code
34060286
34060473
S4016954
34060360
For details,
see
wavelength
allocation of
1000BASECWDM
optical
interfaces
and related
optical
module code.
Table 9-6 Wavelength allocation of 1000BASE-CWDM optical interfaces and related optical module code
SN
Optical
module code
Wavelength (nm)
SN
Optical
module code
Wavelength (nm)
34060483
1464.5 to 1477.5
34060478
1544.5 to 1557.5
34060481
1484.5 to 1497.5
34060476
1564.5 to 1577.5
34060479
1504.5 to 1517.5
34060477
1584.5 to 1597.5
34060482
1524.5 to 1537.5
34060480
1604.5 to 1617.5
Specification
Optical
interface type
1000BASEBX10-D
1000BASEBX40-U
1000BASEBX40-D
1000BASEBX
1000BASEBX
(10 km)
(10 km)
(40 km)
(40 km)
(80 km)
(80 km)
Issue 01 (2013-10-31)
252
Item
Specification
Encapsulation
type
eSFP
eSFP
eSFP
eSFP
eSFP
eSFP
Fiber type
Single-mode
Single-mode
Single-mode
Single-mode
Single-mode
Single-mode
Working
wavelength
range (nm)
Tx: 1260 to
1360
Tx: 1480 to
1500
Tx: 1260 to
1360
Tx: 1480 to
1500
Tx: 1260 to
1360
Tx: 1480 to
1500
Rx: 1480 to
1500
Rx: 1260 to
1360
Rx: 1480 to
1500
Rx: 1260 to
1360
Rx: 1480 to
1500
Rx: 1260 to
1360
Mean
launched
optical power
(dBm)
-9 to -3
-9 to -3
-3 to 5
-3 to 5
-2 to 4
-2 to 4
Receiving
sensitivity
(dBm)
-19.5
-19.5
-23
-23
-26
-26
Minimum
overload
(dBm)
-3
-3
-3
-3
-3
-3
Minimum
extinction
ratio (dB)
Optical
module code
34060470
34060475
34060539
34060540
34060595
34060596
Usage
description
Used together.
Used together.
Used together.
NOTE
A single-fiber bidirectional module receives and transmits optical signals using different working
wavelength ranges over a single optical fiber. The receiving and transmitting working wavelength ranges
of single-fiber bidirectional modules at both ends must match. As shown in Table 9-7, 34060470 and
34060475 are used together, 34060595 and 34060596 are used together, and 34060539 and 34060540 are
used together.
Issue 01 (2013-10-31)
Item
Specification
253
Item
Specification
1000BASE-LX
1000BASE-VX
1000BASE-ZX
(10 km)
(40 km)
(80 km)
Encapsulation type
eSFP
eSFP
eSFP
Fiber type
Single-mode
Single-mode
Single-mode
Working wavelength
range (nm)
1280 to 1350
1260 to 1360
1500 to 1580
-11 to -3
-5 to 3
-2 to 5
Receiving sensitivity
(dBm)
19
23
23
Minimum overload
(dBm)
-3
-3
-3
Minimum extinction
ratio (dB)
34060290
34060320
34060324
Issue 01 (2013-10-31)
Item
Specification
1000BASE-BX10-D
(10 km)
(10 km)
Encapsulation type
eSFP
eSFP
Fiber type
Single-mode
Single-mode
-9 to -3
-19.5
-19.5
-3
-3
34060644
34060676
254
Item
Specification
Usage description
Used together.
NOTE
A single-fiber bidirectional module receives and transmits optical signals using different working
wavelength ranges over a single optical fiber. The receiving and transmitting working wavelength ranges
of single-fiber bidirectional modules at both ends must match. As shown in Table 9-9, 34060644 and
34060676 are used together.
Issue 01 (2013-10-31)
Item
Specification
Optical
interface
type
10GE
10GE
(10 km)
(40 km)
(80 km)
10GE
(CWDM)
10GE
(DWDM)
10GE
(DWDM)
(70 km)
(40 km)
(80 km)
Encapsulat
ion type
XFP
XFP
XFP
XFP
TXFP
XFP
Fiber type
Singlemode
Singlemode
Singlemode
Singlemode
Singlemode
Singlemode
Working
wavelengt
h range
(nm)
1310
1550
1550
For details,
see
wavelengt
h
allocation
of 10GE
(CWDM)
optical
interfaces
and related
optical
module
code.
1529.163
to
1560.606
(waveleng
th tunable)
For details,
see
wavelengt
h
allocation
of 10GE
(DWDM)
optical
interfaces
and related
optical
module
code.
Mean
launched
optical
power
(dBm)
-6 to -1
-1 to 2
0 to 4
0 to 4
-1 to 2
-1 to 3
255
Item
Specification
Receiving
sensitivity
(dBm)
-14.4
-15
-24
-24
-16
-24
Minimum
overload
(dBm)
0.5
-1
-7
-9
-9
Minimum
extinction
ratio (dB)
8.2
10.5
8.2
Optical
module
code
S4015772
S4015776
S4015794
For details,
see
wavelengt
h
allocation
of 10GE
(CWDM)
optical
interfaces
and related
optical
module
code.
34060568
For details,
see
wavelengt
h
allocation
of 10GE
(DWDM)
optical
interfaces
and related
optical
module
code.
Table 9-11 Wavelength allocation of 1000BASE-CWDM optical interfaces and related optical
module code
Issue 01 (2013-10-31)
SN
Optical
module code
Wavelength
(nm)
SN
Optical
module
code
Wavelength (nm)
34060547
1471
34060551
1551
34060548
1491
34060552
1571
34060549
1511
34060553
1591
34060550
1531
34060554
1611
256
Table 9-12 Wavelength allocation of 1000BASE-DWDM optical interfaces and related optical
module code
SN
Optical
module code
Wavelength
(nm)
SN
Optical
module
code
Wavelength (nm)
34060532
1529.55
34060531
1548.51
34060515
1530.33
10
34060514
1549.32
34060504
1531.12
11
34060502
1550.12
34060503
1531.90
12
34060501
1550.92
34060534
1532.68
13
34060533
1551.72
34060628
1533.47
14
34060625
1552.52
34060627
1534.25
15
34060624
1553.33
34060626
1535.04
16
34060623
1554.13
Specification
Interface rate
100 Mbit/s
Encapsulation type
SFP
34100101
Issue 01 (2013-10-31)
Item
Specification
Interface rate
1000 Mbit/s
Encapsulation type
SFP
SFP
257
Issue 01 (2013-10-31)
Item
Specification
34100080
34100052
258
10 Cables
10
Cables
Issue 01 (2013-10-31)
259
10 Cables
1U DC connector
Power cable
screwdriver
-48V cable
(blue)
0 V cable
(black)
Issue 01 (2013-10-31)
2 U DC connector
260
10 Cables
Table 10-1 Technical specifications of the power cable intended for a 1 U chassis
Item
2.5 mm2
(0.004 in.2)
power cable
and terminal
Table 10-2 Technical specifications of the power cable intended for a 2 U chassis
Item
4 mm2 (0.006
in.2) power
cable and
terminal
Appearance
Figure 10-3 shows an AC input power cable of an ATN device.
Figure 10-3 Appearance of the AC input power cable
Issue 01 (2013-10-31)
261
10 Cables
Technical Specifications
Cable
Item
Description
Cable type
Technical
specifications of the
cable
Fireproof class
CM
Note 1: A power cable is named in the format of "Connector 1 Type-Cable Material TypeConnector 2 Type".
Note 2: The specifications of power cables for inputting the mains vary in different countries
or regions. In this document, the AC power cables complying with international standards are
considered as examples.
Issue 01 (2013-10-31)
262
10 Cables
Issue 01 (2013-10-31)
Connecto
r Pin
Color
Relation
Usage
White-orange
Twisted pair
Orange
White-green
Green
Blue
White-blue
White-brown
Brown
Twisted pair
Twisted pair
Unspecified
Transmit end of the console interface
263
10 Cables
Specification
Connector
Cable type
Number of cores
Eight
Structure
Figure 10-6 shows the structure of the alarm input/output cable.
Figure 10-6 Structure of the alarm input/output cable
RJ-45 Connector
Main label
W
8
1
X1
Pin Assignment
Table 10-6 lists the pin assignment of the alarm input/output alarm cable connector.
Issue 01 (2013-10-31)
264
10 Cables
Color
Relation
Description
White-orange
Twisted pair
Alarm input 1
Orange
White-green
Green
Blue
White-blue
White- brown
Brown
Alarm input 2
Ground for alarm input 2
Twisted pair
Alarm input 3
Ground for alarm input 3
Twisted pair
Technical Specifications
Table 10-7 lists the technical specifications of the alarm input/output cable.
Table 10-7 Technical specifications of the alarm input/output cable
Item
Specification
Connector X1
Cable type
Twisted-Pair Cable, 100 ohm, Category 5e, 0.52 mm, 24AWG, 8 Cores, 4
Pairs, PANTONE 430U
Structure
Figure 10-7 shows the structure of the RJ45 connector used on the external clock cable.
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265
10 Cables
Pin Assignment
The external clock cables must be made on the equipment installation site. When the CLK0/
TOD0, CLK1/TOD1, CLK, and TOD interfaces are used as external clock interfaces, the pin
assignment of the RJ45 connector is as listed in Table 10-8; when the CLK0/TOD0, CLK1/
TOD1, CLK, and TOD interfaces are used as external time interfaces, the pin assignment of the
RJ45 connector is as listed in Table 10-9.
Table 10-8 Pin assignment of the RJ45 connector (external clock mode)
Connector
Pin
Color
Relation
Description
White-orange
Twisted pair
Orange
White-green
Green
Blue
White-blue
White- brown
Brown
Unspecified
Unspecified
Twisted pair
Twisted pair
Unspecified
Unspecified
Table 10-9 Pin assignment of the RJ45 connector (external time mode)
Issue 01 (2013-10-31)
Connecto
r Pin
Color
White-orange
Orange
White-green
Relation
Twisted pair
Twisted pair
Description
1PPS + Time
Information Mode
DCLS Mode
Unspecified
Unspecified
Unspecified
Unspecified
Negative of 1PPS
signals
Negative of DCLS
signals
266
Connecto
r Pin
Color
Green
Blue
White-blue
White-brown
Brown
10 Cables
Relation
Twisted pair
Twisted pair
Description
1PPS + Time
Information Mode
DCLS Mode
Positive of 1PPS
signals
Positive of DCLS
signals
Grounding terminal
Grounding terminal
Grounding terminal
Grounding terminal
Negative of time
information
Unspecified
Positive of time
information
Unspecified
Technical Specifications
Table 10-10 and Table 10-11 lists the technical specifications of the external clock cable.
Table 10-10 Technical specifications of the external shielded clock cable
Item
Specification
Connector
Cable type
Number of
cores
Eight
Specification
Connector
Cable type
Number of
cores
Eight
267
10 Cables
Structure
Figure 10-8 shows the structure of the 120-to-75-ohm clock bridging cable.
Figure 10-8 Structure of the clock bridging cable
Heat-shrink tube
View A
RJ-45
connector
Main
label
Label
W1
Heat-shrink tube
Heat-shrink tube
W5
8 A
W2
W3
X1
W4
30 m
Pin Assignment
Table 10-12 lists the pin assignment of the clock bridging cable connector.
Table 10-12 Pin assignment of the clock bridging cable connector
120-Ohm Cable
75-Ohm Cable
Connector Pin
Color
Relation
Core No.
X1.1
Orange
Twisted pair
W1
X1.2
White
X1.4
Blue
Twisted pair
W2
X1.5
White
X1.3
Green
Twisted pair
W3
X1.6
White
X1.7
White
Twisted pair
W4
X1.8
Brown
Technical Specifications
Table 10-13 lists the technical specifications of the clock bridging cable.
Issue 01 (2013-10-31)
268
10 Cables
Specification
Cable
Connector X1
type
120-ohm cable
type
Twisted-Pair Cable, 120 ohm, SEYVP, 0.4 mm(0.02 in.), 26AWG, 4Pairs,
Pantone 430U
75-ohm cable
type
Structure
Figure 10-9 shows the appearance of the shield layer.
Issue 01 (2013-10-31)
269
10 Cables
RJ45 connectors are used at both ends of a network cable. Figure 10-11 shows an RJ45 connector
and Figure 10-12 shows the structure of the network cable.
Figure 10-11 RJ45 connector
PIN#8
PIN#1
Issue 01 (2013-10-31)
270
10 Cables
Label 1
Main label
Label 2
8
1
1
X1
X2
NOTE
For a crossover cable, pins 1 and 2 of the RJ45 connector at one end must be cross-connected to pins 3 and
6 of the RJ45 connector at the other end respectively.
Pin Assignment
Table 10-14 and Table 10-15 list the pin assignment of the network cable connector.
Table 10-14 Pin assignment of the straight-through cable connector
straight-through Cable
Connector X1 Pin
Connector X2 Pin
Color
Relationship
X1.1
X2.1
White-orange
Twisted pair
X1.2
X2.2
Orange
X1.3
X2.3
White-green
X1.6
X2.6
Green
X1.4
X2.4
Blue
X1.5
X2.5
White-blue
X1.7
X2.7
White-brown
X1.8
X2.8
Brown
Twisted pair
Twisted pair
Twisted pair
Connecto
r X1 Pin
Connect
or X2 Pin
Color
Relation
ship
Connector
X1 Pin
Connect
or X2 Pin
Color
Relation
ship
X1.1
X2.3
White-orange
X1.1
X2.3
White-orange
X1.2
X2.6
Orange
Twisted
pair
X1.2
X2.6
Orange
Twisted
pair
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271
10 Cables
Connecto
r X1 Pin
Connect
or X2 Pin
Color
Relation
ship
Connector
X1 Pin
Connect
or X2 Pin
Color
Relation
ship
X1.3
X2.1
White-green
X1.3
X2.1
White-green
X1.6
X2.2
Green
Twisted
pair
X1.6
X2.2
Green
Twisted
pair
X1.4
X2.4
Blue
X1.4
X2.7
Blue
X1.5
X2.5
White-blue
Twisted
pair
X1.5
X2.8
White-blue
X1.7
X2.7
White-brown
X1.7
X2.4
White-brown
X1.8
X2.8
Brown
Twisted
pair
X1.8
X2.5
Brown
Twisted
pair
Twisted
pair
Technical Specifications
Table 10-16 lists the technical specifications of the shielded cable.
Table 10-16 Technical specifications of the shielded cable
Item
Specification
Connector
X1/X2
Cable type
Number of
cores
Eight
Issue 01 (2013-10-31)
Item
Specification
Connector
X1/X2
Cable type
Number of
cores
Eight
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10 Cables
Structure
Figure 10-13 shows the structure of the 75-ohm 8 x E1 cable.
Figure 10-13 Structure of the 75-ohm 8 x E1 cable
Pos.44
A-A
Pos.1
Main label
W
X
Pin Assignment
Table 10-18 lists the pin assignment of the 75-ohm 8 x E1 cable connector.
Table 10-18 Pin assignment of the 75-ohm 8 x E1 cable connector
Connecto
r Pin
Cable
Core
Serial No.
38
Ring
23
Tip
37
Ring
22
Tip
36
Ring
21
Tip
35
Ring
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Remarks
R0
R1
R2
R3
Connecto
r Pin
Cable
Core
Serial No.
34
Ring
R4
19
Tip
33
Ring
11
R5
18
Tip
32
Ring
13
R6
17
Tip
31
Ring
15
R7
Remarks
273
Connecto
r Pin
Cable
20
Tip
15
Ring
30
Tip
14
Ring
29
Tip
13
Ring
28
Tip
12
Ring
27
Tip
Shell
Core
Remarks
Serial No.
T0
T1
T2
T3
10 Cables
Connecto
r Pin
Cable
16
Tip
11
Ring
26
Tip
10
Ring
25
Tip
Ring
24
Tip
Ring
Tip
Core
Remarks
Serial No.
10
T4
12
T5
14
T6
16
T7
Technical Specifications
Table 10-19 Technical specifications of the 75-ohm 8 x E1 cable
Item
Specification
Cable
Connector
Cable type
Fireproof class
CM
Number of cores
16
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Use the DB44 connector at one end to connect the cable to the 120-ohm E1 electrical interface
board. Use a connector to connect the other end to the DDF. The connector should be made
according to the on-site requirements.
Structure
Figure 10-14 shows the appearance of the 120-ohm 8 x E1 cable and Figure 10-15 shows the
structure of the cable.
Figure 10-14 Appearance of the 120-ohm 8 x E1 cable
Pos.1
Pos.44
Lable 1
Lable 2
Main lable
W1
X
W2
Pin assignment
Table 10-20 lists the pin assignment of the 120-ohm 8 x E1 cable connector.
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Cable
Remarks
Connector Pin
Core
15
Blue
30
White
14
Orange
29
White
13
Green
28
White
12
Brown
27
White
11
Grey
26
White
10
Blue
25
Red
Orange
24
Red
Green
7
Shell
Cable
Remarks
Core
R0
38
Blue
23
White
37
Orange
22
White
36
Green
21
White
35
Brown
20
White
34
Grey
19
White
33
Blue
18
Red
32
Orange
17
Red
31
Green
Red
16
Red
Shell
R1
R2
R3
R4
R5
R6
R7
T0
T1
T2
T3
T4
T5
T6
T7
Technical Specifications
Table 10-21 Technical specifications of the 120-ohm 8 x E1 cable
Item
Specification
Cable
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Connector
Cable type
276
Item
Specification
Number of cores
16 twisted pairs
Inner conductor
diameter
Fireproof class
CM
10 Cables
The 75-ohm 16 x E1 cable of other types of ATN equipment cannot be used for the ATN 910I. Otherwise,
the device cannot correctly identify the impedance.
Structure
Figure 10-16 shows the appearance of the 75-ohm 16 x E1 cable and Figure 10-17 shows the
structure of the cable.
Figure 10-16 Appearance of the 75-ohm 16 x E1 cable
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Main label
1
W
X1
View A
Pos.96
Pos .1
Pin Assignment
Table 10-22 lists the pin assignment of the 75-ohm 16 x E1 cable connector.
Table 10-22 Pin assignment of the 75-ohm E1 cable connector
Connecto
r Pin
Cable
Core
Serial No.
Tip
Ring
Tip
Ring
Tip
Ring
Tip
Ring
Tip
10
Ring
11
Tip
12
Ring
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Remarks
11
R0
R1
R2
R3
R4
R5
Connecto
r Pin
Cable
Core
Serial No.
25
Tip
T0
26
Ring
27
Tip
T1
28
Ring
29
Tip
T2
30
Ring
31
Tip
T3
32
Ring
33
Tip
10
T4
34
Ring
35
Tip
12
T5
36
Ring
Remarks
278
Connecto
r Pin
Cable
Remarks
Core
Serial No.
13
Tip
13
14
Ring
15
Tip
16
Ring
17
Tip
18
Ring
19
Tip
20
Ring
21
Tip
22
Ring
23
Tip
24
Ring
49
Tip
50
Ring
51
Tip
52
Ring
53
Tip
54
Ring
55
Tip
56
Ring
Shell
R6
15
R7
17
R8
19
R9
21
R10
23
R11
25
R12
27
R13
29
R14
31
R15
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Connecto
r Pin
Cable
Remarks
Core
Serial No.
37
Tip
14
T6
38
Ring
39
Tip
16
T7
40
Ring
41
Tip
18
T8
42
Ring
43
Tip
20
T9
44
Ring
45
Tip
22
T10
46
Ring
47
Tip
24
T11
48
Ring
73
Tip
26
T12
74
Ring
75
Tip
28
T13
76
Ring
77
Tip
30
T14
78
Ring
79
Tip
32
T15
80
Ring
Technical Specifications
Table 10-23 Technical specifications of the 75-ohm 16 x E1 cable
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Item
Specification
Cable
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10 Cables
Item
Specification
Connector
Cable type
Number of cores
32
Available length
5 m, 10 m, 15 m, 20 m, 25 m, 30 m, 35 m, 40 m, 45 m, 50 m
16.40 ft.,32.80 ft.,49.21 ft.,65.62 ft.,82.02 ft.,98.42 ft.,114.83 ft.,
131.23 ft.147.64 ft.,164.04 ft.
Structure
Figure 10-18 shows the appearance of the 120-ohm 16 x E1 cable and Figure 10-19 shows the
structure of the cable.
Figure 10-18 Appearance of the 120-ohm 16 x E1 cable
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10 Cables
Main label
1
W
X1
View A
Pos.96
Pos .1
Pin assignment
Table 10-24 lists the pin assignment of the 120-ohm 16 x E1 cable connector.
Table 10-24 Pin assignment of the 120-ohm E1 cable connector
Connecto
r Pin
Cable
Core
Bundle
White
Blue
Blue
White
Green
White
Grey
Red
Orange
Red
10
Brown
11
Black
12
Blue
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Remarks
R0
R1
R2
R3
R4
R5
Connecto
r Pin
Cable
Core
Bundle
25
White
Blue
26
Orange
27
White
28
Brown
29
Red
30
Blue
31
Red
32
Green
33
Red
34
Grey
35
Black
36
Orange
Remarks
T0
T1
T2
T3
T4
T5
281
Connecto
r Pin
Cable
13
Black
14
Green
15
Black
16
Grey
17
White
18
Blue
19
White
20
Green
21
White
22
Grey
23
Red
24
Orange
49
Red
50
Brown
51
Black
52
Blue
53
Black
54
Green
55
Black
56
Grey
Shell
Core
Remarks
Bundle
R6
R7
Orange
R8
R9
R10
R11
R12
R13
R14
R15
10 Cables
Connecto
r Pin
Cable
37
Black
38
Brown
39
Yellow
40
Blue
41
White
42
Orange
43
White
44
Brown
45
Red
46
Blue
47
Red
48
Green
73
Red
74
Grey
75
Black
76
Orange
77
Black
78
Brown
79
Yellow
80
Blue
Core
Remarks
Bundle
T6
T7
Orange
T8
T9
T10
T11
T12
T13
T14
T15
Technical Specifications
Table 10-25 Technical specifications of the 120-ohm 16 x E1 cable
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Item
Specification
Cable
Trunk Cable, 120 ohm, 16E1, 0.4 mm(0.02 in.), Anea 96F,
120CC32P0.4P430U(S), +45deg
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Item
Specification
Connector
Cable type
Number of cores
32 twisted pairs
Structure
Figure 10-20 shows the structure of the telephone wire used as an xDSL cable.
Figure 10-20 Structure of the telephone wire
1
Main label
W
1
X1
X2
15 m
Main label
8
1
X1
X2
15 m
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Pin Assignment
Table 10-26 lists the pin assignment of the ADSL cable connector and Table 10-27 lists the pin
assignment of the G.SHDSL cable connector.
Table 10-26 Pin assignment of the ADSL cable connector (RJ-45)
Connector X1
Connector X2
Description
X1.1
X2.1
Unspecified
X1.2
X2.2
Unspecified
X1.3
X2.3
Unspecified
X1.4
X2.4
Ring
X1.5
X2.5
Tip
X1.6
X2.6
Unspecified
X1.7
X2.7
Unspecified
X1.8
X2.8
Unspecified
Connector X2
Description
X1.1
X2.1
Unspecified
X1.2
X2.2
Unspecified
X1.3
X2.3
Tip
X1.4
X2.4
Ring
X1.5
X2.5
Unspecified
X1.6
X2.6
Unspecified
Technical Specifications
Table 10-28 lists the technical specifications of the xDSL cable (telephone wire).
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Specification
Cable
Number of cores
LC/PC connectors are used at both ends of the optical fiber shown in Figure 10-21. For an optical
fiber that connects an optical port on an ATN device to an optical port of another type on the
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peer device, an LC/PC connector is used at one end and a connector of another type is used at
the other end. Table 10-29 lists the common optical connectors.
Table 10-29 Common optical connectors
Appearance
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Type
Description
SC/PC connector
FC/PC connector
ST/PC connector
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Equipment Support
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7U
Table 11-1 lists the technical specifications of the APM30H outdoor cabinet.
Table 11-1 Technical specifications of the APM30H outdoor cabinet
Item
Specifications
Dimensions (H x W x D)
Available installation
space
7 U (1 U = 44.45 mm)
700 W
Protection rating
IP55
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Table 11-2 lists the technical specifications of the IMB network cabinet.
Table 11-2 Technical specifications of the IMB network cabinet
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Item
Specifications
Dimensions (H x W x D)
3 U (1 U = 44.45 mm)
300 W
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Item
Specifications
Protection rating
IP31
Table 11-3 lists the technical specifications of the 19-inch open rack.
Table 11-3 Technical specifications of the 19-inch open rack
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Item
Specifications
Dimensions (H x W x D)
45 U (1 U = 44.45 mm)
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Specifications
Standard compliance
45 kg
Dimensions (W x D x H)
Available space
83 SU
Fixing centers
515 mm
DC Scenario
The rated voltage and current of ATN 910 are -48 V/-60 V DC and 4 A, respectively.
The rated voltage and current of an ATN 910I DC device are -48 V/-60 V DC and 1.5 A,
respectively.
NOTE
An ATN 910I AC device using AC power supplies cannot be used in the DC scenario.
The rated voltage and current of ATN 910B are -48 V/-60 V DC and 4 A, respectively.
The rated voltage and current of ATN 950B are -48 V/-60 V DC and 8 A, respectively.
In DC scenarios, an ATN device can be directly used under the rated voltage of -48 V/-60 V DC
or used with a 27S48D power system under the rated voltage of +24 V DC. Figure 11-7 and
Figure 11-8 show the power distribution for an ATN device.
Figure 11-7 Power distribution for an ATN device under the voltage of -48 V/-60 V DC
-48 V DC/-60 V DC
-48 V DC/-60 V DC
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ATN
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11 Equipment Support
NOTE
For the capacity of circuit breakers or fuses on an ATN device, refer to the Quick Installation Guide of the
ATN device.
Figure 11-8 Power distribution for an ATN device under the voltage of +24 V DC
+24 V DC
+24 V DC
-48 V DC
27S48D -48 V DC
ATN
AC Scenario
The input AC voltage of An ATN 910I AC device is from 100 V to 240 V AC and the rated
current is 0.6 A.An ATN 910I AC device can be directly used in AC scenarios. Figure 11-9
shows the power distribution for an ATN 910I AC device.
Figure 11-9 AC power distribution
220 V AC
ATN
When using AC power supplies, the ATN DC device can be used with an EPS30-4815AF power
system. Figure 11-10 shows the power distribution for an ATN DC device.
Figure 11-10 AC power distribution
-48 V DC
220 V AC
EPS30-4815AF -48 V DC
ATN
-48V DC
Lead-acid
battery
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11 Equipment Support
Appearance
Figure 11-11 and Table 11-5 show the appearance and structure of an EPS30-4815AF,
respectively.
Figure 11-11 Appearance of an EPS30-4815AF
NOTICE
Interfaces on the monitoring module are reserved temporarily. Do not use these interfaces.
Otherwise, the power system may be reset or damaged.
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Component
Description
Rectifier module
Monitoring module
Detects the status of the power system and storage batteries. Two
RS232/RS485 communication interfaces and one DB50
interface are reserved on the monitoring module.
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Indicators
Indicators for the rectifier and monitoring modules are present on the front panel of the
EPS30-4815AF. Table 11-6 and Table 11-7 list the indications of indicators for the rectifier
and monitoring modules respectively.
Table 11-6 Indicators for the rectifier modules
Indicator
Indication
Color
Normal
State
Abnormal
State
Cause of Exception
RUN
Running
indicator
Green
On
Off
ALM
Protection
indicator
Yellow
Off
On
Blinking
On
FAULT
Fault
indicator
Red
Off
Note 1: When a severe fault occurs, the indicator (red) is on and the indicators (yellow and green) are off. The
indicators (yellow and green) are on only when the indicator (red) is off.
Note 2: The indicator (yellow) is always on when communication on a rectifier module is interrupted, a rectifier
module is overheated or endures overcurrent or undercurrent, or a rectifier module is disabled.
Indicatio
n
Color
Normal
State
Abnorm
al State
Cause of Exception
RUN
Running
indicator
Green
Blinking
regularly
Off
Fast
blinking
Abnormal communication
On
ALM
Alarm
indicator
Red
Off
Interfaces
Table 11-8 lists types and usage of the interfaces on the front panel of the EPS30-4815AF.
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Numb
er of
Interfa
ces
Interface
Type
Description
Remarks
AC INPUT
RS232/RS485
RJ-45
RS232/RS485
communication interfaces.
The monitoring module
communicates with the
equipment, reports alarms,
and implements remote
control through these
interfaces.
Reserved interfaces
DB50
Reserved interface
LOAD1
LOAD2
BATT
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Table 11-9 Relationships of the load output interfaces, interface for connecting to the storage
batteries, and fuses
Output Branch Fuse
Load Branch
FU-1 (10 A)
LOAD1 (10 A)
FU-2 (20 A)
LOAD2 (20 A)
FU-BT (20 A)
BATT (20 A)
DIP Switch
There is a DIP switch on the monitoring module of the EPS30-4815AF. Figure 11-12 shows
the default setting and location of the DIP switch.
Figure 11-12 Default setting and location of the DIP switch
NOTICE
Do not change the default setting of the DIP switch. Otherwise, the EPS30-4815AF is affected.
The DIP switch indicates eight bits in binary format (on: 1; off: 0). The default value of the eight
bits is 00000100. The functions of the eight bits are as follows:
l
The first five bits indicate the local and remote power addresses. Bit 5 is the highest bit and
bit 1 is the lowest bit.
Bit 6 sets the baud rate of communication between the monitoring module and equipment.
When bit 6 is 1, the baud rate is 9600 bit/s; when bit 6 is 0, the baud rate is 19200 bit/s.
Technical Specifications
Table 11-10 lists the technical specifications of the EPS30-4815AF.
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Battery input
DC output
Specification
Rated input voltage
Maximum input
current
10 A
Frequency
50/60 Hz
-48 V
Capacity
40 Ah
Number of
batteries
Rated output
voltage
-53.5 V DC
Output current
< 10 kg
Appearance
Figure 11-13 shows the appearance of a 27S48D power system.
Figure 11-13 Appearance of a 27S48D power system
Functions
The 27S48D power system accepts power in the range of 19 V to 30 V, and outputs -53.5 V
rated voltage and 7 A rated current.
In terms of electrical performance and structure, the 27S48D power system is divided into two
independent -53.5 V/5.6 A power modules. They are separated using an output diode and
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11 Equipment Support
installed in the same cabinet. Their currents are combined into a 7 A one through power
distribution, and the 7 A current is supplied to equipment. The 27S48D power system provides
functions such as short-circuit protection, overcurrent protection, output overvoltage protection,
and overheat protection.
Indicator
Table 11-11 lists the meaning of each 27S48D power indicator status.
Table 11-11 Indicator description
Indicator
Color
Normal State
Description
RUN
Green
On
STAND-BY
Yellow
Off
ALM
Red
Off
Interface
Table 11-12 lists the types and functions of 27S48D power interfaces.
Table 11-12 Description of 27S48D power interfaces
Interface
Name
Quant
ity
Description
Remarks
INPUT
24 V DC power input
interface
OUTPUT
ALM
Technical Specifications
Table 11-13 lists the technical specifications of the 27S48D power system.
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Value
DC power supply
DC power supply
24 V (19 V to 30 V) DC
Maximum input
current
20 A
Rated output
voltage
-53.5 V DC
Output current
7A
Weight
< 7 kg
Appearance
Figure 11-14 shows the appearance of the HW-100-48AC14D-1 power system.
Figure 11-14 Appearance of the HW-100-48AC14D-1 power system
Functions
The HW-100-48AC14D-1 power system supports AC power ranging from 90 V to 264 V, and
outputs -48 V DC power in natural heat dissipation mode. The output power is 100 W. This
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11 Equipment Support
power system supports protection against output overcurrent, output undervoltage, output short
circuit, and overtemperature.
Technical Specifications
Table 11-14 provides the technical specifications of the HW-100-48AC14D-1 power system.
Table 11-14 Technical specification of the HW-100-48AC14D-1 power system
Item
Specifications
AC power input
DC output
Maximum input
current
2A
Rated output
voltage
-48 V DC
Rated output
power
100 W
Dimensions (H x W x D)
40 mm x 171 mm x 72 mm
Weight
< 1 kg
Ambient temperature
-20 C to +40 C
Appearance
Figure 11-15 shows the appearance of a lead-acid battery.
Figure 11-15 Appearance of a lead-acid battery
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NOTE
The appearance, dimensions, and weight of lead-acid batteries are provided only for reference and those
of the delivered batteries prevail.
Technical Specifications
Table 11-15 shows the technical specifications of the lead-acid battery.
Table 11-15 Technical specifications of the lead-acid battery
Item
Specifications
-48 V DC
40 Ah (NP38-12RFR)
-53.5 V DC
9.5 A (NP38-12RFR)
Operating temperature
40 Ah (BPL40-12)
12 A (BPL40-12)
15 kg
11.3 Heater
The ATN 910I-TC DC operates at a temperature that ranges from -40C to 65C. When the
temperature falls below -20C, the heater starts working.
The dimensions of the heater (without mounting ears) are 420 mm (width) x 250 mm (depth) x
41.6 mm (height). Figure 11-16 shows the heater.
Figure 11-16 Heater
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When the temperature in the cabinet is lower than +1C (with 6C offset considered), the
heater starts working. When the temperature in the cabinet is higher than +15C (with 3C
offset considered), the heater stops working.
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12
Quick Reference
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12.1 Indicators
This topic describes the names of various indicators and their indications.
Index of Indicators
For boards and their indicators, see Boards and Their Indicators.
For board status indicators, see:
l
For combination of indicators in different start statuses on the system control board, see
Description of the Start Status Indicator Combination on the System Control Board.
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Indicator
ANC2CXPI/ANC2CXPL
AND1EF8T
AND1EF8F
AND1EG2
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12 Quick Reference
Indicator
AND1EG4F
AND1EG4T
STAT
AND1MO1C
STAT
AND1AVD8A/
AND1AVD8B
STAT
AND1SHD4
AND1SHD4I
AND1ML1/ML1A
STAT
AND2ML1A/ML1B
STAT
AND1MD1A/MD1B
STAT
ANC1PIU
PWRA, PWRB
ANC1FAN
FAN
Indicator
AND1CXPA/
AND1CXPB/
AND2CXPA/
AND2CXPB/AND2CXPE
AND1EM4T
STAT
AND1EM8T
STAT
AND1EX1
L/A
AND1EM4F
AND1EM8F
AND2CQ1B/AND2PQ1
AND1ML1/ML1A
STAT
AND3ML1A/ML1B
STAT
AND2MD1A/MD1B
STAT
AND1PIU/AND2PIU
PWR
AND1FAN/AND2FAN
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12 Quick Reference
Indication
On (green)
On (red)
On (orange)
Off
l No power is input.
l The board is not running.
Indication
On (green)
On (red)
Off
No power is input.
Indication
On (green)
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Status
Indication
On (red)
l The system clock priority list is set. All the clock sources,
however, are lost except for the internal clock sources. The
clock works in holdover mode or free-run mode.
l The system clock is working in time synchronization mode,
but no synchronization source is available. The system clock
and PTP time are working in holdover or free-run mode.
Indication
On (green)
Off
Indication
On (green)
Off
Indication
On (green)
Power is accessed.
Off
l No power is accessed.
l The power supply poles are inversely connected.
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Indication
On (red)
On (yellow)
Off
Indication
On (green)
On (red)
Off
Indication
Blinking (orange)
Off
Indication
On (green)
Off
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Status
Indication
On (green)
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Status
Indication
Blinking (orange)
Off
Indication
On (green)
Off
Indication
On (green)
On (red)
Off
Indication
On (green)
On (red)
On (orange)
Off
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Status
Indication
On (red)
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Status
Indication
Off
Indication
On (orange)
Off
Indication
On (yellow)
Off
Description of the Start Status Indicator Combination on the System Control Board
Table 12-1 describes the status and meaning of the start status indicator combination of the ATN
910 control board from the time when it is powered on to the time when it is working
properly.Table 12-2 describes the status and meaning of the start status indicator combination
of the ATN 950B control board from the time when it is powered on to the time when it is
working properly.
Table 12-1 Start status indicator combination
SN
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Status
Indicator
STAT
PROG
Off
Off
Off
Green
Off
Blinking (green)
Green
Green
Green
Green
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12 Quick Reference
Status
Indicator
STAT
PROG
Green
Green
NOTE
The STAT and PROG indicators provide the control board status indication as well as the DCN availability
indication. By default, after the ATN is powered on and automatically goes online in DCN mode, The
STAT and PROG indicators are both blinking green for 3s, indicating that the ATN has gone online. Then
the STAT and PROG indicators restore the control board status indication, and the status indication lasts
for 7s. After the DCN availability indication and status indication are alternately displayed for 10 minutes,
the STAT and PROG indicators no longer provide the DCN availability indication and only provide the
status indication.
Status
Indicator
STAT
PROG
ACTC
ACTX
Off
Off
Off
Off
Green
Off
Off
Blinking (green)
Off
Green
Green
Off
Green
Green
Off
Green
Green
Off/Green/
Blinking (green)
a
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313
SN
12 Quick Reference
Status
Indicator
STAT
PROG
ACTC
ACTX
NOTE
a: When the system control board is running, the ACTC and ACTX indicators may be off, in green or
blinking (green). When services are normal, the indicator is green. For other statuses of the indicator, see
Description of the CXP Switching Status Indicator (ACTX) and Description of the CXP Control
Status Indicator (ACTC).
The STAT and PROG indicators provide the control board status indication as well as the DCN availability
indication. By default, after the ATN is powered on and automatically goes online in DCN mode, The
STAT and PROG indicators are both blinking green for 3s, indicating that the ATN has gone online. Then
the STAT and PROG indicators restore the control board status indication, and the status indication lasts
for 7s. After the DCN availability indication and status indication are alternately displayed for 10 minutes,
the STAT and PROG indicators no longer provide the DCN availability indication and only provide the
status indication.
NOTE
The STAT and ALM indicators on the ATN 910I and ATN 910B provide the system status indication as
well as the DCN availability indication. By default, after the ATN is powered on and automatically goes
online in DCN mode, The STAT and ALM indicators are both blinking green for 3s, indicating that the
ATN has gone online. Then the STAT and ALM indicators restore the system status indication, and the
status indication lasts for 7s. After the DCN availability indication and status indication are alternately
displayed for 10 minutes, the STAT and ALM indicators no longer provide the DCN availability indication
and only provide the status indication.
Weight
Dimensions (H x D x W)
ANC2CXPI
1.08kg
ANC2CXPL
1.08kg
AND1EF8T
AND1EF8F
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12 Quick Reference
Board
Weight
Dimensions (H x D x W)
AND1EG2
AND1EG4F
AND1ML1/AND1ML1A
AND1EG4T
AND2ML1A/AND2ML1B
AND1MD1A/AND1MD1B
AND1MO1C
AND1AVD8A
AND1AVD8A
AND1SHD4
AND1SHD4I
TNC1PIU
ANC1FAN
Table 12-4 provides weight and dimensions of the boards for ATN 950B.
Table 12-4 ATN 950B board weight and dimensions
Board
Weight
Dimensions (H x D x W)
AND1CXPA/AND1CXPB
AND2CXPA/AND2CXPB/
AND2CXPE
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315
12 Quick Reference
Board
Weight
Dimensions (H x D x W)
AND1EM4T
AND1EM8T
AND1EX1
AND1EM4F
AND1EM8F
AND2CQ1BAND2PQ1
AND1ML1/AND1ML1A
AND3ML1A/AND3ML1B
AND2MD1A/AND2MD1B
TND1PIU
0.12kg
AND1FAN
0.30kg
Powe
r
Suppl
y
Interface
Weight
Dimensions (H x D x
W)
ATN 910I AC
AC
4GE(O)+4GE/FE(O)+4GE/FE(E)
ATN 910I-C AC
AC
4GE(O)+4GE/FE(O)+4GE/FE(E)
+16E1
3 Kg (6.61
lb)
ATN 910I DC
DC
4GE(O)+4GE/FE(O)+4GE/FE(E)
Issue 01 (2013-10-31)
316
Model/
Silkscreen
ATN 910I-TC DC
Powe
r
Suppl
y
Interface
DC
4GE(O)+4GE/FE(O)+4GE/FE(E)
+16E1
DC
4GE(O)+4GE/FE(O)+4GE/FE(E)
+16E1
12 Quick Reference
Weight
Dimensions (H x D x
W)
NOTE
ATN 910I boards are not swappable. Table 12-5 provides the weight and dimensions of an integrated ATN
910I chassis.
Powe
r
Suppl
y
Interface
Weight
Dimensions (H x D x
W)
ATN 910B
DC
2x10GE(O)+8GE/FE(O)+8FE/GE(E)
+16E1
3 Kg (6.61
lb)
ATN 910B
DC
2x10GE(O)+16GE/FE(O)+8FE/GE
(E)
NOTE
ATN 910B boards are not swappable. Table 12-6 provides the weight and dimensions of an integrated
ATN 910B chassis.
Issue 01 (2013-10-31)
Board
Power Consumption
ANC2CXPI
28.0 W
ANC2CXPL
29.5 W
Huawei Proprietary and Confidential
Copyright Huawei Technologies Co., Ltd.
317
12 Quick Reference
Board
Power Consumption
AND1EF8T
9.0 W
AND1EF8F
12.9 W
AND1EG2
6.1 W
AND1EG4F
13.2 W
AND1ML1/AND1ML1A
13.1 W
AND1EG4T
10.0 W
AND2ML1A/AND2ML1B
9.5 W
AND1MD1A/AND1MD1B
12.1 W
AND1MO1C
10.6 W
AND1AVD8A/AND1AVD8B
19.6 W
AND1SHD4
7.4 W
AND1SHD4I
7.5 W
TNC1PIU
0.5 W
ANC1FAN
Table 12-8 provides the power consumption of each board on ATN 950B.
Table 12-8 ATN 950B board power consumption
Issue 01 (2013-10-31)
Board
Power Consumption
AND1CXPA/AND1CXPB
27.3 W
AND21CXPA
23.6 W
AND21CXPB/AND21CXPE
28.5 W
AND1EM4T
10.4 W
AND1EM8T
21.1 W
AND1EX1
13.1 W
AND1EM4F
12.0 W
AND1EM8F
18.9 W
AND2CQ1BAND2PQ1
11.50 W
318
12 Quick Reference
Board
Power Consumption
AND1ML1/AND1ML1A
13.1 W
AND3ML1A/AND3ML1B
9.5 W
AND2MD1A/AND2MD1B
12.1 W
TND1PIU
0.5 W
AND1FAN
Power
Supply
Interface
Power
Consumption
ATN 910I AC
AC
4GE(O)+4GE/FE(O)+4GE/FE(E)
28.0 W
ATN 910I-C AC
AC
4GE(O)+4GE/FE(O)+4GE/FE(E)+16E1
32.8 W
ATN 910I DC
DC
4GE(O)+4GE/FE(O)+4GE/FE(E)
27.6 W
DC
4GE(O)+4GE/FE(O)+4GE/FE(E)+16E1
32.5 W
DC
4GE(O)+4GE/FE(O)+4GE/FE(E)+16E1
32.2 W
ATN 910I-TC DC
NOTE
ATN 910I boards are not swappable. Table 12-9 provides the power consumption of an integrated ATN
910I chassis.
Power
Supply
Interface
Power
Consumption
ATN 910B-A
DC
2x10GE(O)+8GE/FE(O)+8FE/GE(E)+16E1
52.1 W
ATN 910B-B
DC
2x10GE(O)+16GE/FE(O)+8FE/GE(E)
49.8 W
NOTE
ATN 910B boards are not swappable. Table 12-10 provides the power consumption of an integrated ATN
910B chassis.
Issue 01 (2013-10-31)
319
12 Quick Reference
An ATN device does not directly provide optical interfaces. Instead, it provides optical modules, which
support optical interfaces. Therefore, the optical interface specifications actually refer to the specifications
of interfaces on optical modules on an ATN device.
Specification
Optical interface
type
100BASE-FX
100BASE-FX
(15 km)
(40 km)
(80 km)
Encapsulation type
eSFP
eSFP
eSFP
Fiber type
Single-mode
Single-mode
Single-mode
Working wavelength
range (nm)
1261 to 1360
1263 to 1360
1480 to 1580
Mean launched
optical power (dBm)
-15 to -8
-5 to 0
-5 to 0
Receiving sensitivity
(dBm)
-28
-34
-34
Minimum overload
(dBm)
-8
-10
-10
Minimum extinction
ratio (dB)
8.2
10
10
S4015755
S4015715
34060282
Issue 01 (2013-10-31)
Item
Specification
320
Item
12 Quick Reference
Specification
100BASE-FX
100BASE-FX
STM-1
STM-1
(15 km)
(10 km)
Encapsulation type
eSFP
eSFP
Fiber type
Single-mode
Single-mode
-15 to -8
-32
-32
-8
-8
8.5
8.5
34060363
34060364
Usage description
Used together.
NOTE
A single-fiber bidirectional module receives and transmits optical signals using different working
wavelength ranges over a single optical fiber. The receiving and transmitting working wavelength ranges
of single-fiber bidirectional modules at both ends must match. As shown in Table 12-12, 34060363 and
34060364 are used together.
Issue 01 (2013-10-31)
Item
Specification
Optical interface
type
100BASE-FX
100BASE-FX
(15 km)
(40 km)
(80 km)
Encapsulation type
eSFP
eSFP
eSFP
Fiber type
Single-mode
Single-mode
Single-mode
Working wavelength
range (nm)
1261 to 1360
1263 to 1360
1480 to 1580
321
12 Quick Reference
Item
Specification
Mean launched
optical power (dBm)
-15 to -8
-5 to 0
-5 to 0
Receiving sensitivity
(dBm)
-28
-34
-34
Minimum overload
(dBm)
-8
-10
-10
Minimum extinction
ratio (dB)
8.2
10
10
S4015755
S4015715
34060282
Issue 01 (2013-10-31)
Item
Specification
Optical interface
type
100BASE-FX
100BASE-FX
(15 km)
(40 km)
(80 km)
Encapsulation type
eSFP
eSFP
eSFP
Fiber type
Single-mode
Single-mode
Single-mode
Working wavelength
range (nm)
1261 to 1360
1263 to 1360
1480 to 1580
Mean launched
optical power (dBm)
-15 to -8
-5 to 0
-5 to 0
Receiving sensitivity
(dBm)
-28
-34
-34
Minimum overload
(dBm)
-8
-10
-10
Minimum extinction
ratio (dB)
8.2
10
10
S4015755
S4015715
34060282
322
12 Quick Reference
Specification
100BASE-FX
STM-1
STM-1
(15 km)
(10 km)
Encapsulation type
eSFP
eSFP
Fiber type
Single-mode
Single-mode
-15 to -8
-32
-32
-8
-8
8.5
8.5
34060363
34060364
Usage description
Used together.
NOTE
A single-fiber bidirectional module receives and transmits optical signals using different working
wavelength ranges over a single optical fiber. The receiving and transmitting working wavelength ranges
of single-fiber bidirectional modules at both ends must match. As shown in Table 12-15, 34060363 and
34060364 are used together.
Issue 01 (2013-10-31)
Item
Specification
Optical interface
type
100BASE-FX
100BASE-FX
(15 km)
(40 km)
(80 km)
Encapsulation type
eSFP
eSFP
eSFP
Fiber type
Single-mode
Single-mode
Single-mode
323
12 Quick Reference
Item
Specification
Working wavelength
range (nm)
1261 to 1360
1263 to 1360
1480 to 1580
Mean launched
optical power (dBm)
-15 to -8
-5 to 0
-5 to 0
Receiving sensitivity
(dBm)
-28
-34
-34
Minimum overload
(dBm)
-8
-10
-10
Minimum extinction
ratio (dB)
8.2
10
10
S4015755
S4015715
34060282
Issue 01 (2013-10-31)
Item
Specification
1000BASE-BX40-D
(40 km)
(40 km)
Encapsulation type
eSFP
eSFP
Fiber type
Single-mode
Single-mode
-3 to 2
-24
-24
-3
-3
34060638
34060639
Usage description
Used together.
324
12 Quick Reference
NOTE
A single-fiber bidirectional module receives and transmits optical signals using different working
wavelength ranges over a single optical fiber. The receiving and transmitting working wavelength ranges
of single-fiber bidirectional modules at both ends must match. As shown in Table 12-17, 34060638 and
34060639 are used together.
Issue 01 (2013-10-31)
Item
Specification
Optical
interface type
1000BASELX
1000BASEVX
1000BASEZX
1000BASECWDM
(0.5 km)
(10 km)
(40 km)
(80 km)
(80 km)
Encapsulatio
n type
eSFP
eSFP
eSFP
eSFP
eSFP
Fiber type
Multi-mode
Single-mode
Single-mode
Single-mode
Single-mode
Working
wavelength
range (nm)
770 to 860
1270 to 1360
1260 to 1360
1500 to 1580
For details,
see
wavelength
allocation of
1000BASECWDM
optical
interfaces
and related
optical
module code.
Mean
launched
optical power
(dBm)
-9.5 to 0
-11 to -3
-5 to 0
-2 to 5
0 to 5
Receiving
sensitivity
(dBm)
-17
-19
-23
-23
-28
Minimum
overload
(dBm)
-3
-3
-3
-9
Minimum
extinction
ratio (dB)
8.2
325
12 Quick Reference
Item
Specification
Optical
module code
34060286
34060473
S4016954
34060360
For details,
see
wavelength
allocation of
1000BASECWDM
optical
interfaces
and related
optical
module code.
Table 12-19 Wavelength allocation of 1000BASE-CWDM optical interfaces and related optical module code
SN
Optical
module code
Wavelength (nm)
SN
Optical
module code
Wavelength (nm)
34060483
1464.5 to 1477.5
34060478
1544.5 to 1557.5
34060481
1484.5 to 1497.5
34060476
1564.5 to 1577.5
34060479
1504.5 to 1517.5
34060477
1584.5 to 1597.5
34060482
1524.5 to 1537.5
34060480
1604.5 to 1617.5
Specification
Optical
interface type
1000BASEBX10-D
1000BASEBX40-U
1000BASEBX40-D
1000BASEBX
1000BASEBX
(10 km)
(10 km)
(40 km)
(40 km)
(80 km)
(80 km)
Encapsulation
type
eSFP
eSFP
eSFP
eSFP
eSFP
eSFP
Fiber type
Single-mode
Single-mode
Single-mode
Single-mode
Single-mode
Single-mode
Working
wavelength
range (nm)
Tx: 1260 to
1360
Tx: 1480 to
1500
Tx: 1260 to
1360
Tx: 1480 to
1500
Tx: 1260 to
1360
Tx: 1480 to
1500
Rx: 1480 to
1500
Rx: 1260 to
1360
Rx: 1480 to
1500
Rx: 1260 to
1360
Rx: 1480 to
1500
Rx: 1260 to
1360
Issue 01 (2013-10-31)
326
12 Quick Reference
Item
Specification
Mean
launched
optical power
(dBm)
-9 to -3
-9 to -3
-3 to 5
-3 to 5
-2 to 4
-2 to 4
Receiving
sensitivity
(dBm)
-19.5
-19.5
-23
-23
-26
-26
Minimum
overload
(dBm)
-3
-3
-3
-3
-3
-3
Minimum
extinction
ratio (dB)
Optical
module code
34060470
34060475
34060539
34060540
34060595
34060596
Usage
description
Used together.
Used together.
Used together.
NOTE
A single-fiber bidirectional module receives and transmits optical signals using different working
wavelength ranges over a single optical fiber. The receiving and transmitting working wavelength ranges
of single-fiber bidirectional modules at both ends must match. As shown in Table 12-20, 34060470 and
34060475 are used together, 34060595 and 34060596 are used together, and 34060539 and 34060540 are
used together.
Issue 01 (2013-10-31)
Item
Specification
1000BASE-VX
1000BASE-ZX
(10 km)
(40 km)
(80 km)
Encapsulation type
eSFP
eSFP
eSFP
Fiber type
Single-mode
Single-mode
Single-mode
Working wavelength
range (nm)
1280 to 1350
1260 to 1360
1500 to 1580
-11 to -3
-5 to 3
-2 to 5
327
12 Quick Reference
Item
Specification
Receiving sensitivity
(dBm)
19
23
23
Minimum overload
(dBm)
-3
-3
-3
Minimum extinction
ratio (dB)
34060290
34060320
34060324
Specification
1000BASE-BX10-D
(10 km)
(10 km)
Encapsulation type
eSFP
eSFP
Fiber type
Single-mode
Single-mode
-9 to -3
-19.5
-19.5
-3
-3
34060644
34060676
Usage description
Used together.
NOTE
A single-fiber bidirectional module receives and transmits optical signals using different working
wavelength ranges over a single optical fiber. The receiving and transmitting working wavelength ranges
of single-fiber bidirectional modules at both ends must match. As shown in Table 12-22, 34060644 and
34060676 are used together.
Issue 01 (2013-10-31)
328
12 Quick Reference
Issue 01 (2013-10-31)
Item
Specification
Optical
interface
type
10GE
10GE
(10 km)
(40 km)
(80 km)
10GE
(CWDM)
10GE
(DWDM)
10GE
(DWDM)
(70 km)
(40 km)
(80 km)
Encapsulat
ion type
XFP
XFP
XFP
XFP
TXFP
XFP
Fiber type
Singlemode
Singlemode
Singlemode
Singlemode
Singlemode
Singlemode
Working
wavelengt
h range
(nm)
1310
1550
1550
For details,
see
wavelengt
h
allocation
of 10GE
(CWDM)
optical
interfaces
and related
optical
module
code.
1529.163
to
1560.606
(waveleng
th tunable)
For details,
see
wavelengt
h
allocation
of 10GE
(DWDM)
optical
interfaces
and related
optical
module
code.
Mean
launched
optical
power
(dBm)
-6 to -1
-1 to 2
0 to 4
0 to 4
-1 to 2
-1 to 3
Receiving
sensitivity
(dBm)
-14.4
-15
-24
-24
-16
-24
Minimum
overload
(dBm)
0.5
-1
-7
-9
-9
Minimum
extinction
ratio (dB)
8.2
10.5
8.2
329
Item
Specification
Optical
module
code
S4015772
S4015776
12 Quick Reference
S4015794
For details,
see
wavelengt
h
allocation
of 10GE
(CWDM)
optical
interfaces
and related
optical
module
code.
34060568
For details,
see
wavelengt
h
allocation
of 10GE
(DWDM)
optical
interfaces
and related
optical
module
code.
Table 12-24 Wavelength allocation of 1000BASE-CWDM optical interfaces and related optical
module code
SN
Optical
module code
Wavelength
(nm)
SN
Optical
module
code
Wavelength (nm)
34060547
1471
34060551
1551
34060548
1491
34060552
1571
34060549
1511
34060553
1591
34060550
1531
34060554
1611
Table 12-25 Wavelength allocation of 1000BASE-DWDM optical interfaces and related optical
module code
Issue 01 (2013-10-31)
SN
Optical
module code
Wavelength
(nm)
SN
Optical
module
code
Wavelength (nm)
34060532
1529.55
34060531
1548.51
34060515
1530.33
10
34060514
1549.32
34060504
1531.12
11
34060502
1550.12
34060503
1531.90
12
34060501
1550.92
34060534
1532.68
13
34060533
1551.72
34060628
1533.47
14
34060625
1552.52
34060627
1534.25
15
34060624
1553.33
330
12 Quick Reference
SN
Optical
module code
Wavelength
(nm)
SN
Optical
module
code
Wavelength (nm)
34060626
1535.04
16
34060623
1554.13
Specifications
Interface rate
Specifications
Interface rate
Specification
2048
Interface impedance
75 ohms
120 ohms
Issue 01 (2013-10-31)
Interface code
HDB3
0 to 6
331
12 Quick Reference
Item
Specification
Output jitter
Specification
1544 kbit/s
Interface impedance
100 ohm
Code
B8ZS
Anti-interference capability of
input port
Output jitter
Max.
Transmission
Distance
ADSL2+
2.5 Mbit/s
24 Mbit/s
6.5 km
332
12 Quick Reference
Max.
Transmission
Distance
VDSL2
50 Mbit/s
100 Mbit/s
3.5 km
Max.
Upstream
Rate
Max.
Downstream
Rate
Max. Four-Line
Bundling Rate
Max.
Transmission
Distance
G.SHDSL
5.7 Mbit/s
5.7 Mbit/s
23 Mbit/s
5.25 km
Issue 01 (2013-10-31)
Interface
Max.
Upstream Rate
(Mbit/s)
Max.
Downstream
Rate (Mbit/s)
Max. Rate of
Four Bundled
Interfaces
(Mbit/s)
Max.
Transmission
Distance (km)
G.SHDSL
2.3
2.3
9.2
5.25
333
A
AC
Alternating Current
ADSL
ADSL2+
APS
ATM
B
BFD
BITS
C
CAR
CBR
CC
Continuity Check
CES
Issue 01 (2013-10-31)
DC
Direct Current
DCN
DDF
DIP
334
E
EFM
ESD
ElectroStatic Discharge
eSFP
ETSI
F
FE
Fast Ethernet
G
GE
Gigabit Ethernet
GND
Ground
GRE
H
HDB3
I
IEEE
IMA
IMB
IP
Internet Protocol
ITU-T
L
L3VPN
Issue 01 (2013-10-31)
MLPPP
MPLS
335
N
NCP
NNI
NQA
NTP
O
OAM
ODF
P
PW
Pseudo Wire
PWE3
R
rt-VBR
S
SDH
SFP
SHDSL
STM-1
U
UBR
UBR+
UNI
X
xDSL
Issue 01 (2013-10-31)
336