EASWARI ENGINEERING COLLEGE, Chennai 89

DEPARTMENT OF ELECTRONICS AND

COMMUNICATION ENGG..

EC 2257 - ELECTRONICS CIRCUITS II AND

SIMULATION LAB
(IV SEMESTER ECE A & B)
LAB MANUAL

PREPARED BY

APPROVED BY

(HOD/ECE)

EC 2257

ELECTRONICS CIRCUITS II AND SIMULATION LAB

0 0 3 2

Design of following circuits

1. Series and Shunt feedback amplifiers:
Frequency response, Input and output impedance calculation
2. RC Phase shift oscillator, Wien Bridge Oscillator
3. Hartley Oscillator, Colpitts Oscillator
4. Tuned Class C Amplifier
5. Integrators, Differentiators, Clippers and Clampers
6. Astable, Monostable and Bistable multivibrators
SIMULATION USING PSPICE:
1.

Differential amplifier

2.

Active filters : Butterworth 2nd order LPF, HPF (Magnitude & Phase Response)

3.

Astable, Monostable and Bistable multivibrator - Transistor bias

4.

D/A and A/D converters (Successive approximation)

5.

Analog multiplier

6. CMOS Inverter, NAND and NOR

EC1256

ELECTRONICS CIRCUITS II AND SIMULATION LAB

7. Series and Shunt feedback amplifiers:

Frequency response, Input and output impedance calculation
8. Design of RC Phase shift oscillator: Design Wein Bridge Oscillator
9. Design of Hartley and Colpitts Oscilator
10. Tuned Class C
11. Integrators, Differentiators, Clippers and Clampers
12. Design of Astable and Monostable and Bistable multivibrators

SIMULATION USING PSPICE:

6.
7.
8.
9.
10.
11.

Differentiate amplifier
Active filter : Butterworth IInd order LPF
Astable, Monostable and Bistable multivibrator - Transistor bias
D/A and A/D converter (Successive approximation)
Analog multiplier
CMOS Inventor, NAND and NOR

0 0 3 100

EC 2257 - Electronics Circuits II And Simulation Lab

List Of Experiments
Cycle I
1. Feed Back Amplifiers (Series And Shunt)
2. Transistor RC Phase Shift Oscillator
3. Hartley Oscillator
4. Colpitts Oscillator
5.

Single Tuned Amplifier

6. Integrators, Differentiators, Clippers And Clampers

7. Astable Multivibrator
Cycle II
8. Monostable Multivibrator
9. Bistable Multivibrator
10. Differential Amplifier
11. Active Filter : Butterworth II Order LPF
12. Astable, Monostable and Transistor Bias
13. Free running Multivibrator
14. Analog Multiplier
15. CMOS Invertor

INDEX

SL DATE EXPERIMENT PAGE MARKS

FACULTY
NO.
NAME
NO.
OBTAINED SIGNATURE

1. Feed Back Amplifiers

Aim:
To design and simulate(using pspice) the current series and voltage shunt feedback
amplifiers and to calculate the following parameters with and without feedback.
1. Mid Band Gain.
2. Bandwidth and Cutoff Frequencies.
3. Input And Output Impedance

Apparatus Required:
S.No
1
2
3

Item
Transistor
Resistor
Capacitor

4
5
6

CRO
RPS
Function
Generator
Ammeters

Range
BC 107

Q.Ty
1
1

(0-30) MHz
(0-30) V
(0 1) MHz

1
1
1

(0-5) mA (ac), (0-200) A (ac)

1 each

Theory:
An amplifier whose function fraction of output is fed back to the input is called feed
back amplifier. Depending upon whether the input is in phase or out of phase with the feed
back signal, they are classified in to positive feed back and negative feed back. If the feed
back signal is in phase with the input, then the wave will have positive gain. Then the
amplifier is said to have a positive feed back.
if the feed back signal is out of phase with the input ,then the wave will have a
negative gain. The amplifier is said to have a negative feed back. The values of voltage
gain and bandwidth without feed back.

Current Series Feedback Design:

Given data: VCC =

,=

Ic =

, hie=

, f1 =

, f2=

IE = I C
Assume, VCE = VCC / 2 =
VE = VCC / 10 =
VB = VBE + VE =
RC = (VCC - VCE - VE)/ IC =
I2 = IC /10 =
V B = I 2 * R2 =
R2 = VB / I2 =
R1 = (VCC - VB) / I2 =
Find
RB = R1

R2 =

Input Impedance , Zi = ( RB

hie )

Coupling and bypass capacitors can be thus found out.

Input coupling capacitor is given by

XCi= Z i / 10 =

XCi = 1/ 2fCi =
Ci = 1/ 2f XCi =
output coupling capacitor is given by ,

Xco=(Rc

RL) / 10 =

XCo = 1/ 2 f Co =

Co = 1/ 2 f XCo =

By-pass capacitor is given by , XCE = 1/ 2fCE

CE = 1/ 2f XCE =
Design (With feedback):
Remove the emitter capacitance (CE)

= -1 / RE =
Gm = - hfe/ [(hie + RE )
D = 1+ Gm =

RB] =

Gmf = Gm / D =
Zif = Z iD =
Zof = ZoD =
Current Series Circuit Diagram:
+VCC
R1

RC
+

Cin

Co
-

B
BC107
E

RL
CE

Vin _
f = 1 KHz

R2

RE

CRO

Vo

Observation: Without Feedback

Vi =
Frequency
(Hz)

O/P
voltage
Vo (volts)

(volts)
Gain
Av=20 log (Vo/Vi)
(dB)

100
500
1K
3K
5K
7K
10 K
30 K
50 K
70 K
100 K
200 K
300 K
500 K

10

Observation: With Feedback

Vi =

Frequency
(Hz)

O/P
Voltage
Vo (volts)

(volts)

Gain
Av=20 log Vo/Vi(dB)

100
500
1K
3K
5K
7K
10 K
30 K
50 K
70 K
100 K
200 K
300 K
500 K

11

Voltage Shunt Feedback Amplifier Design (With Feedback):

Connect the feedback resistance (Rf) and feedback capacitor (Cf) as shown
in the figure.

Assume,

Rf = 68 K

XCf = Rf / 10 =
Cf = Rf / 2f x 10 =
= -1 / Rf =
Trans resistance Rm = - hfe (RB| | Rf ) (RC| | Rf ) / (RB| | Rf ) + hie =

D = 1+ Rm =
Avf = Rmf / Rs =
Rmf = Rm / D =
Zif = Zi / D =
Zof = Zo / D =

12

Voltage Shunt Feedback Circuit Diagram:

+VCC
R1

Rf

Cin

Cf

Rc

Co

B
BC107
E

RL
CE

Vin
f = 1 KHz

R2

RE

13

CRO

Vo

Observation:
Without Feedback
Vin = ------------ Volts

Frequency
(Hz)

O/P
voltage
Vo (volts)

Gain
Av = 20log(Vo/Vi)(dB)

14

100
500
1K
3K
5K
7K
10 K
30 K
50 K
70 K
100 K
200 K
300 K
500 K

With Feedback:

Vi =
Frequency
(Hz)

(volts)
O/P
voltage
(volts)

Av = 20log (Vo/Vi)(dB)

15

100
500
1K
3K
5K
7K
10 K
30 K
50 K
70 K
100 K
200 K
300 K
500 K

Model Graph (With & Without Feedback)

Without feedback
3 dB
gain
16

(dB)

3dB

f3

f1

With feedback

f2

f4

f(Hz)

f2 f1 = Bandwidth without feedback circuit

f4 f3 = Bandwidth with feedback circuit

Procedure:
The connections are made as shown in the circuit. The amplifier is checked for its correct
operation .Set the input voltage to a fixed value. Keeping the input voltage Vary the input
frequency from 0Hz to 1MHz and note down the corresponding output voltage. plot the
graph : gain (dB) Vs frequency .Calculate the bandwidth from the graph. Remove R E and
follow the same procedure.

Observation:
Theoretical
With F/B

Practical
Without F/B

With F/B

Without F/B

Bandwidth(Hz)
Transconductance
(gm)

Result:
Thus the feedback amplifier was designed, simulated (using pspice), constructed, tested
and frequency response was plotted.

Bandwidth without feedback circuit =

Bandwidth with feedback circuit =

2. Transistor RC Phase Shift Oscillator

Aim:
To design, simulate(using pspice),construct and test the transistor RC Phase shift oscillator
and to obtain its output waveform for the given frequency.

Apparatus Required:
17

S.No
1
2
3
4
5
6

Apparatus Name
Transistor
Resistor
Capacitor
CRO
RPS
Function
Generator

Range

Qty
1

BC 107
( 0 30 ) MHz
(0-30) V

1
1

(0-1 )MHz

Design:
Given data : VCC =
,
IC =

,=
, hie=

, f1 =
, R E=

IE = I C
Assume, VCE = VCC / 2 =
VE = VCC/10 =
VB = VBE + VE =
RC = (VCC - VCE - VE) / IC =

I2 = IC /10 =
V B = I 2 * R2 =

18

, f2=

R2 = VB / I2 =
R1 = (VCC - VB) / I2 =
RC1 = RC2 =
Find
RB = R1

R2 =

Input Impedance, Zi = (RB

hie) =

Coupling and bypass capacitors can be thus found out.

Input coupling capacitor is given by,
XCi = Z i / 10 =
XCi = 1/ 2fCi =

Ci = 1/ 2f XCi =
Output coupling capacitor is given by,
XCo =(Rc

RL) / 10 =

XCo = 1/ 2fCo =
Co = 1/ 2f XCo =
By-pass capacitor is given by,
XCE = 1/ 2f CE =

19

CE = 1/ 2f XCE =
Oscillator Design
Frequency f = ____________Hz
With feedback:
f = 1/ 2 6 RC
Assume,

C = 0.1F

R = 1/26 fC

Circuit Diagram:

20

Model Graph:

Theory:
The Transistor Phase Shift Oscillator produces a sine wave of desired designed
frequency. The RC combination will give a 60 phase shift totally three combination will
give a 180 phase shift. . The BC107 is in the common emitter configuration. Therefore
that will give a 180 phase shift totally a 360 phase shift output is produced. The
capacitor value is designed in order to get the desired output frequency. Initially the C and
R are connected as a feedback with respect to input and output and this will maintain
constant sine wave output. CRO is connected at the output.

21

Procedure:
1. The circuit is constructed as per the given circuit diagram.
2. Switch on the power supply and observe the output on the CRO( sine wave)
3. Note down the practical frequency and compare it with the theoretical frequency.

Observation:
Amplitude

=_____________

Time period t = ____________

Frequency 1/T = ____________
Theoretical frequency

fT =

Practical frequency

fP

Result:
Thus the RC Phase shift Oscillator designed, simulated (using pspice), constructed,
tested and the output sine waveform is drawn
Theoretical frequency

Practical frequency

22

3. Hartley Oscillator
Aim :
To design, simulate(using pspice),construct and test the Hartley oscillator and to obtain its
output waveform for the given frequency.

Apparatus Required:
1
2

S.No

Apparatus Name
Transistor
Resistor

3
4
5

Capacitor
CRO
RPS

Function
Generator
DLB, DRB

Range

Qty

BC 107

1
1

(0 30)MHZ
(0-30) V

1
1

(0- 1 ) MHz

1
1

Theory:
LC oscillator consisting of a tank circuit for generating sine wave of required
frequency. Rectifying Barkhausen criteria A for a circuit containing reactance A must be
positive and greater than or equal to unity.

Design:
Given data : VCC =
IC =

,=

, f1 =

, hie=

IE=IC
Assume, VCE = VCC/ 2 =
VE = VCC/10 =

23

, f2=

VB = VBE + VE =
RC = (VCC - VCE - VE)/ IC =
I2 = IC /10 =
V B = I 2 * R2 =
R2 = VB / I2 =
R1 = (VCC - VB) / I2 =
R1 = R3

RC1 = RC2

Find
RB = R1

R2 =

Input Impedance, Zi = (RB

hie) =

Coupling and bypass capacitors can be thus found out.

Input coupling capacitor is given by,

XCi = Z i / 10 =
XCi= 1/ 2fCi

Ci = 1/ 2f XCi =

24

output coupling capacitor is given by ,

XCO=(RC

RL) / 10 =

XCO =1/ 2fCo

Co = 1/ 2f XCO =
By-pass capacitor is given by,

XCE = 1/ 2fCE

CE = 1/ 2f XCE =
Hartley Oscillator Design
Frequency f = ____________Hz

Assume,

L1=

L2=

C=

25

Circuit Diagram :
VCC
RB1

RC

Co

C
Cin

B
BC107
E
RL

CRO

RB2
RE

CE

+ L1 -

- L2 +

C
Model Graph:

Procedure:
26

1. The circuit connection is made as per the circuit diagram.

2. Switch on the power supply and observe the output on the CRO (sine
wave).
3. Note down the practical frequency and compare it with the theoretical frequency.

Observation:
Amplitude

=_____________

Time period t = ____________

Frequency 1/T = ____________
Theoretical frequency

fT =

Practical frequency

fP =

Result:
Thus the Hartley Oscillator designed, simulated (using pspice), constructed, tested
and the output sine waveform is drawn
Theoretical frequency

Practical frequency

4. Colpitts Oscillator
27

Aim :
To design, simulate(using pspice),construct and test the transistor colpitts oscillator and to
obtain its output waveform for the given frequency.

Apparatus Required:
S.No
1
2

Apparatus Name
Transistor
Resistor

3
4
5

Capacitor
CRO
RPS

Function
Generator
DLB, DRB

Range

Qty

BC 107

1
1

(0 30)MHZ
(0-30) V

1
1

(0- 1 ) MHz

1
1

Theory:
LC oscillator consisting of a tank circuit for generating sine wave of required
frequency. Rectifying Barkhausen criteria A for a circuit containing reactance A must be
positive and greater than or equal to unity.

Design:
Given data : VCC =
IC =

,=

, f1 =

, hie=

IE=IC
Assume, VCE = VCC/ 2 =
VE = VCC/10 =

28

, f2=

VB = VBE + VE =
RC = (VCC - VCE - VE)/ IC =
I2 = IC /10 =
V B = I 2 * R2 =
R2 = VB / I2 =
R1 = (VCC - VB) / I2 =
R1 = R3

RC1 = RC2

Find
RB = R1

R2 =

Input Impedance, Zi = (RB

hie) =

Coupling and bypass capacitors can be thus found out.

Input coupling capacitor is given by,

XCi = Z i / 10 =
XCi= 1/ 2fCi

Ci = 1/ 2f XCi =

29

output coupling capacitor is given by ,

XCO=(RC

RL) / 10 =

XCO =1/ 2fCo

Co = 1/ 2f XCO =
By-pass capacitor is given by,

XCE = 1/ 2fCE

CE = 1/ 2f XCE =
Colpitts Oscillator Design:

Frequency f = ____________Hz
f = 1/ 2 LC
C1 =

C2 =

C = C1+C2
L=

30

Circuit Diagram:
+VCC
RB1

RC
0 .01F

Cin

C
B
BC107
RL
E
CRO

RE

CE

RB2

C1

C2

L
Model Graph:

31

Observation:
Amplitude

=_____________

Time period t = ____________

Frequency 1/T = ____________
Theoretical frequency

fT =

Practical frequency

fP

Result:
Thus the Colpitts Oscillator designed, simulated (using pspice), constructed, tested
and the output sine waveform is drawn
Theoretical frequency

Practical frequency

32

5. Single Tuned Amplifier

Aim:
To design, simulate(using pspice),construct and test the operation of class c tuned
amplifier and to obtain its frequency response.

Apparatus Required:
S.No
1
2

Apparatus Name
Transistor
Resistor

Capacitor

4
5

CRO
RPS
Function
Generator

Range

Qty
1
1
2
1
1
1

BC 107

(0-30) V
-

Theory:
The amplifier is said to be class c amplifier if the Q Point and the input signal are selected
such that the output signal is obtained for less than a half cycle, for a full input cycle Due to
such a selection of the Q point, transistor remains active for less than a half cycle .Hence
only that much Part is reproduced at the output for remaining cycle of the input cycle the
transistor remains cut off and no signal is produced at the output .the total
Angle during which current flows is less than 180 ..This angle is called the conduction
angle, Qc.

Design:
Given data : VCC =

,=

, f=

IE = IC
Assume,

VCE = VCC / 2 =
VE = VCC/10 =
VB = VBE + VE =
33

IC =

, hie =

I2 = IC /10 =
VB = I2 * R2 =
R2 = VB / I2 =
R1 = (VCC - VB) / I2 =
f = 1/2 LC
C=
L = 1/ (4 2 f2C)
Input Impedance, Zi = ( RB

hie )

Coupling and bypass capacitors can be thus found out.

Input coupling capacitor is given by ,

XCi = Z i / 10 =
XCi = 1/ 2fCi
Ci = 1/ 2f XCi =
output coupling capacitor is given by ,

XCO = (RC

RL) / 10 =

XCO = 1/ 2fCo
Co = 1/ 2f XCO =
34

By-pass capacitor is given by,

XCE = hie / ( 1 + ) =
CE = 1 / 2f XC =
Model Graph:

Circuit Diagram
VC C 20V

2
L1
10uH

0 .0 1 u F

1
1 .3 7 K

0 .0 7 u f
0 .0 1 u F
BC 107

1k

AFO
-

2 .2 K
15k

100uF

Procedure:
1.The connections are given as per the circuit diagram.
2.Connect the CRO in the output and trace the waveform.
35

CRO

3.Calculate the practical frequency and compare with the theoretical frequency
4.Plot the waveform obtained and calculate the bandwidth

Observation:
Vin = ------------ Volts

Frequency
(Hz)

O/P
Voltage Vo
(volts)

Gain
Av =20 log (Vo/Vi)
(dB)

100
500
1K
3K
5K
7K
10 K
30 K
50 K
70 K
100 K
200 K
300 K
500 K
Bandwidth = f 2 f 1

36

Result:
Thus the class c single tuned amplifier is designed, simulated (using pspice),
constructed, tested and the frequency response is plotted.
Theoretical bandwidth

Practical bandwidth

37

6. Integrator, Differentiator, Clippers and Clampers.

Aim:
To simulate(using pspice),construct and verify the operation of Integrator,
Differentiator, Clippers and Clampers.

Apparatus Required:
Apparatus Name

Range

Audio Oscillator
CRO
Resistors
Capacitor
Breadboard
RPS

Quantity
1
1
1
1
1

Theory:
Integrator and differentiator:

A simple low pas RC circuit can also work as an integrator when time constant is
very large. This requires very large values of R and C.The components R and C cannot be
made infinitely large because of practical limitations. However in the op-amp integrator by
MILLERs theorem, the effective input capacitance becomes Cf (1-Av), where Av is the gain
of the op-amp. The gain Av is the infinite for an ideal op-amp, so the effective time constant
of the opamp integrator becomes very large which results perfect integration.
Clipper and Clamper:
Clipping circuit clips off or removes a portion of input voltage. The circuits will allow
voltages which are above or below certain voltage level to pass through them.These are
also called as voltage limiters.
Clamping circuits are used to shift the base of the input waveform.
1.Series Positive Clipper: During the positive half of the input diode is reverse biased.
Hence it clips off the input and during the negative half of the input , it is forward biased
and will allow the waveform to appear at the output.
2. Series Negative Clipper: This circuit works exactly in the opposite way to the above.

38

3.Negative Clamper (Output Voltage = Vin-Vc) : When the input is positive maximum,
capacitor is fully charged and diode is switched on. The circuit is shorted resulting in no
output. During the next quarter of the positive half cycle, the diode is switched switch off,
as Vin < Vc i.e., Vm. So Vm output is negative. Va = -Vm Vm = - 2Vm. During the next
quarter of negative half cycle, the output reaches Vm.

Circuit Diagrams
Integrator
R 1K

0.1F
5V 1KHz

V0

Differentiator
0.1 F

5V
1K
Hz

Vo
R 1K

39

Clippers
Series Negative Clipper

D 1
1

Series Positive Clipper

2
2

V in

V7
1k

CRO

V in

V7
1k

CRO

Clampers
Negative Clamper

Positive Clamper.
0.1 F

Vin

2
D6

CRO

Vin

0.1 F

Procedure:
1.Connections are given as per the circuit diagram.
2.The resistance Rcomp is also connected to the (+) input terminal
to minimize the effect of the input bias circuit.
3.It is noted that the gain of the integrator decreases with
increasing frequency.
4.Thus the integrator circuit does not have any high frequency
problem.

40

D6

CRO

Observation

Result :
Thus the integrator, differentiator, clipper and clamper circuits are constructed, simulated
(using pspice) and tested.

41

7.Astable Multivibrator
Aim :
To design, simulate(using pspice),construct and test an astable multivibrator for the
given frequency and to obtain its output waveforms.

Apparatus Required :
S.No
1
2

Item
Transistor
Resistor

Capacitor

4
5

RPS
CRO

Range
BC107

Qty
2
2
2
2

(0-30) V
-

1
1

Theory :
Astable multivibrator has no stable state, but has two quasi stable states. The
circuit oscillates between the states (Q1 ON , Q2 OFF) and (Q2 ON , Q! OFF). The output
at the collector of each transistor is a square wave. Therefore this circuit is applied as a
square wave generator. Refer to the fig each transistor has a bias resistance RB and each
base is capacitor coupled to the collector of other transistor. When Q1 is ON and Q2 is
OFF, C1 is charged to ( Vcc VBE1) positive on the right side. For Q2 ON and Q! OFF, C2 is
charged to (Vcc VBE2) positive on the left side.

Design
Given VCC =

; IC = ; h FE =

R h FE RC
RC = VCC VC2(sat) / IC

42

;f=

R =
T = 1.38 RC =
C=

Circuit Diagram:

+VCC
RC

RC
C

C
B

VC1

BC107

BC107 V C2
E

Procedure:
1.
2.
3.
4.

The connections are given as per the circuit diagram.

Switch on the power supply.
Observe the waveform both at bases and collectors of Q1 and Q2.
Connect the CRO in the output of Q1 and Q2 and trace the square waveform.

43

Waveforms :

Result:
Thus the Astable multivibrator circuit is designed, simulated (using
pspice), constructed, tested and the output waveforms are drawn
Theoretical frequency

Practical frequency

44

8. Monostable Multivibrator
Aim:
To design, simulate(using pspice),construct and test an monostable multivibrator for
the given frequency and to obtain its output waveforms.

Apparatus Required:
S.No
1

Item
Resistor
Capacitor

2
3
4

Range

RPS
CRO

Qty
1
1
1
1
1

(0-30) V
-

Theory:
A monostable multivibrator has one stable state and a quasistable state. When it is
triggered by an external agency it switches from the stable state to quasistable state and
returns back to stable state. The time during which it states in quasistable state is
determined from the time constant RC. When it is triggered by a continuous pulse it
generates a square wave. Monostable multi vibrator can be realized by a pair of
regeneratively coupled active devices, resistance devices and op-amps.

Design :
Given VCC =

; VBB =

; Ic =

f=
RC = VCC VCE(sat) / IC =
IB2(min) = IC2 / hfe =
Select

IB2 > IB1(min) (say 25 A )

45

; VCE(sat) =

; h FE =

Then R = VCC VBE(sat) / I B 2 =

T = 0.69 RC
C=
VB1 = VBB (R1 / R1 + R2) +VCE(sat) (R2 / R1+R2)
Since Q1 is off state, VB1 less than equal to 0.
Then VBB (R1 / R1 + R2 ) = VCE(sat) (R2 / R1+R2)
VBB R1 = VCE(sat) R2
2R1 = 0.2 R2
Assume

R1 = 10 K.

Then R2 =
C1 =

Circuit Diagram :

46

+ VCC

RC

RC
R

C
B

VC1

BC107

BC107 VC2
E

E
-VBB

Procedure:
1. Connect the circuit as per circuit diagram.
2. Switch on the regulated power supply and observe the output waveform at
the collector of Q1 and Q2 and plot it.
3. Trigger the monostable multivibrator with a pulse and observe the change in
waveform.
4. Plot the waveform and observe the changes before and after triggering the input
to the circuit.

47

Observation:
C (f)

Theoritical (T=0.69 RC (ms))

Practical T(ms)

Result:
Thus the Monostable multivibrator circuit is designed, simulated (using
pspice), constructed, tested and the output waveforms are drawn
Theoretical frequency

Practical frequency

48

9.Bistable Multivibrator
Aim:
To simulate(using pspice) a bistable multi vibrator and study the performance.

Specifications:
Circuit Diagram :
VCC
12V
+V
RC1
3.9k

RB
746.66

RC2
3.9k

C2
1uF

R1
31.6k
C1
1uF

VCC1
12V
+V

Q1
2N2222

R2
37.3k
+

Q2
2N2222

D1
IN4001

VBB
10

Result:
Thus the Bistable multivibrator is simulated(using pspice) and its output waveform is
observed.

49

10. Differential Amplifier

Aim:
To Simulate the differential amplifier circuit using PSPICE and study the
waveform.
Specifications: The input voltage is 0.1v. The model parameters of the bipolar
transistors are Bf = 50,RB = 70, RC = 40.

Circuit Diagram:

R 2

R 3

10K

R 1

10K
V2

Q 1A

Q 1A

12v

1 .5 k

R 6
1 .5 K

V1

R 4

R 5

R 7
20K

150K

150 K

0
Q 1A

V3
12v

Q 1A

Q 1A

50

Program:
Vcc
VEE
VIN1
RC1
RC2
RE1
RE2
RS1
RS2
Rx

1
0
2
11
11
4
7
1
6
11

0
3
0
3
5
12
12
2
0
8

12v
12v
DC
10k
10k
150
150
1.5k
1.5k
20k

Q1
Q2
Q3
Q4
Q5

3
5
12
9
8

2
6
8
9
9

4
7
9
10
10

0.25v

QN
QN
QN
QN
QN

. TF V (3,5) VIN
END

Result:
Thus the differential amplifier is simulated(using pspice) and its output waveform is
observed.

51

11. Active Butterworth II Order LPF

Aim:
To implement a active low pass Butterworth filter using PSPICE and study the
waveform.

Apparatus Required:
PC with PSPICE software

Circuit Diagram:
R 1

0 .5 8 6 R F

VC C
3

R 2

1K R 3
2

uA741
C 1

C 2

O S1

VEE

1 V A C 0 V D C V IN
1n

O S2

O U T
V-

1K

V+

1k

0
12VD C
5
6
1

0
12VD C

1n

Program:
LOW PASS FILTER
VCC 6 0 DC 12V
VEE 0 7 DC 12V
VIN 1 0 AC 1V
R1 4 0 1K
R2 1 2 1K
R3 2 3 1K
RF 4 5 0.586K
C2 2 5 0.079 UF
C3 3 0 0.079UF
X1 4 3 6 7 5 UA 741
.LIB NOB .LIB
.AC DEC 10HZ 100HZ 1MEGHZ
.PROBE
.END

52

Result:
Thus the Active Butterworth filter (using pspice) and its output waveform is
observed.

53

12. Free Running Multivibrator

Aim:
To implement a Free running multivibrator using PSPICE and study the
waveform.

Apparatus Required:
PC with PSPICE software

Circuit Diagram:

+VCC
RC

RC
C

C
B

VC1

BC107

BC107 V C2
E

Program:
VCC 6 0 DC 12V
VEE 0 7 DC 12V
R1 1 0 100K
R2 2 3 100K
54

R3 2 3 10K
C1 3 0 0.1 UF IC = -5V
XA1 1 3 6
7 2 UA741
.LIB EVAL .LIB
.TRANS 10US 4MS UIC
.PROBE
.END

Result:
Thus the Free running multivibrator is simulated(using pspice) and its output
waveform is observed.

55

13. Analog Multiplier

Aim:
To implement an Analog multiplier using PSPICE and to obtain its output.

Apparatus Required:
PC with PSPICE software

O S1

3
4

AD 741

R 26

1k

U 2
+

O S2

O U T

O S1

1k

5
6
1

1N 4376

U 2
+

O S2

O U T
2

AD 741

D 1
1

R 26

V+

V-

O U T

V-

O S2

V-

0V

U 2

V+

V+

R 17
V8
1k

Circuit Diagram:

O S1

5
6
1

AD 741

R 27

0V

4
3

V8
1k

U 2

V+

R 17

O S2

V-

O U T
O S1

1k

6
1

0
0

AD 741

Program:
V1 1 0 1V
V2 4 0 1V
R1 1 2 1K
R2 4 5 1K
R3 3 7 1K
R4 6 7 1K
R5 7 8 1K
R6 10 0 1K
D1 2 3 DA
D2 5 6 DA

56

D3 8 9 DA
.MODEL DA D
X1 2 0 3 IOP
X2 5 0 6 IOP
X3 7 0 8 IOP
X4 9 0 10 IOP
.SUBCKT IOP M P V0
RI M P 1G
E V0 0 P M 2E5
.ENDS
.DC V1 -1 1 0.1
.PROBE
.END

Result:
Thus the analog multiplier is simulated(using pspice) and its output is observed.

57

14. A CMOS Inverter

Aim:
To implement a CMOS inverter using PSPICE

Apparatus Required:
PC with PSPICE software

Circuit Diagram:

Program:
VDD 2 0 5V
VIN 1 0 DC 5V PULSE (0 5V 0 1NS 1NS
RL 3 0 100k
M1 3 1 2 2 PMOD L=1U W= 20U
M2 3 1 0 0 NMOD L=1U W= 5U

58

20US

40US)

.TRAN 1US 80US

.TF V(3) VIN
.OP
.PLOT TRAN V(3) V(1)
.PROBE

Result:
Thus the CMOS inverter is simulated (using pspice) and its output is observed.

59