59. The transformation of date from main memory to cache memory is called
____________ process.
A. execution. B. mapping. C. unmapping. D. loading. ANSWER: B
60. The basic component of arithmetic circuit is________.
A. parallel subtractor. B. parallel adder. C. half adder. D. full adder. ANSWER: B
61. The micro operation that specifies binary operations for strings of bits stored
in registers are___________.
A. logic micro operation. B. shift micro operation. C. arithmetic micro operation.
D. register transfer micro operation ANSWER: A
62. The addition and subtraction operations can be combined into one common
circuit by including a _______________ gate with each full adder.
A. exclusive-OR. B. AND. C. OR. D. NAND. ANSWER: A
63. The name of the operation that complements bits in A register where there
are corresponding 1's in B register is _______.
A. selective set. B. selective complement. C. selective clear. D. mask. ANSWER: B
64. LIFO stands for _______________.
A. last in flag out. B. last in first out. C. loop in first out. D. loop in flag out
ANSWER: B
65. The storage devices that stores information in a manner that the item stored
last in first item retrieved is__________.
A. queue. B. stack. C. CPU. D. register. ANSWER: B
66. The operation of deletion in stack is____________.
A. PUSH. B. POP. C. FRONT. D. REAR. ANSWER: B
67. SP stands for _____________.
A. Storage Pointer. B. Seek Pointer. C. Stack Pointer. D. Synchronous Pointer
ANSWER: C
68. The expansion of RPN is ____________.
A. Reverse Polish Notation. B. Review Polish Notation. C. Reverse Pointer
Notation. D. Review Pointer Notation. ANSWER: A
69. The notation A+B is ______________.
A. prefix notation. B. postfix notation. C. infix notation. D. none of these.
ANSWER: C
70. The bits of the instruction are divided into groups called______________.
A. formats. B. fields. C. bytes. D. address. ANSWER: B
71. ADD R1, A, B is_______________.
ANSWER: A