Swarnandhra College of Engineering & Technology

Seetharamapuram, NARSAPUR, W.G. Dt., 534 280.

Dept of Electrical & Electronics Enginerring
PROGRAMME:

COURSE INFORMATION SHEET- XXXXX Name of the subject

Under Graduate
DEGREE: BTECH

COURSE: Electronics and Communication Engineering

SEMESTER: II-II

CREDITS: 4

COURSE CODE:
04
REGULATION:R10
COURSE AREA/DOMAIN: Switching Theory and Logic Design

COURSE TYPE: CORE /ELECTIVE / BREADTH/ S&H

CORRESPONDING LAB COURSE CODE (IF ANY):

LAB COURSE NAME:

CONTACT HOURS: 3+1 (Tutorial) hours/Week.

SYLLABUS:
UNIT
DETAILS
I

II

III

IV

VI

VII

VIII

HOURS

Review of Number systems: Representation of numbers of different radix, conversion of numbers

from one radix to another radix, r-1s complement and rs complement of unsigned numbers
subtraction, problem solving. Signed binary numbers, different forms, problem solving for
subtraction. 4-bit codes: BCD, EXCESS 3, alphanumeric codes, 9s complement, 2421, etc
Logic operation, error detection and correction codes: Basic logic operations NOT, OR, AND,
Boolean theorems, Complement and dual of logical expressions, NAND and NOR Gates, EX-OR,
EX-NOR Gates, standard SOP and POS, Minimisation of logic functions using theorems, Generation
of self dual functions. Gray code, error detection and error correction codes, parity checking even
parity, odd parity, Hamming code, multi leveled AND-NOR Realisations. Two level NAND-NAND
and NOR-NOR realizations. Degenerative forms and multi level realizations.
Minimisation of switching functions: Minimisation of switching functions using K-Map up to 6variables, Tabular minimization, minimal SOP and POS Realisation. Problem solving using K-map
such as code converters binary multiplier etc.
Combinational logic circuits-I: Design of Half adder, full adder, half subtractor, full subtractor,
applications of full adders, 4-bit binary adder, 4-bit binary subtractor, adder-subtractor circuit, BCD
adder circuit Excess3 adder circuit, look-a-head adder circuit.
Combinational logic circuits-II: Design of decoder, Demultiplexer, higher order demultiplexing,
encoder, multiplexer, higher order multiplexer, realization of Boolean functions using decoders and
multiplexers, priority encoder, different code converter using full adders.
Combinational logic circuits-III: PROM,PLA,PAL, realization of switching functions using
PROM,PLA and PAL; comparison of PROM, PLA and PAL, Programming tables of PROM,PLA and
PAL.
Sequential circuits I: Classification of sequential circuits (synchronous and asynchronous): basic
flip-flops, truth tables and excitation tables (NAND -RS latch, NOR- RS latch, RS flip-flop. JK flipflop, T flip-flop, D flip-flop with reset and clear terminals).Conversion of flip-flop to flip-flop.
Design of ripple counters, design of synchronous counters, Johnson counters, ring counters. Design
of registers, Buffer register, control buffer register, shift register, bi-directional shift register, universal
shift register.
Sequential circuits II: Finite state machine, capabilities and limitations, analysis of clocked
sequential circuits, design procedures, reduction of state tables and state assignment. Realization of
circuits using various flip-flops. Meelay to Moore conversion and vice-versa.
TOTAL HOURS

11

60

TEXT/REFERENCE BOOKS:
T/R
BOOK TITLE/AUTHORS/PUBLICATION
T1
T2
T3
R1
R2

Switching Theory and Logic Design by Hill and Peterson, Mc-Graw hill MH edition
(T1).
Digital Design by Mano, 2nd edition, PHI. (T2)
Modern Digital Electronics by R.P.Jain (T3
Switching Theory and Logic Design by A. Ananda Kumar.
Fundamentals of Logic Design by Charles H. Roth Jr, Jaico Publishers.

COURSE PRE-REQUISITES:
C.COD
COURSE NAME
E

Mathematics

DESCRIPTION
Number system

SE
M
I-I

COURSE OBJECTIVES: The purpose of Switching Theory & Logic Design is

1
2
3
4

To interpret different number systems ,familiar with basic postulates of Boolean algebra and to correlate between
Boolean expressions and their corresponding logic diagrams.
To learn and compare the map method and tabular minimization employed for simplifying Boolean expressions
To analyze and design combinational arithmetic and logic circuits and to study various sequential circuit components
such as flip flops ,registers, shift registers and counters.
To develop an in-depth understanding of programmable logic devices.

COURSE OUTCOMES:
SNO

1
2
3
4
5

Upon completion of this course, students should be able to

DESCRIPTION

Compare the different types of number systems and elucidate the fundamental postulates of
Boolean algebra, its basic theorems and its properties like algebraic simplification
To reconstruct switching functions by using map method and also by using Tabulation method
Analyze and design various digital combinational logic circuits and synchronous sequential logic
circuits.
To model switching functions using PROM, PLA and PAL.
Analyze and design sequential circuits with the knowledge of state table, excitation table and
state diagram.

PO
MAPPIN
G
A,E
A,B
B
B,H
B

GAPS IN THE SYLLABUS - TO MEET INDUSTRY/PROFESSION REQUIREMENTS:

SN
DESCRIPTION
PROPOS
PO
O
ED
ACTIONS
1
IC PRODUCTION IS NOT INCLUDED IN THE SYLLABUS
PPT
H
2
COMPARISION OF DIFFERENT LOGIC FAMILIES
PPT
C
3
ASM CHARTS
ADD ON
C
COURSE
PROPOSED ACTIONS: TOPICS BEYOND SYLLABUS/ASSIGNMENT/INDUSTRY VISIT/GUEST
LECTURER/NPTEL ETC
TOPICS BEYOND SYLLABUS/ADVANCED TOPICS/DESIGN:
1
ASM CHARTS
2
WEB SOURCE REFERENCES:
1
www.nptel.com
2
www.en.wikipedia.org
3
www.thelearningpoint.ne
4
oureducation.in
5
DELIVERY/INSTRUCTIONAL METHODOLOGIES:
CHALK & TALK
STUD.
WEB
ASSIGNMENT
RESOURCES
STUD. SEMINARS
LCD/SMART
ADD-ON
BOARDS
COURSES
ASSESSMENT METHODOLOGIES-DIRECT
ASSIGNMENTS
STUD. SEMINARS
TESTS/MODEL EXAMS UNIV. EXAMINATION
STUD. LAB
STUD. VIVA
MINI/MAJOR
CERTIFICATIONS
PRACTICES
PROJECTS
ADD-ON COURSES
OTHERS
ASSESSMENT METHODOLOGIES-INDIRECT
ASSESSMENT OF COURSE OUTCOMES (BY
STUDENT FEEDBACK ON FACULTY (TWICE)
FEEDBACK, ONCE)
ASSESSMENT OF MINI/MAJOR PROJECTS BY EXT.
OTHERS
EXPERTS
Prepared by

Approved by

(Faculty)

(HOD)