DIODE CIRCUITS_EX
EXAMPLE 1.1
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...(i)
...(ii)
I1 = 15.692 mA
I2 =- 5.743 mA
Step 4: Now we verify our initial assumption that diode is ON.
(i) Since I1 is positive (current through diode is from p to n ),
diode D1 is On and our assumption is true.
(ii) Since I2 is negative, our initial assumption that D2 is ON is
incorrect. Hence we conclude that D2 is OFF.
Step 5: Now, we repeat the analysis by assuming that D2 is OFF.
Since D2 is OFF, I2 = 0 . Substituting I2 = 0 in Eq (i), we get
Diode Circuits_Ex
Chapter 1
10.02I1 + 10 # 0 = 99.8
I1 = 9.96 mA
Step 6: Again we verify our assumption that D1 is ON and D2 is OFF.
Since I1 is positive, D1 is ON. To confirm that diode D2 is indeed
OFF, we find the voltage across it. By writing KVL in the second
half loop, we get
- 0.02I1 - 0.2 + VD2 = 0
1.02I1 + I2 = 99.8
Writing KVL in the second half loop, we get
...(iii)
...(iv)
I1 = 53.74 mA
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and
I2 = 44.99 mA
Since both currents are positive, our initial assumption that diodes
D1 and D2 are ON is correct. However we can verify this by finding
voltages across the diodes. If we calculate the voltages across diodes
D1 and D2 , they are
VD1 = 0.02I1 + 0.2
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Page 3
SOLUTION :
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5 - 4.7I - Vo = 0
So,
Vo = 5 - 4.7I
= 5 - _4.7i_0.869i = 0.915 V
(c) V1 = 5 V , V2 = 0 V
In this case diode D1 will be OFF and D2 will be ON. So we can
replace D1 by an open circuit and D2 by its piecewise linear equivalent
model. Therefore, the resultant circuit becomes exactly same as that
of case (b). Hence, output Vo = 0.915 V
(d) V1 = 0 V , V2 = 0 V
In this case both the diodes D1 and D2 will be ON, so we replace them
by their piecewise linear equivalent model. The resultant circuit is
shown in Figure below.
Diode Circuits_Ex
Chapter 1
We can see that both the parallel branches have same resistance
and sources, so current through them will be equal. Due to this
symmetry we assume that current through each parallel branch is I
and therefore current through 4.7 kW resistance would be 2I . Writing
KVL around the upper loop only, we get
5 - 2IR - 0.030I - 0.6 - 0.33I = 0
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Vo = 5 - 2IR
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SOLUTION :
Diode Circuits_Ex
Page 5
...(i)
I1 = 0.06469 A . 64.7 mA
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...(ii)
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I2 = 0.03089 A . 31 mA
Step 4: Now we verify our initial assumption that diode D1 and D2
are ON. Since both I1 and I2 are positive, diode D1 and D2 are ON
and our assumption is true. Hence, current through 22 W resistance
is I2 . 31 mA .
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Substituting I2 = 0 , we get,
Diode Circuits_Ex
Chapter 1
Vx = 47I1 - 0.06
The circuit shown in Fig// contains two identical Si diodes with cutin voltage Vg = 0.7 V and zero forward resistance. Determine the
diode current I1 , I2 and output voltage Vo , if the input
(a) Vi = 0 and
(b) Vi = 4 V
SOLUTION :
(a) Vi = 0
Step 1 : First we guess the states of diodes. From the applied polarity
of source. We assume that both D1 and D2 are forward biased.
Step 2 : We replace both the diode by their simplified equivalent
model. The resultant circuit is as shown in figure.
Step 3 : Now the resultant circuit is simple resistive circuit with dc
sources. We can apply KVL and KCL in the circuit. By writing KVL
in the left half loop.
- 0.7 - 10k _I1 + I2i + 5 = 0
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I1 + I2 = 0.43 mA
By writing KVL in the second half loop
...(i)
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I1 + 1.5I2 = 0.93 mA
Solving Eq. (i) and (ii), we get
...(ii)
I1 = 0.57 mA
I2 = 1 mA
Step 4 : Now, we verify our initial assumption that diode both diodes
D1 and D2 are ON. Since current through I1 is negative, our assumption
that D1 is ON is incorrect. However, I2 is positive so D2 is ON.
Step 5 : Now we repeat the analysis by assuming that D1 is OFF and
D2 is ON. Since D1 is OFF I1 = 0 . D1 can be replaced by an open
circuit as shown in figure.
By applying KVL
5 - _5k i I2 - 0.7 - _10k i I2 + 5 = 0
_15k i I2 = 10 - 0.7
I2 = 9.3 = 0.62 mA
15k
Output voltage can be obtained by writing KVL including V0 .
Diode Circuits_Ex
Page 7
V0 + 5I2 - 5 = 0
V0 = 5 - 5I2
= 5 - 5_0.62i
= 1.9 V
Thus for Vi = 0 , we have I1 = 0 , I2 = 0.62 mA , V0 = 1.9 V
(b) Vi = 4 V
Step 1 : Again, we assume that both D1 and D2 are forward biased.
Step 2 : We replace both the diodes by their simplified equivalent
circuit as shown in the figure.
I1 + I2 = 0.83 mA
Writing KVL in the second half loop we get
5 - _5k i I2 - 0.7 - _10k i_I1 + I2i + 5 = 0
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I1 + 1.5I2 = 0.93 mA
Solving Eq. (i) and (ii), we get
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...(i)
...(ii)
I1 = 0.63 mA
I2 = 0.2 mA
Step 5 : Since both I1 and I2 are positive, our assumption that D1 and
D2 are ON is true.
Output voltage can be obtained by writing KVL,
V0 + 5I2 - 5 = 0
V0 = 5 - 5I2
= 5 - 5_0.2i
=4V
EXAMPLE 1.5
Diode Circuits_Ex
Chapter 1
SOLUTION :
(a) V1 = 10 V , V2 = 0
Step 1 : We can assume that is this case diode D1 is forward biased
and D2 is reverse biased.
Step 2 : Replace D1 by piecewise linear model and D2 by an open
circuit. The resultant circuit is shown in figure. Current through D2
is I2 = 0 .
V0 = _9.5k i_I1i
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(b) V1 = 10 V , V2 = 5 V
Step 1 : Since V1 and V2 are positive, in the circuit cathodes of Diode
D1 and D2 are also positive with respect to their anodes. Hence we
assume both D1 and D2 are forward biased.
Step 2 : By replacing D1 and D2 with their piecewise linear model, we
obtain the equivalent circuit as shown in the figure.
Diode Circuits_Ex
Page 9
...(i)
...(ii)
10I1 + 9.5I2 = 4.4 mA
Step 4 :
We can see that Eq. (i) and (ii) can not be true. It implies that any of
our assumption is not true. Let us assume that D1 is forward biased
and D2 is reversed biased.
Replacing D1 with its piecewise linear model and D2 by its open
circuit we obtain the equivalent circuit as shown in figure.
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_10k i I1 = 10 - 0.6
I1 = 9.4 = 0.94 mA
10k
Since I1 is positive, our assumption that D1 is ON is true.
Output voltage
V0 = _9.5k i I1
Diode Circuits_Ex
Chapter 1
Since both the parallel branches are identical, current through them
will be equal current through 9.5 kW resistor is therefore I + I = 2I .
Writing KVL in the upper half loop
10 - _0.5k i I - 0.6 - _9.5k i_2I i = 0
_19.5k i I = 10 - 0.6
I = 9.4 = 0.482 mA
19.5k
Thus, current through diodes
I1 = I2 = 0.482 mA
Output voltage
V0 = _9.5k i_2I i
= 9.5 # 2 # 0.482
- 9.16 V
EXAMPLE 1.6
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SOLUTION :
(a) R1 = 5 kW , R2 = 10 kW
Step 1 : First we assume that both D1 and D2 are ON.
Step 2 : Replacing D1 and D2 by their simplified equivalent model, we
obtain an equivalent circuit as shown in figure.
Step 3 : By applying KVL in the first half loop
10 - _5k i I1 - 0.6 = 0
I1 = 10 - 0.6 = 1.88 mA
5k
Applying KVL in second half loop
0.6 - 0.6 - _10k i I2 + 10 = 0
Diode Circuits_Ex
Page 11
I2 = 10 = 1 mA
10k
Since both ID1 and I2 are positive D1 and D2 are ON and our initial
assumption is true current through diode D1
ID1 = I1 - I2
= 1.88 - 1 = 0.88 mA
(b) R1 = 10 kW , R2 = 5 kW
Step 1 : Again, we assume that both the diodes D1 and D2 are ON.
Step 2 : Replacing D1 and D2 by their simplified equivalent circuit, we
obtain the resultant circuit as shown in the figure.
Step 3 :
Applying KVL in the left half loop, we get
10 - _10k i I1 - 0.6 = 0
I1 = 10 - 0.6 = 0.94 mA
10k
Applying KVL in the second half loop
0.6 - 0.6 - _5k i I2 + 10 = 0
I2 = 2 mA
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= 0.94 - 2 =- 1.06 mA
Since ID1 is negative, our assumption that D1 is ON is not true.
Step 4 : Now we perform the analysis again by assuming that D1 is
OFF and D2 is ON. Since D1 is OFF ID1 = 0 . The equivalent circuit
is shown in figure.
Applying KVL
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_15k i I2 = 20 - 0.6
I2 = 19.4 = 1.29 mA
15k
Output voltage
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V0 = _5k i I2 - 10
= _5 # 1.29i - 10 =- 3.55 V
EXAMPLE 1.7
For the circuit shown below determine ID , V1 , V2 and Vo . Assume cutin voltage for Si diode is 0.7 V.
SOLUTION :
The diode is in the on state since the anode has positive potential and
the cathode negative potential. The equivalent circuit is shown below.
Applying KVL to the circuit of Fig. A, we get
Diode Circuits_Ex
Chapter 1
V2 = ID _ 5i = _1.68i_ 5i = 8.4 V
From the circuit of Fig. B
ID =
Vo - _- 6i
5
Vo = ID _ 5i - 6 = _1.68i_ 5i - 6 = 2.4 V
Alternatively, applying KVL to the path consisting of Vo , V2 and 6 V
battery we have
Vo - V2 + 6 = 0
Vo = V2 - 6 = 8.4 - 6 = 2.4 V
Step 1 : By observing the polarities of applied source, we assume that
diode D is ON.
Step 2 : Replacing diode with its simplified model, we obtain an
equivalent circuit as shown in figure.
Step 3 : Applying KVL in the circuit
20 - _10k i ID - 0.7 - _5k i ID + 6 = 0
_15k i ID = 26 - 0.7
ID = 25.3 = 1.68 mA
15k
Step 4 : Since ID is positive, out assumption that diode is ON is true.
V0 = V2 - 6
= 8.4 - 6 = 2.4 V
EXAMPLE 1.8
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Determine Vo and ID for the circuits shown in Figure (a) and (b).
Assume cut-in voltage for Si diode is 0.7 V.
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SOLUTION :
- 10 + 0.7 + _5 ki ID = 0
Diode Circuits_Ex
Page 13
ID = 9.3 = 1.86 mA
5k
Rewriting KVL equation using Vo we have
- 10 + 0.7 - Vo = 0
Vo =- 9.3 V
(b) Again, the diode is in the on stage. Replacing diode by its
simplified model, we obtain the equivalent circuit as shown in Figure.
Writing KVL in the circuit, we get
12 - ID _10 k + 5 ki - 0.7 = 0
ID = 11.3 = 0.753 mA
15 k
Rewriting KVL equation using Vo , we get
12 - ID _10 ki - Vo = 0
EXAMPLE 1.9
For each of the circuits shown in Figure (a) and (B), determine Vo and
ID . Assume the diodes are Si diodes with a cut-in voltage of 0.7 V.
SOLUTION :
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(a) First we convert the current source into its equivalent voltage
source as shown in Figure.
V1 = _20i_ 1 i = 20 V
The diode in the circuit is forward bias, therefore we replace it by
Diode Circuits_Ex
Chapter 1
Output voltage,
Vo = ID _2 ki = _6.43i_ 2i = 12.86 V
20 - ID _10 ki - Vo = 0
Vo = 20 - _2.43i_10i =- 4.3 V
EXAMPLE 1.10
For each of the circuits shown in Figure (a) and (b), determine ID ,
Vo1 and Vo2 . Given that cut-in voltage for Si diode is 0.7 V and for Ge
diode is 0.3 V.
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SOLUTION :
(a) As we can see, both the diodes are ON in the circuit of Figure(a).
We replace both the diode by their simplified equivalent model as
shown in Figure.
Applying KVL we have
Output voltage,
Vo2 = 0.3 V
Writing KVL equation to the left part of the circuit including Vo1 , we
get
Diode Circuits_Ex
Page 15
15 - 0.7 - Vo1 = 0
Vo1 = 14.3 V
(b) Since cathodes of both the diode is negative with respect to
anodes, they are in ON state. Replacing diode by their simplified
model, we obtain the equivalent circuit as shown in figure.
Applying KVL equation to the circuit
- 20 + 0.7 + 0.3 + ID _5 ki + ID _10 ki = 0
ID = 19 = 1.26 mA
15 k
Applying KVL equation to the left part of the circuit, we get
- 20 + 0.7 + 0.3 - Vo1 = 0
Vo1 =- 19 V
Output voltage,
EXAMPLE 1.11
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By seeing the polarity of applied source, we can assume that both the
diode are forward biased. So, we replace them by simplified equivalent
model. The resultant circuit is shown in Figure.
From the equivalent circuit, we have
Vo1 = 0.7 V
and
Current in 10 kW,
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Vo2 = 0.3 V
I1 = 15 - Vo1 = 15 - 0.7 = 1.43 mA
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Current in 1 kW,
Since,
I1 = I + I2
(KVL)
We can see that both the diodes are in the conducting state. Replacing
them by their equivalent circuit, we obtain the circuit as shown in
figure.
From the equivalent circuit, we have
Vo = 0.7 V
Diode Circuits_Ex
Chapter 1
Since both the parallel branches are identical, current through them
will be equal
ID1 = ID2
I = ID1 + ID2
So,
So,
I = 2ID1 = 2ID2
I = 12 - Vo = 12 - 0.7 = 11.3 mA
1k
1k
ID1 = ID2 = I = 5.65 mA
2
EXAMPLE 1.13
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Step 2: We now identify the input voltage level for which diode D will
be OFF. In the negative half-cycle, when the instantaneous amplitude
Diode Circuits_Ex
Page 17
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or,
vo = vi + 5
So input voltage waveform will be shifted upward by + 5 V as shown
in Figure. Since vi changes between 0 and + 15 V , vo changes between
+ 5 V and + 20 V .
Step 2: We now identify the input voltage level when diode D is OFF.
On that when vi =- 10 V , diode will be OFF and acts as an open
circuit as shown in the Figure. Output voltage will be zero in this
case. Input output voltage waveforms are shown in the Figure.
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Diode Circuits_Ex
Chapter 1
EXAMPLE 1.14
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Page 19
Output voltage,
vo = i1 (10 k) + 2
Substituting i1 from Eq (i) into Eq (ii), we get
vo = c vi - 2 m_10i + 2
20
...(i)
...(ii)
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...(iii)
vo = 1 vi + 1
2
Therefore, in this condition, each value of input is multiplied by 0.5
and shifted upward by + 1 V . At the peak value of input, vi = 8 V ,
output will be vo = 5 V .
Step 3: In the negative half cycle when - 4 V < vi < 0 , both D1 and
D2 are OFF and replaced by open circuits as shown in Figure. Hence,
the output will be same as input under this range of input.
Step 4: In negative half cycle when vi #- 4 V , anode of diode D2
becomes less negative compared to cathode and it gets forward biased.
However, D1 remains OFF in this input range. Replacing D1 by an
open circuit and D2 by short circuit, we obtain an equivalent circuit
as shown in Figure. Output in this case will be vo =- 4 V .
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Diode Circuits_Ex
Chapter 1
EXAMPLE 1.15
The input voltage for the circuit shown in Figure (a) is shown in
Figure (b). Determine the waveform of output voltage vo . Assume
diodes D1 and D2 are Si diodes with Vg = 0.7 V .
SOLUTION :
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Diode Circuits_Ex
Page 21
vo =- 5 - 0.7 =- 5.7 V
Step 3: Note that in positive half cycle when the input vi < 5.7 , both
the diodes D1 and D2 are off and acts as open circuit as shown in
Figure. Therefore, for this input range output vo = vi .
Step 4: Similarly in the negative half cycle when the input - 5.7 < vi < 0
, both the diodes D1 and D2 are off and acts as open circuit as shown
in Figure. Therefore, also for this input range output vo = vi . The
input output waveforms are shown in Figure.
EXAMPLE 1.16
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SOLUTION :
(a) We can see that in positive half cycle, diode D1 is forward biased.
Diode Circuits_Ex
Chapter 1
Now, the circuit to the left of points A and B can be replaced by its
Thevenin equivalent. Thevenin voltage and resistance can be obtained
by the circuits of Figure and Figure respectively.
Thevenin Voltage,
vTh = 10 vi = 20 sin wt
10 + 10
Thevenin Resistance,
RTh = 10 k + _10 k || 10 ki = 15 k
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Diode Circuits_Ex
Page 23
vo = vi
For vi > 20 V ,
vo = 10 V
For vi < 0 ,
vo = 0
Figure// shows input waveform, VTh waveform and output waveform
vo . As seen from figure, D2 starts conducting when vo = 10 V , i.e.,
when vTh = 20 sin wt
Therefore,
wt1 = 30c
EXAMPLE 1.17
SOLUTION :
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Diode Circuits_Ex
Chapter 1
Step 3: During the negative half cycle, when vi becomes more negative
then - 7.3 - 0.7 =- 8 V , D2 conducts. However, D1 will be OFF in
the entire negative half cycle. The equivalent circuit for this input
range is shown in Figure.
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Step 3: Note that in negative half cycle, when the input - 8 V < vi < 0
, both diode are OFF in this condition also and output is same as
input. The input output voltages are shown in Figure below.
EXAMPLE 1.18
Diode Circuits_Ex
Page 25
SOLUTION :
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vTh H 5 + 0.5
or
vTh H 5.5 V
In that case, diode can be replaced by its piecewise linear model as
shown in figure.
RTh = 200 W || 50 W = 40 W
Diode Circuits_Ex
Chapter 1
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EXAMPLE 1.19
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2v0 - 6 + v0 - 10 = 0
So,
v0 = 16 V = VA
3
Step 2 : We can see from the figure that D1 will remain OFF until
vi < VA or vi < 163 V . We can also verify this by knowing the directions
of current. This can be calculated as follows :
Let D1 starts conducting and D2 is also forward biased. So the
equivalent circuit is shown as below.
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In this case
vi = VA
I1 = vi - 3 + vi - 10
10k
20k
I1 = vi c 3 m - c 16 m
20
20
If D1 will be forward biased then I1 > 0
So
vi c 3 m - c 16 m > 0
20
20
vi > 16 V
3
So, when vi > 16 V , v0 = vi
(D1 ON, D2 ON)
3
(D1 OFF, D2 ON)
and, when vi < 16 V , v0 = 16 V
3
3
Step 3 : From the figure // we can see that D2 will remain ON until
Diode Circuits_Ex
Chapter 1
Output voltage :
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EXAMPLE 1.20
Diode Circuits_Ex
Page 29
SOLUTION :
Step 1 : From the figure we can see that as input increase from 0
to 120 V, first diode D2 will start conducting because its cathode
is connected at a less voltage (15 V) as compared to cathode of D2
_75 Vi .
Step 2 : We find the input level for which D2 starts conducting. Let D1
is OFF is this input range. The equivalent circuit is shown in figure.
Current through D2
I2 = vi - 15 = vi - 15
100 + 200
300
For D2 to ON, I2 should be positive
I2 > 0
vi - 15 > 0
or
300
vi > 15 V
In this case, output will be
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v0 = vi - 100I2
= vi - 100 c vi - 15 m
300
So, when vi > 15 V
( D1 OFF, D2 ON)
v0 = 2 vi + 5
3
Step 2 : Note that for vi < 15 V , both D1 and D2 are OFF and the
equivalent circuit is shown in figure.
So,
(D1 OFF, D2 OFF)
v0 = 15 V , when vi < 15 V
Step 3 : Now we find the input level at which D1 also starts conducting.
If both D1 and D2 are conducting, equivalent circuit becomes as shown
in figure,
Writing node equation
I1 + I2 + 75 - vi = 0
100
I1 + 75 - 15 + 75 - vi = 0
200
100
Diode Circuits_Ex
Chapter 1
I1 + 60 + 75 - vi = 0
200
100
I1 + 60 + 150 - 2vi = 0
200
I1 + 210 - 2vi = 0
200
I1 = 2v1 - 210
200
D1 conducts, if I1 is positive, so
I1 > 0
2vi - 210 > 0
200
vi > 105 V
or
So, when
vi = 105 V , v0 = 75 V
From the results of step 1-4, we have
for vi < 15 V ,
EXAMPLE 1.21
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Draw the output vo of the circuit shown in Figure (a) for a sinusoidal
input shown in Figure (b). Assume the diodes are ideal.
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Page 31
SOLUTION :
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EXAMPLE 1.22
Draw the output voltage waveform for the circuit shown in Figure
(b) if the sinusoidal signal shown in Figure (a) is applied. Given that
cut-in voltage of diode is 0.7 V.
Diode Circuits_Ex
Chapter 1
SOLUTION :
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Page 33
EXAMPLE 1.23
(a)
(i) For - 10 # vi # 0 , both diodes are conducting, so the equivalent
circuit is as shown in Figure. The output in this input range is
vo = 0 .
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i1 = 0 ,
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vo = 0
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(iii) For vi 2 3 , zener diode goes into breakdown and acts as a voltage
source of 3 V with polarity as shown in Figure. Diode D remains
OFF in this condition as its cathode becomes positive w.r.t. its
anode.
Diode Circuits_Ex
Chapter 1
vi - i1 _10 ki - 3 - i1 _10 ki = 0
i1 = vi - 3 mA
20
Output voltage,
vo = 10i1 = c vi - 3 m_10i
20
= 1 vi - 1.5
2
At vi = 10 V , vo = 3.5 V , i1 = 0.35 mA
Using above results we can draw the transfer characteristics of the
circuit as shown in Figure below.
(b) For vi 1 0 , both diodes forward biased. The equivalent circuit is
as shown in Figure. From the circuit,
i1 = vi - 0
10
At vi =- 10 V ,
i1 =- 1 mA
For 0 # vi # 3 ,
i1 = 0
i1 = vi - 3
20
For vi 2 3 ,
At vi = 10 V ,
i1 = 0.35 mA
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EXAMPLE 1.24
(a) First we find the input voltage level at which diode D starts
Diode Circuits_Ex
Page 35
EXAMPLE 1.25
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Diode Circuits_Ex
Chapter 1
SOLUTION :
(a) First consider the circuit of Figure (b). When input voltage
vi =+ 20 V , cathode of diode will be at 20 + 2 = 22 V . Since, cathode
is positive w.r.t anode, diode will be OFF and acts as an open circuit
as shown in figure.
Therefore v0 = 0
Now, when input become negative i.e. vi =- 5 V , cathode of diode
will have a voltage equal to - 5 + 2 =- 3 V . Since cathode is negative
w.r.t anode and diode will be ON. An ideal diode _Vg = 0i can be
replaced by short circuit as shown in figure.
vi + 2 - v0 = 0
- 5 + 2 - v0 = 0
v0 =- 3 V
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So
v0 = 0
For vi =- 5 V , diode is forward biased and can be replace by a battery
of Vg = 0.6 V as shown in figure.
vi + 2 + 0.6 - v0 = 0
- 5 + 2 + 0.6 - v0 = 0
v0 =- 2.4 V
Now, output is drawn as shown in figure.
(b) Now consider the circuit of figure (c). Diode D will be ON for
vi > 5 V , if diode is ideal. So for vi = 20 V , diode is ON and replaced
by a short circuit as shown in figure.
v0 = vi = 20 V
when vi =- 10 V , anode of diode becomes negative w.r.t cathode,
so it will be OFF. The equivalent circuit is shown in figure v0 = 5 V .
Diode Circuits_Ex
Page 37
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EXAMPLE 1.26
Sketch the output voltage waveform over the input voltage waveform
for the circuit shown, given that the input varies linearly from 0 to
150 V. Assume ideal diodes.
SOLUTION :
Diode Circuits_Ex
Chapter 1
vi = vA
I1 = vi - 25 + vi - 100
100
200
I1 = vi c 3 m - c 150 m
100
300
D1 will be forward biased, then I1 > 0
So
vi c 3 m - c 150 m > 0
100
300
or
vi > 50 V
So, when
vi < 50 V , v0 = 50 V
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So, when
(D1 ON, D2 OFF)
vi > 100 V , v0 = 100 V
The operation of the circuit is summarized in the table below.
Input
Output
Diode status
vi # 50 V
vo = 50 V
D1 off, D2 on
50 V 1 vi # 100 V
vo = vi
D1 on, D2 on
vi 2 100 V
vo = 100 V
D1 on, D2 off
Transfer characteristics can be drawn as shown in figure.
Diode Circuits_Ex
Page 39
EXAMPLE 1.27
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(a) From the circuit, we can see that in positive half cycle diode D1
will always be OFF as its cathode is connected to input. However,
diode D2 will start conducting when instantaneous voltage at anode of
D2 is greater than cut-in voltage i.e., vi $ 1 V . The equivalent circuit
is therefore as shown in Figure.
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vi - i_1 ki - 1 - i_1 ki = 0
i = vi - 1 ,
2
for vi $ 1 V
vo = 1 + i_1 ki
Substituting i , we get
vo = 1 + vi - 1
2
or,
...(i)
vo = 1 vi + 1 , for vi $ 1 V
2
2
In the negative half cycle, diode D2 will never conduct since its anode
is negative w.r.t. cathode. However in negative half cycle, diode D1
Output voltage,
Diode Circuits_Ex
Chapter 1
...(ii)
...(iii)
vo = vi
From the above results, the transfer characteristic can be drawn as
shown in Figure.
(b) Using Eq (i), (ii) and (iii), we can draw the output characteristics
as shown in Figure.
EXAMPLE 1.28
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Figure (a) shows the circuit of a negative clamper and Figure (b) show
the input waveform applied to the circuit. Assume cut-in voltage of
diode to be Vg = 0.6 V . Determine the steady state output voltage vo .
Diode Circuits_Ex
Page 41
SOLUTION :
Step 1: We can see that diode conducts in the positive half cycle of
input. Thus, it acts as a short circuit as shown in Figure.
Step 2: Therefore, during positive half cycle the capacitor charges
upto peak voltage of input less diode cut-in voltage i.e., it charges
upto _Vm - Vg i .
Step 3: In the positive half cycle, when the input starts decreasing
from the value _Vm - Vg i , the diode becomes reverse-biased as shown
in fig//. This is because capacitor stops charging, as it does not
accept voltage below the value, _Vm - Vg i .
Step 4: In fact, the capacitor now tends to discharge through resistor
R . Since time constant ( RC = 22 m sec ) is much larger than the
time period of the input waveform (T = 1 msec ), the discharge of the
capacitor is negligible. Therefore, the voltage across the capacitor
remains constant at _Vm - Vg i . Under this condition, the capacitor
charged to _Vm - Vg i is equivalent to a DC source of _Vm - Vg i volts
with polarity as shown in fig//.
Step 5: The output at any instant of time is then equal to algebraic
sum of input voltage and voltage across the capacitor. Applying
Kirchhoffs voltage law around the input loop in fig//, we get
vi - _Vm - Vg i - v0 = 0
v0 = vi - _Vm - Vg i
v0 = vi - _12 - 0.6i
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...(i)
v0 = vi - 11.4
This expression shows that in the positive half cycle of input,
output wave shape is same as that of input. However, there is a dc
shift of 11.4 V below 0 (downwards).
Note that for negative half cycle of input, diode D does not
conduct in the steady-state (recall that for clamping circuit, diode
conducts in first half cycle of input ac and capacitor in the circuit is
charged. After the capacitor is charged, ideally, the diode does not
conduct in subsequent cycles of input).
Form Eq (i), it is clear that positive peak of output will appear at
12 - 11.4 = 0.6 V and negative peak will be at - 12 - 11.4 =- 23.4 V
. The steady state output waveform is therefore as shown in Figure.
Note that since output is drawn for steady state, the time axis 0 is
not shown.
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EXAMPLE 1.29
For the DC restorer circuit shown in Figure (a), plot the output
voltage for the input shown in Figure (b). Assume diode D is ideal.
Diode Circuits_Ex
Chapter 1
SOLUTION :
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vi =- 20 V
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VC = 20 + 5 = 25 V
Step 3: As we know that in clamping circuits, after the capacitor
is charged, ideally, the diode does not conduct in subsequent cycles
of input). In the subsequent cycles diode acts as open circuit and
capacitor acts as a 25 V source with polarity as shown in Figure.
Step 4: Now in steady state, output of clamper can be obtained by
writing KVL in the circuit of Figure.
vi + 25 - vo = 0
vo = vi + 25
Therefore, input voltage is shifted upward by + 25 V . Figure shows
the output waveform vo . It is clear form the figure that positive peak
_10 Vi of input is appear at 10 + 25 = 35 V in the output and negative
peak _- 20 Vi appears at - 20 + 25 =+ 5 V .
EXAMPLE 1.30
Draw the output vo for the clamping circuit shown in Figure (a) for
the given sinusoidal input signal shown in Figure (b).
Diode Circuits_Ex
Page 43
SOLUTION :
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vi =- Vm =- 10 V
VC = 10 V
Step 3: During the positive half cycle of the input signal, the diode
does not conduct, and acts like an open circuit as shown in Figure. In
fact, after the capacitor is charged once, ideally, the diode does not
conduct in subsequent cycles of input. In the subsequent cycles diode
acts as open circuit and capacitor acts as a 10 V source with polarity
as shown in Figure.
Step 4: In steady state, output of clamper can be obtained by writing
KVL in the circuit when diode if OFF and capacitor has been charged
upto a fixed value. Therefore,
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vi + 10 - vo = 0
vo = vi + 10
Hence, the input is shifted upwards by + 10 V . That is, positive peak
of input will appear at 10 + 10 = 20 V in the output and negative
peak of input will appear at - 10 + 10 = 0 as shown in Figure.
EXAMPLE 1.31
Draw the output vo for the clamping circuit shown in Figure (a) for
the given sinusoidal input signal shown in Figure (b).
Diode Circuits_Ex
Chapter 1
SOLUTION :
vi = Vm = 12 V
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VC = 12 V
Step 3: During the negative half of the input signal, the diode does
not conduct and acts like an open circuit as shown in Figure. In
steady state, output of clamper can be obtained by writing KVL in
the circuit when diode if OFF and capacitor has been charged upto a
fixed value. Therefore,
vi - 12 - vo = 0
vo = vi - 12
Hence, the input is shifted by 10 V downwards. That is positive
peak of input _+ 12 Vi will appear at 12 - 12 = 0 in the output and
negative peak _- 12 Vi will appear at - 12 - 12 =- 24 V as shown
in Figure.
EXAMPLE 1.32
Sketch vo versus time for the circuit with the input shown in Figure.
Assume diode is ideal and the time constant RC is large.
Diode Circuits_Ex
Page 45
SOLUTION :
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vi =- 20 V
VC = 20 - 5 = 15 V
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Step 3: During the positive half cycle of the input signal, the diode
does not conduct, and acts like an open circuit as shown in Figure. In
fact, after the capacitor is charged once, ideally, the diode does not
conduct in subsequent cycles of input. In the subsequent cycles diode
acts as open circuit and capacitor acts as a 15 V source with polarity
as shown in Figure.
Step 4: In steady state, output of clamper can be obtained by writing
KVL in the circuit when diode is OFF (open circuit) and capacitor
acts as a voltage source as shown in Figure.
vi + 15 - vo = 0
vo = vi + 15
Hence, the input is shifted upwards by + 15 V . Since input changes
from + 20 V to - 20 V , output will change from 20 + 15 =+ 35 V to
- 20 + 15 =- 5 V . The output waveform is shown in Figure.
EXAMPLE 1.33
Diode Circuits_Ex
Chapter 1
SOLUTION :
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VR = 2.7 V
Since out in voltage Vg = 0 , we replaced the forward biased diode by
short circuit.
(b) Now, when Vg = 0.7 V , the forward biased diode is replaced by a
source of 0.7 V as shown in figure.
Applying KVL
vi - VC - 0.7 - VR = 0
10 - 7.3 - 0.7 - VR = 0
VR = 10 - 8 = 2 V
EXAMPLE 1.34
Diode Circuits_Ex
Page 47
SOLUTION :
From the output waveform, we can see that input is shifted upward by
30 - 20 = 10 V . This can be possible with a biased positive clamper.
The circuit of a biased positive clamper is shown in figure with a bias
voltage VR .
Since input is shifted by 10 V, this is the maximum voltage by which
capacitor must be charged when diode is ON. Assume that in negative
half cycle of input when vi =- 20 V , capacitor charges upto 10 V
with polarity as shown in figure.
writing KVL
vi + 10 - VR = 0
- 20 + 10 - VR = 0
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VR =- 10 V
Note :- As a general method of designing calmper circuit, we can
remember that in positive clamper diode conducts in negative half
cycle of input with polarity as shown in figure, whereas in negative
clamper diode conducts in positive half cycle of input with polarity
as shown in figure//.
EXAMPLE 1.35
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For the circuit shown below find and plot the waveform of vo for the
input indicated. Assume cut-in voltage for diode is 0.7 V.
Diode Circuits_Ex
Chapter 1
SOLUTION :
vi =- 20 V
VC = 30 - 0.7 = 29.3 V
Step 3: As we know that in clamping circuits, after the capacitor
is charged, ideally, the diode does not conduct in subsequent cycles
of input). In the subsequent cycles diode acts as open circuit and
capacitor acts as a 29.3 V source with polarity as shown in Figure.
Step 4: Now in steady state, output of clamper can be obtained by
writing KVL in the circuit of Figure.
vi + 29.3 - vo = 0
vo = vi + 29.3
Therefore, input voltage is shifted upward by + 29.3 V . Figure shows
the output waveform vo . It is clear form the figure that positive peak
_12 Vi of input is appear at 12 + 29.3 = 41.3 V in the output and
negative peak _- 24 Vi appears at - 24 + 29.3 =+ 5.3 V .
EXAMPLE 1.36
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Mahadeva/123/1.58
For the circuit shown find and plot the output waveform for the input
indicated. Also sketch the output waveform assuming ideal diode.
SOLUTION :
Diode Circuits_Ex
Page 49
vi = Vm =+ 100 V
VC = 100 - 20 = 80 V
Step 3: As we know that in clamping circuits, after the capacitor
is charged, ideally, the diode does not conduct in subsequent cycles
of input). In the subsequent cycles diode acts as open circuit and
capacitor acts as a 80 V source with polarity as shown in Figure.
Step 4: Now in steady state, output of clamper can be obtained by
writing KVL in the circuit of Figure.
vi - 80 - vo = 0
vo = vi - 80
Therefore, input voltage is shifted downward by 80 V . Figure shows
the output waveform vo . It is clear form the figure that positive peak
_100 Vi of input is appear at 100 - 80 = 20 V in the output and
negative peak _- 100 Vi appears at - 100 - 80 =- 180 V .
EXAMPLE 1.37
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Given that:
RMS voltage across half secondary,
V2 = 20 V
RS = 5 W
Rf = 2 W
Load resistance,
RL = 50 W
Im
2 V2 = 2 # 20 = 28.28 V
Vm
=
RS + Rf + RL
=
Output dc current,
28.28 = 0.496 A
5 + 2 + 50
Diode Circuits_Ex
Chapter 1
No load output,
(d)
RL
h = 82
p _RS + Rf + RL i
50
= 82
= 0.711
p _5 + 2 + 50i
dc power delivered to load
TUF =
ac power rating of secondary
Pdc = 4.96
Im
V2 # Irms V
2#
2
4
.
96
=
= 0.707 or 70.7 %
20 # 0.496
2
EXAMPLE 1.38
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Given that:
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Vm = 220 V
Rf = 10 W
Load resistance,
RL = 1 kW
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Diode Circuits_Ex
Page 51
c IIrms m - 1
2
r =
dc
2
c 154 m - 1 = 0.482
138.66
(e) The rectification efficiency is given as
RL
h _%i = 82
p _Rf + RL i
1000
= 82
p _10 + 1000i
EXAMPLE 1.39
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2 V2 =
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2 # 11 = 15.5 V
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PIV = Vm = 15.5 V
EXAMPLE 1.40
Output dc voltage,
Vdc = 35 V
Rf = 20 W
Load resistance,
RL = 500 W
Average(dc) value of load current,
Vdc = Vm RL
p (Rf + RL)
Where Vm is the maximum value of ac input voltage.
Diode Circuits_Ex
Vm =
=
Chapter 1
EXAMPLE 1.41
Vm = 210 V
Rf = 10 W
Load resistance,
RL = 2 kW
c I m -1
dc
r =
c 69.6 m - 1 =
Irms
EXAMPLE 1.42
77.35
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_1.11i - 1 = 0.482
2
We have,
Maximum input voltage,
Vm = 50 V
Diode Circuits_Ex
Rf = 20 W
Load resistance,
RL = 800 W
50
= 61 mA
Im = Vm =
rd + RL 20 + 800
Page 53
Idc = Im = 61 = 16.4 mA
p
p
Average current,
Irms = Im = 30.5 mA
2
RMS current,
2
Pac = I rms
_Rf + RL i
= 0.763 watt
Pdc = I dc2 RL
DC power output,
= 0.301 watt
Vdc = Idc RL
(d) Efficiency,
c IIrms m - 1 = 1.21
2
r =
dc
EXAMPLE 1.43
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SOLUTION :
Given that,
Maximum input voltage,
Vm = 20 V
Rf = 10 W
Load resistance,
RL = 1000 W
Im = Vm
Rf + RL
=
Average or dc current,
20
= 19.8 mA
10 + 1000
Idc = Im /p = 6.303 mA
Diode Circuits_Ex
RMS current,
Irms = Im /2 = 9.9 mA
(b) DC voltage
DC power,
Chapter 1
2
Pac = I rms
_Rf + RL i
r =
Irms
c Idc m - 1 = 1.21
2
RL " 3
= Vm = 20 = 6.366
p
p
EXAMPLE 1.44
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Given that
Maximum input voltage,
Vm = 24 V
Rf = 10 W
Load resistance,
RL = 1 kW
24
=
= 23.76 mA
Im = Vm
Rf + RL 10 + 1000
Irms = Im / 2 = 16.80 mA
Vdc = Idc RL
= 15.12 # 10 -3 # 1000 = 15.12 V
Diode Circuits_Ex
Page 55
Pdc = I dc2 RL
DC power,
2
Pac = I rms
_Rf + RL i
A sinusoidal voltage of 30 V peak magnitude is applied to a fullwave bridge rectifier circuit. The forward resistance of each diode is
Rf = 5 W and the load resistance is 2400 W. Calculate
(a) peak, dc and rms values of load current
(b) dc and rms output voltages
(c) dc output power
(d) ac input power
(e) Rectifier efficiency
(f) percentage regulation
SOLUTION :
Given that,
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Vm = 30 V
Rf = 5 W
Load resistance,
RL = 2400 W
Vm
30
Im =
=
= 12.44 mA
2400 + 10
RL + 2Rf
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DC load current,
Irms = Im = 8.797 mA
2
Vdc = Idc RL = 19.01 V
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= 150.69 mW
2
Pin = I rms
_RL + 2Rf i
= 186.503 mW
No-load voltage,
2Vm RL
p _2Rf + RL i
RL " 3
Full-load voltage
Percentage regulation
Diode Circuits_Ex
Chapter 1
= 2Vm = 2 # 30 = 19.09
p
p
VL = Vdc = 19.01 V
VR = 19.09 - 19.01 # 100
19.01
= 0.466%
EXAMPLE 1.46
Given that,
Maximum input voltage,
Vm = 20 2 V
Load resistance,
RL = 10 W
(a)
Average (dc) load voltage, Vdc = 2Vm
p
= 2 # 20 2 = 18.012 V
p
Average load current,
Ripple factor
r =
=
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Vrms
c Vdc m - 1
2
20
c 18.012 m - 1 = 0.4825
Vdc . Vm =
2 Vrms
Vdc = 20 # 2 = 28.28 V
Idc = Vdc = 2.828 A
RL
r =
1
4 3 fCRL
1
4 # 3 # 50 # 10000 # 10 -6 # 10
= 0.0288
=
Diode Circuits_Ex
r =
Ripple factor,
Page 57
RL
6 2 pfL
10
6 2 # p # 50 # 100 # 10 -3
= 0.075
=
EXAMPLE 1.47
SOLUTION :
DC load voltage,
Ripple voltage (peak-to-peak),
RMS ripple voltage,
So, ripple factor,
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Vr = 0.25 V
Vr (rms) = 0.25 = 0.088 V
2 2
Vr (rms) 0.088
r =
=
= 0.00737
12
Vdc
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Diode Circuits_Ex
r =
Vr (rms)
Vdc
Chapter 1
Vdc = 12 V
= 0.058 = 0.0048
12
1
= 0.0048
4 3 fCRL
Substituting the value of RL and f , we get
Therefore,
r =
C =
1
= 601 mF
_4 3 # 50 # 0.0048 # 1 # 10 3i
EXAMPLE 1.49
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where C is in mF
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LC = 120
L = 0.005
Also,
C
Using above two relation, we can find the values of L and C
C =
24000 = 155 mF
SOLUTION :
Vim =
2 Vrms =
2 # 120 = 169.7 V
Diode Circuits_Ex
Page 59
PIV - Vm - 0.7 = 0
So,
Pmax = Vg Im
= 0.7 # 168.3 = 117.81
EXAMPLE 1.51
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SOLUTION :
Diode Circuits_Ex
Chapter 1
0 # wt # p
vo = io _10 ki
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= 100 sin wt V , 0 # wt # p
During negative half cycle of vi , D2 conductors and D1 is off. The
equivalent circuit is therefore as shown in Figure and simplified circuit
is also shown in Figure.
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Note that the circuit during negative half cycle is same as that of
positive half cycle. Therefore, io and vo are same as obtained above.
The waveforms of io and vo are shown below.
vi
io =
10 k + 10 k
Diode Circuits_Ex
Page 61
= 200 sin wt
20
So,
io = 10 sin wt mA ,
and
vo = 100 sin wt V ,
p # wt # 2p
p # wt # 2p
Idc = Vdc
RL
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= 63.6 = 6.36 mA
10
(c) Form the circuit of Figure, we can see that current through each
diode when it is forward biased is given by
So,
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id = io + i1
i1 = vi = 200 sin wt V = 20 sin wt mA
10
10 k
i = 10 sin wt + 20 sin wt
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= 30 sin wt mA ,
0 # wt # p
During the negative half cycle of vi , D2 is on and D1 is off. The diode
current is a half-rectified sinusoid with a peak value of 30 mA.
Peak diode current is
Id _maxi = 30 mA
Idc_diode i = Im = 30 = 9.55 mA
p
p
(d) During the positive half-cycle of input signal, the diodes D1 is
conducting and D2 is non-conducting. So, D1 can be replaced by short
circuit, and, D2 and by open circuit as shown in fig//. Thus, the
entire voltage Vm across the secondary winding appears across the
load resistor RL .
Again, as we know PIV is defined as the voltage in reverse
direction (anode negative, cathode positive) across a non-conducting
diode, we mark polarity of PIV as shown in fig//. By writing KVL in
upper half loop, we get PIV for diode D2
PIV - Vm = 0
PIV = Vm = 100 V
Diode Circuits_Ex
Chapter 1
PIV for diode D1 is also same which can be found out by applying
KVL in upper half loop during the negative half-cycle in the circuit
of figure.
EXAMPLE 1.52
SOLUTION :
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Diode Circuits_Ex
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= 200 sin wt c
So,
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5
10 + 5 m
vo = 66.67 sin wt V ,
io = vo
R
Page 63
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0 # wt # p
= 66.67 sin wt V
10
io = 6.667 sin wt mA , 0 # wt # p
During the negative half cycle of vi , D1 if ON and D2 is OFF. The
equivalent circuit and simplified equivalent circuits are shown in
Figure. The circuit is same as that in positive half cycle.
. vo and io are still given by Eqs (i) and (ii) respectively. The waveforms
of vo and io are shown below.
Diode Circuits_Ex
Chapter 1
Vm = 66.67 V
Im = 6.667 mA
Vdc = 2Vm
p
DC output voltage,
= 2 # 66.67 = 42.4 V
3.14
DC output current,
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(c) In the positive half cycle, we can see from the circuit of Figure//
that when diode D2 is forward biased current through it is same as
Diode Circuits_Ex
Page 65
Given that
No load dc voltage,
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Vdc = 9 V
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RS = 3 W
Rf 1 W
Idc = 2Im
p
= 2 # 0.135 = 86.45 mA
p
Full-load voltage,
VFL = Idc RL
Diode Circuits_Ex
Chapter 1
Voltage regulation,
= 9 - 8.6 = 4.06%
8.6
EXAMPLE 1.54
SOLUTION :
2 # 230 = 103.5 V ,
p
V
dc
=
= 103.5 mA ,
RL
= Im
2
=
Idc
Irms
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= Vm =
2RL
(d) Ripple factor
2 VS _rmsi
p
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r =
2 # 230 = 162.6 mA
2#1
Vr _rmsi
= 1.21,
Vdc
Diode Circuits_Ex
Page 67
SOLUTION :
DC load current,
EXAMPLE 1.56
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SOLUTION :
Diode Circuits_Ex
Chapter 1
Vp
n
= p
ns
Vs
V
np
= p = 220 = 9.9 :1 , 10 : 1
ns
22.22
Vs
EXAMPLE 1.57
SOLUTION :
Vm = 6.4 V
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Vr = 0.6 V
DC load voltage,
Vdc = Vm - Vr = 6.4 - 0.3 = 6.1 V
2
If we assume ripple as triangular waveform, RMS value of ripple
voltage
Vr _rmsi = Vr = 0.6 = 0.173 V ,
2 3
2 3
Peak-to-peak ripple voltage,
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Vr _rmsi 0.173
=
= 0.0284
6.1
Vdc
Ripple factor from theoretical expression is
1
r =
4 3 fCRL
1
=
= 0.02887
4 3 # 50 # 1000 # 10 -6 # 100
r =
EXAMPLE 1.58
2
8w2 C1 C2 LRL
Diode Circuits_Ex
Page 69
2
8 # 4p2 (50) 2 # 500 # 500 # 10 -12 # 100
EXAMPLE 1.59
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So,
Vs = 25 + 2 # 0.7 = 26.4 V
Let turn ratio of primary winding and secondary winding is np : ns .
From transformer equation, we can write
V
np
= p
ns
Vs
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np
= 160 = 6.06
ns
26.4
EXAMPLE 1.60
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Given that
Average load current,
Idc = 0.1 A
Vdc = 15 V
Vr = 0.4 V
Vp = 120 2 V
Vg = 0.7 V
RL = Vdc = 15 = 150 W
0.1
Idc
Load resistance,
Diode Circuits_Ex
Chapter 1
Vs = Vm + 0.7
Vdc = 2Vm = 15
p
So,
Since,
...(i)
Vm = 15 # p = 23.55 V
2
From Eq (i), peak voltage across secondary winding is therefore
Vs = 23.55 + 0.7 = 24.25 V
V
np
= p = 120 2 7 = 7.2
ns
23.55
Vs
Turn ratio,
Vr _RMSi
1
...(ii)
=
Vdc
4 3 fCRL
Assuming a triangular ripple waveform as given earlier, the rms value
of ripple is given by
Vr _RMSi = Vr
2 3
From Eq (ii),
Vr
1
=
2 3 Vdc
4 3 fCRL
Vr = Vdc
2fCRL
r =
C =
Vdc =
15
= 2083 mF
2fRL Vr
2_60i_150i_0.4i
EXAMPLE 1.61
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SOLUTION :
VZ = 10 V
Zener voltage,
Minimum input voltage,
Maximum input voltage,
Minium load current,
Maximum load current,
Vi_mini = 13 V
Vi_maxi = 16 V
IL_mini = 10 mA
IL_maxi = 85 mA
...(i)
Diode Circuits_Ex
Page 71
Is = Vi - VZ
Rs
Vi (min) - VZ
Rs (max)
Substituting this into Eq (i), we have
Vi (min) - VZ
IZ (min) =
- IL (max)
Rs (max)
or,
or,
Is (min) =
Vi (min) - VZ
= IZ (min) + IL (max)
Rs (max)
Rs_maxi =
=
Vi_mini - VZ
IZ_mini + IL_maxi
13 - 10
= 30 W
+
15
85i # 10 -3
_
EXAMPLE 1.62
In the circuit shown in Figure, find the maximum and minimum value
of zener diode current.
SOLUTION :
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Is = IZ + IL
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IZ = Is - IL
Zener current will be minimum when current Is is minimum, so we
can write
IZ (min) = Is (min) - IL
= 6 - 5 = 1 mA
Zener current will be maximum when current Is is maximum, so we
can write
IZ (max) = Is (max) - IL
= 14 - 5 = 9 mA
EXAMPLE 1.63
Diode Circuits_Ex
Chapter 1
Zener voltage,
Minimum load current,
Maximum load current,
Minimum zener current,
IL_mini = 0
IL_maxi = 4 mA
IZ_mini = 1 mA
or,
Vi (max) - 50
= 5+0
5
Vi (max) = _5 # 5i + 50 = 75 V
Zener current will be minimum when current Is is minimum and load
current IL is maximum, so we can write
IZ (min) = Is (min) - IL (max)
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Since,
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Is (max) = IZ (max) + IL
Vi _maxi - VZ
= IZ (max) + IL
Rs
Vi _maxi - 50
= 5 + 10 = 25
3
3
5
25
or
Vi _maxi = 50 + 5 #
= 91.66 V
3
Minimum current through Rs ,
or,
or,
or
Is (min) = IZ (min) + IL
Vi (min) - VZ
= IZ (min) + IL
Rs
Vi (min) - 50
= 1 + 10 = 13
5
3
3
Vi (min) = 50 + 5 # 13 = 71.66 V
3
Diode Circuits_Ex
Page 73
Given that,
VZ = 5 V
Zener voltage,
Minimum input voltage,
Maximum input voltage,
Minimum zener current,
Maximum zener current,
Vi _mini = 7.5 V
Vi _maxi = 10 V
IZ_mini = 50 mA
IZ_maxi = 1 A
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= ; 7.5 - 5 E - 50 mA
4.75
= 526.3 - 50 = 476.3 mA
Maximum zener current
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Diode Circuits_Ex
Chapter 1
SOLUTION :
Given that,
Vi _mini = 8 V ,
IL _mini = 0 A ,
Vi _maxi = 10 V ,
IL_maxi = 0.5 A ,
VZ = 6 V ,
IZ_mini = 0 A
As obtained in section//,
Rs =
IZ (max) =
Vi_mini - VZ
IZ_mini + IL_maxi
Vi (max) - VZ
- IL (min)
Rs (min)
= 10 - 6 - 0 = 1 A
4
(b) Power rating of Zener is given by
PZ _maxi = VZ IZ (max)
= 6#1 = 6W
EXAMPLE 1.66
Given that,
Vs = 22 V ,
VZ = 6 V ,
IZ _mini = 10 mA ,
(a) We know that,
IL _mini = 0 A
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IZ _maxi = 40 mA
Rs =
Vi - VZ
IZ (max) + IL (min)
Rs =
22 - 6 = 400 W
40 mA + 0
(b)
IZ (min) = Is (min) - IL (max)
Is is fixed and given by
Is = 22 - 6 = 40 mA
400
IL (max) = Is - IZ (min) = 40 - 10 = 30 mA
(c) Power rating of zener diode
PZ = IZ (max) # VZ
= _40i_ 6i
PZ = 240 mW
Diode Circuits_Ex
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