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  • Datapath I

    Diunggah oleh

    Aman Dhamija
    55 tayangan22 halaman
    The document outlines the design of a simple processor and its components. It discusses building a processor with a MIPS instruction set subset using a single-cycle design with separate data path and control units. The key components for such a processor include registers, an adder, ALU, multiplexers, a register file, program memory, and data memory. The document describes these components and how they are used to implement the MIPS instruction set. It also covers other aspects of the design like clock signals and sequential/combinational logic blocks.

    Deskripsi Asli:

    computer acrhitecture and organisation

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    The document outlines the design of a simple processor and its components. It discusses building a processor with a MIPS instruction set subset using a single-cycle design with separate data path and control units. The key components for such a processor include registers, an adder, ALU, multiplexers, a register file, program memory, and data memory. The document describes these components and how they are used to implement the MIPS instruction set. It also covers other aspects of the design like clock signals and sequential/combinational logic blocks.

    Hak Cipta:

    © All Rights Reserved
    Unduh sebagai PDF, TXT atau baca online dari Scribd
    Tandai sebagai konten tidak pantas
    55 tayangan22 halaman

    Datapath I

    Diunggah oleh

    Aman Dhamija
    The document outlines the design of a simple processor and its components. It discusses building a processor with a MIPS instruction set subset using a single-cycle design with separate data path and control units. The key components for such a processor include registers, an adder, ALU, multiplexers, a register file, program memory, and data memory. The document describes these components and how they are used to implement the MIPS instruction set. It also covers other aspects of the design like clock signals and sequential/combinational logic blocks.

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    © All Rights Reserved
    Unduh sebagai PDF, TXT atau baca online dari Scribd
    Tandai sebagai konten tidak pantas
    dari 22

    Outline

    ProcessorDesign
    buildingblocks
    building blocks

    Asimpleimplementation:SingleCycle
    Datapathandcontrol
    Data path and control

    Performanceconsiderations
    Multicycledesign
    M lti
    l d i
    Datapathandcontrol

    Microprogrammedcontrol
    Mi
    d
    t l
    Exceptionhandling
    2

    Simple Processor Design


    SimpleProcessorDesign

    MIPSsubsetforimplementation
    MIPS
    subset for implementation
    Designoverview
    Divisionintodatapathandcontrol
    i ii i
    d
    h d
    l
    Buildingblocks combinationalandsequential
    Clockandtimings
    Components required for MIPS subset
    ComponentsrequiredforMIPSsubset

    MIPS subset for implementation


    MIPSsubsetforimplementation
    Arithmetic logicinstructions
    g

    add,sub,and,or,slt
    Memoryreferenceinstructions
    Memory reference instructions

    lw,sw
    Controlflowinstructions
    C t l fl i t ti

    beq,j
    Incrementalchangesinthedesigntoinclude
    otherinstructionswillbediscussedlater

    Generic Implementation
    GenericImplementation
    Usetheprogramcounter(PC)tosupply
    p g
    ( )
    pp y
    instructionaddress
    Gettheinstructionfrommemoryy
    Readregisters
    Usetheinstructiontodecideexactlywhatto
    Use the instruction to decide exactly what to
    do

    Design overview
    Designoverview

    PC

    Instruction
    Memory

    Data

    Instruction

    Reg#

    Address

    Register
    Reg# FILE

    Address
    ALU

    Reg#

    Data
    Memory
    Data

    Division into Data path and Control


    DivisionintoDatapathandControl

    DATAPATH
    control
    signals

    status
    signals

    CONTROLLER

    Building block types


    Buildingblocktypes
    Twotypesoffunctionalunits:
    Two
    types of functional units:
    Elementsthatoperateondatavalues
    (combinational)
    Outputisfunctionofcurrentinput
    Nomemoryy

    Elementsthatcontainstate(sequential)
    Outputisfunctionofcurrentandpreviousinputs
    Output is function of current and previous inputs
    State=memory

    Combinational circuit examples


    Combinationalcircuitexamples

    Gates:and,or,nand,nor,xor,inverter
    Gates:
    and or nand nor xor inverter
    Multiplexer
    p
    Decoder
    Adder,subtractor,comparator
    ALU
    Arraymultipliers

    Sequential circuit examples


    Sequentialcircuitexamples
    Flipflops
    Flip flops
    Counters
    Registers
    Registerfiles
    Memories

    Clocked vs. unclocked circuit


    Clockedvs.unclocked
    Clockedstateelement
    Clocked state element
    Statechangesonlywithclockedge

    Unclocked stateelement
    state element
    Statechangescanoccurwithchangesinother
    inputs
    falling edge

    cycle time
    rising edge

    Unclocked stateelements
    state elements
    C

    _
    Q

    _
    Q
    D

    D
    C
    Q

    Clocked State Elements


    ClockedStateElements
    D

    D
    C

    D
    C
    Q

    D
    la tch

    Q
    D
    latch _
    C
    Q

    Q
    _
    Q

    Clockandtimings
    g
    D
    Set-up time

    Hold time

    State
    State
    Element
    1

    Cl k C l
    ClockCycle

    Combinational
    Logic

    State
    State
    Element
    2

    Components for MIPS subset


    ComponentsforMIPSsubset

    Register
    Adder
    ALU
    Multiplexer
    R i t fil
    Registerfile
    Programmemory
    Datamemory
    Bitmanipulationcomponents

    MIPS Components Register


    MIPSComponents

    PC
    32

    32

    clock

    MIPS Components Adder


    MIPSComponents
    PC+4

    PC

    32

    32

    +
    32

    32

    offset
    32

    32

    MIPS Components ALU


    MIPSComponents
    operation
    a=b

    overflow
    32

    result
    ALU

    b
    32

    32

    MIPS components Multiplexers


    MIPScomponents
    PC 4
    PC+4
    32

    mux

    PC+4+offset
    1

    32

    select

    32

    MIPS Components registerfile


    MIPSComponents
    register file
    5

    Register
    Number

    ReadReg 1
    ReadReg 2

    Read
    Data1

    Registers

    32

    Data

    W it R
    WriteReg
    Read
    Data2

    Data

    32

    Writedata
    Reg Write
    Write

    32

    MIPSComponents:Programmemory
    S Co po e ts: og a
    e oy

    Instruction
    Address

    Instruction
    Memory
    Instruction

    MIPS Components Data memory


    MIPSComponentsDatamemory
    Mem
    Write

    Address
    dd

    Data
    Memory
    Write
    data
    Mem
    R d
    Read

    Read
    data

    MIPSComponents
    Bitmanipulationcircuits
    i
    i l i
    i i

    16

    sign
    xtend

    MSB

    32

    LSB
    MSB
    32

    32

    shift
    0

    LSB

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