R in
Common
emitter
(Fig. 6.50)
( + 1 )r e
Common
emitter with
( + 1 )( re + Re )
A vo
gm RC
Ro
RC
Av
g m ( R C || R L )
R C || R L
----------------re
Re
gm RC
-------------------1 + gm Re
RC
g m ( R C || R L )
-------------------------------1 + gm Re
Gv
R C || R L
-----------------------------------R sig + ( + 1 )r e
R C || R L
----------------------------------------------------R sig + ( + 1 ) ( r e + R e )
R C || R L
----------------re + Re
(Fig. 6.52)
Common base
(Fig. 6.53)
re
gm RC
RC
Emitter
follower
(Fig. 6.55)
( + 1 )( re + RL )
re
R || R
R sig + r e
g m ( R C || R L )
R C || R L
----------------re
C
L
------------------
RL
---------------RL + re
RL
---------------------------------------------------R L + r e + R sig ( + 1 )
G vo = 1
R sig
R out = r e + ----------+1
a
b
VCC
VCC
RB1
RB
RC
RC
IC
IC
!
RB2
VCE
VCE
IB
IB
VBE
VBE
"
"
(b)
(a)
Figure 6.59 Two obvious schemes for biasing the BJT: (a) by fixing VBE; (b) by fixing IB. Both result
in wide variations in IC and hence in VCE and therefore are considered to be bad. Neither scheme is
recommended.
VBB # VCC
R2
R1 ! R2
$
RC
RC
R1
VCC
IB
RB # R1 " R2
R2
RE
(a)
IC
IE
RE
(b)
Figure 6.60 Classical biasing for BJTs using a single power supply: (a) circuit; (b) circuit with the
voltage divider supplying the base replaced with its Thvenin equivalent.
Figure 6.60(b) shows the same circuit with the voltage divider network replaced by its
Thvenin equivalent,
R2
-V
V BB = ---------------R 1 + R 2 CC
(6.102)
447
(6.103)
The current IE can be determined by writing a Kirchhoff loop equation for the baseemitter
ground loop, labeled L, and substituting I B = I E ( + 1 ) :
V BB V BE
I E = --------------------------------------RE + RB ( + 1 )
(6.104)
To make IE insensitive to temperature and variation,17 we design the circuit to satisfy the
following two constraints:
VBB $ VBE
RB
R E $ ----------+1
(6.105)
(6.106)
Condition (6.105) ensures that small variations in VBE (! 0.7 V) will be swamped by the
much larger VBB. There is a limit, however, on how large VBB can be: For a given value of the
supply voltage VCC, the higher the value we use for VBB, the lower will be the sum of voltages
across RC and the collectorbase junction (VCB). On the other hand, we want the voltage
across RC to be large in order to obtain high voltage gain and large signal swing (before transistor cutoff). We also want VCB (or VCE) to be large to provide a large signal swing (before
transistor saturation). Thus, as is the case in any design, we have a set of conflicting requirements, and the solution must be a trade-off. As a rule of thumb, one designs for VBB about
1
1
1
--- VCC , V (or V ) about --- VCC , and I R about --- VCC .
CB
CE
C C
3
3
3
Condition (6.106) makes IE insensitive to variations in and could be satisfied by selecting RB small. This in turn is achieved by using low values for R1 and R2. Lower values for R1
and R2, however, will mean a higher current drain from the power supply, and will result in
a lowering of the input resistance of the amplifier (if the input signal is coupled to the
base),18 which is the trade-off involved in this part of the design. It should be noted that
condition (6.106) means that we want to make the base voltage independent of the value of
and determined solely by the voltage divider. This will obviously be satisfied if the current
in the divider is made much larger than the base current. Typically one selects R1 and R2
such that their current is in the range of IE to 0.1IE.
Further insight regarding the mechanism by which the bias arrangement of Fig. 6.60(a) stabilizes the dc emitter (and hence collector) current is obtained by considering the feedback
action provided by RE. Consider that for some reason the emitter current increases. The voltage
drop across RE, and hence VE will increase correspondingly. Now, if the base voltage is determined primarily by the voltage divider R1, R2, which is the case if RB is small, it will remain
constant, and the increase in VE will result in a corresponding decrease in VBE. This in turn
reduces the collector (and emitter) current, a change opposite to that originally assumed. Thus
RE provides a negative feedback action that stabilizes the bias current. This should remind the
reader of the resistance Re that we included in the emitter lead of the CE amplifier in Section
6.6.4. We shall study negative feedback formally in Chapter 10.
Bias design seeks to stabilize either IE or IC since IC = IE and varies very little. That is, a stable IE
will result in an equally stable IC, and vice versa.
18
If the input signal is coupled to the transistor base, the two bias resistances R1 and R2 effectively appear
in parallel between the base and ground. Thus, low values for R1 and R2 will result in lowering Rin.
17
449
Example 6.20
We wish to design the bias network of the amplifier in Fig. 6.60 to establish a current IE = 1 mA using a
power supply VCC = +12 V. The transistor is specified to have a nominal value of 100.
Solution
We shall follow the rule of thumb mentioned above and allocate one-third of the supply voltage to the
voltage drop across R2 and another one-third to the voltage drop across RC , leaving one-third for possible
negative signal swing at the collector. Thus,
V B = +4 V
V E = 4 V BE ! 3.3 V
and RE is determined from
V
3.3
R E = -----E- = ------- = 3.3 k
IE
1
From the discussion above we select a voltage divider current of 0.1I E = 0.1 1 = 0.1 mA. Neglecting
the base current, we find
12
R 1 + R 2 = ------- = 120 k
0.1
and
R2
-----------------V
= 4V
R 1 + R 2 CC
Thus R2 = 40 k and R1 = 80 k.
At this point, it is desirable to find a more accurate estimate for IE, taking into account the nonzero
base current. Using Eq. (6.104),
4 0.7
I E = -------------------------------------------------------------- = 0.93 mA
( 80 || 40 ) ( k )
3.3 ( k ) + ---------------------------------101
This is quite a bit lower than 1 mA, the value we are aiming for. It is easy to see from the above equation that a simple way to restore IE to its nominal value would be to reduce RE from 3.3 k by the magnitude of the second term in the denominator (0.267 k). Thus a more suitable value for RE in this case
would be RE = 3 k, which results in IE = 1.01 mA ! 1 mA.19
It should be noted that if we are willing to draw a higher current from the power supply and to accept
a lower input resistance for the amplifier, then we may use a voltage-divider current equal, say, to IE (i.e.,
1 mA), resulting in R1 = 8 k and R2 = 4 k. We shall refer to the circuit using these latter values as
design 2, for which the actual value of IE using the initial value of RE of 3.3 k will be
4 0.7
I E = --------------------------- = 0.99 ! 1 mA
3.3 + 0.027
19
Although reducing RE restores IE to the design value of 1 mA, it does not solve the problem of the
dependence of the value of IE on . See Exercise 6.47.
19
EXERCISE
6.47 For design 1 in Example 6.20, calculate the expected range of IE if the transistor used has in the
range of 50 to 150. Express the range of IE as a percentage of the nominal value (IE ! 1 mA) obtained for = 100. Repeat for design 2.
Ans. For design 1: 0.94 mA to 1.04 mA, a 10% range; for design 2: 0.984 mA to 0.995 mA, a 1.1%
range.
V EE V BE
I E = ---------------------------------------RE + RB ( + 1 )
(6.107)
Figure 6.61 Biasing the BJT using two power supplies. Resistor RB is
needed only if the signal is to be capacitively coupled to the base. Otherwise, the base can be connected directly to ground, or to a grounded signal
source, resulting in almost total -independence of the bias current.
This equation is identical to Eq. (6.104) except for VEE replacing VBB. Thus the two constraints
of Eqs. (6.105) and (6.106) apply here as well. Note that if the transistor is to be used with the
base grounded (i.e., in the common-base configuration), then RB can be eliminated altogether.
On the other hand, if the input signal is to be coupled to the base, then RB is needed. We shall
study complete circuits of the various BJT amplifier configurations in Section 6.8.
EXERCISE
D6.48 The bias arrangement of Fig. 6.61 is to be used for a common-base amplifier. Design the circuit
to establish a dc emitter current of 1 mA and provide the highest possible voltage gain while allowing for a maximum signal swing at the collector of 2 V. Use +10-V and 5-V power supplies.
Ans. RB = 0; RE = 4.3 k; RC = 8.4 k
V CC = I E R C + I B R B + V BE
IE
- R + V BE
= I E R C + ----------+1 B
Thus the emitter bias current is given by
V CC V BE
I E = --------------------------------------RC + RB ( + 1 )
(a)
(6.108)
(b)
Figure 6.62 (a) A common-emitter transistor amplifier biased by a feedback resistor RB. (b) Analysis of
the circuit in (a).
451
RB
V CB = I B R B = I E ----------+1
(6.109)
EXERCISE
D6.49 Design the circuit of Fig. 6.62 to obtain a dc emitter current of 1 mA, maximum gain, and a 2-V
signal swing at the collector; that is, design for VCE = +2.3 V. Let VCC = 10 V and = 100.
Ans. RB = 162 k; RC = 7.7 k. Note that if standard 5% resistor values are used (Appendix G)
we select RB = 160 k and RC = 7.5 k. This results in IE = 1.02 mA and VC = +2.3 V.
V CC ( V EE ) V BE
I REF = ----------------------------------------------R
(6.110)
VCC
IREF
V
Q1
!
VBE
"
Q2
"VEE
(a)
(b)
Figure 6.63 (a) A BJT biased using a constant-current source I. (b) Circuit for implementing the current
source I.