FAQS

in
Microprocessor 8085 and
Electronics
with Answers
 FAQs answered by:-

Soumyadev Adhikari
Instrumentation and Control Engineering
6th Sem, Roll 1032
Academy Of Technology, Hooghly, WB.

Contact the author at bforbaptu@gmail.com

 Part 1
Microprocessor 8085
1. Which type of architecture 8085 has?
8085 has Von Neumann architecture. It was derived after the name of mathematician
John Von Neumann. It’s having 16 address bus and 8 bit data bus.it can access 2^16
individual memory location.

2. How many memory locations can be addressed by a microprocessor with 14 address

lines?
2^14=16384

3. 8085 is how many bit microprocessor?

8 bit as its data bus is 8 bit.

4. Why is data bus bi-directional?

As it has to carry data from mp to external device or the reverse. (?)

5. What is the function of accumulator?

This register is used to store 8-bit data and to perform arithmetic and logical operations.
The result of an operation is stored in the accumulator.

6. What is flag, bus?

The ALU includes five flip-flops, which are set or reset after an operation according to
data conditions of the result in the accumulator and other registers. They are called
Zero(Z), Carry (CY), Sign (S), Parity (P), and Auxiliary Carry (AC) flags. For more
details on flags see Q14.

Typical system uses a number of busses, collection of wires, which transmit binary
numbers, one bit per wire. A typical microprocessor communicates with memory and
other devices (input and output) using three busses: Address Bus, Data Bus and
Control Bus.
Address Bus
The Address Bus consists of 16 wires, therefore Its "width" is 16 bits. A 16 bit Address
bus can identify 2^16=65536 memory locations i.e. 0000000000000000 up to
1111111111111111. Because memory consists of boxes, each with a unique address, the
size of the address bus determines the size of memory, which can be used. To
communicate with memory the microprocessor sends an address on the address bus, e.g.
0000000000000011 (3 in decimal), to the memory. The memory the selects box number
3 for reading or writing data. Address bus is unidirectional, i.e. numbers only sent from
microprocessor to memory, not other way.
Data Bus
Data Bus: carries ‘8-bit data’, in binary form, between µP and other external units, such
as memory. The Data Bus typically consists of 8 wires. Data bus used to transmit "data",
i.e. information, results of arithmetic, etc, between memory and µP. Bus is bi-directional.
Size of the data bus determines what arithmetic can be done. If only 8 bits wide then
largest number is 11111111 (255 in decimal). Data Bus also carries instructions from
memory to the microprocessor. Size of the bus therefore limits the number of possible
instructions to 256, each specified by a separate number.
 Control Bus
It is a group of various single lines used to provide control and synchronization signals.
µP generates different control signals for different operations. These signals are used to
identify the device with which the µP wants to communicate.

7. What are tri-state devices and why they are essential in a bus oriented system?
Tri state logic devices have three states (0, 1 and high impedance). When the enable (may
be active high or active low) line is activated, the device works. The
disabled enable line makes the device at high impedance state and it is
disconnected from the circuit. For example see the tri stated inverter in
the figure shown.
In microcomputer system the peripherals are connected in parallel
between address bus and data bus. Because of tri stated interfacing
devices, peripherals do not load the system buses. Processor
communicates with one peripheral or device at a time by enabling the
tri state line of the interfacing peripheral or device. Tri state logic is
critical to proper functioning of the microcomputer.

8. Why are program counter and stack pointer 16-bit registers?

Because SP points to the beginning of stack memory (LXI SP 8000H) which is 16-bits.
Also PC points to the memory locations (16-bits) of the instructions to be executed to
maintain the proper sequence of execution of program.

9. What does it mean by embedded system?

A specialized computer system that is part of a larger system or machine. Typically, an
embedded system is housed on a single microprocessor board with the programs stored in
ROM. Virtually all appliances that have a digital interface like watches, microwaves,
VCRs, cars etc utilize embedded systems. Some embedded systems include an operating
system, but many are so specialized that the entire logic can be implemented as a single
program.

10. What are the different addressing modes in 8085?

Register:- Data is provided through the registers. Or operand is only register(s). Example:
MOV Rd, Rs.
Register indirect:- Operand M or register pair. Example: MOV A,M; LDAX B; STAX D;
MVI M,32H (exception for immediate addressing mode).
Direct:- Operand 8-bit port address or 16-bit memory address. Example: IN 84H, OUT
84H, all CALLs.
Immediate:- Instruction having the letter I. Or immediate data to the destination provided.
Also all jump instructions as the meaning is jump immediately. Example MVI M, 2H;
ADI 47H; LXIH 2050 (exception for direct addressing mode).
Implicit:- No operand. Example: XCHG.
11. What is the difference between MOV and MVI?

Rd = Destination register, Rs
= Source register, M =
Memory location pointed out
by HL register pair, reg =
Register, data = 8-bit data.

12. What are the functions of RIM, SIM, IN?

Read Interrupt Mask (RIM)
RIM is a multipurpose instruction used to read the status of interrupts 7.5, 6.5, 5.5 and to
read serial input data bit. RIM loads 8-bit data in the accumulator with the following
interpretation:

Actually RIM does the following three tasks:

Read the interrupt mask (bit 2, 1, 0).

Identify pending interrupts (bit 6, 5, 4).

Receive serial input data bit (bit 7).

Set Interrupt Mask

SIM is a multipurpose interrupt used to implement the 8085 interrupts (RST 7.5, 6.5, 5.5)
and serial data output. SIM interprets the accumulator content as follows:

Actually, SIM does the following three tasks:

Mask the interrupts (bit 2, 1, 0).

Reset RST 7.5 (bit 4). This is mainly used to overwrite RST 7.5 without serving it.

To implement serial I/O (bit 7, 6). If bit 6 = 1 is used to enable serial I/O and bit 7 is
used to transmit serial output data bit.
 Input Data to Accumulator from a Port with 8-bit Address (IN)
The contents of the input port designated in the operand are read and loaded into the
accumulator. The operand is an 8-bit address. During execution, this port address is
duplicated in the lower order and higher order address buses. Any one of the sets of
address lines can be decoded to enable the input port.

13. What is the immediate addressing mode?

See Q10.

14. What are the different flags in 8085?

The 8085 has 5 flags represented by 5 bits of the flag register
which are set or reset after an operation according to data
conditions of the result (of that operation) stored in the
accumulator and other registers.
They are:-
Sign flag (S):- For D7=1 or 0, S=set (result is unsigned) or reset (result is signed).
Zero flag (Z):- For the result containing 00H, Z=set, for non zero result Z=reset.
Auxiliary carry flag (Ac):- For any result generating a carry / borrow in the D3 bit
position and passing it to D4 bit position, Ac=set. Else it is reset.
Parity flag (P):- For a result containing even number of 1s there is
even parity and odd number of 1s there is odd parity.
Carry flag (Cy):- For the result generating any carry Cy is set else
reset.

15. What happens during DMA transfer?

To make a fast data transfer, the MPU releases the control of its buses to DMA. DMA
acts as an external device and the active high input signal HOLD goes HIGH when the
DMA is requesting to the MPU to use its buses. After receiving the HOLD request from
DMA, the MPU releases the buses in the following machine cycle and generates an
active high output signal HLDA indicating the release of buses. Once the DMA gains that
control, it acts in the role of the MPU for data transfer.

16. What do you mean by wait state? What is its need?

A wait state is a delay experienced by µP when accessing external memory or another
device that is slow to respond. the vice versa also cone into scenario.

Now, to be able to access slow memory the µP must be able to delay the transfer until the
memory access is complete. One way is to increase the µP clock period by reducing the
clock frequency. Some µPs provide a special control input called READY to allow the
memory to set its own memory cycle time. If after sending an address out, the µP dies not
receive a READY input from memory, it enters a wait state for as long as the READY
line is in 0 state. When the memory access is completed the READY goes high to
indicate that the memory is ready for specified transfer.

17. What is PSW?

 PSW (Program Status Word) represents the contents of the accumulator and the flag
register together considering the accumulator as the high order and flag as the low order
register as if it is the AF register pair. For example POP PSW.

18. What is ALE? Explain the functions of ALE in 8085.

It is the acronym for Address Latch Enable (pin number 30) used to demultiplex the
multiplexed lower order address/data bus. During T1 the ALE goes HIGH. When ALE
goes HIGH, the latch is enabled. So the o/p changes according to the i/p data. During T1
the o/p of latch is 05H. When ALE goes LOW, the data byte 05H is latched until the next
ALE. And after the latching operation the o/p of the latch represents the lower order
address bus A0-A7. The following figure will illustrate the function:

19. What is a program counter? What is its use?

This 16-bit register deals with sequencing the execution of instructions. This register is a
memory pointer. Memory locations have 16-bit addresses, and that is why this is a 16-bit
register. The microprocessor uses this register to sequence the execution of the
instructions. The function of the program counter is to point to the memory address from
which the next byte is to be fetched. When a byte (machine code) is being fetched, the
program counter is incremented by one to point to the next memory location.

20. What is an interrupt?

The interrupt I/O is a process of data transfer whereby an external device or peripheral
can inform the processor that it is ready for communication and requests attention. The
process is initiated by external device and is asynchronous (i.e. can be initiated anytime
irrespective of the system clock).

21. Which line will be activated when an output device require attention from CPU?
Interrupt Request (INTR, pin 10, it is an input signal to µP). It goes high when the
external devices want to communicate.
 Part 2
Electronics
1. What is meant by D-FF?

A FF having one delay (D) input and two outputs is called D-FF. The next state
of the FF follows the value of the input D when a clock pulse is applied. But the
transfer of data from input to output is delayed and so it is called delay FF.

2. What is the basic difference between Latches and Flip flops?

The main difference between latch and F/F is that latches are level sensitive while
F/Fs are edge sensitive. They both require the use of clock signal and are used in
sequential logic. For a latch, the output tracks the input when the clock signal is
HIGH, so as long as the clock is at logic 1, the output can change if the input also
changes. F/F on the other hand, will store the input only when there is a
rising/falling edge of the clock.

3. What is a multiplexer?

A digital multiplexer or MUX is a combinational logic circuit that select binary

information from one of many input lines and directs it to a single output line. The
selection of a particular input line is controlled by selection lines. Generally a 2n x 1
MUX has “2n ”number of input lines and “n” number of selection lines.

4. How can you convert an SR Flip-flop to a JK Flip-flop?

Step 1:- Block diagram is drawn as follows:

Our aim is to design the circuit for the next state decoder.
Step 2:- The Present State-Next State table for JK F/F is drawn
as follows:

Step 3:- Using the Application table of SR F/F, the next state codes i.e. the S & R
values can be added in the above PS/NS table of JK F/F as follows:

Step 4:- The K-maps are drawn as follows to find the expression of S & R in
terms of J, K, Qn and Qn’ to design the next state decoder circuit:

Step 5:- Now the SR F/F is converted to JK F/F by using the next state decoder
circuit (see on next page).
5. How can you convert a JK Flip-flop to a D Flip-flop?
Step 1:- Block diagram is drawn as follows:

Our aim is to design the circuit for the next state decoder.

Step 2:- The Present State-Next State table for D F/F is drawn as follows:

Step 3:- Using the Application table of JK F/F, the next state codes i.e. the J & K values
can be added in the above PS/NS table of D F/F as follows:

Step 4:- The K-maps are drawn as follows to find the expression of J & K in terms of D,
Qn and Qn’ to design the next state decoder circuit (see on next page):
 Step 5:- Now the JK F/F is converted to D F/F by using the next state decoder circuit.

6. What is Race-around problem? How can you rectify it?

It is a problem regarding the level triggered FF. Consider a JK FF. When the inputs are
J=K=1 and Q=0 and a clock pulse of width tp is applied, the output will change from 0 to
1 after a time interval of ∆t (propagation delay through 2 NAND gates in series). Now,
after time ∆t, we have J=K=1 and Q=1. After another time interval of ∆t the output will
be 0 again. Hence, the output will oscillate between 0 and 1 in the duration tp. So, at the
end of the clock pulse the value of Q is uncertain (either 0 or 1). This situation is known
as Race Around Condition.

It can be avoided if tp< ∆t can be achieved. Lumped delay lines can be used in series with
the feedback connection in order to increase the loop delay beyond tp. Before the
development of edge triggered FF, this type of problems of level triggered FF was
encountered by using Master-Slave FF.

7. Which semiconductor device is used as a voltage regulator and why?

Silicon Zener diode is used as regulator. Because in the reverse bias, due to breakdown,
the reverse voltage remains nearly constant in spite of large reverse current change
through the diode.
8. What do you mean by an ideal voltage source?
 An ideal voltage source is one which delivers energy with a voltage across the output
terminal that is a prescribed function of time and independent of the current from the
source.

The main difference between a practical source and an ideal source is that the practical
one always has some internal source resistance (Rs), which the ideal one dose not has. If
we apply KVL in both the ideal and practical circuits, the voltage across the load
(VL=iRL) will be:
For practical case: VL = V – iRs -----------------------> (1)
For ideal case: VL = V ------------------------------> (2)
The V-I characteristics of both the sources are drawn by following the equations (1) &
(2).

9. What do you mean by zener breakdown and avalanche breakdown?

For a highly doped diode, the junction width is very small. When reverse voltage of such
a diode is increased, the electric field at the junction increases. This electric field is so
high that it tears valance electrons from the atoms inside the junction. Very large number
of electrons and holes are generated due to this high electric field at the junction. As a
result a sudden change in the reverse current occurs. At that condition, a small change in
the reverse voltage can cause big change in reverse current. This phenomenon is called
Zener Breakdown.

At a comparatively higher reverse voltage than that where Zener breakdown occurs,
thermally generated holes & electrons at the junction get energy by this reverse voltage.
After being energized, they collide with the atoms of the junction and dislodge electrons
from the valance band. Number of hole-electron pairs are multiplied with stages of
collision. As a result a sudden change in the reverse current occurs. At that condition, a
 small change in the reverse voltage can cause big change in reverse current. This thing is
said to be Avalanche breakdown.

Actually, the reverse current of the diode suddenly increases due to Zener and/or
Avalanche effect.

10. What are the different types of filters?

Filters may be classified in different ways:

Analog or digital filters.

Passive or active (LPF, HPF, BPF, BRF and APF)filters.

Audio (AF) or radio (RF) frequency filters.
Analog filters are designed to work with analog signals and digital filters uses
digital technique to work with analog signals.
Filters made of passive elements like resistors, capacitors and inductors are called
Passive filters and filters made of active (transistors, op-amps) and passive
elements are called Active filters.
Depending upon the operating range of filters, they are classified as AF or RF
filters. Generally RC filters are AF and LC or crystals are RF.

11. What is the need of filtering ideal response of filters and actual response of filters?

It is done to compare different filters of same type (Butterworth, Chebyshev,

Cauer etc). In figure, two high pass filters are shown. A good comparison before
selection of either of them can be done if we study the ideal response.
12. What is sampling theorem?

According to Nyquist Sampling theorem an analog signal can be represented faithfully

from its sampled form if the sampling rate (Fs) is greater or equal to the maximum
frequency (F) of the original analog signal.

13. What is impulse response?

Impulse
response is
the
response
of a
dynamic
system to an impulse (δ(t) =0 for all t except t =0) change in the input. Suppose the
transfer function of the system is C(S) / R(S) = 1 / (S+1). If the unit impulse change in
the input occurs, then c(t) = exp(-t) [As r(t) = δ(t), R(S) = 1]; So, the time domain
impulse response is nothing but the plot of inverse Laplace Transform of the system
transfer function. Sometimes, therefore, this is called the Natural response.

14. Explain the advantages and disadvantages of FIR filters compared to IIR
counterparts.
FIR filters are characterized by their simple architecture and thus lower
implementation complexity. For example, the FIR filter can be implemented using
only a single multiplier and an accumulator. In addition the FIR can use fewer bits
than the IIR filter due to the absence of a feedback loop which introduces more
errors.
In contrast to the IIR filters where the output can sometimes be unstable, the FIR, on
the other hand, can always be designed such that its output is stable. In addition, the
FIR filter can have a linear phase if the filter coefficients are symmetrical or anti-
symmetrical around the center frequency. This feature is essential for data
transmission, video processing and high-quality audio systems.
Another advantage of the FIR filters is that errors introduced as a result of quantizing
filter coefficients can have a low impact on the filter outputs in case the quantization
process was properly handled. This is a very important property when a low bit-
error rate is desired.
 Even though the FIR possesses have many advantages; many disadvantages arise
compared to the IIR. FIR filters usually have a higher order than IIR filters for a given
spectral characteristic. Thus, FIR filters require a higher number of multipliers
compared to IIR filters in case the implementation is fully pipelined and thus every
output needs one iteration. On the other hand, if the implementation is not
pipelined, the FIR would take more time than the IIR filter. These disadvantages
translate into larger memory requirements and computational resources. In
addition, “FIR coefficients must be designed using an iterative method since the
required filter length to satisfy a given filter specification can only be estimated”.
In other words, the designer specifies the order of the filter, given certain specs,
and then simulates the frequency response. If it didn’t meet the desired response,
he re-estimates a new order based on the previous results and repeats the process.

15. What is CMRR? Explain briefly.

It is the acronyms for Common Mode Rejection Ratio. It is the ratio of actual differential
voltage gain (Ad) to the common mode voltage gain (Ac) in case of differential
amplifiers. So, CMRR = Ad / Ac; also Ac = Vocm / Vcm; where Vocm = o/p common
mode voltage, Vcm = i/p common mode voltage. For general IC741, CMRR = 90Db
(under 10k i/p source resistance), for precision IC741 it is 120Db. For that reason IC741
is usable under noisy environment.

16. What do you mean by half-duplex and full-duplex communication? Explain briefly.

In case of Half Duplex communication the communicating stations can not

transmit or receive data at the same interval of time which is possible in Full
Duplex communication.

17. Which ranges of signals are used for terrestrial transmission?

Microwaves (1-300GHz) are used in satellite communication for example. Also HF (3-
30MHz), VHF (30-300MHz), UHF (300MHz-3GHz) are also used in ground, sky and
line of site propagation.

18. What is the need for modulation?

There are the following basic three needs:

Ease of radiation: - Generally the receiving antenna size (S) and the wavelength
(λ) of radiation is related by S>>λ / 10. So practically it becomes impossible to
receive a low frequency signal as the antenna size becomes very large. After
modulation the modulated signal frequency becomes high resulting very small
wavelength.

Simultaneous transmission of several signals: - Consider several radio stations
delivering audio signals of more or less same bandwidth. They may be overlapped
 in the channel. So, only one radio station can broadcast at a time which is wastage
of channel space. One way to solve this problem is to use modulation.

Narrow-banding: - Suppose a baseband signal from a broadcast system is radiated
directly with the frequency range 50Hz to 10Kz i.e. with a band-edge ratio (ratio
of highest to lowest wavelength) of 200. If an antenna is made for 50Hz, it will be
too long for 10 KHz and vice versa. So, we may require a antenna suitable for
band-edge ratio 200 which is practically impossible. But frequency translation
makes a wideband signal narrowband. Here band width is referred to as the ratio
of the edge frequencies of the band. This is narrowbanding.

19. Which type of modulation is used in TV transmission?

Vestigial Side Band Suppressed Carrier (VSB-SC) modulation is used.

20. Why we use vestigial side band (VSB-C3F) transmission for picture?
Bandwidth of signals used for picture reception is very large, so standard AM
cannot be used. If SSB was used, it would result in half the bandwidth. But, SSB
receivers being complex, they are not used. So vestigial transmission is used in
which a vestige or trace of the unwanted sideband is transmitted along with the
wanted sideband and carrier. Actually in VSB, instead of rejecting one side band
completely like SSB, a gradual cut off of one side band is accepted.

21. When transmitting digital signals is it necessary to transmit some harmonics in

addition to fundamental frequency?

Consider a 6bps (taken very slow for easy understanding) digital signal
transmission. The best case and worst case digital and analog signals are shown.
In worst case and best case, to simulate the digital signal the, necessary analog
signal should be of 3Hz and 0Hz respectively. As the bit rate increases, the
necessity of high frequency analog signal increases and the possibility of sending
a single frequency (fundamental) signal decreases. So, for high bit rate, to
improve the shape of the signal to make it recognizable by the receiver, we need
to add some odd harmonics.
22. For asynchronous transmission, is it necessary to supply some synchronizing pulses
additionally or to supply start and stop bit?

Yes, it is necessary. Otherwise the receiver will not be able to detect the starting
or the ending of a byte sent by receiver. And in Asynchronous transmission it is
not the responsibility of the receiver to group the bits sent by sender.

23. BPFSK is more efficient than BFSK in presence of noise. Why?

If the question is “BPSK is more efficient than BFSK in presence of noise. Why?”
(Not sure whether it is a printing mistake or not but if one knows what is BPFSK
please inform me) then the answer is as follows:
Actually, BPSK is not susceptible to the noise degradation that affects ASK or
bandwidth limitations of BFSK ( BFSK needs more bandwidth than BPSK) . This
means that smaller variations in the BPSK signal due to noise can be detected
reliably.

24. What is meant by pre-emphasis and de-emphasis?

Pre-emphasis: - Improving the signal to noise ratio by increasing the magnitude of
higher frequency signals with respect to lower frequency signals.
De-emphasis: - Improving the signal to noise ratio by decreasing the magnitude of
higher frequency signals with respect to lower frequency signals.
25. What do you mean by 3 dB cutoff frequency? Why is it 3 dB, not 1 dB?
In case of frequency response of active filters,
Cut off frequency is referred to that limiting
frequency after which the gain decreases @
20dB/decade. We - know, gain (in dB) =
20log|Vo/Vin|, where |Vo/Vin| = AF/
sqrt(1+(F/FH)^2). Now, at F=FH, |Vo/Vin| =
AF/sqrt2 = 0.707AF. Now, if we consider the
passband gain i.e. AF = 1, then the gain at cut
off frequency will be = 20log (0.707) = 3dB.
That is why it is always called 3dB cut off
frequency, not 1dB.
In addition, 3db implies 70% (0.707) of the power, i.e. we r interested to consider
the bandwidth range from peak to 70% because up to 70% it’s reliable. Hence 3db
is called the half power frequency.

26. What do you mean by ASCII, EBCDIC?

ASCII: - American Standard Code for Information Interchange. A seven or eight
bit code used to represent alphanumeric characters. It is the standard code used for
communications between data processing systems and associated equipment.
EBCDIC: - Extended Binary Coded Decimal Interchange Code. It is an 8-bit
character encoding (code page) used on IBM mainframe operating systems such
as z/OS, OS/390, VM and VSE, as well as IBM minicomputer operating systems
such as OS/400 and i5/OS (see also Binary Coded Decimal). It is also employed
on various non-IBM platforms such as Fujitsu-Siemens' BS2000/OSD, HP
MPE/iX, and Unisys MCP. It descended from punched cards and the
corresponding six bit binary-coded decimal code that most of IBM's computer
peripherals of the late 1950s and early 1960s used.
More questions are welcome.