Set: A

BIRLA INSTITUTE OF TECHNOLOGY AND SCIENCE, PILANI Hyderabad

Campus
Second Semester 2013-14
Analog Electronics ECE F341/ EEE F341/EEE C364)
Time
: 20min.
Max Marks : 20
Answer all the questions.

Lab Quiz
Date: 10/04/2014
Day: Thursday

1. For an Ideal Voltage controlled voltage source,

A) Zin , Zout
B) Zin 0, Zout
C) Zin , Zout
D) Zin , Zout0
[
]
2. For a second order Butterworth LPF, 2k =________
A) 1.414
B) 4
C) 2
D) 0.707
[
]
3. For a sinusoidal input, the output Vo for the circuit shown below is _______

7. Identify the circuit which will give the output mentioned below, when a
sinusoidal signal with a peak voltage of Vp is applied as the input.
A) +ve clamper

B) -ve clamper

C) + ve clipper D) -ve clipper

8. Combining both impedance and frequency scaling factors, which of the

B)

C)

D)

A)

following statements are true ?

A) Rnew= KZ R ; Cnew= C/ (KZK) B) Rnew= KR ; Cnew= C. (KZK)
C) Rnew= KZ R ; Cnew= C.(KZK)
D) Rnew= K R ; Cnew= C/ (KZK)
9. What type of filter does the circuit represent?

4. For a Weinbridge oscillator circuit, the diodes are connected across the
resistor R2 to ___________
A) satisfy barkhausen criterion
B) stabilize the amplitude of oscillations
C) stabilize the frequency of oscillations D) All of the above
5. Which of the following can generate a sinusoidal signal?
A) Schmitt trigger
B) Astable multivibrator
C) Weinbridge Oscillator
D) None of the above
6. In the circuit shown in the figure, if R 2= 1.164R1, R= 10k , fo= 500Hz, the
value of C is______________
A) 1 F B) 10 F
C) 0.1F
D) 0.01 F

10.

A) BPF

B) BRF

C)

D) None

All-pass

In an astable multivibrator using

555 timer, the voltage across the

capacitor changes between the voltage levels_____ and ______

A) 1/3 VCC and VCC
B) 1/3 VCC and 2/3 VCC
C) 1/3 VCC and 2VCC
D) 2/3 VCC and VCC
11. Which one of the following is not a part of the internal circuitry of 555
timer?
A) RS FF
B) Comparators
C) Buffer
D) MOSFET
12. For a monostable multivibrator using a 555 timer, the expression for pulase
width (T) is__________
A) 2.2 RC
B) 1.5 RC
C) 1.1 RC
D) 3.3.RC

13. Which of the following is a component of a Phase Locked Loop ?

A) VCO
B) Peak Detector
C) Band Pass Filter
D) 555 timer
14. Non-inverting amplifier using an Op-Amp is an example of
A) Voltage series feedback
B) Voltage Shunt feedback
C) Current series feedback
D) Current shunt feedback

Marks:
Answers
1

11

12

13

14

15

16

18. When a triangular input of frequency f 1 is fed to a differentiator circuit, the

shape and frequency of output is_________and ___________
A) Spike waveform , f1
B) Square wave , f1
C) triangular, 2f1
D) Sinusoidal, f1

17

18

19. For a summing amplifier with three inputs V1=2V, V2=3V, and V3=1V, if
RF=2R1=3R2=4R3, the output voltage Vo will be________
A) -17V
B) -18V
C) 19V
D)-20V

19

10

20

15. Which of the following statements is true for a PLL?

A) Capture range > Lock range B) Capture range= Lock range
C) Capture range < Lock range D) None
16.

For a CE amplifier using potential divider biasing , if R 1=82k,

R2=39k,VCC=
15V,
the
Thveninss
equivalent
parameters
are_________and___________.
A) VBB = 5.83V; RB= 26.43k B) VBB = 4.83V; RB= 26.43k
C) VBB = 5.83V; RB= 28.67k
D) VBB =4.83V; RB= 32.69k

17. For proper integration using op-amp, which of the following statement is
true; if T is the time period of the input signal?
A) RC << T
B) RC >> T
C) RC=T
D)R << TC

20. A differential op-amp has a differential mode gain of 100 and a CMRR of
40dB. If voltage applied to non-inverting terminal is 0.55 V and voltage
applied to inverting terminal is 0.45 V, the output V0 is
A) 10 V

B) 10.5 V

Name:
Note: 1. Answer in capital letters only.
1. Overwriting is not allowed.

C)

11 V

ID No:

D) 15 V

Set: B
BIRLA INSTITUTE OF TECHNOLOGY AND SCIENCE,
PILANI Hyderabad Campus

Second Semester 2013-14

Analog Electronics ECE F341/ EEE F341/EEE C364)

Time
: 20min.
Max Marks : 20
Answer all the questions.

Lab Quiz
Date: 10/04/2014
Day: Thursday

1. For a second order Butterworth LPF, 2k =________

A) 1.414
B) 4
C) 2
D) 0.707
[
]
2 . For an Ideal Voltage controlled voltage source,
B) Zin , Zout
B) Zin 0, Zout
C) Zin , Zout
D) Zin , Zout0
[
]
3. For a Weinbridge oscillator circuit, the diodes are connected across the
resistor R2 to ___________

7. Combining both impedance and frequency scaling factors, which of the

following statements are true ?
A) Rnew= KZ R ; Cnew= C/ (KZK) B) Rnew= KR ; Cnew= C. (KZK)
C) Rnew= KZ R ; Cnew= C.(KZK)
D) Rnew= K R ; Cnew= C/ (KZK)

A) satisfy barkhausen criterion

B) stabilize the amplitude of oscillations
C) stabilize the frequency of oscillations D) All of the above
4. Which of the following can generate a sinusoidal signal?
A) Schmitt trigger
B) Astable multivibrator
C) Weinbridge Oscillator
D) None of the above

8. Identify the circuit which will give the output mentioned below, when a
sinusoidal signal with a peak voltage of Vp is applied as the input.
A) +ve clamper

5. For a sinusoidal input, the output Vo for the circuit shown below is _______

B) -ve clamper

C) + ve clipper D) -ve clipper

9. In an astable multivibrator
using 555 timer, the voltage across the capacitor changes between the
B)

C)

D)

A)

6. In the circuit shown in the figure, if R 2= 1.164R1, R= 10k , fo= 500Hz, the
value of C is______________
A) 1 F B) 10 F
C) 0.1F
D) 0.01 F

voltage levels_____ and ______

A) 1/3 VCC and VCC
B) 1/3 VCC and 2/3 VCC
C) 1/3 VCC and 2VCC
D) 2/3 VCC and VCC
10. What type of filter does the circuit represent?

11.
A) 2.2 RC

B) 1.5 RC

A) BPF

B) BRF

C)

D) None

All-pass

For a monostable multivibrator

using a 555 timer, the expression
for pulase width (T) is__________
C) 1.1 RC
D) 3.3.RC

12. Non-inverting amplifier using an Op-Amp is an example of

B) Voltage series feedback

C) Current series feedback

B) Voltage Shunt feedback

D) Current shunt feedback

13. Which one of the following is not a part of the internal circuitry of 555
timer?
A) RS FF
B) Comparators
C) Buffer
D) MOSFET
14.

For a CE amplifier using potential divider biasing , if R 1=82k,

R2=39k,VCC=
15V,
the
Thveninss
equivalent
parameters
are_________and___________.
A) VBB = 5.83V; RB= 26.43k B) VBB = 4.83V; RB= 26.43k
C) VBB = 5.83V; RB= 28.67k
D) VBB =4.83V; RB= 32.69k

15. Which of the following is a component of a Phase Locked Loop ?

A) VCO
B) Peak Detector
C) Band Pass Filter
D) 555 timer
16. For proper integration using op-amp, which of the following statement is
true; if T is the time period of the input signal?
A) RC << T
B) RC >> T
C) RC=T
D)R << TC

Note: 1. Answer in capital letters only.

2. Overwriting is not allowed.

Marks:
Answers
1

11

12

13

14

15

17. When a triangular input of frequency f 1 is fed to a differentiator circuit, the

shape and frequency of output is_________and ___________
A) Spike waveform , f1
B) Square wave , f1
C) triangular, 2f1
D) Sinusoidal, f1

16

17

18. For a summing amplifier with three inputs V1=2V, V2=3V, and V3=1V, if
RF=2R1=3R2=4R3, the output voltage Vo will be________
A) -17V
B) -18V
C) 19V
D)-20V

18

19

19. Which of the following statements is true for a PLL?

A) Capture range > Lock range B) Capture range= Lock range
C) Capture range < Lock range D) None

10

20

20. A differential op-amp has a differential mode gain of 100 and a CMRR of
40dB. If voltage applied to non-inverting terminal is 0.55 V and voltage
applied to inverting terminal is 0.45 V, the output V0 is
A) 10 V

Name:

B) 10.5 V

C)

11 V

ID No:

D) 15 V