si
a.
co
m
ATI @RS780
PCB:1.3
do
M/B:7549
i-
In
BIOSVer: A7549AMS.701
kn
is
ROHS
MAGICZHU
DATA
2008.3.24
VER
1.0
ww
w.
Te
EDITOR
Agenda
1Summary of main IC........................................................................03
si
a.
co
m
ww
w.
Te
kn
is
i-
In
do
ne
6Appendix....13
Power sequence..14
System reset sequence...21
Instruction of production..22
1summary of main IC
1.1 Processor (AM2 940 )
locationCPU1
si
a.
co
m
locationU15
locationU25
i-
In
do
ne
Supports HD Audio
Te
kn
is
ww
w.
locationDIMM1~DIMM2
locationSPI1
locationU14
locationU26
si
a.
co
m
locationU21
ne
uP7706U8Up6261M8uP6103S8)U9U6U1 U19U24U22
U18U2
do
Turn switching power supply into the special voltage for the chip
In
Reduced EMI
i-
locationU16
is
First channel:
Third channel:
Fourth channel:
Te
kn
CHOKE13+Q83 Q94HIGH+Q90Q91LOW
CHOKE14+Q85Q93HIGH+Q87Q80LOW
CHOKE15+Q81HIGH+Q76Q89LOW
ww
w.
1.13 IC PWM(ISL6323CRZ-T)
locationU35
locationU37
ne
do
In
i-
is
kn
Te
w.
ww
si
a.
co
m
locationU7
si
a.
co
m
ww
w.
Te
kn
is
i-
In
do
ne
ww
w.
Te
kn
is
i-
In
do
ne
si
a.
co
m
POWER MAP:
ne
do
In
i-
is
kn
Te
w.
ww
si
a.
co
m
CLOCK MAP
ne
si
a.
co
m
4.1 3VDUAL
w.
Te
kn
is
i-
In
do
Transformed from VCC5_SB by U22 at S5/S4/S3, and from VCC3 by Q55 at S1/S2/S0.
4.2 USB_PHY&+1.2VALW
ww
5VDIMM:
si
a.
co
m
ne
do
i-
VDDA_25
ww
w.
Te
kn
is
4.3
In
10
VCC_DDR
do
ne
si
a.
co
m
4.4
In
The voltage value of VCC_DDR is 0V at S5/S4,Transformed from 5VDIMM by U2,Q12 and Q20 at
S3/S2/S1/S0.
ww
w.
Te
kn
is
i-
4.5 VTT_DDR
do
ne
si
a.
co
m
4.6 1_8VREF&1.25VREF_NB&1_2VREF
In
Transformed from VCC5 by U18 at S2/S1/S0;The voltage value of them are 0V.
ww
w.
Te
kn
is
i-
4.7 +1.8V_S0
Transformed from VCC3 by U19A and Q38 at S2/S1/S0;the voltage value of +1.8V_S0 is 0V
12
at S5/S4/S3.
ne
si
a.
co
m
4.8 VCCA_1V2
VCC1_1
ww
w.
Te
kn
is
i-
4.9
In
do
Transformed from VCC3 by U32 ,Q59 and Q58 at S2/S1/S0;the voltage value of VCC1_1 is 0V
13
at S5/S4/S3.
ww
w.
Te
kn
is
i-
In
do
ne
si
a.
co
m
14
FAIL
Repair directly
OK
do
FAIL
i-
In
FAIL
is
OK
Inserting switching power
supply and pressing power
button see whether the MB
is active with no the other
device in the MB
Te
kn
w.
ww
si
a.
co
m
phenomena
ne
Check
OK
15
si
a.
co
m
FAIL
Te
kn
is
i-
OK
In
do
ne
w.
ww
Note:
For protecting
CPU,measureVcore,VCC_DDR,VTT_DDR
and VCC1_2 before insert CPU
16
si
a.
co
m
value are about 14.318Mhz and check whether Clock Gen is running and the Clock Gen
sends all clocks are right.;check Resisters and Caps of all clocks;check whether PCB is
open or short;
check whether CPU is active:
1.Vcore:
FAIL
The abnormal CPU Vcore voltage value : check CPU,U9, VID;low Vcore voltage value
,check whether MOS fail;high Vcore voltage value,check whether
FB is active;
the Vcore voltage value is 0V,check whether the 4Pins power connector touch well;check whether High
do
In
ne
and Low MOS fail,check whether MOSVRM and IC traces fail( check components
i-
(3) MOS heatsinks dont mount a good site so burned at F/T test and ORT test
(4) Driver IC fail
is
kn
Te
ww
w.
OK
(1)
(2)
(3)
(4)
Burned CPU
(1)
bad design
(2)
17
The MB will protect when the MOS are burned for AMD platform MB.If you power on at no
changing burned MOS,CPU will be damaged
(3)Human factors of produnctaion line
2.Reset signal
si
a.
co
m
A_RST#:check whether A_RST# voltage value(R270)is from High to Low.If the A_RST#
isnt from High to Low,remove R270 to make sure of SB issue or NB issue.
LDT_RST# measure whether LDT_RST# (Q43.E)is running.If LDT_RST# signal dont run,
check PWR_GOOD(VRM_GD),NB_PWRGD,SB_PWRGD,and so on.
RSMRST#: check whether RSMRST# voltage value is 3.3V at S5 .The RSMRST# is charge
of reseting sleep sequence.The RSMRST# level is still low so the MB doesnt operater
well.At this state ,you can cut the trace for find the problem out.
ne
do
In
Press chipset
i-
using
is
kn
slot is ok.
Te
ww
w.
18
I. Show wrong the BIOS verion,and so on .You need to flash BIOS software
2.Show wrong CPU frequence value ,for the reason, CLK Gen issue or CMOS
si
a.
co
m
setting
FAIL
The screen
show right
imformation?
In
do
ne
signal, SB ;
i-
OK
is
FAIL
Keyboard is
active?
kn
check MSCLK,MSDAT,KBCLK,KBDAT
ww
w.
Te
OK
19
FAIL
Save the
setting at
CMOS
si
a.
co
m
do
ne
at power on
1.
FAIL
RESET:
is
kn
2. POWER BUTTON:
check POWER SEQUENCE
w.
Te
Press the
reset ,and
then press
Power Button ?
i-
In
OK
ww
OK
20
Enter OS?
Include hang
up, blue
screen,auto-re
si
a.
co
m
FAIL
ne
OK
do
set,unable to
install os
In
i-
FAIL
Te
kn
is
LAN card,PCI,USB,CO
M,PARAL
LEL,Audio device,and
ww
w.
OK
21
si
a.
co
m
ne
do
FAIL
i-
In
Able to sleep or
not?
ww
w.
Te
kn
is
OK
22
do
ne
si
a.
co
m
FAIL
ww
w.
END
Te
kn
is
i-
In
OK
23
6Appendix
ww
w.
Te
kn
is
i-
In
do
ne
si
a.
co
m
Power sequence
24
25
ne
do
In
i-
is
kn
Te
w.
ww
si
a.
co
m
si
a.
co
m
is
i-
In
do
ne
ww
w.
Te
kn
26
Control
Standard Spec.
RD Spec.
Regulator Location
Fill b y RD
Fill by RD
Fill by RD
Fill b y RD
reme n
Signal
si
a.
co
m
AMD Socket M2
Symb ol
Fill by RD
R esult
Fill by PE
VCC P
0.8375 ~ 1.75V
EC 12.1
VCCA_1V2
1.175~1.225V
Q39.S
Regulat or_VCC_DDR
V CC_DDR
1.8051.995V
Q46.D
VTT_DDR
0.85~ 0.95V
EC 16.1
V DDA_25
2.375~2.625
C58.2
Chipset
Symb ol
Standard Spec.
RD Spec.
Fill b y RD
Fill by RD
Fill by RD
Regulator Location
do
Regulat e VD DA_25
In
CPU -Vtt
ne
CPU -VC OR E
Fill by RD
EC 29.1
RS780
VCC1_8
1.71~1.89V
Q38.S
SB700
USB_PHY
1.14~1.26V
CP26.2
SB700
VC C_SB
1.14-1.26V
Q50.S
is
i-
1.14-1.26V
kn
Te
Fill b y RD
Standard Spec.
RD Spec.
Regulator Location
Fill by RD
Fill by RD
Fill b y RD
reme n
Signal
Fill by RD
t
R esult
Fill by PE
USB _F R4
4.75~5.25V
U 30.8
USB _F R3
4.75~5.25V
U 31.8
USB _F R2
4.75~5.25V
U 29.8
USB _F R1
4.75~5.25V
U 28.8
USB_LAN
4.75~5.25V
U 12.8
USB_1394
4.75~5.25V
U11.8
Audio_+5VR
+ 5VR
4.75~5.25V
D37.C
LAN power
AVDD18
1.14-1.26
CP11.2
VDD33
3.135~3.465V
CP14.1
Regulat or_VCC3_SB
3VDUAL
3.135~3.465V
Q55.D
Regulat or_VCC3
VCC 3
3.135~3.465V
Q55.S
w.
R esult
Measu
Control
ww
Fill by PE
VC C1_1
DEVICE
reme n
Signal
Fill b y RD
RS780/SB700
Symb ol
Measu
Control
27
si
a.
co
m
ne
do
In
iis
kn
EVT2
MVT1
MVT2
ww
Pin Define:
Te
EVT1
w.
DVT
28
2. Jumper Setting:
DEFAULT
1-2
DESCRIPTION
KEEP CMOS
si
a.
co
m
JUMPER NAME
JBAT1
JBAT1
Short 1-2 pin
refreshing program
ww
w.
Te
kn
is
i-
In
L7549 8111C.rar
do
3.LAN
ne
29