e-mail: mariolsm@gmail.com
09/05/2016
Roteiro 1
1. Motivao:
Figure 1.5 shows a simplified three-stage audio power amplifier design. This is a direct
descendant of the Lin topology introduced in the 1950s. Although other arrangements have
appeared through the years, this one and its many derivatives account for the vast majority of
power amplifier designs, and it will be the focus of most of this book.
Transistors Q1 and Q2 form the input differential pair. This arrangement is often called a longtailed pair (LTP) because it is supplied with a so-called tail current from a very high-impedance
circuit like the current source shown. We will often take the liberty of referring to the
amplifiers input stage as the IPS. The input differential amplifier usually has a fairly low
voltage gain, typically ranging from 1 to 15. The IPS compares the applied input signal to a
fraction of the output of the amplifier and provides the amount of signal necessary for the
remainder of the amplifier to create the required output. This operation forms the essence of
the negative feedback loop.
Transistor Q3 in Figure 1.5 forms what is called the voltage amplifier stage (VAS). It is a highgain common-emitter (CE) stage that provides most of the voltage gain of the amplifier.
Notice that it is loaded with a current source rather than a resistor so as to provide the highest
possible gain. It is not unusual for the VAS to provide a voltage gain of 100 to 10,000.
The output stage (OPS) is composed of transistors Q4 through Q7. Its main job is to provide
buffering in the form of current gain between the output of the VAS and the loudspeaker load.
Most output stages have a voltage gain of approximately unity. The output stage here
consists essentially of two pairs of emitter followers (EF), one for each polarity of the output
swing. This is called a complementary push-pull output stage. Transistors Q4 and Q5 are
referred to as the drivers, while Q6 and Q7 are the output devices.
This OPS is the classic class B output stage used in most audio power amplifiers. The upper
output transistor conducts on positive half-cycles of the signal when it is necessary to source
current to the load. The bottom output transistor conducts on the negative half-cycle when it
is necessary to sink current from the load. The signal thus follows a different path through the
amplifier on different halves of the signal. This of course can lead to distortion. The box labeled
bias provides a DC bias voltage that overcomes the turn-on base-emitter voltage drops (Vbe) of
the driver and output transistors. It also keeps them active with a small quiescent bias current
even when no current is being delivered to the load. This smoothes the transition from the
upper transistors to the lower transistors (and vice versa) when the output signal goes from
positive to negative and the output stage goes from sourcing current to the load to sinking
current from the load. Because there is a small region of overlap where both transistors are
conducting, this type of output stage is often referred to as a class AB output stage.
Atividade Prtica 1:
Goal: Differential amplifiers are designed to amplify the difference between two
signals; thus, such amplifiers are capable of reducing noise that is common to both
inputs. We can quantify the differential-mode versus common-mode gain in a quantity
called the common-mode rejection ratio (CMRR).
Materials: The items listed in Table 1 will be needed. For this lab, assume all NPN
transistors are identical BC549 BJTs.
Table 1: Components used in this lab
Component
Quantity
LM741 op-amp
1
1
BC549 NPN BJT
2
4
1 k resistor
3
2
5.1
k
resistor
4
2
10 k resistor
5
2
0.1 F capacitor
6
1
Procedure: The items listed in Table 1 will be needed. For this lab, assume all NPN
1. Generating a differential signal:
Before building a differential amplifier, let us first generate a differential signal, which
would require inverting an analog signal. One way we can do this is by using an op-amp
in negative feedback, as shown in Figure 1.
1. Construct the circuit in Figure 1 using the LM741 op-amp. The pin layout for the
LM741 op-amp is in Figure 2. Note: If your LM741 doesnt have a notch as
shown in the figure, check for a small dot; this dot labels pin 1.
2. 2. Apply a 60 mVpp, 1 kHz sine wave to the input. Display the input and output
on the oscilloscope and verify that the output is the inverse of the input.
a. Construct the circuit in Figure 3 using BC549 transistors for the NPN BJTs. Use
R1 = 10 k, R2 = R3 = 5.1 k, and VCC = 9 V.
b. Ground the inputs and measure IC1, IC2, IC3, and VOUT,DC. How do these values
compare to your hand calculations?
c. Apply a 60 mVpp, 1 kHz sine wave to vin+ and ground vin. Use the oscilloscope
to display the input waveform (vin+) and the output waveform (vout+); sketch the
results on your lab report. If the input signal is noisy, use the averaging feature
of the oscilloscope to get a more accurate result.
d. Use the oscilloscope to measure the peak-to-peak voltages of vin+ and vout+.
e. Now display vout+ and vout on the oscilloscope. Do they appear as you would
expect?
f. Now use the oscilloscope to display vout+ vout. Measure the peak-to-peak
voltage of the signal and calculate the differential gain of the circuit.
g. Apply a 30 mVpp, 1 kHz sine wave to both vin+ and vin. Use the oscilloscope to
display the output waveforms from vout+ and vout. What do you see at the
output? Why?
h. Use the inverting amplifier (from section 1) to apply a 40 mVpp, 1 kHz
differential sine wave to the inputs (i.e. a 20 mVpp sine wave applied to vin+ and
the inverted sine wave to vin). Use the oscilloscope to measure the peak-to-peak
voltage of the differential input and output. Now use these measurements to
determine the gain.
i. Construct the circuit in Figure 4 using BC549 transistors for the NPN BJTs and
the BC557 transistor for the PNP BJTs. Use R1 = 10 k and VCC = 9 V.
j. Apply a 60 mVpp, 1 kHz sine wave to vin+ and ground vin. Use the oscilloscope
to display the input waveform vout and sketch the results on your lab report. Why
is the output not sinusoidal?
k. We would like to reduce Rout by loading the amplifier with a small resistor.
Attach a load to the amplifier as shown in Fig. 5. Use CL=0,1 uF and RL= 5k.
l. Calculate the differential gain for the amplifier with the new load resistance.
m. Apply a 40 mVpp, 1 kHz sine wave to vin+ and ground vin. Use the oscilloscope
to display vin+ and vout. What is the measured differential gain of the circuit?
How does this compare with your hand calculations?
Boa Atividade Prtica!