Design and Precise Modeling of a Novel Digital

Active EMI Filter

Junpeng Ji, Wenjie Chen and Xu Yang
Email: jijunpeng@xaut.edu.cn, {cwj, yangxu}@mail.xjtu.edu.cn
School of Electrical Engineering, Xian Jiaotong University, Xian, Shaanxi, China

Department of Electrical Engineering, Xian University of Technology, Xian, Shaanxi, China

*

AbstractDigital Active EMI Filtering (DAEF) technique is a

new direction of conductive EMI suppression technologies for
switched-mode power converters. However, the conventional
DAEF topology only suppresses EMI to ground on the AC (or
DC) ports. It doesnt definitely aim to Common Mode (CM) or
Differential Mode (DM) EMI. In this paper, a novel DAEF
topology is proposed. It can flexibly suppress CM and DM EMI,
and also effectively adjust EMI suppression ability as well as
prevent interconversion between CM and DM EMI. On the other
hand, because of the parasitic parameters of circuit and the time
delay of controlling system, the traditional model of DAEF
cannot describe the system behavior accurately. This paper
proposes a precise model of DAEF system. The model not only
considers the passive device parasitic parameters of sense circuit,
injection circuit and decoupling circuit, but also considers the
time delay of the digital control system. This model can
accurately describe filter performance of DAEF. Finally,
simulation and experimental results show that the proposed
DAEF effectively suppress CM EMI. Moreover, the precise
model can predict the system filter performance accurately.
KeywordsEMI filter; Digital control; common mode EMI;
different mode EMI

I.

INTRODUCTION

As power density of switched-mode power converters

increased year by year and the switching frequency constantly
improved, the distance of components becomes closer;
therefore the problem of EMI has grown more serious. This
generates a higher challenge for EMI filtering technologies. In
order to suit the change of new situation, the traditional
passive EMI filters [1-4], active EMI filter [5,6] and hybrid active
EMI filter [7-9] are making progress.
On the other hand, with the improvement of digital
processing technique, such as high speed and high precision
FPGA, Analog-Digital Converter (ADC) and Digital-Analog
Converter (DAC), the dream of digital active EMI filtering
(DAEF) technique is ready to bring into reality.
Since there is no component in series connect with the
power circuit, DAEF solves the problem in filter size and
power consumption of traditional EMI filter fundamentally.
Moreover, DAEF can selectively suppress the CM and DM
EMI in accordance with the actual situation of CM and DM
EMI in the switched-mode power converters. It can also
effectively prevent interconversion between CM and DM
interference. Meanwhile, DAEF is an effective method to

suppress CM interference without increasing leakage current

of converter devices.
The concept of DAEF was first proposed in 2012 by the
Canadian academic Hamza, and its effectiveness had been
verified in the photovoltaic grid-connected inverter [10]. In the
following year, DAEF technology was applied in DC-DC
converters of electric vehicle and other switched-mode power
converters [11-13]. However, current DAEF only suppresses
EMI to ground in the AC (or DC) ports. It doesnt definitely
aim to CM or DM interference. This may waste the ability of
EMI suppression and cause interconversion problem between
CM and DM interference. Besides, current DAEF model
doesnt consider the parasitic parameters of circuit and time
delay of controlling system. Therefore, it cannot predict the
system performance accurately.
On considering the above mentioned problems, a novel
DAEF topology is proposed. The goal of this paper is try to
find an effective digital active filtering method to eliminate the
EMI in high power density converters. The advantage of the
proposed circuit lies in that it can neatly suppress CM and DM
interference. Meanwhile, it can also adjust EMI suppression
ability effectively and prevent interconversion between CM
and DM interference. To achieve it, a precise mathematic
model of DAEF is built in this paper. It considers the parasitic
phenomenon of sense circuit, injection circuit as well as
decoupling circuit. What is more, time delay produced by
ADC, DAC and FPGA controller are also considered in detail.
By means of that, the system behavior may be described with
more accuracy.
II.

A. Proposed DAEF Topology

The general scheme of proposed DAEF topology is shown
in Fig. 1. DAEF system includes six parts such as EMI signal
sense circuit, injection circuit, ADC sampling circuit,
controller, DAC output and decoupling circuit between
injected point and sensed point.
EMI sense circuit is a RC high-pass filter, which consists of
resistor and capacitor. The decoupling circuit can reduce the
coupling between signal sense point and signal injection point.
ADC and DAC need high sample rate to improve system
rapidity. EMI injection circuit is a RC low-pass filter. DAEF
controller can be embedded in the inherent controller of power
converters. It can save total cost of power converters. A high

This work was supported by the National Natural Science Foundation of

China (51277145), Science and technology planning of Beilin District of
Xian in 2015 (GX1508), and Featured research program of Xian University
of technology (2014TS010).

978-1-4673-9550-2/16/$31.00 2016 IEEE

DESIGN OF DAEF SYSTEM

3115

impedance RF inductor is located between the injection point

and sense point as the decoupling circuit, which reduced the
coupling between the two points to improve the filtering
performance. DAEF controller usually use FPGA as control
unit, which program with hardware description language and
have parallel processing ability, so it can improve system
rapidity, too.

Power
grid

Decoupling
circuit

Decoupling
circuit

N
EMI
sense
circuit

CiL

CsL
RsL

EMI
injection
circuit

RiL

CsN
RsN

ILEMI

VLEMI

EMI
sense
circuit

CiN

Y (s )

J( s )

X (s )

X (s )

L( s)

GDA ( s)

Gc ( s )

G AD ( s )

H (s )

Fig. 3. Closed-loop system diagram of DAEF

In Fig. 3, H ( s ) is the transfer function of the EMI sense

circuit, G AD ( s ) is the transfer function of ADC. GC ( s ) is the
transfer function of digital controller, GDA ( s ) is the transfer
function of DAC, L( s ) is the transfer function of injection
circuit, J ( s ) is the transfer function of decoupling circuit.
X(s) is EMI noise signal before filter, Y(s) is EMI noise signal
after filter, X(s) is the injected EMI noise after digital control.
In theory, X(s) is equal in magnitude to X(s), and their phase
is opposite. It can achieve full nullification of the EMI noise
which is generated by power converter.

Switching
power
supply
noise
resource

RiN EMI
injection
INEMI
circuit

VNEMI

DAEF controller

Fig. 1. General scheme of proposed DAEF

B. Scheme and Principles of Proposed DAEF

The control system schematic diagram of proposed DAEF
is shown in Fig. 2. EMI signal sense circuit (high-pass filter)
picks up conducted EMI signal VLEMI and VNEMI to ground on
the L line or N line. The sensed EMI signal voltage is sampled
by high-speed ADC to controller. According to equation 1 and
equation 2, EMI controller can calculate the CM EMI voltage
VLc (VNc ) and DM EMI voltage VD . By controller GC ( s )
compensating, DAEF control system outputs EMI current
signal I LEMI , which will cancel the sum of CM EMI on L line
and DM EMI by injection circuit (low pass filter). As well as
DAEF control system outputs EMI current signal I NEMI to
cancel the CM EMI on N line. I LEMI and I NEMI signal is
converted back to analog signal for injection back to L line or
N line. DAC output is EMI cancel signal of 0~20mA which
can suppress 120dBV EMI signal. The capacitor CiL and CiN
of injection can prevent overloading to DAC from the power
converter.

A. Precise Modeling of Sense, Injection and Decoupling

Portion
The parasitic parameters of passive components in the
sense and injection circuit affect the high frequency filter
performance, so the high frequency model needs to be built.
The high frequency equivalent model of sense circuit is shown
in Fig. 4. Where RCs and LCs are series equivalent resistor and
inductor of the capacitor CS. LRs and CRs are series equivalent
inductor and parallel equivalent capacitor of resistor RS.

CS

RCs

LCs

LRs
RS

CRs

Fig. 4. High frequency equivalent model of sense circuit

The transfer function H ( s ) of sense circuit with parasitic

parameters can be expressed as
LRs 2
s +s
RS
H ( s) =
L + LRs 2 C Rs RCs
+
+ 1) s + 1
( LCs C Rs + LRs C Rs ) s 3 + ( RCs C Rs + Cs
)s + (
RS
CS
RS
LRs C Rs s 3 +

(3)

Fig. 2. Control system schematic diagram of DAEF

III.

1
is the corner frequency of high-pass
RS CS

VLEMI + VNEMI
2

(1)

where 1 = 2 f1 =

V
VNEMI
VD = LEMI
2

(2)

filter. According to IEC 62041:2010, f1 should be under

150kHz to pick EMI signal above 150kHz.

VLc (VNc ) =

PRECISE MODELING AND ANALYSIS OF DAEF SYSTEM

The closed-loop block diagram of DAEF control precise

model is shown in Fig. 3.

The high frequency equivalent model of injection circuit is

shown in Fig. 5. RCi and LCi are the series equivalent resistor
and inductor of the capacitor Ci. LRi and CRi are the series
equivalent inductor and parallel equivalent capacitor of
resistor Ri.

3116

where keff is constant. So, the transfer function G AD ( s ) of

C Ri

Ci

LCi

RCi

Ri

ADC when considering average delay time t AD d avg can be

expressed as

L Ri

keff

Fig. 5. High frequency equivalent model of injection circuit

The transfer function L ( s ) of injection circuit with

parasitic parameters can be expressed as
L
C
R
LCi C Ri s + ( RCi C Ri + Ci ) s 2 + ( Ri + Ci ) s + 2
Ri
Ci
Ri
L( s ) =
L
L
C
R
( LRi C Ri + LCi C Ri ) s 3 + ( RCi C Ri + Ci + Ri ) s 2 + ( Ri + Ci + 1) s + 2
Ri
Ri
Ci
Ri
3

G AD ( s ) =

1
is the corner frequency of low-pass
Ri Ci

filter. According to IEC 62041: 2010, f2 should be above

30MHz to inject necessary EMI signal below 30MHz.

The high frequency equivalent model of decoupling circuit

is shown in Fig. 6. RF and CF respectively are the series
equivalent resistor and parallel equivalent capacitor of the
decoupling inductor LF, which is implemented by a single-turn
RF inductor.

RF

CF

LF

GDA ( s ) =

J ( s) =

RF + LF s
C F LF s 2 + RF C F s + 1

B( s) =

nbC LVin
(Vin Vth )

(6)

k eff
Vin

(7)

(9)

DA d

(10)

The compensator can be designed based on the system

indicator requirement. Because this paper focused on study the
precise modeling and new DAEF topology, selected the
easiest inverted proportion as the proportional part of
compensator. Furthermore, the operation time con of
hardware language cannot be ignored. So, the transfer function
GC ( s ) of controller with delay time can be expressed as
(11)

So, the transfer function GDAEF ( s ) of DAEF control

precise model can be obtained as
GDAEF ( s ) =

(5)

where b , n and are constant, their value varies depending

on different ADC chip. CL is the load capacitor, Vth is
threshold voltage, Vin is input voltage. If input voltage dont
change, and is a fixed value in one period, it can be replaced
by its average value t AD d avg . t AD d avg can be expressed as

t AD d avg =

e st
1+ s

GC ( s ) = Ke s con

B. Precise Modeling of Digital Processing Portion

Digital processing portion includes 3 segments as ADC,
controller and DAC. There is a delay time in ADC processes,
the time t AD d is a nonlinear function about input voltage, it
can be described as

t AD d =

Dzoh ( s ) B ( s )
s

where Dzoh ( s ) is the transfer function of zero-order holder,

B ( s ) represent the delay time and nonlinear potion, and can
be expressed as

Fig. 6. Precise equivalent model of decoupling circuit

The transfer function J ( s ) of decoupling circuit with

parasitic parameters can be expressed as

(8)

Generally, DAC is a zero-order-hold. When considering its

delay time and nonlinear potion, the transfer function GDA ( s )
of DAC can be expressed as

(4)
where 2 = 2 f 2 =

s
1
1
st
(1 + e ADd avg ) = (1 + e Vin )
Ts
Ts

J (s)
1 + J ( s ) L ( s )GC ( s )G AD ( s )GDA ( s ) H ( s )

(12)

C. Design of ADC Sampling Precision

The DAEF is a closed loop system, the sampling accuracy

of sensed EMI signal affected directly EMI suppression
performance. If selected the sampling accuracy randomly, the
ADC resolution may be greater than the error range of the
output EMI signal allowed. When the output signal changes
exceeded the error range, the digital signal may have no
change, and cannot complete the feedback control. The
minimum bit of ADC sampling can be written as

Vmax
n = INT log 2
(13)

Vo H

where Vmax is the maximum of ADC, which allowed by input

voltage; Vo is the error range of the output signal allowed;
H is the output gain of the EMI signal sensed.
In order to ensure the reliable filtering performance,
selected the thousandth of the lowest limits of IEC
62041:2010 46dBV as Vo .

3117

Vo = 0.001 46dB V = 0.2 V

Tab. I. The relationship between Ni-Zn ferrite formula and cut-off

frequency

(14)

H = Vref / Vo = 2 / 46dB V = 10000 , Vmax is 3V, The

Fe2O3:NiO:ZnO

minimum bit of ADC sampling can be calculated by

Vmax
3

n = INT log 2
= INT log 2
7
= 11

2
10
10000
V
H

(15)

D. Analysis of DAEF System

Frequency response of traditional DAEF model is the
black solid curve showed in Fig. 7. Frequency response of
proposed precise DAEF model is the red dotted curve showed
in Fig 7.

Cut-off frequency /MHz

50.3:17.5:33.2

320

10

50.2:24.9:24.9

150

30

50.8:31.7:16.5

85

75

51.6:39.0:9.4

44

140

The upper limit frequency of test standard of conductive

EMI is 30MHz. So choose the ratio of the Ni-Zn ferrite is:
Fe2O3: NiO: ZnO= 50.2:24.9:24.9. The relative permeability
of Ni-Zn ferrite is 150.
B. Design and Implementation of Single-Turn Inductor
1) Determination of Impedance Range of Single-Turn
Inductor
For design of decoupling inductor, it is first step to
determine the impedance range of inductor, the next step is to
determine the size of decoupling inductor according
impedance range.

Equivalent impedance diagram of the DAEF system is

shown in Fig. 8.

Fig. 7. Frequency response of DAEF system

When considering parasitic phenomenon and delay time,

the filter ability decreases to -30dB from -35dB of traditional
model in the middle frequency range. In the low and high
frequency, the filter ability of precise model decreases to 25dB.
IV.

DESIGN OF DECOUPLING CIRCUIT

In order not to effect the advantage in decreasing size,

decoupling circuit dont use the inductor which connects in
power in series. In this paper, the single-turn inductor is
selected.
A. Design of the Single-Turn Inductor Core
In order to suppress EMI interference, this paper chooses
ferrite as magnetic core of single-turn inductor. Ferrite cores
include Ni-Zn ferrite and Mn-Zn ferrite. Ni-Zn ferrite is used
to suppress the electromagnetic interference in high frequency
section. Therefore, in this paper, Ni-Zn ferrite is used to be the
core material of single-turn inductor. Its operating frequency
range is 100kHz-140MHz.

There is a direct relationship between the content of ZnO,

NiO and the operating frequency range of Ni-Zn ferrite for NiZn ferrite. The relationship between the formula proportion of
Ni-Zn ferrite and relative permeability , the cut-off
frequency is reported in Table I.

Fig. 8. Equivalent impedance diagram of the DAEF system

In order to prevent the interaction on both sides of the

impedance in EMI filter, according to the principle of
impedance matching, ZF should satisfy Equation 16 and
Equation 17.

Z F  Z C & Z IN =

Z C Z IN
Z C + Z IN

(16)

Z S  Z F & ZT =

Z F ZT
Z F + ZT

(17)

By Equation 16 and Equation 17, ZF impedance range

expression of decoupling circuit can be got.

Z C Z IN
Z Z
= ZF = S T
Z C + Z IN
ZT - Z S

(18)

Among them, ZF is the impedance of decoupling circuit,

ZC is the impedance of switching power supply, ZS is the
impedance of LISN, ZS 50. ZT is the impedance of sense
circuit and Z is the impedance of injection circuit. As shown
in Fig. 8. The CS and C
can be regarded as short circuit on
the high frequency range. So, ZT R S Z
R .

3118

In this paper, the load of the DAEF systtem is a switching

power supply. ZC is its impedance, which caan be derived from
two current probe testing method, the impeddance values curve
is shown in Fig. 9.

V.

EXPERIM
MENTAL RESULTS

To verify the filter perform

mance of DAEF, the DAEF has
been tested on a 150W sw
witching power supply, whose
parameters are reported in Tablle II.
Tab. II Parameters of the testeed switched-mode power supply
Input Voltage
AC:220V
Output Voltage
DC:48V

Fig. 9. Impedance tested curve of test switching power supply

The impedance range of decoupling circuit

c
ZF can be
obtained by Equation 18 and impedance rannge ZC . As shown
in Fig. 10, the impedance range of ZF changees with frequency,
the impedance curve of ZF should be in bettween curve 1 and
curve 2 in Fig. 10.

Output Current
Filter Capacitor

DC:3A
470F

Switch Frequency

65kHz

The experimental parameteers of the DAEF system based

on FPGA are reported in Taable III. The DAC and ADC
converters are high speed, highh resolution types.
Tab. III Parameters of the DAEF system
circuit
Sampling circuit
Sense circuit
Rejection circuit
Decoupling circuit

Fig. 10. The range of impedance

AC
h

Parameters

ADC

14bit250MSPS

DAC

14bit250MSPS

RsL / CsL

1k/0.1uF

RsN / CsN

1k/0.1uF

RiL / CiL

30/1nF

RiN / CiN

30/1nF

L jL / L jN

0.54uH

The complete system test setup is depicted in Fig. 11, a

switch-mode power supply witthout internal passive EMI filter
is tested as a EMI noise source.

of deccouple circuit

2) Determination of Single-Turn Inductorr Size

The relationship between single-turn innductor and inside
diameter, outside diameter, length as:

L=

me
Code nam

LISN

EMC Receiver

(19)

where h is the length of inductor, A is thee sectional area of

D
the inductor, A
h
. D is the ouutside diameter of
the inductor, d is the inside diameter of thee inductor, is the
permeability of core,

15
50 4 10
1.88 10 .
According to the standard about Dimennsions of uncoated
ring cores of magnetic oxides [14], the ratio of
o outside diameter
and inside diameter is: D/d 1.67; The raatio of length and
inside diameter ratio is: h/d 0.67. So thee expression about
inductor value L and inside diameter d is shoown in

Niose
source
Sensee and
Injection
n Circuit

Control Board

Fig. 11. Test setup of coonducted EMI with DAEF

The spectrum of CM EMI emission of test power supply

without EMI filter is shown inn Fig. 12. The spectrum of CM
EMI emission with proposed DAEF
D
is shown in Fig. 13.

(20)
L =0.335 d
According to Fig.10, we determined thatt the impedance of
single-turn inductor is ZF 50. Because |ZF | 2fL, if f
takes 15MHz of center frequency, the calcullate inductor value
L is obtained, L =0.54 H .
According to Equation 20, /
1.67,, /
0.67, this
can be calculated that dimensions for sinngle-turn inductor
is:
14.31mm
5.74mm
8.57mm.

3119

Fig. 12. Spectrum of CM

M EMI without EMI filter

[2]

[3]

[4]

[5]

Fig. 13. Spectrum of CM EMI with propposed DAEF

From Fig. 12 and Fig. 13, it can be seenn that the spectrum
of CM conductive EMI is not only obvioussly lower than red
standard limits curve, but also is lower thhan curve without
EMI filter.
VI.

[6]

[7]

CONCLUSION

This paper proposed a novel DAEF topoology and method,

which can suppress CM and DM conductive EMI of switchedmode power converters flexibly and selectiively. The method
calculates the EMI signals to ground acquirred from L and N
lines, separately. It obtains actual CM and
a
DM noise of
converters. Then cancel CM and DM EM
MI effectively and
separately. Compared to the traditional DA
AEF, the proposed
method may adjust the suppression capacityy of CM and DM
EMI effectively, and prevent interconversionn between CM and
DM EMI. Besides, this paper establlished a precise
mathematical model of the proposed DAEF
F, which consider
the parasitic phenomenon of sense circuit, innjection circuit and
decoupling circuit. Delay time produced byy ADC, DAC and
FPGA controller is also considered in detaileed. Compared with
traditional model, this model can describe thhe system behavior
accurately and reflect the filter performance of DAEF.

[8]

[9]

[10]

[11]

[12]

[13]

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