DATA SHEET

MOS FIELD EFFECT TRANSISTOR

PA2724UT1A

OM

SWITCHING
N-CHANNEL POWER MOSFET

T-

ABSOLUTE MAXIMUM RATINGS (TA = 25C, All terminals are connected.)

Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC)
Drain Current (pulse)

Note1

30

VGSS

20

ID(DC)

29

ID(pulse)

170

1.5

PT1

CH
IP
SE

Total Power Dissipation

Note2

VDSS

Total Power Dissipation (PW =10 sec)

Note2

Channel Temperature

PT2

4.6

Tch

150

Tstg

Note3

55 to +150

Single Avalanche Current

IAS

29

Single Avalanche Energy

Note3

EAS

84

mJ

Rth(ch-A)

83.3

C/W

Rth(ch-C)

1.5

C/W

Storage Temperature

THERMAL RESISTANCE

Channel to Ambient Thermal Resistance

Note2

Channel to Case (Drain) Thermal Resistance

Notes 1. PW 10 s, Duty Cycle 1%

5 0.2

5.15 0.2

5.4 0.2

1
0.2

1, 2, 3 : Source
4
: Gate
5, 6, 7, 8: Drain

4.1 0.2

RoHS Compliant

0.10 S

+0.05
0

Thin type surface mount package with heat spreader (8-pin HVSON)

6 0.2

IC

Ciss = 4400 pF TYP. (VDS = 15 V, VGS = 0 V)

0.10 M

RDS(on)2 = 5.0 m MAX. (VGS = 4.5 V, ID = 15 A)

Low input capacitance

+0.1

RDS(on)1 = 3.3 m MAX. (VGS = 10 V, ID = 15 A)

0.27 0.05

Low on-state resistance

8
2

0.42 0.05

FEATURES

1.0 MAX.

.C

The PA2724UT1A is N-channel MOSFET designed for DC/DC converter applications.

1.27

PACKAGE DRAWING (Unit: mm)

DESCRIPTION

3.65 0.2
0.6 0.15

0.7 0.15

EQUIVALENT CIRCUIT
Drain

Body
Diode

Gate

Source

2. Mounted on a glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mm

3. Starting Tch = 25C, VDD = 15 V, RG = 25 , VGS = 20 0 V, L = 100 H
Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately degrade
the device operation. Steps must be taken to stop generation of static electricity as much as possible, and
quickly dissipate it once, when it has occurred.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.

Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G18297EJ1V0DS00 (1st edition)
Date Published April 2007 NS CP(K)
Printed in Japan

2006, 2007

 PA2724UT1A
ELECTRICAL CHARACTERISTICS (TA = 25C, All terminals are connected.)
CHARACTERISTICS

SYMBOL

TEST CONDITIONS

MIN.

IDSS

VDS = 30 V, VGS = 0 V

Gate Leakage Current

IGSS

VGS = 20 V, VDS = 0 V

VGS(off)

VDS = 10 V, ID = 1 mA

1.5

| yfs |

VDS = 10 V, ID = 15 A

13

RDS(on)1

VGS = 10 V, ID = 15 A

RDS(on)2

VGS = 4.5 V, ID = 15 A

Input Capacitance

Ciss

VDS = 15 V,

Output Capacitance

Coss

VGS = 0 V,

Reverse Transfer Capacitance

Crss

f = 1 MHz

Turn-on Delay Time

td(on)

VDD = 15 V, ID = 15 A,

Rise Time

tr

VGS = 10 V,

Turn-off Delay Time

td(off)

RG = 10

Fall Time

tf

Total Gate Charge

QG

Gate to Source Charge

Drain to Source On-state Resistance

Note

Gate to Drain Charge

Body Diode Forward Voltage

Note

.C

Forward Transfer Admittance

Note

UNIT

10

100

nA

2.5

V
S

2.7

3.3

3.7

5.0

4400

pF

835

pF

310

pF

26

ns

9.4

ns

109

ns

28

ns

VDD = 15 V,

35

nC

QGS

VGS = 5 V,

13

nC

QGD

ID = 29 A

12

nC

IC

Gate to Source Cut-off Voltage

MAX.

OM

Zero Gate Voltage Drain Current

TYP.

IF = 29 A, VGS = 0 V

0.8

trr

IF = 29 A, VGS = 0 V,

42

ns

Reverse Recovery Charge

Qrr

di/dt = 100 A/s

43

nC

Gate Resistance

RG

f = 1 MHz

1.8

T-

VF(S-D)

Reverse Recovery Time

CH
IP
SE

Note Pulsed

TEST CIRCUIT 1 AVALANCHE CAPABILITY

D.U.T.
RG = 25

D.U.T.

50

PG.
VGS = 20 0 V

TEST CIRCUIT 2 SWITCHING TIME

PG.

VDD

VDS

ID

RG

VGS
0

BVDSS

IAS

RL

VDD

Starting Tch

= 1 s
Duty Cycle 1%

TEST CIRCUIT 3 GATE CHARGE

D.U.T.
IG = 2 mA

PG.

50

RL
VDD

Data Sheet G18297EJ1V0DS

VGS
VGS
Wave Form

VGS

10%

90%

VDD
VDS
90%

90%

VDS
VDS

10%

10%

tr

td(off)

Wave Form

td(on)
ton

tf
toff

 PA2724UT1A
TYPICAL CHARACTERISTICS (TA = 25C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA

FORWARD BIAS SAFE OPERATING AREA

1000
PW

ID(pulse)

100

ID - Drain Current - A

100

0
0

20

40

60

80

100

120 140 160

OM
0

s
i

10

d
it e
m )
Li V
)
0
n
i
o
1
S(
=
D
R GS
(V

Po
w

1i 0

er
D

ss
ip

at
io

Li
m
it

ed
Single Pulse
Mounted on a glass epoxy board of
25.4 mm x 25.4 mm x 0.8 mm

.C

20

s
i

40

30

60

80

1i 0

ID(DC)

1i 0

1i

dT - Percentage of Rated Power - %

120

0.1
0.01

0.1

10

100

VDS - Drain to Source Voltage - V

IC

TA - Ambient Temperature - C

TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH

rth(t) - Transient Thermal Resistance - C/W

1000

Rth(ch-A) = 83.3C/Wi

T-

100

10

CH
IP
SE

Rth(ch-C) = 1.5C/Wi

0.1

Single Pulse
Rth(ch-A): Mounted on a glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mm

0.01
100

1m

10 m

100 m

10

100

1000

PW - Pulse Width - s

DRAIN CURRENT vs.

DRAIN TO SOURCE VOLTAGE

FORWARD TRANSFER CHARACTERISTICS

90

Pulsed

10 V
4.5 V
4.0 V

3.8 V

60

3.6 V

3.4 V

30

3.2 V

VGS = 3.0 V

ID - Drain Current - A

ID - Drain Current - A

90

60

TA = 55C
25C
75C
125C

30

VDS = 10 V
Pulsed

0
0

0.2

0.4

0.6

0.8

VDS - Drain to Source Voltage - V

VGS - Gate to Source Voltage - V

Data Sheet G18297EJ1V0DS

 PA2724UT1A

FORWARD TRANSFER ADMITTANCE vs.

DRAIN CURRENT

2.5
2
1.5

0.5

VDS = 10 V
ID = 1 mA

0
-75

-25

25

75

125

175

10

0.1
0.01

0.1

10

IC

10

T-

8
6
VGS = 4.5 V

10 V

CH
IP
SE

Pulsed

0.1

10

100

1000

0
0

VGS = 4.5 V

10 V

15

20

CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE

100000
Ciss, Coss, Crss - Capacitance - pF

10

VGS - Gate to Source Voltage - V

10

ID = 15 A
Pulsed

ID = 15 A
Pulsed

10

DRAIN TO SOURCE ON-STATE RESISTANCE vs.

CHANNEL TEMPERATURE

100

15

ID - Drain Current - A

RDS(on) - Drain to Source On-state Resistance - m

DRAIN TO SOURCE ON-STATE RESISTANCE vs.

GATE TO SOURCE VOLTAGE

RDS(on) - Drain to Source On-state Resistance - m

DRAIN TO SOURCE ON-STATE RESISTANCE vs.

DRAIN CURRENT

10000
Ciss
1000

Coss
VGS = 0 V
f = 1 MHz

Crss

100

0
-75

-25

25

75

125

175

0.01

0.1

10

VDS - Drain to Source Voltage - V

Tch - Channel Temperature - C

VDS = 10 V
Pulsed

ID - Drain Current - A

Tch - Channel Temperature - C

RDS(on) - Drain to Source On-state Resistance - m

TA = 55C
25C
75C
125C

.C

100

OM

| yfs | - Forward Transfer Admittance - S

VGS(off) - Gate to Source Cut-off Voltage - V

GATE TO SOURCE CUT-OFF VOLTAGE vs.

CHANNEL TEMPERATURE

Data Sheet G18297EJ1V0DS

100

 PA2724UT1A

DYNAMIC INPUT/OUTPUT CHARACTERISTICS

SOURCE TO DRAIN DIODE FORWARD VOLTAGE

1000

ID = 29 A
0

VGS = 10 V

10

0V

0.1

.C

100

OM

IF - Diode Forward Current - A

VDD = 24 V
15 V
6V

Pulsed

0.01

10

20

30

40

QG - Gate Charge - nC

LEAD PLATING

PA2724UT1A-E2-AZ

Note

PA2724UT1A-E1-AY

Note

PA2724UT1A-E2-AY

Note

Sn-Bi

PACKING

Tape 3000 p/reel

T-

PA2724UT1A-E1-AZ

Note

0.2

0.4

0.6

0.8

1.2

VF(S-D) - Source to Drain Voltage - V

ORDERING INFORMATION
PART NUMBER

IC

VGS - Gate to Source Voltage - V

PACKAGE

8-pin HVSON
0.10 g TYP.

Pure Sn

CH
IP
SE

Note Pb-free (This product does not contain Pb in the external electrode.)

Data Sheet G18297EJ1V0DS

OM

PA2724UT1A

CH
IP
SE

T-

IC

.C

The information in this document is current as of April, 2007. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or
data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all
products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
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M8E 02. 11-1