102

SIMULATOR STUDY ON LINE FAULT CLEARING BY D.C. CIRCUIT BREAKERS IN A MESHED MTDC SYSTEM
K W

Kannqiesser

Consultant, Federal Republic of Germany

INTRODUCTION
HVDC multiterminal systems, here referred
to as MTDC systems, request increasinqly
interest after the first schemes of this
kind are in operation or under commissioning,
respectively. A variety of system configurations can be defined (1) whose properties
concerning
flexibility,
reliability
and
economics are significantly different. Amongst
them the meshed MTDC system offers the important advantage that an outage of a line
section - even a permanent one - does not
prevent the desired energy transfer amongst
all of the terminal stations.
It is an unavoidable consequence of a d.c.
side fault that the energy transfer in the
affected pole of the entire MTDC system
is interrupted until fault clearing. Fast
fault clearing is therefore an essential
requirement in MTDC systems. As will be
shown in this paper d.c. breakers can render
valuable services to fulfil this requirement.

WeSS

Forschungsgemeinschaft fur Hochspannunqsund Hochstromtechnik e.V., Federal Republic of GC

in the converters then a load rejection

overvoltage will appear at the a.c. side
of the converters which may be very siqnificant in case of terminal stations with a
low short circuit ratio (SCR). Therefore
a fault clearing method would be desirable
which keeps the direct currents flowing
(2). with the aim to reduce changes in the
reactive power demand of the converters.
The required fast fault clearing comprises
basically three steps:

- The first step is the fast and reliable

fault sensing. There are wellknown methods
like the travelling wave protection which
have proved very reliable in numerous
HVDC point-to-point transmission schemes.
In MTDC systems, particularly in those
of the meshed type, fault sensing needs
to include also the identification of
the faulted line section.

- The

second step is the fault clearing

as such which may be performed by the
enforced decaying of the flash-over arc
current, followed by a sufficient long
de-ionization time
delay, which
shall
be referred to as the conventional method.
An alternative method is the fast disconnection of the faulted line section by d.c.
breakers at both ends ( 3 ) .

REQUIREMENTS FOR FAST FAULT CLEARING

All types of MTDC systems are very sensitive
to d.c. side faults. In the affected pole
the energy transfer amongst the terminal
stations of the entire system will be interrupted until fault clearing was successfully
completed. This is an essential difference
to the fault performance of an intermeshed
a.c. system. Since the impedance of the
feeding transformers is small as compared
to the impedances of long transmission lines
the residual voltage in the system - except
close to the fault location - will be sufficiently high to allow the continuation
of the energy transfer, although at a somewhat
reduced level. In the d.c. case the relation
of impedances is just opposite. After the
fault current surge has been suppressed
by
converter
control,
i.e. in the quasisteady-state mode of operation, the ohmic
resistances of the lines are effective only,
which are comparatively very small. On the
other hand, the internal impedance of the
converters, governed by their current control,
appears to be almost infinite. Consequently,
there is practically no d.c. voltage in
this quasi-steady-state mode, i.e. as long
as the fault exists, and hence there is
no energy transfer, independent of the direct
currents actually flowing in the system.

Rinq,

The third step means the re-establishing

of the pre-fault energy transfer amongst
all the terminal stations. In case of
the conventional method the fault-affected
system pole has to be started from zero
which in the case of MTDC systems needs
careful coordination of deblocking and
ramping up in all terminal stations and
hence may be more time consuming than
in point-to-point transmission schemes.
In the case of fault clearing by d.c.
breakers the current in at1 converter
stations continues to flow, 1 . e . all the
current controllers are active. Therefore,
the only thing to do is the ramping up
of the d.c. system voltage as soon as
the breakers are open which is performed
by the pre-selected voltage determining
converter.

IDENTIFICATION OF THE FAULTED LINE

Therefore there is a strong requirement

for fast fault clearinq with MTDC systems,
particularly if the energy transmitted through
the d.c.
system represents a significant
portion of the energy consumption in one
of the a.c. systems interconnected by the
MTDC system.

A main requirement for fast fault clearing

is a fast identification of the faulted
line. On the other hand, the identification
must be very reliable to avoid unnecessary
or wrong switching operations of circuit
breakers in not fault-affected parts of
the system. A suitable method to solve this
task is evaluating the travelling waves
arriving at both ends of each line section.

There is an effect at the a.c. side which

is caused by d.c. side faults and needs
to be considered. Whenever the fault clearing
procedure includes a current suppression

In case of a
generates a
of a voltage
wave front -

line fault the voltage collapse

travelling wave - consisting
and a current surge of steep
moving from the fault location

103

into both directions of the line. For a

reliable fault identification only the first
incoming wave front(s) should be used, which
are characterized by high amplitude and
steep wave fronts.
The voltage jumps to zero occur at all nodes
in a similar way which makes the voltage
criterion not suitable for the purpose of
identification. It can be used, however,
as an additional criterion indicating a
fault anywhere in the d.c. network.
The current surges exhibit different characteristics insofar as the polarities are
difeerent at the line ends indicatinq in
which direction the fault location is to
be assumed. The fault may he on the adjacent
line, but can also be farther in the next
line section. A further criterion - besides
the surge polarity - may he the steepness
of the wave front indicating the distance
from the fault location. This criterion,
however, cannot discriminate between a fault
on the remote end of the adjacent line section
and a fault on the beginning of the next
line section.
In this paper a fault identification method
is assumed which compares the polarities
of the current surges at both ends of each
line section. This method requires, of course,
telecommunication
exchange
between
both
ends of each line.
The selected concept for the identification
of the faulted line is as follows: If a
positive current pulse of steep wave front
and reasonable amplitude and pulse width
is measured, this information is communicated
to the remote end of that line section.
If both the locally measured current surqe
and the current surge communicated from
the remote end are positive the tripping
signal for the local circuit breaker is
issued.

and exhibit smaller dampinq and distortion.

Furthermore, the symmetrical waves in the
two poles have opposite polarity with equal
amplitude, while the zero sequence mode
waves in the two poles have the same polarity
and equal amplitude ( 5 ) . As a consequence
the symmetrical waves have the same effect
on the resulting voltages and currents of
both poles, while the delayed zero sequence
waves have different effect on both poles.
To avoid switchinq operations on the healthy
pole of a faulted bipolar line the symmetrical
mode waves must not be used for the fault
identification concept.
SWITCHING OPERATIONS AND BREAKER DUTIES
To enable a fast recovery of the MTDC system
to the pre-fault energy exchange it is suggested neither to block the converters at
a line-to-ground fault nor to change their
current orders. This means, it is suggested
to rely completely on the breaker tripping
as measure to clear the fault.
Each converter is equipped with a closed
loop current control and hence tries to
re-establish the pre-fault direct current
in the shortest way; the rectifiers will
transiently change to inverter operation
to limit the overcurrent surge caused by
the short-circuit and then return to the
reference current at almost voltage zero.
The inverters must be allowed to dive slightly
into the rectifier range of firing angle
in order to draw the pre-set direct current
qoverned by their current controllers.
The described converter performance leaves
a residual current flowing through earth
from the fault location to the rectifier
terminal station neutrals (earth electrodes).
This residual current equals the marginal
current AI. For a MTDC system the marginal
current can be defined
(1)

A fibre-optic transmission system for signal

transmission over great distances (without
intermediate stations) is assumed to be
available which allows a very fast identification of the faulted line section. The telecommunication is regarded highly reliable since
in a meshed network there are at least two
independent telecommunication routes providing
sufficient redundancy. The fault identification concept as such is also very reliable
and is applicable to an intermeshed network
of the general type as well (note that the
ring-shaped system is a special case only).
For the ring-shaped system there is only
one exception which is not covered by this
concept: This is the highly theoretical
case that the longest line section would
be as long or longer than all the other
line sections together. (This case can also
be solved, but the matter will not be discussed here.)
The fault identification concept has been
discussed so far for a monopolar arrangement.
In the normally given bipolar case it has
to be taken into account that the unfaulted
pole is also influenced via electromagnetic
coupling. It must be avoided that the induced
current surges may trip the circuit breakers
of the unfaulted line pole. This problem
can be handled by introducing the modal
method, here the symmetrical mode and the
zero sequence mode, for the travelling waves
as shown by Kimbark ( 4 ) and Hingorani ( 5 ) .
The symmetrical mode waves travel faster

22.

z*

sum of the current reference values

of all rectifier stations

d~ - sum of the current reference values

of all inverter stations

This equation (1) is valid independently

of which one of the terminal stations controls
the d.c. system voltage, while the remaining
stations are operating in the current control
mode. Such a control regime is in accordance
with most of the MTDC control systems proposed
so far ( 6 ) .
The special requirement on the converter
control and protection system is merely
to disable some of the functions which are
used in modern two-terminal HVDC schemes:
-

fast retard (of the rectifier firing pulses)

- blocking (of both, rectifier and inverter

pulses)

- VDCOL

(voltage

dependent

current

order

limit1 .
These functions may be kept as back-up protection coming into force after a time delay
sufficient to allow d.c. breaker fault clearing.
We furthermore have to make certain assumptions concerning design and functions Of
the d.c. breaker. Figure 2 shows the basic
arrangement of a d.c. breaker. The main

104

contact (1) may be provided by a normal

a.c. circuit breaker. The commutation circuit
( 2 ) causes a current zero in the main contact
and thus commutates the current first into
the capacitor connected in parallel to the
main contact and then into the energy absorber
(3) which may be a combination of metal
oxide arresters. They limit the voltage
across the breaker and from both ends to
ground to a pre-determined value, e.g. to
1.6 p-u. The commutation circuit may be
of basically different kind, the resonant
circuit is just an example, but has been
successfully applied in a 5 0 0 kV prototype
d.c. breaker ( 7 ) .
The switching procedure can be described
as current commutation (8). and means the
transfer of the load current from the faulty
line section into the parallel current path
provided by the remaining lines of the meshed
system.
The second part of the breaker duty can
be described as current interruption of
the marginal current AI.
In practice the deviation in operating times
of the d.c. breakers at both ends of the
faulted line section will be very small,
therefore both breakers will perform both
functions simultaneously.

The monopolar representation was made on

the base of the symmetrical (differential)
mode with the following line parameters:
Ri = 10 mn/km, Li = 1 mH/km and C i = 13 nF/km.
This results in a surge impedance of 277 0
and a wave propagation velocity of 277 km/ms.
The individual lines are represented by
lumped T-elements, with each element representing between 24 and 30 km of the real
line. This results in a cut-off frequency
of between 3.1 and 2.5 kHz for the d.c.
line models.
The parameters of the d.c. reactors as given
in Figure 1 have been selected such that
the characteristic Si-factor (initial rateof-change of d.c. current for applied rated
d.c. voltage is 0.5 I&ms
for all stations
except the small inverter for which the
Si-factor is 0.3 IdN/ms.
The d.c.
filters (DCF) are R-L-C series
filters tuned for the 12th harmonic (600 Hz),
with R = 2 . 8 $2, L = 61.1 mH and C = 0.813 vF.
With respect to the d.c. breaker as shown
in Figure 2 the capacitance C s and the inductance Ls of the commutation circuit are 1.25 LIF
and 0.4 mH, respectively, the voltage level
of each of the three energy absorbers being
0.8 p.u. (400 kV).
SIMULATOR RESULTS

Sofar we have neglected the distributed

capacitances of
the
transmission
lines.
This is allowed only as long as the voltage
is kept constant, in this case is kept at
zero. In the moment the internal commutation
from the main contact to the commutation
capacitor and further to the energy absorber
takes place a steep voltage rise occurs
loading the line capacitances and spreading
out through the system as a travelling wave.
The energy absorbed by this phenomenon can
be described as follows
E = Z*Cs*(Is*Z)

(2)

= Energy absorbed during the first

current wave
Is = Line current to be interrupted
Z
=Surge
impedance
of
the
line

with E

The energy dissipated by the breaker itself

will be increased if the arrester voltage
level (1.6 P.u.) will be exceeded (for high
currents only).
SYSTEM TO BE STUDIED AND ITS REPRESENTATION
The investigated four-terminal MTDC system
is supposed to transmit 3000 MW power from
two generating a.c.
systems to two load
centers via a long distance of about 1000 km.
Figure 1 shows the overall represenation
on the FGH simulator ( 9 ) in a monopolar
arrangement of the d.c. part.
The system includes two rectifiers and two
inverters of different rated power and shortcircuit ratio (SCR) where the latter characterizes the a.c. system strength relative
to the rated d.c. power.
According to Figure 1, different line lengths
have been chosen: 300 km for line L12 (between
stations 1 and 2 1 , 800 km for L23, 2 0 0 km
for L34 and 1000 km for L14. D.C. circuit
breakers are provided at both ends of each
line which is shown for line L23 with breakers
S1 and 5 2 .

Figures 3, 4, 5 and 6 show the transient

performance of the system at a pole-to-ground
fault on the d.c. line section L23 close
to station 3, with subsequent fault clearing
by the d.c. breakers S1 and 5 2 . The measuring
points of the quantities are indicated in
Figures 1 and 2.
Travelling waves generated at the fault
location move in opposite directions through
the ring-shaped network and arrive at the
stations with time differences of less than
3 ms due to different distances from the
fault location. This can be seen for instance
in Figure 3 from the station voltages Udi
when jumping to zero. The currents in the
line sections Id (Figure 4 ) show the effects
of travelling %es
even more distinctly,
since the initial wave fronts can pass the
network nodes with little disturbance only.
The first current wave can be either positive
or negative, where the positive polarity
is defined for a current flowing from the
network node into the line (see Figure 1).
It can be seen that only in the faulted
line section L23 the first current surge
is positive at both line ends (Id23 and
Id32), which represents the fault criterion.
The unfaulted line sections exhibit different
polarities (L12, L34) or negative polarities
only (L14) at both ends.
The faulted line L23 is identified as described earlier by comparing the polarities
of the current change at both line ends.
The time from arrival of the surge in one
station to issuing the tripping signal for
the breaker at the remote end is assumed
to be 11 ms, which is composed of 3 ms surge
detection time, 3 ms transmission time for
800 km via a fibre-optic system and 5 ms
converting time of the transmitted signal.
Including a relay delay time of 25 ms and
a switching time of the circuit breaker
of 35 ms the total time up to current zero
will amount to 71 ms in the example.

105

Switching off the circuit breakers approximately 75 ms after fault initiation creates
some damped surge voltages. To speed-up
the recovery of the d.c. system voltage
the voltage determining inverter 4 is forced
back into the inverter operation which is
initiated 3 ms after the neqative voltage
surge has occurred at this station.
The performance of the d.c. breakers is
shown in Figure 5 for the same test case
as before. When a breaker is opened, a surge
voltage is generated at both sides of the
breaker, with opposite sign. Ideally the
magnitude of both waves should be Id*Z.
with Z being the surge impedance. In the
example this will be approximately 1 p . u .
voltage which can be seen from the line
voltages U s 1 3 and Us2 3. The other pole-toground voltaies are smaller and more distorted
due to the influence of the d.c. filters,
d.c. reactors and the capacitor across the
breaker contacts in conjunction with the
different distances of the breakers from
the short-circuit location. So the maximum
voltages are still below the arrester level
of 1.6 p.u. The maximum voltage across the
breaker contacts, which should ideally be
2*1d*z, in our case 2 p.u. without surge
arresters, amounts to 1.6 p.u. and 1.2 p . u .
for S 1 and S 2 , respectively. The arrester
voltage of 1.6 p . u . may be reached for a
very short time. The breaker current goes
to zero very fast (time constant theoretically
0.7 ms). In our case with the relatively
low d.c. line current (0.6 p.u. = 1800 A )
the circuit breaker duties are very low.
As
already explained this fault clearing
method prevents overvoltages on the a.c.
converter buses, as can be seen in Figure 6.
With the exception of a single voltage peak
of 1.5 p.u. at rectifier 1 there was no
dynamic overvoltage observed. This should
be compared with the conventional method
of d.c. line fault clearing from which the
corresponding oscillogram is shown in Pigure 7. Here the currents of all stations
are forced to zero via converter control
for a de-ionization time of about 150 ms,
which may be regarded as a minimum. Neglecting
single voltage peaks the dynamic overvoltage
is now between 1.3 and 1.4 p.u. It should
be noted, however, that for a bipolar system
the overvoltages would be lower, since there
is only a 50% load rejection instead of
the 100% load rejection as shown in Figure 7.

A comparison between Figures 6 and 7 shows

also a great difference in the transient
loss of energy transfer for rectifier 2.
By use of d.c. circuit breakers this loss
of energy transfer is reduced to about 50%
of the value obtained with the conventional
method.

the application of d . c .
great advantages.
4.

In order to allow the fault clearing

by breakers a fast and reliable identification of the faulted line section
is an absolute requirement.

5.

The switching duties of d.c. breakers

depend on system parameters, they are
rather moderate as simulator investiqations have confirmed.

6.

The transient loss of energy transfer

during clearing of a d.c. line-to-qround
fault by d.c. breakers was found to
be about half the amount when applyinq
the conventional method.

7.

If compared to the conventional method

dynamic overvoltages are avoided due
to the uninterrupted current flow in
the converters.

REFERENCES
1.

Kanngiesser, K.-W., Bowles, J.P., Ekstrom,

A., Reeve, J., and Rumuf, E., 1974,
"HVDC multiterminal systems", CIGRE-Report
14-08
-

2.

Joetten, R., 1981, "Possibilities and

limits of the control in improving the
recovery after a disturbance due to
an a.c. or d.c. system fault". Presented
to SC14 of CIGRE, Rio de Janeiro, Brazil

3.

Kanngiesser. K.-W.,
and Wolters, J.,
1987, "Comparative performance of an
HVDC transmission system with d.c. breakers for clearing d.c.
line faults",
CIGRE-Symposium, Boston, Report 200-05

4.

Kimbark, E.W., 1970, "Transient overvoltaqes caused by monopolar qround fault

o n bipolar DC -line: -Theory-and simulation", IEEE Trans. on Power Apparatus
and Systems, Vol. PAS-89, No. 4, 584-592

5.

Hingorani, N.G., 1970, "Transient overvoltase on a bipolar HVDC overhead line

cause:
by DC ljne faults", IEEE Trans.
on Power Apparatus and Systems, Vol.
PAS-89, No. 4 , 592-610

6.

Joetten, R., Bowles, J.P., Liss, G.,

Martin, C.J.B.,
and RUmpf, E., 1980.
"Control in HVDC systems. The state
of the art. Part 11: Multiterminal systems", CIGRE-REPORT 14-07

7.

Vithayathil, J., Courts, A.L., Peterson,

W.G.,
Hingorani,
N.G.,
Nilsson,
S.,
and Porter, J.W., 1985, "HVDC circuit
breaker development and field tests",
IEEE Trans. on Power Apparatus and Systems, Vol. PAS-104, 2693-2705

8.

Kanngiesser, K.-W., 1989, "The current

commutation function of HVDC switching
devices", Electra No. 124

9.

Joetten, R., Wess, T., WOlterS, J.,

Ring, H., and Bjoernsson, B., 1985,
"A new real-time simulator for power
system studies", IEEE Trans. on Power
Apparatus and Systems, Vol.
PAS-104,
2604-2611

CONLUSIONS
1.

Compared
to
other
HVDC
applications
MTDC systems offer technical and economical advantages: they are, however, very
sensitive to d.c. side faults.

2.

A d.c. line-to-ground fault interrupts

the energy transfer in the affected
pole of the entire MTDC system. Therefore,
there is a strong requirement for fast
fault Clearing.

3.

Compared
to
the
conventional method
of fault clearing by setting a current
zero
through
the
converter
controls

breakers offers

106

Id14

All data related to one pole only

ACF = A.C. filters and capacitors

300 krn

DCF = D.C.filters
SCR = sk/PdN (without B.C. filters)
= Line between nodes i and i

Lij

SCR3 = 2.5

P d ~=i 375 MW (25%)

1 p.u. voltage = 500 kV

I p a . current = 3OOO A

SCR4=3.5
Id43

'641

UdN= 500 kV (poleground)

Figure 1 Four-terminal HVDC system investigated at the parity simulator of FGH

1p.u
163

: :

+ .:

Y : . :

0.05

0.1

+ x ,-fc-+t----i+----

<:-,

0.15

0.2

0.25

0.35 s 0.4

0.3
-t

@
@
@

Main Contacts

Terminal station quantities

Commutation Circuit
Energy Absorber

Figure 2 HVDC circuit breaker S1 (Principle)

Figure 3 D.C. line fault on L23 at 680 km

from station 2 - Cleared by breakers

107

0.05

0.1

015

0.2

0.25

0.3

0.35 s 0.4
1-

D.C. line currents

D.C. breaker quantities

Figure 4 D.C. line fault on L23 at fit70 km

from station 2 - Cleared by hreakers

Figure 5 D.C.

line fault on L23 at 6 8 0 km

- Cleared hy breakers

from station 2

1P.U
Val

1P.U.
Va 2

1P."
va 3

0.05

0.1

0.15

02

0 25

0.3

0.35 s 0.4

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

1-

A.C. system voltages

Figure 6 D.C. line fault on L23 at 6 8 0 km

from station 2 - Cleared hy breakers

Figure 7 D.C. line fault on L23 at 680 km

from station 2 - Conventional fault
clearing