Chapter III
PLC programming
IEC 61131-3 standard
In order for the modern programming tools to enable development of a wide range of software
solutions at a low cost, they should fill some requirements. Often simultaneous use of several
PLC programming languages is needed to control efficiently the large amount of different
processing hardware. For ease of development and modification of the programs features such
as Offline testing and simulation, Online modifications in PLC and reverse documentation of
the programs from PLC are necessary. The PLC program blocks should be reusable and the
programming systems with open interfaces should be used. With the introduction of the
international standard IEC 61131 a large step in covering these requirements has been made.
The goal of this standard is to decrease costs for training, costs of creating larger programs
and implementing more complex programming systems.
As it is a very detailed standard, the programming systems cannot implement all of it. Instead,
the standard uses feature tables with requirements, where the manufacturer should mark
whether their tools fulfill these and to which extent. Many PLC vendors support this standard
but the level of compliance varies greatly. Since the standard is relatively new and achieving
full compliance is a large task, the majority of vendors do not completely implement all the
features in the standard.
Part 3 of the standard (IEC 61131-3) addresses the programming languages by coordinating
widely used languages into a harmonized version with future possibilities and tendencies in
mind [11].
addresses (e.g. PLC inputs and outputs) must be declared here, in other aspects it behaves like
an FB.
To prepare programming for S7-300 and S7-400 series the PLC firm Siemens developed a
programming tool named STEP 7 [9]. In the programming environment STEP 7 the POUs are
arranged in a slightly different way. The Function (FC) is the same, but the Function block
(FB) has an assigned data storage area - instance Data block (DB), which is already an
integral part of the Function Block in IEC 61131-3. Instead of Program in the standard IEC
61131-3, STEP 7 named Organization block (OB), which is cyclically called by the PLC
operating system and forms the interface between the user program and the operating system
of a controller.
OBs provide structured means to handle the processing requirements of a program. They
provide an interface between the PLC operating system and the user program. OBs are written
by the user but called by the PLC operating system based on certain conditions. For example,
on each CPU startup (switching to the RUN mode), OB 100 or OB 101 are called up. The
operating system responds to specific events by calling a specific OB. An overview of the
different type OBs according to their function and triggering conditions is given in Table 3.1.
Table 3.1. Organization blocks in STEP 7
OB type
Normal cyclical
processing
Time-of-Day
interrupts
Time-Delay
interrupts
Cyclic interrupts
OB no.
1
Hardware
interrupts
Multi-Computing
interrupt
40 47
Redundancy Error
interrupts
70 - 73
Asynchronous
Error interrupts
Background
Processing
CPU Startups
80 - 87
Synchronous Error
interrupts
121 - 122
10 - 17
20 - 23
30 38
60
90
100 -101
STEP 7 Function blocks (FB) are intended for generating algorithms where the generated or
used data must be available from one call of the block to another. To handle this requirement
an instant data block (DB) must be assigned to each FB in STEP 7. Several data blocks can be
assigned to one FB if needed.
In addition, by user employed blocks (OB, FB and FC), STEP 7 has three types of System
blocks (SFB, SFC and SDB), which are an integrated part of the PLC, but may still be called
from the user program. System blocks solve many commonly required tasks and functions;
therefore these blocks reduce the program development time significantly. The user cannot
change and see the System block in the existing program.
A FC does not require a data block as memory storage; however it can access a global DB for
reading and writing data. In an FC you can only define temporary variables. In STEP 7 both
FB and FC can be called from FBs, FCs and OBs (Fig. 3.1).
STEP 7 User Program
S7 Operating
system
Detect
Power Up
Call Main
Cycle
OB 100 OB 101
Start Up Program
OB 1
Main
Program
FC 1
FB 50
FB 2
Organization Block
Error/Fault
detected
Process Fault
Service Routine
Interrupted
FC 3
Organization Block
Interrupt
detected
Process Interrupt
Service Routine
Interrupted
FC 4
Process
PII/PIQ
Block
End
FB 5
FC 30
Each block consists of networks. The maximum number of networks in a block is 999. In
the STL language every network can contain a maximum number of 2000 command
lines.
In S7-300 and S7-400 PLC the normal cyclical program processing is handled by OB 1.
After switching on power and switching the CPU to the RUN mode, the OB 1 is called and
processed on each PLC cycle until the CPU is stopped or power removed. Since it is operated
continuously, most of the other blocks have to be called from OB 1. If the block was called by
OB 1 and the block completes its execution, then the program control is passed back to OB 1.
PLC uses priority levels if an OB with higher priority level is called, then the lower priority
level OB is interrupted. An overview of this cyclical processing handling is shown in Fig. 3.1.
Boolean
Signed integer
BOOL
BYTE
WORD
DWORD
LWORD
INT
SINT
DINT
LINT
Unsigned
integer
UINT
USINT
UDINT
ULINT
Real
REAL
LREAL
The elementary data types used during PLC programming in STEP 7 are given in Table 3.3
[13]. Some of the types listed as elementary data types in IEC 61131-3 are actually called
complex data types in STEP 7. These allow defining variables of other data types and are
made of more than one data element. STEP 7 also has parameter data types, which allow
timers, counters and blocks to be used as formal parameters in FC or FB.
Table 3.3. Data types in STEP 7
Type and
Size
Formatdescription
in bits
options
BOOL (Bit)
1
Boolean text
BYTE (Byte)
WORD (Word)
16
Hexadecimal
number
Binary number
Hexadecimal
number
BCD
Decimal
number
unsigned
Example
2#0 to 2#1111_1111_1111_1111
W#16#0 to W#16#FFFF
2#0001_0000_0000_0000
W#16#1000
C#0 to C#999
B#(0,0) to B#(255,255)
C#998
B#(10,20)
TRUE
B#16#10
Type and
Size
description
in bits
DWORD (Double
32
word)
INT (Integer)
16
32
32
TIME
(IEC-Time)
32
DATE
(IEC-Date)
TIME_OF_DAY
(Time)
CHAR
(Character)
16
16
32
8
Formatoptions
Binary number
Hexadecimal
number
Decimal
number
unsigned
Decimal
number signed
Decimal
number signed
IEEE floatingpoint number
S7-Time in
steps of 10 ms
Example
-32768 to 32767
L#-2147483648 to L#2147483647
L#1
2#1000_0001_0001_1000
_1011_1011_0111_1111
DW#16#00A2_1234
B#(1,14,100,120)
1.234567e+13
S5T#0H_1M_0S_0MS
S5TIME#1H_1M_0S_0MS
T#0D_1H_1M_0S_0MS
TIME#0D_1H_1M_0S_0MS
DATE#1994-3-15
TIME_OF_DAY#1:10:3.3
Slot No.
2
PS 307
CPU 314
SF
DC24V
SIEMENS
SM 322
SM 322
DO 16xDC 24V
DO 16xDC 24V
10
SM 332
SM 331
AI
AO
8x12Bit
4x12 Bit
SF
DC5V
STOP
SM 321
DI 16xDC 24V
RUN
VOLTAGE
SELECTOR
SM 321
DI 16xDC 24V
FRCE
230
SM 321
DI 16xDC 24V
PUSH
SF
RUN
STOP
MRES
SIMATIC
S7-300
Modules
PS
CPU
SM
SM
SM
SM
SM
SM
SM
SM 321
DI 16xDC 24V
0
1
2
3
4
5
6
7
0
1
2
3
Address 0.0
Address 0.7
Address 1.0
Address 1.7
4
5
6
7
The slot numbers in the rack of an S7-300 PLC simplify the addressing of I/Os - the position
of the module in the rack determines the first address on a module [14]. Slot 4 is the first slot
that can be used for I/O modules. Therefore a digital input (DI) module in slot 4 begins with
the byte address 0. It must be noted that when 16-channel DI/DQ modules are used, two byte
addresses are lost in every slot. Therefore, the next DI/DQ module address begins with byte 4.
The principle of module addressing of S7-300 is shown in Fig. 3.2.
Prior to each program cycle the CPU reads the status of digital inputs and stores the
information in the process image of inputs (PII). Also, during each cycle the CPU determines
the status of each output and stores it in the process image of outputs (PIQ) and transfers it in
the end of the cycle to the outputs to reflect the program results.
The peripheral memory (PI/PQ) allows data to be read and written directly from and to the
module. By this the delay with the updates of I/O data at the end of each cycle is eliminated.
The peripheral memory can also be used to read data from analogue modules and write to
them analog modules are not read or written automatically between cycles.
The timer memory (T) area of STEP 7 memory stores each timer in one word location and
contains both the time base and time preset value. From the first location, timers are addressed
T0, T1 and so on. The counter memory area (C) holds counter instructions and are similarly
addressed: C0, C1 and so on. Counter and timer addresses may be used in bit operations the
check current status and in word operations to check the remaining time or current count
value.
One timer memory area should be used only once with a timer. If the memory area is given to
another timer, then it can happen that both timers will not work or they behave unexpectedly.
This applies also to the counter memory area.
Local memory (L) is used for handling temporary local variables and when the block
terminates, it is available to the next called block and the temporary data is overwritten.
Addressing is similar to input and output memory (e.g. L 31.5, LB 3, LW 3, LD 3).
FBD uses horizontal and vertical connection lines, which can be split into several
connections. It is not allowed to connect multiple outputs with one input, because it would
make an inconsistency. In order to control program execution, there are calls for leaving the
POU and for changing the sequence of processing networks.
A network in FBD is evaluated by the following rules:
1. Evaluate all inputs before executing the element.
2. The evaluation of an element is not completed until all outputs are evaluated.
3. The evaluation of a network is not completed until all outputs of all elements of the
network are evaluated.
LD (Ladder Diagram) is a graphical connection of Boolean variables, comparable to earlier
relay controls and represents energy flow in electrical circuit diagrams. This programming
language is mainly designed for processing Boolean signals (TRUE / FALSE). Rails bound an
LD network on the left and right. From the left rail, powered by logic signal state 1,
power reaches all connected elements. Depending on their state, the elements either allow the
power to pass to the following elements or interrupt the flow.
Like FBD, LD has vertical and horizontal lines to connect elements, it also includes crossing
points. A contact performs a logic operation on the value from the incoming line and the value
of the associated variable. The type of logic operation depends on the type of the contact. The
value calculated as a result is given to the right connecting line.
All variables are of the data type Boolean (TRUE / FALSE) and the corresponding
connections only transmit Boolean values.
In STEP 7 its abbreviated form is LAD (Ladder Logic). An example is shown in Fig. 3.8.
SFC (Sequential Function Chart) is for breaking the application control task into smaller
units and controlling their execution. Graphical program representation clearly describes the
program flow and is therefore an important tool for structuring PLC programs. Using SFC, it
is possible to design sequential and parallel processes of an application.
The execution of smaller program units (e.g. processes, tasks) depends both on the conditions
defined by the program and the behavior of the I/Os. The units themselves are programmed in
one of the other languages of IEC 61131-3. Processes with a step-by-step behavior are
especially suitable to be programmed in SFC.
The first level of structuring on SFC is the network which is made from elements called steps
and transitions (Fig. 3.9). A step can be active or inactive. When it is active, the associated
instructions are executed until the step becomes inactive. The changing of the status of the
step is defined by a transition
condition, which is a Boolean
expression. If the transition
condition becomes TRUE, then
the following step is activated
and the previous step is
deactivated. With the triggering
of a transition, the active
attribute is passed on from the
active step to its successor or
successors and therefore moves
through the steps making up
the network. This attribute may
be split up in case of parallel
branches and be reassembled
when the parallel branch is
terminated.
Fig. 3.9. Sample of STEP 7 S7GRAPH language
The standard version of Siemens PLC programming tool STEP 7 comes with standard
languages like STL, FBD and LAD. Other languages like SCL and S7-GRAPH have to be
bought separately.
The function blocks are the smallest program units. In IEC 61499 they generally consist of
two parts:
1. Execution control: creation and processing of events with control inputs and outputs
2. Algorithm (user program) with data inputs and outputs and internal data
The (process, task) algorithm is programmed in the languages defined in IEC 61131-3 and the
control part is programmed using a state diagram in SFC. Execution control charts (ECCs)
control the execution times of the algorithm or parts of it depending on the actual state and
incoming events.
1.
Specification
2.
Design
3.
Realization
4.
Commissioning
Self check
1. Which of these are Program Organization Units of IEC 61131 (multiple answers)?
a. Data Block
b. Function
c. Function Block
d. Organization Block
e. Program
2. Siemens S7-300 PLC program has to be written at least in to be executed by the
PLC.
a. OB 1
b. FB 1
c. OB 101
3. What is the address of the first input in a digital input module placed into slot 7 on a
S7-300 rail in case only 16-channel modules are used?
a. I 3.0
b. I 7.0
c. I 12.0
4. How much space does a double word take up in memory?
a. 1 bit
b. 8 bits
c. 16 bits
d. 32 bits
5. In PLC program are defined two memory variables MW 0 and MW 1 as WORD. If
variable MW 0 value changes in the program, then the MW 1 value
a. changes also, because these variables do not have a common memory area.
b. remains as before.
c. changes also, because these variables have a common memory area.
6. Connect programming languages of IEC 61131 and their STEP 7 counterparts:
IEC61131
STEP 7
a. Structured text
1. Statement List
b. Sequential Function Chart
2. Structured Control Language
c. Instruction list
3. S7-GRAPH
7. On the lower figure a program in is presented.
a. LAD language
b. FBD language
c. SCL language
d. ST language
8. Function Block Diagram is
a. a graphical PLC programming language based on electrical circuit diagrams.
b. a low-level machine-oriented PLC programming language.
c. a graphical PLC programming language based on logical function block
diagrams.