ZZZ8
DAZ@
DAZ04300100
PCB
ZZZ1
DA2@
MAIN BOARD
DA600007E10
PCB
ZZZ2
DA2@
E board
DA40000A910
PCB
ZZZ3
DA2@
FP board
Compal Confidential
DA600007D10
PCB
ZZZ4
2
DA2@
Function board
DA40000AA10
PCB
ZZZ5
DA2@
USB board
DA40000AB10
PCB
ZZZ6
DA2@
IO board
DA40000AC10
PCB
ZZZ7
2008-04-07
DA2@
Power board
DA40000AD10
PCB
REV:1.0
2007/09/29
Issued Date
Security Classification
2007/09/29
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SCHEMATICS,MB A4271
Rev
B
401556
Date:
Sheet
of
42
Compal confidential
File Name :
Docking CONN
Montevina
LA-4271P
PAGE 24
Fan Control
LED
CRT
page 4
page 34
1
Thermal Sensor
EMC1402-1
RTC CKT.
CK505
Mobile Penym
uFCPGA-478 CPU
page 19
Docking cable
Clock Generator
SLG8SP553V
page 4
DVI-D Conn.
page 15
10/100 LAN
page 4,5,6
LVDS
conn
page 17
page 31
USB 2.0
FSB
H_A#(3..35)
H_D#(0..63)
667/800/1066MHz 1.05V
CRT
Headphone
page 16
Intel Cantiga GM
page 33
FCBGA 1329
DDR2-SO-DIMM X2
BANK 0, 1, 2, 3
MIC
page 13,14
Dual Channel
Docking CONN
page 7,8,9,10,11,12
CH7318
PAGE 24
Line in Jack
BT Conn USB x 1
page28
page 17
Finger printer x1
page 31
DMI X4
page28
USB2.0
Card Reader
Azalia
Intel ICH9-M
JMB385
page27
mBGA-676
PCI-E
Line in Jack
USB x1(Camara)
page 26
page17
SATA0
SATA1
Headphone
SPDIF Jack
Audio AMP
page 18,19,20,21
page 26
page 26
HD Codec
ALC888
3
page 25
New Card
page28
LAN(GbE)
Mini-Card X 1
RTL8111C
SLOT1 : PCIE
page 23
MIC ARRAY
LPC BUS
page 25
SM BUS
page 22
MDC CONN
Ver 1.5 page
EnE KB926
RJ45
MIC JACK
page 26
31
page 30
page 24
Int.KBD
page 30
page 22
page 31
BIOS
page 29
page 22
2007/09/29
Issued Date
Security Classification
2007/09/29
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SCHEMATICS,MB A4271
Rev
B
401556
Date:
Sheet
of
42
Voltage Rails
O MEANS ON
X MEANS OFF
Symbol Note :
+5VS
+3VS
+1.5VS
power
plane
+0.75V
+VCCP
+5VALW
+1.5V
+CPU_CORE
+B
+3VALW
State
+1.8VS
S0
S1
S3
S5 S4/AC
SOURCE
INVERTER
BATT
SERIAL
EEPROM
THERMAL
SENSOR
(CPU)
SODIMM
CLK CHIP
MINI CARD
LCD
X
X
V
X
V
X
X
V
X
X
X
X
X
X
X
X
ICH9
Cantiga
SMB_EC_CK1
SMB_EC_DA1
KB926
SMB_EC_CK2
SMB_EC_DA2
KB926
SMB_CK_CLK1
SMB_CK_DAT1
LCD_CLK
LCD_DAT
HEX
ADDRESS
DDR SO-DIMM 0
A0
10100000
DDR SO-DIMM 1
A4
10100100
D2
11010010
2007/09/29
Issued Date
Security Classification
Deciphered Date
2007/09/29
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SCHEMATICS,MB A4271
Rev
B
401556
Date:
Sheet
of
42
+VCCP
150_0402_1%
<BOM Structure>
39_0402_1%
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
A6
A5
C4
A20M#
FERR#
IGNNE#
H_STPCLK#
H_INTR
H_NMI
H_SMI#
D5
C6
B4
A3
STPCLK#
LINT0
LINT1
SMI#
M4
N5
T2
V3
B2
D2
D22
D3
F6
RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]
H_DEFER#
H_DRDY#
H_DBSY#
F1
H_BR0#
IERR#
INIT#
D20
B3
H_IERR#
H_INIT#
LOCK#
H4
H_LOCK#
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
C1
F3
F4
G3
G2
H_RESET#
H_RS#0
H_RS#1
H_RS#2
H_TRDY#
HIT#
HITM#
G6
E4
H_HIT#
H_HITM#
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
XDP_BPM#5
XDP_TCK
XDP_TDI
BR0#
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#
H_A20M#
H_FERR#
H_IGNNE#
H5
F21
E1
DEFER#
DRDY#
DBSY#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#
THERMAL
PROCHOT#
THERMDA
THERMDC
ICH
H_STPCLK#
H_INTR
H_NMI
H_SMI#
Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1
H_ADS#
H_BNR#
H_BPRI#
THERMTRIP#
H_ADS# (7)
H_BNR# (7)
H_BPRI# (7)
H_DEFER# (7)
H_DRDY# (7)
H_DBSY# (7)
XDP_TRST#
R62
56_0402_5%
XDP_TCK
R49
54.9_0402_1%
<BOM Structure>
H_BR0#
(7)
T1
H_INIT#
(19)
H_LOCK# (7)
H_RESET# (7)
H_RS#0 (7)
H_RS#1 (7)
H_RS#2 (7)
H_TRDY# (7)
H_HIT# (7)
H_HITM# (7)
T120
+3VS
XDP_TMS
XDP_TRST#
XDP_DBRESET#
H_PROCHOT#
D21
A24
B25
H_THERMDA_R
H_THERMDC_R
C7
H_THERMTRIP#
A22
A21
CLK_CPU_BCLK
CLK_CPU_BCLK#
XDP_DBRESET# (20)
R13
R14
R15
1
1
1
2 68_0402_5%
2 0_0402_5%
2 0_0402_5%
+VCCP
H_THERMTRIP# (7,19)
C2
SA00001Z700
2
U1
1
VDD
SCLK
SMB_EC_CK2
H_THERMDA
D+
SDATA
SMB_EC_DA2
H_THERMDC
2
2200P_0402_50V7K
D- ALERT/THERM2
THERM
H_THERMDA
H_THERMDC
C3
1
H CLK
BCLK[0]
BCLK[1]
Address:100_1100
CLK_CPU_BCLK (15)
CLK_CPU_BCLK# (15)
2007/09/011
GND
1 R195
2
10K_0402_5%
FAN1 Conn
+5VS
C638
1
+5VS
2
(30)
+VCCP
EN_FAN1
+VCC_FAN1
EN_FAN11
R1007
0.1U_0402_16V4Z
U19
1 VEN
GND
2 VIN
GND
3 VO
GND
4 VSET
2 0_0402_5%
GND
1
C949 G993P1UF_SOP8
<BOM Structure>
D54
1
+3VS
1
2 2
BAS16_SOT23-3
<BOM Structure>
C639
1
2
10U_0805_10V4Z
C640
1000P_0402_50V7K
1
2
SA00002GW00
2
@
R17
56_0402_5%
D53
1SS355_SOD323-2
8
7
6
5
Penryn
SMB_EC_DA2 (30)
+3VS
ADT7421ARMZ-REEL_MSOP8
10U_0805_10V4Z
R538
10K_0402_5%
OCP#
3
1
@ Q2
MMBT3904_SOT23
OCP#
40mil
(20)
2
H_PROCHOT#
SMB_EC_CK2 (30)
K3
H2
K2
J3
L1
H1
E2
G5
ADS#
BNR#
BPRI#
ADDR GROUP_1
H_ADSTB#1
(19) H_A20M#
(19) H_FERR#
(19) H_IGNNE#
(19)
(19)
(19)
(19)
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADSTB#1
(7)
R50
0.1U_0402_16V4Z
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#[17..35]
A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
CONTROL
(7)
(7)
(7)
(7)
(7)
(7)
J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1
XDP/ITP SIGNALS
H_ADSTB#0
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_ADSTB#0
ADDR GROUP_0
(7)
R60
XDP_TMS
CONN@
JCPU1A
H_A#[3..16]
RESERVED
(7)
XDP_TDI
JP32
+VCC_FAN1
1
2
3
(30) FAN_SPEED1
+VCCP
ACES_85205-03001
CONN@
C641
1000P_0402_50V7K
R18
56_0402_5%
<BOM Structure>
2007/09/29
Issued Date
Security Classification
H_IERR#
2007/09/29
Deciphered Date
Title
SCHEMATICS,MB A4271
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
401556
Date:
Sheet
of
42
+VCC_CORE
1
1
2 1K_0402_5%
2 1K_0402_5%
T2
T3
T4
T5
T6
(15) CPU_BSEL0
(15) CPU_BSEL1
(15) CPU_BSEL2
AD26
C23
D25
C24
AF26
AF1
A26
C3
B22
B23
C21
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
TEST7
BSEL[0]
BSEL[1]
BSEL[2]
MISC
AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DSTBN#3
H_DSTBP#3
H_DINV#3
R26
U26
AA1
Y1
COMP0
COMP1
COMP2
COMP3
E5
B5
D24
D6
D7
AE6
H_DPRSTP#
H_DPSLP#
H_DPWR#
H_PWRGOOD
H_CPUSLP#
H_PSI#
DATA GRP 2
V_CPU_GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
TEST7
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
COMP[0]
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
H_DSTBN#2 (7)
H_DSTBP#2 (7)
H_DINV#2 (7)
H_D#[48..63] (7)
H_DSTBN#3 (7)
H_DSTBP#3 (7)
H_DINV#3 (7)
H_DPRSTP# (7,19,40)
H_DPSLP# (19)
H_DPWR# (7)
H_PWRGOOD (19)
H_CPUSLP# (7)
H_PSI#
(40)
Penryn
layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs
CPU_BSEL
CPU_BSEL1
1
CPU_BSEL0
1
200
266
R24
R25
R26
A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18
VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
G21 R19
V6 R20
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
VCCA[01]
VCCA[02]
B26
C26
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
AD6
AF5
AE5
AF4
AE3
AF3
AE2
VCCSENSE
AF7
VCCSENSE
VCCSENSE (40)
VSSSENSE
AE7
VSSSENSE
VSSSENSE (40)
+VCCP
1
1
0_0402_5%
0_0402_5%
2
2
1
+ C6
330U_D2E_2.5VM_R15
2
+1.5VS
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
(40)
(40)
(40)
(40)
(40)
(40)
(40)
1
C7
1
C8
Penryn
.
+VCCP
1
166
CPU_BSEL2
R23
27.4_0402_1%
2
1
@ R21
@R21
@R22
@
R22
H_DSTBN#1
H_DSTBP#1
H_DINV#1
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
+VCC_CORE
CONN@
JCPU1C
(7)
54.9_0402_1%
2
1
(7)
(7)
(7)
N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24
DATA GRP 1
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DSTBN#1
H_DSTBP#1
H_DINV#1
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DSTBN#2
H_DSTBP#2
H_DINV#2
27.4_0402_1%
2
1
H_DSTBN#0
H_DSTBP#0
H_DINV#0
H_D#[16..31]
D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
54.9_0402_1%
2
1
(7)
(7)
(7)
(7)
E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25
DATA GRP 0
H_D#[32..47]
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DSTBN#0
H_DSTBP#0
H_DINV#0
0.01U_0402_16V7K
CONN@
JCPU1B
H_D#[0..15]
DATA GRP 3
(7)
10U_0805_6.3V6M
R27
1K_0402_1%
<BOM Structure>
2
+VCC_CORE
R28
2 100_0402_1%
VCCSENSE
R30
2 100_0402_1%
VSSSENSE
V_CPU_GTLREF
R29
2K_0402_1%
<BOM Structure>
2007/09/29
Issued Date
Security Classification
2007/09/29
Deciphered Date
Title
SCHEMATICS,MB A4271
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
401556
Date:
Sheet
of
42
+VCC_CORE
1
Place these capacitors on L8
(North side,Secondary Layer)
C9
10U_0805_6.3V6M
C10
10U_0805_6.3V6M
C11
10U_0805_6.3V6M
C12
10U_0805_6.3V6M
C13
10U_0805_6.3V6M
C14
10U_0805_6.3V6M
C15
10U_0805_6.3V6M
C16
10U_0805_6.3V6M
+VCC_CORE
CONN@
JCPU1D
A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3
VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
1
Place these capacitors on L8
(North side,Secondary Layer)
C17
10U_0805_6.3V6M
C18
10U_0805_6.3V6M
C19
10U_0805_6.3V6M
C20
10U_0805_6.3V6M
C21
10U_0805_6.3V6M
C22
10U_0805_6.3V6M
C23
10U_0805_6.3V6M
C24
10U_0805_6.3V6M
+VCC_CORE
1
Place these capacitors on L8
(Sorth side,Secondary Layer)
C25
10U_0805_6.3V6M
C26
10U_0805_6.3V6M
C27
10U_0805_6.3V6M
C28
10U_0805_6.3V6M
C29
10U_0805_6.3V6M
C30
10U_0805_6.3V6M
C31
10U_0805_6.3V6M
C32
10U_0805_6.3V6M
+VCC_CORE
1
Place these capacitors on L8
(Sorth side,Secondary Layer)
C33
10U_0805_6.3V6M
C34
10U_0805_6.3V6M
C35
10U_0805_6.3V6M
C36
10U_0805_6.3V6M
C37
10U_0805_6.3V6M
C38
10U_0805_6.3V6M
C39
10U_0805_6.3V6M
C40
10U_0805_6.3V6M
C
+VCC_CORE
330U_D2E_2.5VM_R9
1
C41
330U_D2E_2.5VM_R9
C42
C43
C44
330U_D2E_2.5VM_R9
+
2
330U_D2E_2.5VM_R9
C45
0.1U_0402_10V6K
C46
0.1U_0402_10V6K
C47
0.1U_0402_10V6K
C48
0.1U_0402_10V6K
C49
0.1U_0402_10V6K
C50
0.1U_0402_10V6K
Penryn
.
2007/09/29
Issued Date
Security Classification
2007/09/29
Deciphered Date
Title
SCHEMATICS,MB A4271
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
401556
Date:
Sheet
of
42
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
B15
K13
F13
B13
B14
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#_0
H_RS#_1
H_RS#_2
B6
F12
C8
H_RS#0
H_RS#1
H_RS#2
1
2
2
1
R33
1K_0402_1%
<BOM Structure>
H_ADS# (4)
H_ADSTB#0 (4)
H_ADSTB#1 (4)
H_BNR# (4)
H_BPRI# (4)
H_BR0#
(4)
H_DEFER# (4)
H_DBSY# (4)
CLK_MCH_BCLK (15)
CLK_MCH_BCLK# (15)
H_DPWR# (5)
H_DRDY# (4)
H_HIT#
(4)
H_HITM# (4)
H_LOCK# (4)
H_TRDY# (4)
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
(5)
(5)
(5)
(5)
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
(5)
(5)
(5)
(5)
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
(4)
(4)
(4)
(4)
(4)
H_RS#0
H_RS#1
H_RS#2
(4)
(4)
(4)
CFG19
CFG20
T89
T90
(20) PM_BMBUSY#
(5,19,40) H_DPRSTP#
(13) PM_EXTTS#0
(14) PM_EXTTS#1
1
2
R520 100_0402_5%
2
0_0402_5%
PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR
1 @
C55
BG48
BF48
BD48
BC48
BH47
BG47
BE47
BH46
BF46
BG45
BH44
BH43
BH6
BH5
BG4
BH3
BF3
BH2
BG2
BE2
BG1
BF1
BD1
BC1
F1
A47
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25
NC_26
R47
1K_0402_1%
C57
Near B3 pin
R63
1K_0402_5%
2
1
330_0402_5%
2
B
E
Q5
MMBT3904_SOT23-3
<BOM Structure>
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1
BA17
AY16
AV16
AR13
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1
BD17
AY17
BF15
AY13
M_ODT0
M_ODT1
M_ODT2
M_ODT3
SM_RCOMP
SM_RCOMP#
BG22
BH21
SMRCOMP
SMRCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
BF28
BH28
SMRCOMP_VOH
SMRCOMP_VOL
SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST#
AV42
AR36
BF17
BC36
+V_DDR2_MCH_REF
DDR2_SM_PWROK
R975
SM_REXT
R37
B38
A38
E41
F41
CLK_MCH_DREFCLK
CLK_MCH_DREFCLK#
MCH_SSCDREFCLK
MCH_SSCDREFCLK#
F43
E43
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
AE41
AE37
AE47
AH39
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
AE40
AE38
AE48
AH40
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
AE35
AE43
AE46
AH42
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
AD35
AE44
AF46
AH43
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4
B33
B32
G33
F33
E33
GFX_VR_EN
C34
PEG_CLK
PEG_CLK#
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
R34
R35
(13)
(13)
(14)
(14)
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
(13)
(13)
(14)
(14)
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
(13)
(13)
(14)
(14)
M_ODT0
M_ODT1
M_ODT2
M_ODT3
(13)
(13)
(14)
(14)
+1.8V
1
1
2 80.6_0402_1%
2 80.6_0402_1%
1
1
2 10K_0402_1%
2 499_0402_1%
CLK_MCH_DREFCLK (15)
CLK_MCH_DREFCLK# (15)
MCH_SSCDREFCLK (15)
MCH_SSCDREFCLK# (15)
CLK_MCH_3GPLL (15)
CLK_MCH_3GPLL# (15)
C
(20,40)
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
AH37
AH36
AN36
AJ35
AH34
VGATE
(20) ICH_PWROK
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
(20)
(20)
(20)
(20)
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
(20)
(20)
(20)
(20)
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
(20)
(20)
(20)
(20)
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
(20)
(20)
(20)
(20)
VGATE
1
R55
ICH_PWROK 1
R66
GMCH_PWROK
2
@ 0_0402_5%
2
0_0402_5%
B
+VCCP
CL_CLK0
CL_DATA0
1
2 R51
CL_RST# 0_0402_5%
CL_VREF
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLKREQ#
ICH_SYNC#
N28
M28
G36
E36
K36
H36
SDVO_SDAT
CLKREQ#_7
MCH_ICH_SYNC#
TSATN#
B12
MCH_TSATN#
HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC
B28
B30
B29
C29
A28
T36
T37
CL_CLK0 (20)
CL_DATA0 (20)
R42
1K_0402_1%
ICH_PWROK
CL_RST# (20)
C56
0.1U_0402_16V4Z
SDVO_SCLK (17)
SDVO_SDAT (17)
CLKREQ#_7 (15)
MCH_ICH_SYNC#
1
511_0402_1%
R43
2
(20)
T99
T100
T101
T102
T103
2007/09/29
Issued Date
Security Classification
BC28
AY28
AY36
BB36
(13)
(13)
(14)
(14)
CANTIGA_1p0
MCH_TSATN_EC# (30)
R68
MCH_TSATN#
normal:low
over temp:high
R64
54.9_0402_1%
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
R29
B7
N33
P32
AT40
AT11
T20
R32
1
1
T25
R25
P25
P20
P24
C25
N24
M24
E21
C23
C24
N21
P21
T21
R20
M20
L21
H21
P29
R28
T28
PM_BMBUSY#
H_DPRSTP#
PM_EXTTS#0
PM_EXTTS#1
GMCH_PWROK
PLT_RST#_NB
THERMTRIP#
DPRSLPVR
0.1U_0402_16V4Z
1
+VCCP
CFG16
T86
+3VS
0.1U_0402_16V4Z
221_0603_1%
2
1
100_0402_1%
2
1
0.1U_0402_16V4Z
24.9_0402_1%
2
1
1K_0402_1%
1
2
2K_0402_1%
2
1
C59
CFG12
CFG13
T82
T83
R46
CFG9
CFG10
T79
T80
R44
1K_0402_1%
change logic
define by EC
CFG5
CFG6
CFG7
T75
T76
T77
+1.8V
H_SWNG
MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2
(15) MCH_CLKSEL0
(15) MCH_CLKSEL1
(15) MCH_CLKSEL2
PLT_RST#
1
R41
SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1
CLK
10K_0402_5%
+V_DDR2_MCH_REF
R54
NC
R53
R40
1
CLKREQ#_7
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PM
<BOM Structure>
1
R52
C58
R39
1
10K_0402_5%
Layout Note:
V_DDR_MCH_REF
trace width and
spacing is 20/20.
+VCCP
10K_0402_5%
PM_EXTTS#1
(5)
(5)
(5)
(5)
(18,20,22,23,27) PLT_RST#
(4,19) H_THERMTRIP#
(20,40) DPRSLPVR
+VCCP
H_RCOMP
RSVD22
RSVD23
RSVD24
RSVD25
AR24
AR21
AU24
AV20
DMI
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
R38
1
PM_EXTTS#0
H_AVREF
H_DVREF
Layout Note:
H_RCOMP / H_VREF / H_SWNG
trace width and spacing is 10/20
H_VREF
RSVD20
+3VS
CANTIGA_1p0
R45
AY21
BG23
BF23
BH18
BF18
C54
2
0.01U_0402_25V7K
SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
L9
M8
AA6
AE5
RSVD15
RSVD16
RSVD17
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
SMRCOMP_VOL
NA lead free
B31
B2
M1
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
L10
M7
AA5
AE6
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
C52
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
2.2U_0603_6.3V4Z
C51
J8
L3
Y13
Y1
R32
3.01K_0402_1%
AP24
AT21
AV24
AU20
A11
B11
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
SMRCOMP_VOH
SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1
H_VREF
H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DBSY#
CLK_MCH_BCLK
CLK_MCH_BCLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
R31
1K_0402_1%
GRAPHICS VID
H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
ME
H_CPURST#
H_CPUSLP#
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
+1.8V
M36
N36
R33
T33
AH9
AH10
AH12
AH13
K12
AL34
AK34
AN35
AM35
T24
MISC
C12
E11
H_SWING
H_RCOMP
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
0.1U_0402_16V4Z
H_RESET#
H_CPUSLP#
H_RESET#
H_CPUSLP#
C5
E3
A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20
CFG
H_SWNG
H_RCOMP
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
2.2U_0603_6.3V4Z
C53
F2
G8
F8
E6
G2
H6
H2
F6
D4
H3
M9
M11
J1
J2
N12
J6
P2
L2
R2
N9
L6
M5
J3
N2
R1
N5
N6
P13
N8
L7
N10
M3
Y3
AD14
Y6
Y10
Y12
Y14
Y7
W2
AA8
Y9
AA13
AA9
AA11
AD11
AD10
AD13
AE12
AE9
AA2
AD8
AA3
AD3
AD7
AE14
AF3
AC1
AE3
AC3
AE11
AE8
AG2
AD6
RSVD
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
U2B
0.01U_0402_25V7K
U2A
H_D#[0..63]
(4)
(5)
H_A#[3..35] (4)
HOST
(5)
HDA
2007/09/29
Deciphered Date
Title
SCHEMATICS,MB A4271
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
401556
Date:
Sheet
of
42
(14) DDR_B_D[0..63]
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
SA_RAS#
SA_CAS#
SA_WE#
BB20
BD20
AY20
DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14
BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_A_BS0 (13)
DDR_A_BS1 (13)
DDR_A_BS2 (13)
DDR_A_RAS# (13)
DDR_A_CAS# (13)
DDR_A_WE# (13)
DDR_A_DQS[0..7]
DDR_A_DQS#[0..7]
DDR_A_MA[0..14]
(13)
(13)
(13)
(13)
CANTIGA_1p0
AK47
AH46
AP47
AP46
AJ46
AJ48
AM48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11
BG8
BH12
BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1
AH1
AM2
AM3
AH3
AJ3
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
BD21
BG18
AT25
MEMORY
SA_BS_0
SA_BS_1
SA_BS_2
DDR_A_DM[0..7]
MEMORY
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
SYSTEM
AJ38
AJ41
AN38
AM38
AJ36
AJ40
AM44
AM42
AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36
AW36
BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12
BB9
BA9
AU10
AV9
BA11
BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6
AT5
AN10
AM11
AM5
AJ9
AJ8
AN12
AM13
AJ11
AJ12
DDR
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
U2E
SYSTEM
U2D
DDR
(13) DDR_A_D[0..63]
SB_BS_0
SB_BS_1
SB_BS_2
BC16
BB17
BB33
DDR_B_BS0
DDR_B_BS1
DDR_B_BS2
SB_RAS#
SB_CAS#
SB_WE#
AU17
BG16
BF14
DDR_B_RAS#
DDR_B_CAS#
DDR_B_WE#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14
AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_BS0 (14)
DDR_B_BS1 (14)
DDR_B_BS2 (14)
DDR_B_RAS# (14)
DDR_B_CAS# (14)
DDR_B_WE# (14)
DDR_B_DM[0..7]
DDR_B_DQS[0..7]
DDR_B_DQS#[0..7]
DDR_B_MA[0..14]
(14)
(14)
(14)
(14)
CANTIGA_1p0
2007/09/29
Issued Date
Security Classification
2007/09/29
Deciphered Date
Title
SCHEMATICS,MB A4271
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
401556
Date:
Sheet
of
42
DPST_PWM
R227
R571
2.2K_0402_5%
(30) ENABLT
+3VS
(17) DDC2_CLK
(17) DDC2_DATA
DDC2_CLK
DDC2_DATA
R570
2.2K_0402_5%
ENABLT
R57
1
2 10K_0402_5%
R58 1
DDC2_CLK
DDC2_DATA
2 10K_0402_5%
2 2.37K_0402_1%
<BOM Structure>
LVDS_A_CLVDS_A_C+
LVDS_A_0LVDS_A_1LVDS_A_2-
LVDS_A_0+
LVDS_A_1+
LVDS_A_2+
(17) LVDS_A_0+
(17) LVDS_A_1+
(17) LVDS_A_2+
L32
G32
M32
L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
M33
K33
J33
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
M29
C44
B43
E37
E38
C41
C40
B37
A37
L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
H47
E46
G40
A40
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3
H48
D45
F40
B40
LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3
A41
H38
G37
J37
B42
G38
F37
K37
1 75_0402_1%GMCH_TV_COMPS
1 75_0402_1%GMCH_TV_LUMA
1 75_0402_1%GMCH_TV_CRMA
R87
R88
(16) M_BLUE
(16) M_GREEN
(16) M_RED
F25
H25
K25
TVA_DAC
TVB_DAC
TVC_DAC
H24
TV_RTN
C31
E32
TV_DCONSEL_0
TV_DCONSEL_1
E28
CRT_BLUE
M_BLUE
M_GREEN
M_RED
R552
1
R553
1
R554
1
2
150_0402_1%
2
150_0402_1%
2
150_0402_1%
3VDDCCL
3VDDCDA
CRT_HSYNC R75 1
30.1_0402_1%
CRT_VSYNC R76 1
30.1_0402_1%
HSYNC
VSYNC
G28
CRT_GREEN
J28
CRT_RED
G29
CRT_IRTN
H32
J32
J29
E29
L29
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC
R56
1
2
49.9_0402_1%
PEG_COMPI
PEG_COMPO
T37
T36
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
+VCC_PEG
CFG[4:3]
Reserved
0 = DMI x 2
1 = DMI x 4
0 = The iTPM Host Interface is enable
1 = The iTPM Host Interface is disable
DVI_HPDT#
DVI_HPDT# (17)
R147
1
2
0_0402_5%
CFG6
CFG8
Reserved
CFG9
0 = Enable
1 = Disable
CFG11
Reserved
CFG[13:12] (XOR/ALLZ)
00
01
10
11
CFG[15:14]
Reserved
0 = Disabled
= Reserved
= XOR Mode Enabled
= All Z Mode Enabled
= Normal Operation(Default)
1 = Enabled
*
C
CFG[18:17]
Reserved
0 = Normal Operation
(Lane number in Order)
1 = Reverse Lane
CFG20 (PCIE/SDVO concurrent) 0 = Only PCIE or SDVO is operational.
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
R81
CANTIGA_1p0
1.02K_0402_1%
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
(16) CRT_VSYNC
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3
VGA
(16) 3VDDCCL
(16) 3VDDCDA
(16) CRT_HSYNC
0_0402_5%
TV_DCONSEL_0
0_0402_5%
TV_DCONSEL_1
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3
TV
R880 2
R881 2
R882 2
LVDS
For Crestline:2.4kohm
For Calero: 1.5Kohm
For Cantiga: 2.37Kohm
100K_0402_5%
ENAVDD
R59 1
(17) ENAVDD
D
U2C
GRAPHICS
(17) DPST_PWM
PCI-EXPRESS
+3VS
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
C212 1
C240 1
C241 1
C234 1
C224 1
2
C247 1
2
2
2
TMDS_B_DATA2#
TMDS_B_DATA1#
TMDS_B_DATA0#
TMDS_B_CLK#
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
C239 1
TMDS_B_DATA2
2
TMDS_B_DATA1
2
TMDS_B_DATA0
C246 1
2
TMDS_B_CLK
2
TMDS_B_DATA2# (17)
TMDS_B_DATA1# (17)
TMDS_B_DATA0# (17)
TMDS_B_CLK# (17)
TMDS_B_DATA2 (17)
TMDS_B_DATA1 (17)
TMDS_B_DATA0 (17)
TMDS_B_CLK (17)
2007/09/29
Issued Date
Security Classification
2007/09/29
Deciphered Date
Title
SCHEMATICS,MB A4271
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
401556
Date:
Sheet
of
42
+3VS_DAC_BG
A PEG
A SM
+1.05VS_PEGPLL
AA47
+1.8V_LVDS
M38
L37
157.2mA
VCCD_LVDS_1
VCCD_LVDS_2
50mA
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5
V48
U48
V47
U47
U46
+VCC_PEG
VCC_DMI_1
VCC_DMI_2
VCC_DMI_3
VCC_DMI_4
AH48
AF48
AH47
AG47
+1.05VS_DMI
HV
+1.05VS_DMI
+VCCP
L1
1
2
BLM18PG121SN1D_0603
+3VS_HV
2
2
VTTLF1
VTTLF2
VTTLF3
D3
2
+VCCP
0.47U_0603_10V7K
C104
0.47U_0603_10V7K
C103
R113
1
2
10_0402_5%
40 mils
R116
1
2
0_0603_5%
C107
+1.8V
10U_0805_10V4Z
2007/09/29
Deciphered Date
+1.8V_TXLVDS
C108
C113
2007/09/29
1000P_0402_50V7K
+1.8V
1U_0603_10V4Z
C106
C105
10U_0805_10V4Z
R115
1
2
0_0603_5%
Security Classification
Issued Date
+3VS_HV
+3VS
R120
1
2
100_0603_1%
R114
1
2
0_0402_5%
CH751H-40PT_SOD323-2
0.1U_0402_16V4Z
C112
0.022U_0402_16V7K
C111
0.1U_0402_16V4Z
0.022U_0402_16V7K
C110
+VCC_PEG
R112
1
2
0_0603_5%
+VCCP_D
A8
L1
AB2
+1.5VS
456mA
+3VS
1
C801
+1.8V_LVDS
+1.5VS_QDAC
+1.05VS_PEGPLL
+1.8V_TXLVDS
0.47U_0603_10V7K
C102
CANTIGA_1p0
4.7U_0805_10V4Z
SM CK
A CK
AXF
C35
B35
A35
TV
48.363mA
VCCD_PEG_PLL
K47
PEG
VCCD_HPLL
C90
0.5_0603_1%
C803
22U_0805_6.3V6M
2
VCC_HV_1
VCC_HV_2
VCC_HV_3
VTTLF
VCCD_QDAC
DMI
L28
AF1
58.67mA
+1.8V_SM_CK
VCC_TX_LVDS
1732mA
D TV/CRT
VCCD_TVDAC
BF21
BH20
BG20
BF20
220U_D2_4VM_R15 1
R884
J1
JUMP_43X79
@
1
2 2
DDR3:149.5mA
105.3mA
50mA
M25
C92
+VCCP
0.1U_0402_16V4Z
C100
VCC_HDA
+V1.05VS_AXF
124mA
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4
+VCCP
L53
1
2
MBK2012121YZF_0805
C99
A32
B22
B21
A21
10U_0805_10V4Z
TVX
VCCA_TV_DAC_1
VCCA_TV_DAC_2
VCC_AXF_1
VCC_AXF_2
VCC_AXF_3
0.1U_0402_16V4Z
HDA
TVA 24.15mA
TVB 39.48mA
24.15mA
B24
A24
60.31mA
10U_0805_10V4Z
VCCA_SM_CK_1
VCCA_SM_CK_2
VCCA_SM_CK_3
VCCA_SM_CK_4
VCCA_SM_CK_5
VCCA_SM_CK_NCTF_1
VCCA_SM_CK_NCTF_2
VCCA_SM_CK_NCTF_3
VCCA_SM_CK_NCTF_4
VCCA_SM_CK_NCTF_5
VCCA_SM_CK_NCTF_6
VCCA_SM_CK_NCTF_7
VCCA_SM_CK_NCTF_8
C98
+1.5VS_QDAC
+1.05VS_HPLL
+1.05VS_MPLL
321.35mA
0.1U_0402_16V4Z
+1.5VS_TVDAC
L54
1
2
BLM18PG181SN1D_0603
+1.5VS
R107
1
2
0_0805_5%
0.1U_0402_16V4Z
<BOM Structure>
C101
0.1U_0402_16V4Z
C475
POWER
C91
C97
VCC_HDA
0.1U_0402_16V4Z
+VCC_PEG
4.7U_0805_10V4Z
DDR3:37.95mA
2
2
2
22U_0805_6.3V6M
<BOM Structure>
1U_0603_10V4Z
AP28
AN28
AP25
+1.05VS_A_SM_CK
AN25
AN24
AM28
AM26
AM25
1
1
1
C802
AL25
AM24
AL24
2
2
2
AM23
22U_0805_6.3V6M
AL23
R525
1
2
0_0402_5%
L52
1
2
MBK2012121YZF_0805
C85
VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
VCCA_SM_6
VCCA_SM_7
VCCA_SM_8
VCCA_SM_9
C89
+3VS_TVDAC
R883
1_0402_1%
+1.5VS_TVDAC
+VCCP
C84
AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16
+1.05VS_HPLL
C83
VCCA_PEG_PLL
0.1U_0402_16V4Z
C88
C96
1U_0603_10V4Z
R111
1
2
0_0603_5%
+3VS_TVDAC
1
2
L50
MBK1608121YZF_0603
C72
C71
CRT
VTT
C70
C655
C871
PLL
A LVDS
0.022U_0402_16V7K
DDR3:747.5mA
0.1U_0402_16V4Z
AA48
LVDS
C81
C800
+1.5VS
1
@
C82
1U_0603_10V4Z
10U_0805_10V4Z
+1.05VS_PEGPLL
+1.05VS_A_SM
C94
1
L51
0_1210_5%
0.1U_0402_16V4Z
<BOM Structure>
220U_D2_4VM_R15 R108
1
2
0_0805_5%
1
C86
+1.8V
+VCCP
10U_0805_10V4Z
50mA
+VCCP
+1.8V_SM_CK
+1.05VS_DPLLB
R105
1
2
0_0603_5%
+1.5VS
VCCA_PEG_BG
C76
AD48
+1.5VS_PEG_BG
VSSA_LVDS
414uA
1000P_0402_50V7K
2
C69
J47
VCCA_LVDS
1U_0603_10V4Z
<BOM Structure>
@ R104
1
2
0_0603_5%
C80
0.1U_0402_16V4Z
C77
<BOM Structure>
C75
+1.8V_TXLVDS
+3VS
139.2mA
VCCA_MPLL
13.2mA
J48
C68
AE1
VCCA_HPLL
10U_0805_10V4Z
+1.05VS_MPLL
24mA
10U_0805_10V4Z
64.8mA
10U_0805_10V4Z
VCCA_DPLLB
AD1
220U_D2_4VM_R15 2
C79
L48
+1.05VS_HPLL
C78
+1.05VS_DPLLB
1
C63
10U_0805_10V4Z
64.8mA
0.1U_0402_16V4Z
VCCA_DPLLA
2.2U_0805_16V4Z
F47
+1.05VS_DPLLA
0.1U_0402_16V4Z
C74
0.022U_0402_16V7K
C73
4.7U_0805_10V4Z
L49
1
2
BLM18PG181SN1D_0603
1
C64
4.7U_0805_10V4Z
VCCA_DAC_BG
VSSA_DAC_BG
U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1
0.47U_0603_10V7K
A25
B25
+3VS
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
C66
VCCA_CRT_DAC_1
VCCA_CRT_DAC_2
C67
+3VS_DAC_CRT
B27
A26
0.1U_0402_16V4Z
852mA
73mA
+3VS_DAC_BG
+VCCP
R99
1
2
0_0603_5%
+V1.05VS_AXF
1
L48
0_1210_5%
220U_D2_4VM_R15
C65
+VCCP
U2H
4.7U_0805_10V4Z
+3VS_DAC_CRT
+1.05VS_DPLLA
2.68mA
D
+VCCP
10U_0805_10V4Z
C62
0.1U_0402_16V4Z
C61
L47
1
2
BLM18PG181SN1D_0603
0.022U_0402_16V7K
C60
4.7U_0805_10V4Z
+3VS
Title
SCHEMATICS,MB A4271
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
401556
Date:
Sheet
1
10
of
42
+VCCP
U2G
VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44
AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23
VCC_SM_AT13
Y26
AE25
AB25
AA25
AE24
AC24
AA24
Y24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
Y21
AH20
AF20
AE20
AC20
AB20
AA20
T17
T16
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
Y15
V15
U15
AN14
AM14
U14
T14
VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_35
VCC_AXG_36
VCC_AXG_37
VCC_AXG_38
VCC_AXG_39
VCC_AXG_40
VCC_AXG_41
VCC_AXG_42
AJ14
AH14
VCC_AXG_SENSE
VSS_AXG_SENSE
POWER
VCC_SM_36/NC
VCC_SM_37/NC
VCC_SM_38/NC
VCC_SM_39/NC
VCC_SM_40/NC
VCC_SM_41/NC
VCC_SM_42/NC
6326.84mA
+VCCP
10U_0805_10V4Z 0.1U_0402_16V4Z
1
1
C126
1U_0603_10V4Z
C127
+
2
1
C128
1
C129
1
C130
10U_0805_10V4Z
330U_D2E_2.5VM_R15
C115
C116
D
0.22U_0402_10V4Z
2007/09/29
Deciphered Date
1U_0603_10V4Z
CANTIGA_1p0
1U_0603_10V4Z
0.47U_0402_6.3V6K
0.22U_0603_10V7K
C137
0.22U_0603_10V7K
C136
C135
AV44 VCCSM_LF1
BA37 VCCSM_LF2
AM40 VCCSM_LF3
AV21 VCCSM_LF4
AY5 VCCSM_LF5
AM10 VCCSM_LF6
BB13 VCCSM_LF7
C134
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7
C133
2007/09/29
4.7U_0603_6.3V6M
1
C114
Title
SCHEMATICS,MB A4271
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
401556
Date:
Security Classification
Issued Date
C132 0.1U_0402_16V4Z
1
1
1
1
1
C875
C876
C877
C878
C879
@
@
@
@
@
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
2
2
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V4Z
C131 0.1U_0402_16V4Z
PAD T42
PAD T43
W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16
CANTIGA_1p0
VCC_SM_BA36
VCC_SM_BB24
VCC_SM_BD16
VCC_SM_AW16
VCC_SM_AT13
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC SM LF
VCC_SM_AW16
BA36
BB24
BD16
BB21
AW16
AW13
AT13
VCC_35
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC GFX
T32
VCC_SM_BA36
VCC_SM_BB24
VCC_SM_BD16
+VCCP
POWER
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC NCTF
AE33
AC33
AA33
Y33
W33
V33
U33
AH28
AF28
AC28
AA28
AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24
AJ23
AH23
AF23
VCC CORE
330U_D2E_2.5VM_R15
C120
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
10U_0805_10V4Z
C118
C125
0.1U_0402_16V4Z
C124
0.22U_0402_10V4Z
C123
0.22U_0402_10V4Z
C122
C121
10U_0805_10V4Z
220U_D2_4VM_R15 1
AG34
AC34
AB34
AA34
Y34
V34
U34
AM33
AK33
AJ33
AG33
AF33
10U_0805_10V4Z
C117
D
0.01U_0402_16V7K
C119
+VCCP
AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32
AW32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29
AW29
AV29
AU29
AT29
AR29
AP29
VCC SM
DDR3:4140mA
+1.8V
U2F
Sheet
11
of
42
U2J
VSS
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6
CANTIGA_1p0
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
BA16
VSS_235
AU16
AN16
N16
K16
G16
E16
BG15
AC15
W15
A15
BG14
AA14
C14
BG13
BC13
BA13
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
AN13
AJ13
AE13
N13
L13
G13
E13
BF12
AV12
AT12
AM12
AA12
J12
A12
BD11
BB11
AY11
AN11
AH11
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
Y11
N11
G11
C11
BG10
AV10
AT10
AJ10
AE10
AA10
M10
BF9
BC9
AN9
AM9
AD9
G9
B9
BH8
BB8
AV8
AT8
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS
VSS NCTF
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1
VSS_351
VSS_352
VSS_353
VSS_354
U24
U28
U25
U29
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17
VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4
VSS_SCB_5
BH48
BH1
A48
C1
A3
VSS SCB
AU48
AR48
AL48
BB47
AW47
AN47
AJ47
AF47
AD47
AB47
Y47
T47
N47
L47
G47
BD46
BA46
AY46
AV46
AR46
AM46
V46
R46
P46
H46
F46
BF44
AH44
AD44
AA44
Y44
U44
T44
M44
F44
BC43
AV43
AU43
AM43
J43
C43
BG42
AY42
AT42
AN42
AJ42
AE42
N42
L42
BD41
AU41
AM41
AH41
AD41
AA41
Y41
U41
T41
M41
G41
B41
BG40
BB40
AV40
AN40
H40
E40
AT39
AM39
AJ39
AE39
N39
L39
B39
BH38
BC38
BA38
AU38
AH38
AD38
AA38
Y38
U38
T38
J38
F38
C38
BF37
BB37
AW37
AT37
AN37
AJ37
H37
C37
BG36
BD36
AK15
AU36
BG21
L12
AW21
AU21
AP21
AN21
AH21
AF21
AB21
R21
M21
J21
G21
BC20
BA20
AW20
AT20
AJ20
AG20
Y20
N20
K20
F20
C20
A20
BG19
A18
BG17
BC17
AW17
AT17
R17
M17
H17
C17
NC
U2I
NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42
E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48
CANTIGA_1p0
2007/09/29
Issued Date
Security Classification
2007/09/29
Deciphered Date
Title
SCHEMATICS,MB A4271
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
401556
Date:
Sheet
12
of
42
+1.8V
+1.8V
+1.8V
+DIMM_VREF
JDIMM1
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_DM3
DDR_A_D26
DDR_A_D27
C
(7) DDR_CKE0_DIMMA
(8) DDR_A_BS2
DDR_CKE0_DIMMA
DDR_A_BS2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
(8) DDR_A_BS0
(8) DDR_A_WE#
(8) DDR_A_CAS#
(7) DDR_CS1_DIMMA#
(7) M_ODT1
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_CS1_DIMMA#
M_ODT1
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_DM5
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_DM7
DDR_A_D58
DDR_A_D59
(14,15) CLK_SMBDATA
(14,15) CLK_SMBCLK
CLK_SMBDATA
CLK_SMBCLK
+3VS
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
203
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
GND
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
204
DDR_A_D4
DDR_A_D5
1
R976
C880
DDR_A_D6
DDR_A_D7
(8) DDR_A_DQS#[0..7]
1K_0402_1%
DDR_A_DM0
20mils
DDR_A_DQS#0
DDR_A_DQS0
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
0.1U_0402_16V4Z
(8) DDR_A_D[0..63]
To SODIMM
+DIMM_VREF
(8) DDR_A_DM[0..7]
DDR_A_D0
DDR_A_D1
(8) DDR_A_DQS[0..7]
R977
DDR_A_D12
DDR_A_D13
DDR_A_DM1
M_CLK_DDR0
M_CLK_DDR#0
+3VS
M_CLK_DDR0 (7)
M_CLK_DDR#0 (7)
DDR_A_D14
DDR_A_D15
C881
C882
+1.8V
C944
1
C945
1
+1.8V
0.1U_0402_16V4Z
2
2
2.2U_0603_6.3V6K
+
330U_D2E_2.5VM_R15
PM_EXTTS#0
DDR_A_DM2
C930
PM_EXTTS#0 (7)
DDR_A_D22
DDR_A_D23
+VCCP
0.1U_0402_16V4Z
+3VS
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
+1.8V
C948
1
0.1U_0402_16V4Z
+1.8V
C946
1
C947
1
DDR_A_D20
DDR_A_D21
(8) DDR_A_MA[0..14]
1K_0402_1%
2
+DIMM_VREF
20mils
+0.9VS
0.1U_0402_16V4Z
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
+1.8V
DDR_A_D30
DDR_A_D31
+0.9VS
DDR_CKE1_DIMMA
DDR_CKE1_DIMMA (7)
DDR_CKE0_DIMMA 1
DDR_A_BS2
2
RP36
4
3
56_0404_4P2R_5%
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA12
DDR_A_MA9
1
2
RP37
4
3
56_0404_4P2R_5%
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDR_A_MA8
DDR_A_MA5
1
2
RP38
4
3
56_0404_4P2R_5%
DDR_A_MA3
DDR_A_MA1
1
2
RP39
4
3
56_0404_4P2R_5%
DDR_A_MA14
DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#
M_ODT0
DDR_A_MA13
DDR_A_BS1 (8)
DDR_A_RAS# (8)
DDR_CS0_DIMMA# (7)
M_ODT0
(7)
DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_MA10
DDR_A_BS0
1
2
RP40
4
3
56_0404_4P2R_5%
DDR_A_WE#
DDR_A_CAS#
1
2
RP41
4
3
56_0404_4P2R_5%
DDR_CS1_DIMMA# 1
M_ODT1
2
RP42
4
3
56_0404_4P2R_5%
DDR_A_MA11
DDR_A_MA14
1
2
RP43
4
3
56_0404_4P2R_5%
DDR_A_MA6
DDR_A_MA7
1
2
RP44
4
3
56_0404_4P2R_5%
DDR_A_MA2
DDR_A_MA4
1
2
RP45
4
3
56_0404_4P2R_5%
DDR_A_BS1
DDR_A_MA0
1
2
RP46
4
3
56_0404_4P2R_5%
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
M_CLK_DDR1
M_CLK_DDR#1
M_CLK_DDR1 (7)
M_CLK_DDR#1 (7)
DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_CS0_DIMMA# 1
DDR_A_RAS#
2
RP47
4
3
56_0404_4P2R_5%
DDR_A_MA13
M_ODT0
4
3
56_0404_4P2R_5%
DDR_A_DQS#7
DDR_A_DQS7
DDR_CKE1_DIMMA 1
R978
DDR_A_D62
DDR_A_D63
R979 1
R980 1
1
2
RP48
C883
C884
C885
C886
C887
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2
2
2
2
2
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
+1.8V
C888
C889
C890
C891
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+0.9VS
C892
C893
C894
C895
C896
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+0.9VS
C897
1
C898
C899
C900
C901
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+0.9VS
2
56_0402_5%
C902
2 10K_0402_5%
2 10K_0402_5%
C903
C904
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
A
FOX_AS0A426-N2RN-7F
CONN@
Issued Date
Security Classification
2007/09/29
Deciphered Date
Title
SCHEMATICS,MB A4271
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
401556
Date:
Sheet
13
of
42
(8) DDR_B_DQS#[0..7]
(8) DDR_B_D[0..63]
+1.8V
(8) DDR_B_DM[0..7]
+1.8V
(8) DDR_B_DQS[0..7]
JDIMM2
+DIMM_VREF
DDR_B_D0
DDR_B_D5
D
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_DM3
C
DDR_B_D26
DDR_B_D27
(7) DDR_CKE2_DIMMB
(8) DDR_B_BS2
DDR_CKE2_DIMMB
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
(8) DDR_B_BS0
(8) DDR_B_WE#
(8) DDR_B_CAS#
(7) DDR_CS3_DIMMB#
(7) M_ODT3
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_CS3_DIMMB#
M_ODT3
DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_DM5
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_DM7
DDR_B_D58
DDR_B_D59
(13,15) CLK_SMBDATA
(13,15) CLK_SMBCLK
CLK_SMBDATA
CLK_SMBCLK
+3VS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
GND
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
(8) DDR_B_MA[0..14]
DDR_B_D4
DDR_B_D1
DDR_B_DM0
DDR_B_D6
DDR_B_D7
DDR_B_D12
DDR_B_D13
+1.8V
+DIMM_VREF
DDR_B_DM1
M_CLK_DDR2
M_CLK_DDR#2
M_CLK_DDR2 (7)
M_CLK_DDR#2 (7)
DDR_B_D14
DDR_B_D15
C906
C907
330U_D2E_2.5VM_R15
C905
2.2U_0603_6.3V6K
2
2
0.1U_0402_16V4Z
DDR_B_D20
DDR_B_D21
PM_EXTTS#1
DDR_B_DM2
PM_EXTTS#1 (7)
DDR_B_D22
DDR_B_D23
DDR_B_D28
DDR_B_D29
DDR_B_DQS#3
DDR_B_DQS3
+1.8V
DDR_B_D30
DDR_B_D31
DDR_CKE3_DIMMB
DDR_CKE3_DIMMB (7)
C908
C909
C910
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDR_B_BS1
DDR_B_RAS#
DDR_CS2_DIMMB#
M_ODT2
DDR_B_MA13
DDR_B_BS1 (8)
DDR_B_RAS# (8)
DDR_CS2_DIMMB# (7)
M_ODT2
(7)
DDR_CKE2_DIMMB 1
DDR_B_BS2
2
RP49
4
3
56_0404_4P2R_5%
DDR_B_MA12
DDR_B_MA9
1
2
RP50
4
3
56_0404_4P2R_5%
DDR_B_MA8
DDR_B_MA5
1
2
RP51
4
3
56_0404_4P2R_5%
C912
DDR_B_MA3
DDR_B_MA1
1
2
RP52
4
3
56_0404_4P2R_5%
DDR_B_DM4
DDR_B_MA10
DDR_B_BS0
1
2
RP53
4
3
56_0404_4P2R_5%
DDR_B_WE#
DDR_B_CAS#
1
2
RP54
4
3
56_0404_4P2R_5%
DDR_CS3_DIMMB#
1
M_ODT3
2
RP55
4
3
56_0404_4P2R_5%
DDR_B_MA11
DDR_B_MA14
RP562
1
356_0404_4P2R_5%
4
DDR_B_MA6
DDR_B_MA7
RP572
1
356_0404_4P2R_5%
4
DDR_B_MA2
DDR_B_MA4
RP582
1
356_0404_4P2R_5%
4
DDR_B_BS1
DDR_B_MA0
RP592
1
356_0404_4P2R_5%
4
DDR_CS2_DIMMB#RP602
DDR_B_RAS#
1
356_0404_4P2R_5%
4
RP612
1
356_0404_4P2R_5%
4
C914
C915
C916
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+0.9VS
B
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
C917
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
M_CLK_DDR3 (7)
M_CLK_DDR#3 (7)
DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
R981 1
R982 1
+1.8V
C913
DDR_B_D36
DDR_B_D37
2 10K_0402_5%
2 10K_0402_5%
DDR_B_MA13
M_ODT2
C918
C919
C920
C921
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+0.9VS
C922
C923
C924
C925
C926
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+0.9VS
C927
C928
C929
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
+3VS
DDR_CKE3_DIMMB 1
R983
Security Classification
2007/09/29
Issued Date
2
56_0402_5%
2007/09/29
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
2
2
2
2
2
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
+0.9VS
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
FOX_AS0A426-NARN-7F
CONN@
C911
DDR_B_MA14
Rev
B
401556
Sheet
14
of
42
+3VS_CK505
FSC
FSB
FSA
CLKSEL2
CLKSEL1
CLKSEL0
CPU
MHz
SRC
MHz
PCI
MHz
REF
MHz
R129
1
2
0_0805_5%
DOT_96 USB
MHz
MHz
+3VS
CLK_XTAL_OUT
C191
C192
C193
C194
C195
C196
C197
CLK_XTAL_IN
266
100
33.3
14.318
96.0
48.0
133
100
33.3
14.318
96.0
48.0
200
100
33.3
14.318
96.0
48.0
166
100
33.3
14.318
96.0
48.0
10U_0805_10V4Z
<BOM Structure>
0.1U_0402_16V4Z
2
<BOM Structure>
0.1U_0402_16V4Z
2
<BOM Structure>
0.1U_0402_16V4Z
2
<BOM Structure>
0.1U_0402_16V4Z
2
<BOM Structure>
0.1U_0402_16V4Z
2
<BOM Structure>
0.1U_0402_16V4Z
<BOM Structure>
14.31818MHZ_16P
Y1
333
100
33.3
14.318
96.0
C205
18P_0402_50V8J
48.0
100
100
33.3
14.318
96.0
48.0
400
100
33.3
14.318
96.0
48.0
1
R131
1
+VCCP
(7) CLKREQ#_7
(7) CLK_MCH_BCLK#
(7) CLK_MCH_BCLK
(4) CLK_CPU_BCLK#
(4) CLK_CPU_BCLK
CPU
R155
2 475_0402_1%
U3
+3VS_CK505
R158
2 0_0402_5%
R_CKPWRGD
FSB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
CLK_XTAL_OUT
CLK_XTAL_IN
@
R150
1K_0402_5%
(20) CLK_14M_ICH
(13,14) CLK_SMBDATA
(13,14) CLK_SMBCLK
2 33_0402_1% FSC
PAD T98
CLK_SMBDATA
CLK_SMBCLK
MCH_CLKSEL1 (7)
2007/12/07
(30) CLK_PCI_EC
(18) PCI_CLK
@
R165
0_0402_5%
PCI2_TME
R142
1
2 33_0402_1% 27_SEL
R873
PCI_CLK4
PCI_CLK 1
ITP_EN
2
33_0402_1%
CKPWRGD/PD#
FS_B/TEST_MODE
VSS_REF
XTAL_OUT
XTAL_IN
VDD_REF
REF_0/FS_C/TEST_
REF_1
SDA
SCL
NC
VDD_PCI
PCI_1
PCI_2
PCI_3
PCI_4/SEL_LCDCL
PCIF_5/ITP_EN
VSS_PCI
VDD_48
USB_0/FS_A
USB_1/CLKREQ_A#
VSS_48
VDD_IO
SRC_0/DOT_96
SRC_0#/DOT_96#
VSS_IO
VDD_PLL3
LCDCLK/27M
LCDCLK#/27M_SS
VSS_PLL3
VDD_PLL3_IO
SRC_2
SRC_2#
VSS_SRC
SRC_3
SRC_3#
R138
2
CPU_BSEL1
+VCCP
1
SA000020H10
@
R177
1K_0402_5%
CPU_BSEL2
R151
+3VS_CK505
H_STP_PCI#
H_STP_CPU#
H_STP_PCI# (20)
H_STP_CPU# (20)
CLK_PCIE_LAN# (23)
CLK_PCIE_LAN (23)
10K_0402_5%
R877 1
2
475_0402_1%
R_CLKREQ#_C
GLAN
R876 2
+3VS
EXP_CLKREQ# (28)
CLK_PCIE_CARD# (28)
CLK_PCIE_CARD (28)
R149
2 475_0402_1%
CLKREQ#_C (20)
SLG8SP553VTR_QFN72_10x10
(7) CLK_MCH_DREFCLK
(7) CLK_MCH_DREFCLK#
CLK_PCIE_SATA# (19)
CLK_PCIE_SATA (19)
SATA
CLK_PCIE_ICH# (20)
CLK_PCIE_ICH (20)
ICH
MCH_SSCDREFCLK# (7)
MCH_SSCDREFCLK (7)
0
1
0
PCI_CLK3
1
=
=
=
=
SRC8/SRC8#
ITP/ITP#
Enable DOT96 & SRC1(UMA)
Enable SRC0 & 27MHz(DIS)
ITP_EN
NB_SSC (UMA)
+3VS
+3VS
+3VS
+3VS
0820 R192 @
R189
@
R192
10K_0402_5%
2.2K_0402_5%
PCI_CLK4
1
R194
10K_0402_5%
(20,22,28) ICH_SMBCLK
CLK_SMBDATA
Q3B
2N7002DW T/R7_SOT363-6
CLK_SMBCLK
A
2N7002DW T/R7_SOT363-6
Q3A
(20,22,28) ICH_SMBDATA
2.2K_0402_5%
ITP_EN
R207
10K_0402_5%
R190
PCI2_TME
MiniCard
+1.05VS_CK505
R208
10K_0402_5%
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
+1.05VS_CK505
NB (UMA)
+3VS
3G_PLL
+3VS
MCARD_CLKREQ# (22)
CLK_PCIE_MCARD1 (22)
CLK_PCIE_MCARD1# (22)
PCI_STOP#
CPU_STOP#
VDD_SRC_IO
SRC_10#
SRC_10
CLKREQ_10#
SRC_11
SRC_11#
CLKREQ_11#
SRC_9#
SRC_9
CLKREQ_9#
VSS_SRC
CLKREQ_4#
SRC_4#
SRC_4
VDD_SRC_IO
CLKREQ_3#
FSA
2 33_0402_1%
PAD T112
MCH_CLKSEL2 (7)
@
R188
0_0402_5%
R875 1
2
10K_0402_5%
1
2
475_0402_1%
(5)
1
2
R183
1K_0402_5%
C204
2
<BOM Structure>
0.1U_0402_16V4Z
+1.05VS_CK505
FSC
R182
1
2
10K_0402_5%
R187
1
2
0_0402_5%
R154
(20) CLK_48M_ICH
B
+3VS_CK505
(5)
R162
1
2
0_0402_5%
<BOM Structure>
2
2
2
<BOM Structure>
<BOM Structure>
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CLK_MCH_3GPLL (7)
CLK_MCH_3GPLL# (7)
R_CLKREQ#_6
+VCCP
1
2
R157
1K_0402_5%
C200
10U_0805_10V4Z
0.1U_0402_16V4Z
1
1
1
C201
C202
C203
+1.05VS_CK505
MCH_CLKSEL0 (7)
(20) CK_PWRGD
FSB
R_CLKREQ#_7
@
R137
1K_0402_5%
C
0.1U_0402_16V4Z
1
C198
C199
CLK_PCIE_READER (27)
CLK_PCIE_READER# (27)
CPU_BSEL0
+3VS_CK505
56_0402_5%
R132
1
2
1
2
R133
2.2K_0402_5%
1K_0402_5%
R134
1
2
<BOM Structure>
0_0402_5%
<BOM Structure>
R130
1
2
0_0805_5%
C206
18P_0402_50V8J
<BOM Structure>
2
2
10U_0805_10V4Z
NB
(5)
Reserved
FSA
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
Place close to U3
VDD_CPU
CPU_0
CPU_0#
VSS_CPU
CPU_1
CPU_1#
VDD_CPU_IO
CLKREQ_7#
SRC_8/CPU_ITP
SRC_8#/CPU_ITP#
VDD_SRC_IO
SRC_7
SRC_7#
VSS_SRC
CLKREQ_6#
SRC_6
SRC_6#
VDD_SRC
+1.05VS_CK505
+VCCP
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
Security Classification
2007/09/29
Issued Date
2007/09/29
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
B
401556
Sheet
15
of
42
BLUE
GREEN
RED
SEL
OE#
4
7
9
12
1A
2A
3A
4A
VCC
16
1B1
2B1
3B1
4B1
2
5
11
14
1B2
2B2
3B2
4B2
3
6
10
13
1.1A_6VDC_FUSE
C213
0.1U_0402_16V4Z
2
JCRT1
CRT_R
L24
CRT_G
L26
GND
CRT_B
1
R560R561
R562
L28
2
FCM2012C-800_0805
RED
2
FCM2012C-800_0805
GREEN
2
FCM2012C-800_0805
BLUE
C661
1
1
1
1
1
1
C657C658C659
22P_0402_50V8J
C660
150_0402_1%
22P_0402_50V8J
10P_0402_50V8J
2
2
2
2
150_0402_1%
150_0402_1%
22P_0402_50V8J
CRT_R
2
0_0402_5%
CRT_G
2
0_0402_5%
CRT_B
2
0_0402_5%
@
1
R971
M_GREEN 1
@
R972
M_BLUE 1
@
R973
W=40mils
DOCK
D_CRT_R (24)
D_CRT_G (24)
D_CRT_B (24)
FSAV330MTC_TSSOP16
M_RED
CH491D_SC59
D_CRT_R
D_CRT_G
D_CRT_B
+CRTVDD
F1
1
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
C662
10P_0402_50V8J
CONN@
+CRTVDD
M_RED
M_GREEN
M_BLUE
1
15
+RCRT_VCC
D4
2
(9) M_RED
(9) M_GREEN
(9) M_BLUE
EC_DOCKIN#
+5VS
0.1U_0402_16V4Z
1
2
C656
(23,30) EC_DOCKIN#
CRT Connector
+5VS
U25
+CRTVDD
16
17
SUYIN_070549FR015S208CR
+CRTVDD
R555
100K_0402_5%
1
L : A-->B1
H: A-->B2
NOTE:
@ D7
DAN217_SC59
@ D6
DAN217_SC59
@ D5
@D5
DAN217_SC59
+CRTVDD
CRT_DET# (20)
+3VS
+3VS
R196
1
2 0_0603_5%
DHSYNC
VSYNC_G_A
R202
1
2 0_0603_5%
DVSYNC
U5
SN74AHCT1G125GW_SOT353-5
1 @
C216
1
1
2
2
6
2.2K_0402_5%
3VDDCDA
3VDDCDA (9)
3VDDCCL
3VDDCCL (9)
Q4B
2N7002DW T/R7_SOT363-6
R558 1
R559 1
2 0_0402_5%
2 0_0402_5%
D_DDC_DATA (24)
D_DDC_CLK (24)
1 @
C217
3
R205
51K_0402_5%
5P_0402_50V8C
5P_0402_50V8C
R204
51K_0402_5%
R200
2N7002DW T/R7_SOT363-6
Q4A
5
1
CRT_VSYNC
R199
2.2K_0402_5%
D_DDCCLK
(9) CRT_VSYNC
D_DDCDATA
U4
SN74AHCT1G125GW_SOT353-5
HSYNC_G_A
Y 4
P
OE#
P
OE#
(9) CRT_HSYNC
CRT_HSYNC
5
1
2
1
R872
10K_0402_5%
C215
0.1U_0402_16V4Z
1
2
R198
2.2K_0402_5%
C214
0.1U_0402_16V4Z
1
2
R197
2.2K_0402_5%
+5VS
+5VS
10P_0402_50V8J
D_HSYNC (24)
D_VSYNC (24)
Security Classification
2007/09/29
Issued Date
2007/09/29
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
B
401556
Sheet
16
of
42
5
2
DPST_PWM (9)
2N7002_SOT23-3
Q30
R563
300_0603_5%
P
A
2
2
L30 2
1
KC FBM-L11-201209-221LMAT_0805
1
C665
C667
0.1U_0402_16V4Z
C663
0.1U_0402_16V4Z
1
C664
C943
C868
1800P_0402_50V7K
2
C666
+3VS
DDC2_CLK
DDC2_DATA
(9) DDC2_CLK
(9) DDC2_DATA
(20)
(20)
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
+INVPWR_B+
USB20_CMOS_N3
USB20_CMOS_P3
R567 1
2
R568 1
2
0_0603_5%
0_0603_5%
USB20_N3
USB20_P3
GND
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
GND
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
DAC_BRIG
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
DAC_BRIG (30)
GMCH_INV_PWM
DISPLAYOFF#
1
2
R1004 0_0402_5%
(9)
INV_PWM
C938
1U_0402_6.3V4Z
1
Q54
2N7002_SOT23
2
G
ENAVDD
INV_PWM (30)
+LCDVDD
R885
100K_0402_5%
W=60mils
LVDS_A_0LVDS_A_0+
LVDS_A_0- (9)
LVDS_A_0+ (9)
LVDS_A_1LVDS_A_1+
LVDS_A_1- (9)
LVDS_A_1+ (9)
LVDS_A_2+
LVDS_A_2-
+3VS
LVDS_A_2+ (9)
LVDS_A_2- (9)
LVDS_A_CLVDS_A_C+
68P_0402_50V8J
C670
4.7U_0603_6.3V6K
100K_0402_5%
JLVDS
680P_0402_50V7k
4.7U_0805_10V4Z
R565
2
G
2N7002_SOT23
390P_0402_50V7K
C669
100K_0402_5%
Q31 D
R569
220P_0402_50V7K
LVDS_A_C- (9)
LVDS_A_C+ (9)
DAC_BRIG
1
C672
INV_PWM
1
C673
DISPLAYOFF#
1
C674
+3VS
ACES_88242-4001
CONN@
4.7K_0402_5%
2
2 220P_0402_50V7K
(30)
2 220P_0402_50V7K
BKOFF#
BKOFF#
B+
L29 2
1
KC FBM-L11-201209-221LMAT_0805
W=40mils
10U_0805_10V4Z 1
+INVPWR_B+
C668
0.1U_0402_16V4Z
R564
+3VS
1+LCDVDD_R
+LCDVDD
3
AO3413_SOT23
+5VALW
NC7SZ14P5X_NL_SC70-5
@
+3VS
+LCDVDD
NC
U54
GMCH_INV_PWM
+LCDVDD
+3VS
2
G
D43
1
DISPLAYOFF#
CH751H-40PT_SOD323-2
10U_0805_10V4Z
2
2
C776
C777
C779
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C780
C781
U36
0.1U_0402_16V4Z
disable
inverting
output
+3VS
R861
2.2K_0402_5%
Docking Conn
(24)
(24)
DVI_TXC+
DVI_TXC-
(24)
(24)
DVI_TXD2+
DVI_TXD2-
(24)
(24)
DVI_TXD1+
DVI_TXD1-
(24)
(24)
DVI_TXD0+
DVI_TXD0-
2
S
25
0_0402_5%
1
2
R859
R878
2.2K_0402_5%
R879
2.2K_0402_5%
VCC3V
VCC3V
VCC3V
VCC3V
VCC3V
VCC3V
VCC3V
VCC3V
3
4
FUNCTION1
FUCNTION2
ANALOG1(REXT)
HPD_SOURCE
SDA_SOURCE
SCL_SOURCE
10
ANALOG2
DVI_TXC+
DVI_TXC-
13
14
OUT_D4+
OUT_D4-
DVI_TXD2+
DVI_TXD2-
16
17
DVI_TXD1+
DVI_TXD1-
19
20
DVI_TXD0+
DVI_TXD0-
22
23
OUT_D1+
OUT_D1-
1
5
12
18
24
27
31
36
37
43
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
SCL_SINK
28
DVI_SCLK
SDA_SINK
29
DVI_SDATA
HPD_SINK
30
DVI_DET
DDC_EN
32
R860
FUNCTION3
FUNCTION4
34
35
0_0402_5%
1
2
DVI_SCLK (24)
DVI_SDATA (24)
DVI_DET
R869
7.5K_0402_1%
2
Q52
C772
DVI_TXC-
2 R864
1
1
68_0402_5%
2 DVI_TXC+
0.5pf_0402_50V
C773
DVI_TXD2HPD_7318_EC (30)
HPD_7318_R_EC (30)
10K_0402_5%
R9911
2
+3VS
R994
10K_0402_5%
1
2
R9951
2
10K_0402_5%
Docking Conn
pin 4
pin 35
IN_D4+
IN_D4-
48
47
TMDS_B_CLK (9)
TMDS_B_CLK# (9)
OUT_D3+
OUT_D3-
IN_D3+
IN_D3-
45
44
TMDS_B_DATA2 (9)
TMDS_B_DATA2# (9)
OUT_D2+
OUT_D2-
IN_D2+
IN_D2-
42
41
TMDS_B_DATA1 (9)
TMDS_B_DATA1# (9)
IN_D1+
IN_D1-
39
38
TMDS_B_DATA0 (9)
TMDS_B_DATA0# (9)
2 R865
1
1
68_0402_5%
2 DVI_TXD2+
0.5pf_0402_50V
DVI_TXD1-
C782
2 R866
1
1
2 DVI_TXD1+
0.5pf_0402_50V
68_0402_5%
DVI_TXD0-
C783
2 R867
1
1
2 DVI_TXD0+
68_0402_5%
0.5pf_0402_50V
CH7318A-BF-TR_QFN48_7X7
SA00001U910
Security Classification
2007/09/29
Issued Date
2007/09/29
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
(24)
+3VS
R888
0_0402_5%
DVI_HPDT# (9)
@
0_0402_5%
1
2
2N7002_SOT23
R874
0_0402_5%
1
2HPD_7318
2
G
@
20K_0402_5%
R870
R863 1.2K_0402_5%
1
HPD_7318_R
R868
20K_0402_5%
R887
0_0402_5%
for NB
+3VS
HPD_7318_R
10K_0402_5%
1
2
R990
SDVO_SCLK
(7) SDVO_SCLK
R871
R99210K_0402_5%
2
2
R993
10K_0402_5%
SDVO_SDAT
(7) SDVO_SDAT
1
1
2
11
15
21
26
33
40
46
+3VS
+3VS
R862
2.2K_0402_5%
OE*
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C775
C774
0.1U_0402_16V4Z
1
Rev
B
401556
Sheet
17
of
42
+3VS
RP29
RP30
8.2K_1206_8P4R_5%
1 <BOM Structure>
8
2
7
3
6
4
5
PCI_PLOCK#
PCI_IRDY#
PCI_REQ3#
PCI_PIRQB#
U6B
D11
C8
D9
E12
E9
C9
E10
B7
C7
C5
G11
F8
F11
E7
A3
D2
F10
D5
D10
B3
F7
C3
F3
F4
C1
G7
H7
D1
G5
H6
G1
H3
8.2K_1206_8P4R_5%
<BOM Structure>
+3VS
RP31
8
7
6
5
PCI_STOP#
PCI_PIRQD#
PCI_FRAME#
PCI_PERR#
8.2K_1206_8P4R_5%
1 <BOM Structure>
8
2
7
3
6
4
5
PCI_PIRQG#
PCI_TRDY#
PCI_REQ0#
PCI_PIRQH#
8.2K_1206_8P4R_5%
1 <BOM Structure>
8
2
7
3
6
4
5
PCI_PIRQC#
PCI_REQ2#
PCI_REQ1#
PCI_DEVSEL#
1
2
3
4
RP32
RP33
8.2K_1206_8P4R_5%
<BOM Structure>
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PCI
REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55
PIRQA#
PIRQB#
PIRQC#
PIRQD#
PCI_REQ0#
PCI_GNT0#
PCI_REQ1#
T65 PAD
PCI_REQ2#
T66 PAD
PCI_REQ3#
PCI_GNT3#
C/BE0#
C/BE1#
C/BE2#
C/BE3#
D8
B4
D6
A5
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
D3
E3
R1
C6
E4
C2
J4
A4
F5
D7
PCI_IRDY#
T71 PAD
PCI_RST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PLTRST#
PCICLK
PME#
C14
D4
R2
PLT_RST#
PCI_CLK
T72 PAD
H4
K6
F2
G2
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
Interrupt I/F
J5
E1
J6
C4
F1
G4
B6
A7
F13
F12
E6
F6
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
T67
T68
T69
T70
PAD
PAD
PAD
PAD
PCI_RST# (28,30)
1
PCI_PIRQF#
PCI_PIRQA#
PCI_PIRQE#
PCI_SERR#
R942
100K_0402_5%
2
8
7
6
5
1
2
3
4
PLT_RST# (7,20,22,23,27)
PCI_CLK (15)
@ R249
1
PCI_GNT0#
SPI_CS#1
SPI
PCI
LPC
2
1K_0402_5%
@ R944
@R944
1
(20) SPI_CS1#_R
SPI_CS1#_R
@ R250
1
PCI_GNT0#
@ R251
1
1K_0402_5%
2
+3VALW
2
1K_0402_5%
2
1K_0402_5%
Security Classification
2007/09/29
Issued Date
2007/09/29
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
B
401556
Sheet
18
of
42
NC
IN
R262
1
2
20K_0402_5%
1
1U_0603_10V4Z
CLRP2
SHORT PADS
RTCX1
RTCX2
ICH_RTCRST#
ICH_SRTCRST#
SM_INTRUDER#
A25
F20
C22
RTCRST#
SRTCRST#
INTRUDER#
ICH_INTVRMEN
LAN100_SLP
B22
A22
INTVRMEN
LAN100_SLP
E25
GLAN_CLK
C13
LAN_RSTSYNC
+3VALW
LAN_RXD0
LAN_RXD1
LAN_RXD2
R946
10K_0402_5%
D13
D12
E13
LAN_TXD0
LAN_TXD1
LAN_TXD2
GPIO56
B10
GPIO56
GLAN_COMP
B28
B27
GLAN_COMPI
GLAN_COMPO
F14
G13
D14
+1.5VS
C
(25) HDA_BITCLK_CODEC
(25) HDA_SYNC_CODEC
(25) HDA_RST#_CODEC
CODEC
MDC
R266
24.9_0402_1% 1
R267
R271
33_0402_5%
33_0402_5%
1
1
2
2
HDA_BITCLK
HDA_SYNC
AF6
AH4
HDA_BIT_CLK
HDA_SYNC
R272
33_0402_5%
HDARST#
AE7
HDA_RST#
HDA_SDIN0
HDA_SDIN1
AF4
AG4
AH3
AE5
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SDOUT
AG5
HDA_SDOUT
AG7
AE8
HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34
AG8
SATALED#
0.01U_0402_16V7K
C248
SATA_TXN0_C
1
2
SATA_TXP0_C
C249
1
2<BOM Structure>
AJ16
AH16
AF17
AG17
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
0.01U_0402_16V7K
0.01U_0402_16V7K
C244
SATA_TXN4_C
1
2<BOM Structure>
SATA_TXP4_C
C245
1
2<BOM Structure>
AH13
AJ13
AG14
AF14
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
(25) HDA_SDIN0
(31) HDA_SDIN1
R276
(25) HDA_SDOUT_CODEC
33_0402_5%
2
PAD T45
PAD T46
2
+3VS 1
R52210K_0402_5%
SATA_LED#
(32) SATA_LED#
(22)
(22)
(22)
(22)
S- HDD
(22)
(22)
(22)
(22)
ODD
SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0
SATA_TXP0
SATA_TXN0
SATA_TXP0
SATA_RXN4_C
SATA_RXP4_C
SATA_TXN4
SATA_TXP4
SATA_TXN4
SATA_TXP4
K5
K4
L6
K2
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
FWH4/LFRAME#
K3
LPC_FRAME#
LDRQ0#
LDRQ1#/GPIO23
J3
J1
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
H_DPRSTP#
@ R260
@R260
1
2
56_0402_5%
H_DPSLP#
@ R261
@R261
1
2
56_0402_5%
LPC_FRAME# (30)
+VCCP
A20GATE
A20M#
N7
AJ27
GATEA20
H_A20M#
DPRSTP#
DPSLP#
AJ25
AE23
H_DPRSTP_R#
H_DPSLP#
R264 <BOM
H_DPRSTP#
1 Structure>
2
0_0402_5%
FERR#
AJ26
R_H_FERR#
R265
CPUPWRGD
AD22
H_PWRGOOD
IGNNE#
AF25
H_IGNNE#
INIT#
INTR
RCIN#
AE22
AG25
L3
H_INIT#
H_INTR
KB_RST#
NMI
SMI#
AF23
AF24
H_NMI
H_SMI#
GATEA20 (30)
H_A20M# (4)
R263
56_0402_5%
H_DPRSTP# (5,7,40)
H_DPSLP# (5)
H_FERR#
2
56_0402_5%
H_PWRGOOD (5)
H_FERR# (4)
H_IGNNE# (4)
H_INIT# (4)
H_INTR (4)
KB_RST# (30)
H_NMI (4)
H_SMI# (4)
STPCLK#
AH27
H_STPCLK#
THRMTRIP#
AG26
THRMTRIP_ICH#
TP12
AG27
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
AH11
AJ11
AG12
AF12
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
AH9
AJ9
AE10
AF10
SATA_CLKN
SATA_CLKP
AH18
AJ18
SATARBIAS#
SATARBIAS
AJ7
AH7
R269
56_0402_5%
H_STPCLK# (4)
R274
2 54.9_0402_1%
H_THERMTRIP# (4,7)
CLK_PCIE_SATA#
CLK_PCIE_SATA
R277
CLK_PCIE_SATA# (15)
CLK_PCIE_SATA (15)
2
24.9_0402_1%
0.01U_0402_16V7K
+VCCP
LPC_AD[0..3] (30)
LAN / GLAN
CPU
C243
C23
C24
R256
1
2
10K_0402_5%
U6A
X1
C339
18P_0402_50V8J
ICH_RTCX2
2
1
<BOM Structure>
KB_RST#
IHDA
+RTCVCC
@
R259
ICH_LAN100_SLP
SATA
@
R258
2
1U_0603_10V4Z
ICH_RTCX1
C253
GATEA20
ICH_SRTCRST#
RTC
LPC
C340
18P_0402_50V8J
2
1
<BOM Structure>
32.768KHZ_12.5P_MC-306
3 NC
OUT 4
R270
10M_0402_5%
2
1
ICH_INTVRMEN
CLRP3
SHORT PADS
R253
1
2
10K_0402_5%
LAN100_SLP
2
1M_0402_5%
2
330K_0402_1%
1
2
R279
330K_0402_1%
1
2
20K_0402_5%
0_0402_5%
2
1
R255
D
SM_INTRUDER#
0_0402_5%
2
1
R254
R252
+3VS
ICH_INTVRMEN
+RTCVCC
RTC Battery
(31) HDA_SDOUT_MDC
HDA_BITCLK
HDA_SYNC
HDARST#
R278
33_0402_5%
HDA_SDOUT
BATT1
2
+RTCBATT
+RTCBATT
R48
1K_0402_5%
ML1220T13RE
45@
MDC
HDA_SDOUT
2
1K_0402_5%
ICH_RSVD
2
1K_0402_5%
2
2
D8
+RTCVCC
ICH_RSVD (20)
@ R281
1
1
1
33_0402_5%
@ R280
1
33_0402_5%
33_0402_5%
R275
(31) HDA_RST_MDC#
+3VS
R268
R273
1 1
(31) HDA_BITCLK_MDC
(31) HDA_SYNC_MDC
BAS40-04_SOT23-3
+CHGRTC
C109
<BOM Structure>
0.1U_0402_16V4Z
ICH_RSVD HDA_SDOUT_CODEC
A
2007/09/29
Issued Date
Security Classification
2007/09/29
Deciphered Date
Title
SCHEMATICS,MB A4271
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
401556
Date:
Sheet
19
of
42
CARD READER
10K_1206_8P4R_5%
M7
AJ24
B21
AH20
AJ20
AJ21
SPKR
MCH_SYNC#
TP3
TP8
TP9
TP10
PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1
C682 1
C680 1
PCIE_RXN1
PCIE_RXP1
2 0.1U_0402_16V7K PCIE_C_TXN1
2 0.1U_0402_16V7K PCIE_C_TXP1
@
R309
10K_0402_5%
GPIO57
CS#
WP#
HOLD#
GND
(27)
(27)
(27)
(27)
PCIE_RXN5
PCIE_RXP5
PCIE_TXN5
PCIE_TXP5
C693 1
C692 1
PCIE_RXN5
PCIE_RXP5
2 0.1U_0402_16V7K PCIE_C_TXN5
2 0.1U_0402_16V7K PCIE_C_TXP5
E29
E28
F27
F26
PERN5
PERP5
PETN5
PETP5
C29
C28
D27
D26
PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP
R650 1
R651 1
J29
J28
K27
K26
PERN3
PERP3
PETN3
PETP3
2 33_0402_5%
2 33_0402_5%
ICH_SPI_CLK_R
ICH_SPI_CS0#_R
SPI_CS1#_R
D23
D24
F23
2 33_0402_5%
2 33_0402_5%
ICH_SPI_MOSI_R
ICH_SPI_MISO_R
D25
E23
(28)
(28)
USB_OC#0
CP_PE#
(28)
(28)
USB_OC#4
USB_OC#5
USB_OC#0
CP_PE#
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#8
USB_OC#9
USB_OC#10
USB_OC#11
N4
N5
N6
P6
M1
N2
M4
M3
N3
N1
P5
P3
USBRBIAS
ICH_SPI_CLK
ICH_SPI_MOSI
ICH_SPI_MISO
AG2
AG1
R6
R351 1
2
0_0402_5%
PM_SLP_M#
CL_CLK0
CL_CLK1
F24
B19
CL_CLK0
CL_DATA0
CL_DATA1
F22
C19
CL_DATA0
CL_VREF0
CL_VREF1
C25
A19
CL_VREF0_ICH
CL_VREF1_ICH
CL_RST0#
CL_RST1#
F21
D18
CL_RST#
A16
C18
C11
C20
GPIO24
GPIO10
2 0_0402_5%
2
2
10K_0402_5%
ICH_PWROK
+3VS
CL_CLK0
(7)
0.1U_0402_16V4Z
1
CL_DATA0 (7)
CL_RST#
R319
2
3.24K_0402_1%
C258
R320
453_0402_1%
<BOM Structure>
2
NA lead free
+3VALW
(7)
0.1U_0402_16V4Z
1
2
R329
1
100K_0402_5%
2
1
D10
CH751H-40PT_SOD323-2
T111
PAD
<BOM Structure>
DMI_RXN0 (7)
DMI_RXP0 (7)
DMI_TXN0 (7)
DMI_TXP0 (7)
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
Y27
Y26
W29
W28
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
DMI_RXN1 (7)
DMI_RXP1 (7)
DMI_TXN1 (7)
DMI_TXP1 (7)
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
AB27
AB26
AA29
AA28
DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2
DMI_RXN2 (7)
DMI_RXP2 (7)
DMI_TXN2 (7)
DMI_TXP2 (7)
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
AD27
AD26
AC29
AC28
DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3
DMI_RXN3 (7)
DMI_RXP3 (7)
DMI_TXN3 (7)
DMI_TXP3 (7)
T26
T25
CLK_PCIE_ICH#
CLK_PCIE_ICH
USB
1
R312
CK_PWRGD (15)
T92 PAD
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
USBP0N
USBP0P
USBP1N
USBP1P
SPI_CLK
USBP2N
SPI_CS0#
USBP2P
SPI_CS1#/GPIO58/CLGPIO6 USBP3N
USBP3P
SPI_MOSI
USBP4N
SPI_MISO
USBP4P
USBP5N
OC0#/GPIO59
USBP5P
OC1#/GPIO40
USBP6N
OC2#/GPIO41
USBP6P
OC3#/GPIO42
USBP7N
OC4#/GPIO43
USBP7P
OC5#/GPIO29
USBP8N
OC6#/GPIO30
USBP8P
OC7#/GPIO31
USBP9N
OC8#/GPIO44
USBP9P
OC9#/GPIO45
USBP10N
OC10#/GPIO46
USBP10P
OC11#/GPIO47
USBP11N
USBP11P
USBRBIAS
USBRBIAS#
2
10K_0402_5%
PLT_RST# (7,18,22,23,27)
PM_PWROK
R315 1
V27
V26
U29
U28
DMI_ZCOMP
DMI_IRCOMP
1
R304
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI_CLKN
DMI_CLKP
CK_PWRGD_R
B16
SATA
GPIO
PERN4
PERP4
PETN4
PETP4
1
VCC
SCLK
SI
SO
8
6
5
2
PERN2
PERP2
PETN2
PETP2
G29
G28
H27
H26
MX25L512AMC-12G_SO8
SA000022S00
R5
SLP_M#
ICH_PWROK
PWRBTN_OUT# (30)
+3VALW
C259
R327
453_0402_1%
<BOM Structure>
2
(30,32,34,37)
ACIN
R324
2
3.24K_0402_1%
@
1 0_0402_5%
R355 2
+3VALW
U23
ICH_PWROK
PM_PWROK
VGATE
NC7SZ08P5X_NL_SC70-5
2
R337
PM_PWROK (29,30)
1
@ 2K_0402_1%
@
R353 2
1 0_0402_5%
Q21
MMBT3906_SOT23-3
SB_RSMRST#
1 <BOM 3Structure>
AF29
AF28
AC5
AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2
DMI_IRCOMP
CLK_PCIE_ICH# (15)
CLK_PCIE_ICH (15)
R338
1
USB20_N0
USB20_P0
USB20_N8
USB20_P8
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB20_N1
USB20_P1
24.9_0402_1%
2
USB20_N0
USB20_P0
USB20_N8
USB20_P8
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB20_N1
USB20_P1
(28)
(28)
(24)
(24)
(31)
(31)
(17)
(17)
(28)
(28)
(28)
(28)
(31)
(31)
(22)
(22)
(28)
(28)
+3VS
EC_RSMRST# (30)
R357
10K_0402_5%
1
R358
2
4.7K_0402_5%
+3VALW
D51A
1
6
2
BAV99DW-7_SOT363
<BOM Structure>
D51B
4
3
5
+3VS
BAV99DW-7_SOT363
<BOM Structure>
R354
2.2K_0402_5%
R360
10K_0402_5%
(16)
CRT_DET#
(24) D_CRT_DET#
2N7002_SOT23
2
Q22G
R952
2
<BOM Structure>
0_0402_5%
R340
22.6_0402_1%
2
1
3
7
4
L29
L28
M27
M26
PCIE_RXN4
PCIE_RXP4
2 0.1U_0402_16V7K PCIE_C_TXN4
2 0.1U_0402_16V7K PCIE_C_TXP4
U40
ICH_SPI_CS0#
ICH_SPI_WP#
ICH_SPI_HOLD#
PERN1
PERP1
PETN1
PETP1
C684 1
C685 1
+3VS
N29
N28
P27
P26
PCIE_RXN4
PCIE_RXP4
PCIE_TXN4
PCIE_TXP4
1
2 3.3K_0402_5%
2 3.3K_0402_5%
1
2
R526 0_0402_5%
SB_RSMRST#
GPIO9
(22)
(22)
(22)
(22)
ICH_SPI_MOSI
ICH_SPI_MISO
GLAN
D22
ICH_ACIN
C268 1
C269 1
0814 UPDATE
+3VS
D20
RSMRST#
MEM_LED/GPIO24
GPIO10/SUS_PWR_ACK
GPIO14/AC_PRESENT
WOL_EN/GPIO9
GLAN_RXN
GLAN_RXP
GLAN_TXN
GLAN_TXP
100K_0402_5%
R524
LAN_RST#
CLPWROK
(23)
(23)
(23)
(23)
ICH_SPI_CLK R641 1
ICH_SPI_CS0# R649 1
(18) SPI_CS1#_R
10K_1206_8P4R_5%
PWRBTN_OUT#
CK_PWRGD
GLAN_RXN
GLAN_RXP
2 0.1U_0402_16V7K GLAN_TXN_C
2 0.1U_0402_16V7K GLAN_TXP_C
+3VALW
5
6
7
8
R3
t
t
r o
r
o
p p
B
a B S
r
D D
e S
U U
R
R
m l
l
A A
a a
g
a
C C
c
n
n r
n
i
r
I W
k
e
e
B t
N
c
t
E
I
P M
o T S x
x
N
F
e
d B U e
4
3
2
1
GPIO1
GPIO6
GPIO7
GPIO8
GPIO12
GPIO13
GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
GPIO27
GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
GPIO49
GPIO57/CLGPIO5
PWRBTN#
DPRSLPVR (7,40)
R302
0_0402_5%
1
2
t
r
o
p
B
S
U
l
a
n
r
e
t
x
e
USB_OC#8
USB_OC#9
USB_OC#10
USB_OC#11
AG19
AH21
AG21
A21
C12
C21
AE18
K1
AF8
AJ22
A9
D19
L1
AE19
AG22
AF21
AH24
A8
ICH_LOW_BAT#
+3VALW
RP28
TP11
B13
MINI CARD
RP27
5
6
7
8
VRMPWRGD
A20
BATLOW#
New Card
GIGA LAN
4
3
2
1
D21
2007/09/29
Issued Date
Security Classification
2007/09/29
Deciphered Date
Title
SCHEMATICS,MB A4271
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
401556
Date:
4.7P_0402_50V8C
ICH_PWROK (7)
2 0_0402_5%
1
R306
U6D
(28)
(28)
(28)
(28)
RP35 10K_1206_8P4R_5%
USB_OC#6
USB_OC#7
USB_OC#2
USB_OC#3
WAKE#
SERIRQ
THRM#
M2
10K_1206_8P4R_5%
GPIO10
4
5
EC_LID_OUT#
3
6
GPIO24
2
7
1
8
ICH_PWROK
DPRSLPVR/GPIO16
4.7P_0402_50V8C
R331
CLKRUN#
1 @
C257
2
B
R325
(25)
S4_STATE#
G20
(30)
(30)
(30)
R336
OCP#
CRT_DET
CR_CPPE#
(27) CR_CPPE#
EC_SMI#
(30)
EC_SMI#
EC_SCI#
(30)
EC_SCI#
GPIO13
PAD T93
GPIO17
GPIO18
GPIO20
CR_WAKE#
(27) CR_WAKE#
GPIO27
PAD T50
GPIO28
PAD T94
CLKREQ#_C
(15) CLKREQ#_C
GPIO38
1
2
R321
@
8.2K_0402_5%
GPIO39
GPIO48
GPIO49
GPIO57
@
R323
1K_0402_5%
1
2
+3VS
SB_SPKR
SB_SPKR
MCH_ICH_SYNC#
(7) MCH_ICH_SYNC#
ICH_RSVD
(19) ICH_RSVD
ICH_TP8
PAD T95
ICH_TP9
PAD T96
ICH_TP10
PAD T97
OCP#
C10
PWROK
SLP_S3#
SLP_S4#
SLP_S5#
R326
ICH_TP11
PAD T49
E20
M5
AJ23
S4_STATE#/GPIO26
PMSYNC#/GPIO0
T48 PAD
LINKALERT#
1
2
10K_0402_5%
ICH_PCIE_WAKE#
1
2
1K_0402_5%
EC_SMI#
1
2
8.2K_0402_5% @
ICH_LOW_BAT#
1
2
8.2K_0402_5%
S4_STATE#
1
2
10K_0402_5% @
RP34
EC_SWI#
4
5
XDP_DBRESET#
3
6
ME_EC_CLK1
2
7
ME_EC_DATA1
1
8
R322
L4
SLP_S3#
SLP_S4#
SLP_S5#
+3VS
+3VALW
PM_CLKRUN#
C16
E16
G17
10_0402_5%
1 @
C256
0812 No install
C
1
2
100K_0402_5%
(4)
GPIO49
1
2
10K_0402_5%
@R318
@
R318
R311
PROJECT_ID0
STP_PCI#
STP_CPU#
VGATE
VGATE
GPIO48
PROJECT_ID1
A14
E19
SLP_S3#
SLP_S4#
SLP_S5#
10_0402_5%
CLK_14M_ICH (15)
CLK_48M_ICH (15)
(7,40)
SMBALERT#/GPIO11
H_STP_PCI#
R_STP_CPU#
ICH_PCIE_WAKE#
SIRQ
THERM_SCI#
(22,28) ICH_PCIE_WAKE#
(30) SIRQ
(30) THERM_SCI#
CR_CPPE#
A17
SUSCLK
ICH_SUSCLK
GPIO17
M6
EC_LID_OUT#
CLK_14M_ICH
CLK_48M_ICH
P1
R316
(30) PM_CLKRUN#
SUS_STAT#/LPCPD#
SYS_RESET#
PM_BMBUSY#
H1
AF3
CLK14
CLK48
EC_SCI#
2 0_0402_5%
RI#
R4
G19
@
R293
R314
R303
F19
CLK_14M_ICH
@
R292
(15) H_STP_PCI#
(15) H_STP_CPU#
EC_SWI#
SUS_STAT#
XDP_DBRESET#
PROJECT_ID1
PROJECT_ID0
1
2
R945 10K_0402_5%
@R310
@
R310
(4) XDP_DBRESET#
@
R299
(7) PM_BMBUSY#
10K_0402_5%
(30) EC_LID_OUT#
PM_BMBUSY#
1
2
8.2K_0402_5%
1
2
8.2K_0402_5%
1
2
8.2K_0402_5%
T47
AH23
AF19
AE21
AD20
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37
@
R298
10K_0402_5%
OCP#
1
2
R949 10K_0402_5%
EC_SWI#
PAD
GPIO20
1
2
8.2K_0402_5%
1
2
8.2K_0402_5%
@ R307
(30)
CR_WAKE#
SMBCLK
SMBDATA
LINKALERT#/GPIO60/CLGPIO4
SMLINK0
SMLINK1
SMB
+3VS
GPIO18
G16
A13
E17
C17
B18
Clocks
CLKREQ#_C
@
R305
ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
ME_EC_CLK1
ME_EC_DATA1
(15,22,28) ICH_SMBCLK
(15,22,28) ICH_SMBDATA
THERM_SCI#
CLK_48M_ICH
PCI-Express
@ R301
U6C
R300
2 2.2K_0402_5%
2 2.2K_0402_5%
SPI
@ R297
SYS GPIO
Power MGT
R296
D
MISC
GPIO
Controller Link
R294
@R295
@
R295
GPIO39
@R291
@
R291
R287 1
R289 1
+3VALW
PM_CLKRUN#
@R290
@
R290
R288
R286
SIRQ
1
2
10K_0402_5%
1
2
8.2K_0402_5%
1
2
10K_0402_5%
1
2
8.2K_0402_5%
1
2
10K_0402_5%
1
2
8.2K_0402_5%
1
2
8.2K_0402_5%
1
2
8.2K_0402_5%
1
2
10K_0402_5%
1
2
8.2K_0402_5%
+3VS
Sheet
20
of
42
+RTCVCC
C276
C277
2
2
2
<BOM Structure>
<BOM Structure>
<BOM Structure>
10U_0805_10V4Z
2.2U_0603_6.3V4Z
D11
CH751H-40PT_SOD323-2
100_0402_5%
SD028100080
ICH_V5REF_RUN
1
20 mils
C281
2
1
C293
10U_0805_10V4Z
1U_0603_10V4Z
AC16
AD15
AD16
AE15
AF15
AG15
AH15
AJ15
+1.5VS
C294
2
1U_0603_10V4Z
<BOM Structure>
<BOM Structure>
C299
0.1U_0402_16V4Z
C300
0.1U_0402_16V4Z
+1.5VS
R346 0_0603_5%
2
C303
2.2U_0603_6.3V4Z
10U_0805_10V4Z
VCC1_5_A[17]
AC18
AC19
VCC1_5_A[18]
VCC1_5_A[19]
AC21
VCC1_5_A[20]
G10
G9
VCC1_5_A[21]
VCC1_5_A[22]
VCC_LAN1_05_INT_ICH_1
VCC_LAN1_05_INT_ICH_2
+3VS_VCCLAN
+3VS
2
0316 change design
VCC1_5_A[23]
VCC1_5_A[24]
VCC1_5_A[25]
11mA
11mA
AJ5
VCCUSBPLL
VCC1_5_A[26]
VCC1_5_A[27]
VCC1_5_A[28]
VCC1_5_A[29]
VCC1_5_A[30]
A10
A11
VCCLAN1_05[1]
VCCLAN1_05[2]
A12
B12
A26
C288
VCCLAN3_3[1]
T55
T56
VCCSUS1_5[1]
AD8 VCCSUS1_5_ICH_1
VCCSUS1_5[2]
F18
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
A18
D16
D17
E22
0.1U_0402_16V4Z
R964 0_0402_5%
0.1U_0402_16V4Z
1 R966 0_0402_5%
2
R965 0_0402_5%
1
2
1
R967
0_0402_5%
C290
1
2
+3VALW
@
1
2
+1.5V
C291
2
@
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCCL1_05
G22
VCCCL1_5
19/73/73mA
G23
VCCCL3_3[1]
VCCCL3_3[2]
A24
B24
+3VS
+1.5VS
2
T57
0.1U_0402_16V4Z
1
T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7
C479
VCCSUS1_5_ICH_2
212mA
AF1
(DMI)
+VCCHDA
+VCCSUSHDA
0.1U_0402_16V4Z 1
AC8
F17
VCCSUS3_3[5]
T58
C480
0.1U_0402_16V4Z
+3VALW
C298
4.7U_0603_6.3V6M
VCCCL1_05_ICH
1
+3VS
1 @
C301
1U_0603_10V4Z
C481
0.1U_0402_16V4Z
19/78/78mA
VCCGLANPLL
80mA
VCCGLAN1_5[1]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]
1mA
VCCLAN3_3[2]
23mA
0.1U_0402_16V4Z
AJ4
AJ3
+3VALW
AA7
AB6
AB7
AC6
AC7
+1.5VS_VCCGLANPLL
A27
R347
1
2+1.5VS_VCCGLAND28
+1.5VS
D29
0_0603_5% 1
E26
1
C304
E27
+3VS
GLAN POWER
0.1U_0402_16V4Z
C302
AC9
VCCSUS1_05[1]
VCCSUS1_05[2]
USB CORE
T60
T61
R535 0_0603_5%
1
2
VCC1_5_A[1]
VCC1_5_A[2]
VCC1_5_A[3]
VCC1_5_A[4]
VCC1_5_A[5]
VCC1_5_A[6]
VCC1_5_A[7]
VCC1_5_A[8]
VCC1_5_A[9]
VCC1_5_A[10]
VCC1_5_A[11]
VCC1_5_A[12]
VCC1_5_A[13]
VCC1_5_A[14]
VCC1_5_A[15]
VCC1_5_A[16]
AC12
AC13
AC14
+1.5VS
+3VS
11mA
AC11
AD11
AE11
AF11
AG10
AG11
AH10
AJ10
VCC3_3[9]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]
VCCSUSHDA
1342mA
+1.5VS
B9
F9
G3
G6
J2
J7
K7
11mA
47mA
ATX
1U_0603_10V4Z
308mA
VCC3_3[8]
+3VS
C295
C297
AD19
AF20
AG24
AC20
+VCCP
0.1U_0402_16V4Z
C296
+1.5VS
VCCSATAPLL
AC10
VCC3_3[3]
VCC3_3[4]
VCC3_3[5]
VCC3_3[6]
VCCHDA
ARX
C292
AJ19
VCC3_3[7]
C284
1
2
MBK1608301YZF_0603
VCC3_3[2]
AJ6
C280
C283
+1.5VS
AG29
+VCCP
1
0.1U_0402_16V4Z
R345
VCC3_3[1]
2mA
10U_0805_10V4Z
C282
C289
1U_0402_6.3V4Z
2 SE100105Z80
AB23
AC23
2
<BOM Structure>
<BOM Structure>
0.1U_0402_16V4Z
V_CPU_IO[1]
V_CPU_IO[2]
+1.5VS
C287
20 mils
SD028100080
48mA
C286
ICH_V5REF_SUS
W23
Y23
0.01U_0402_16V7K
+1.5VS_VCCDMIPLL R342 1
2
MBK1608301YZF_0603
1
1
C278
C279
0.1U_0402_16V4Z
CH751H-40PT_SOD323-2
R29
VCC_DMI[1]
VCC_DMI[2]
C285
R344
100_0402_5%
C
VCCDMIPLL
23mA
0.1U_0402_16V4Z
D12
646mA
0.1U_0402_16V4Z
+3VALW
VCC1_5_B[1]
VCC1_5_B[2]
VCC1_5_B[3]
VCC1_5_B[4]
VCC1_5_B[5]
VCC1_5_B[6]
VCC1_5_B[7]
VCC1_5_B[8]
VCC1_5_B[9]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
VCC1_5_B[47]
VCC1_5_B[48]
VCC1_5_B[49]
VCCA3GP
+5VALW
VCC1_05[3]
VCC1_05[4]
VCC1_05[5]
VCC1_05[6]
VCC1_05[7]
VCC1_05[8]
VCC1_05[9]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]
AA26
AA27
AA3
AA6
AB1
AA23
AB28
AB29
AB4
AB5
AC17
AC26
AC27
AC3
AD1
AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29
AD4
AD5
AD6
AD7
AD9
AE12
AE13
AE14
AE16
AE17
AE2
AE20
AE24
AE3
AE4
AE6
AE9
AF13
AF16
AF18
AF22
AH26
AF26
AF27
AF5
AF7
AF9
AG13
AG16
AG18
AG20
AG23
AG3
AG6
AG9
AH12
AH14
AH17
AH19
AH2
AH22
AH25
AH28
AH5
AH8
AJ12
AJ14
AJ17
AJ8
B11
B14
B17
B2
B20
B23
B5
B8
C26
C27
E11
E14
E18
E2
E21
E24
E5
E8
F16
F28
F29
G12
G14
G18
G21
G24
G26
G27
G8
H2
H23
H28
H29
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1
1
C272
C273
4.7U_0603_6.3V6M
1U_0402_6.3V4Z
2 SE100105Z80
2mA
CORE
C275
10U_0805_10V4Z
V5REF_SUS
VCCP_CORE
AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29
F25
G25
H24
H25
J24
J25
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
U25
V24
V25
U23
W24
W25
K23
Y24
Y25
V5REF
PCI
AE1
A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
VCC1_05[1]
1634mA
VCC1_05[2]
2mA
VCCPSUS
ICH_V5REF_SUS
G3: 6uA
VCCRTC
VCCPUSB
1
R343
A6
1
C274
220U_D2_4VM_R15
+3VS
ICH_V5REF_RUN
22U_0805_6.3VAM
+5VS
40 mils
<BOM Structure>
+1.5VS
A23
C271
0.1U_0402_16V4Z
C270
0.1U_0402_16V4Z
R341
1
2
0_0805_5%
U6E
U6F
20 mils
+VCCP
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25
VSS_NCTF[1]
VSS_NCTF[2]
VSS_NCTF[3]
VSS_NCTF[4]
VSS_NCTF[5]
VSS_NCTF[6]
VSS_NCTF[7]
VSS_NCTF[8]
VSS_NCTF[9]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]
A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29
VCCGLAN3_3
2
C305
ICH9M REV 1.0
4.7U_0805_10V4Z
2007/09/29
Issued Date
Security Classification
2007/09/29
Deciphered Date
Title
SCHEMATICS,MB A4271
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
401556
Date:
Sheet
21
of
42
HDD Connector
CD-ROM Connector
JSATA1
1
C312
1
C313
2
0.1U_0402_16V4Z
GND
A+
AGND
BB+
GND
C314
0.1U_0402_16V4Z
C311
10U_0805_10V4Z
+5VS
2
2
0.1U_0402_16V4Z
@ C321
2
2
2
1000P_0402_50V7K 1U_0603_10V4Z
23
24
+3VS_HDD1
1
+5VS
1
C326
@C320
@
C320
JSATA2
10U_0805_10V4Z
@C319
@
C319
+5VS
SATA_RXN0_C (19)
SATA_RXP0_C (19)
1U_0603_10V4Z
+3VS_HDD1
0.1U_0402_16V4Z
1
1 C306 SATA_RXN0_C
1 C315 SATA_RXP0_C
C325
0.01U_0402_16V7K
SATA_RXN0
2
SATA_RXP0
2
0.01U_0402_16V7K
SATA_TXP0 (19)
SATA_TXN0 (19)
C324
+3VS
@ R3480_0805_5%
@R3480_0805_5%
2
1
VCC3.3
VCC3.3
VCC3.3
GND
GND
GND
VCC5
VCC5
VCC5
GND
RESERVED
GND
G1
VCC12
G2
VCC12
VCC12
SATA_TXP0
SATA_TXN0
0.1U_0402_16V4Z
S1
S2
S3
S4
S5
S6
S7
C327
10U_0805_10V4Z
15
14
GND
GND
GND
A+
AGND
BB+
GND
1
2
3
4
5
6
7
DP
+5V
+5V
MD
GND
GND
8
9
10
11
12
13
SATA_TXP4
SATA_TXN4
0.01U_0402_16V7K
SATA_RXN4
2
SATA_RXP4
2
0.01U_0402_16V7K
SATA_TXP4 (19)
SATA_TXN4 (19)
1 C322 SATA_RXN4_C
1 C323 SATA_RXP4_C
SATA_RXN4_C (19)
SATA_RXP4_C (19)
+5VS
OCTEK_0709015-SD001_RV
CONN@
OCTEK_SAT-22SB1_REVERS
CONN@
+3VS_WLAN
R415 1
R414 1
+3VS_WLAN
2 0_1206_5%
+3VS
2 0_1206_5%
+3VALW
+1.5VS
C686
4.7U_0805_10V4Z
C687
0.1U_0402_16V4Z
+3VS
C688
4.7U_0805_10V4Z
C689
0.1U_0402_16V4Z
C690
0.1U_0402_16V4Z
C691
0.1U_0402_16V4Z
JMINI1
ICH_PCIE_WAKE#
(20,28) ICH_PCIE_WAKE#
(31) WLAN_BT_DATA
(31) WLAN_BT_CLK
(15) MCARD_CLKREQ#
R572 1
@
2 0_0402_5%
WLAN_BT_DATA
WLAN_BT_CLK
(15) CLK_PCIE_MCARD1#
(15) CLK_PCIE_MCARD1
(20)
(20)
PCIE_RXN4
PCIE_RXP4
(20)
(20)
PCIE_TXN4
PCIE_TXP4
+3VS_WLAN
UTX
URX
1
3
5
7
9
11
13
15
2
4
6
8
10
12
14
16
2
4
6
8
10
12
14
16
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
+3VS_WLAN
+1.5VS
WL_OFF#
PLT_RST#
R573 1
R654 1
53
54
55
56
2 0_0603_5%
2 0_0603_5%
ICH_SMBCLK
ICH_SMBDATA
WL_OFF# (30)
PLT_RST# (7,18,20,23,27)
+3VS_WLAN
+3VALW
ICH_SMBCLK (15,20,28)
ICH_SMBDATA (15,20,28)
USB20_N7 (20)
USB20_P7 (20)
(MINI1_LED#)
G1
G2
G3
G3
(30)
(30)
UTX
URX
1
3
5
7
9
11
13
15
FOX_AS0B226-S99N-7F
CONN@
MINI1_LED# (32)
R998
1
(9~16mA)
2
+3VS
10K_0402_5%
@
2007/09/29
Issued Date
Security Classification
2007/09/29
Deciphered Date
Title
SCHEMATICS,MB A4271
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
401556
Date:
Sheet
22
of
42
C
1
1
1
8
r
o
f
A
dm
a
0
e
0
B3
e
k
o
h
c
H
u
7
.
4
+3V_LAN
KC FBM-L11-201209-221LMAT_0805
60mil
1
2
L62
1
1
1
1
1
1
C937 +
C806
C807
C808
C809
C936
150U_D2_6.3VM
@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VALW
+LAN_AVDD12
L55
8111C@
4.7UH_1008HC-472EJFS-A_5%_1008
1
2
40mil
C810
2007/12/07
C811
C812
10U_0805_10V4Z
2
2
2
10U_0805_10V4Z
0.1U_0402_16V4Z
1
40mil
SROUT12
C813
C814
C815
20mil
C816
C873
C874
C818
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
+1.2V_LAN
EMI
1
C817
2
1 LAN_PME#
R890
100K_0402_5%
+LAN_EVDD12
L56
MBK1608121YZF_0603
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
@
@
@
R891
KC FBM-L11-201209-221LMAT_0805
8111C@
SM010014520
+3V_LAN
LAN RTL8111C/8102E
40mil
C823
C824
C825
C826
C827
C829
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R894
3.6K_0402_5%
1
2
U42
2 0.1U_0402_16V7K
PCIE_PTX_IRX_P3
29
HSOP
C828 1
2 0.1U_0402_16V7K
PCIE_PTX_IRX_N3
30
HSON
23
HSIP
GLAN_TXN
24
HSIN
33
CLKREQB
(15) CLK_PCIE_LAN
26
REFCLK_P
(15) CLK_PCIE_LAN#
27
REFCLK_N
20
PERSTB
R895 1
(7,18,20,22,27) PLT_RST#
2 0_0402_5% LAN_RESET#
switching 1.2V
ouput for 8111c
SROUT12
SROUT12
FB12
ENSR
62
ENSR
2 2.49K_0402_1%
64
RSET
+LAN_AVDD12
R896 1 8111C@ 2 0_0603_5%
+3V_LAN
R897 1
R898 1
2 0_0402_5%
LAN_PME#
19
LANWAKEB
ISOLATEB
36
ISOLATEB
1.2V
B
LAN_X1
Y6
LAN_X1
1
LAN_X2
2
LAN_X2
60
54
55
56
57
LAN_LINK#
LAN_ACTIVITY#
MDIP0
MDIN0
MDIP1
MDIN1
MDIP2
MDIN2
MDIP3
MDIN3
3
4
6
7
9
10
12
13
LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1LAN_MDI2+
LAN_MDI2LAN_MDI3+
LAN_MDI3-
DVDD12
DVDD12
DVDD12
DVDD12
DVDD12
DVDD12
21
32
38
43
49
52
+1.2V_LAN
EVDD12
EVDD12
22
28
+LAN_EVDD12
61
CKTAL2
65
EXPOSE_PAD
VDD33
VDD33
VDD33
VDD33
C832
27P_0402_50V8J
C833
27P_0402_50V8J
2
25
31
+1.2V_LAN
+3VS
2 0_0402_5%
15
17
18
34
35
39
40
41
42
EGND
NC
NC
NC
NC
NC
NC
NC
NC
NC
+3V_LAN
VDDSR
63
3.3V
2
59
1.2V
AVDD12
AVDD12
AVDD12
AVDD12
8
11
14
58
+3V_LAN
40mil
+VDDSR
1
C820
8111C@
0.1U_0402_16V4Z
2
+LAN_AVDD12
+AVDD33
50
51
48
47
D_LAN_MDI0+
D_LAN_MDI0-
A1
2B1
3B1
43
42
D_LAN_MDI1+
D_LAN_MDI1-
A2
4B1
5B1
37
36
D_LAN_MDI2+
D_LAN_MDI2-
LAN_MDI1-
A3
6B1
7B1
32
31
D_LAN_MDI3+
D_LAN_MDI3-
LAN_MDI2+
11
A4
12
A5
0LED1
1LED1
2LED1
D_LAN_ACTIVITY#
D_LAN_LINK#
LAN_MDI2-
22
23
52
LAN_MDI3+
14
A6
0B2
1B2
46
45
L_LAN_MDI0+
L_LAN_MDI0-
LAN_MDI3-
15
A7
2B2
3B2
41
40
L_LAN_MDI1+
L_LAN_MDI1-
17
SEL
4B2
5B2
35
34
L_LAN_MDI2+
L_LAN_MDI2-
6B2
7B2
30
29
L_LAN_MDI3+
L_LAN_MDI3-
0LED2
1LED2
2LED2
25
26
51
L_LAN_ACTIVITY#
L_LAN_LINK#
LAN_MDI0-
LAN_MDI1+
EMI
R892
FBMA-L10-160808-301LMT_0603
8111C@
SM010017710
C821
8111C@
10U_0805_10V4Z
+1.2V_LAN
(16,30) EC_DOCKIN#
IGPIO
OGPIO
EC_DOCKIN#
A0
+3V_LAN
1
2
R974
15K_0402_1%
@
LAN_ACTIVITY#
LAN_LINK#
EMI
R899
FBMA-L10-201209-301LMT_0805
19
20
54
5
NOTE:
SM010018010
L : A-->B1
H: A-->B2
57
LED0
LED1
LED2
NC
C834
0.1U_0402_16V4Z
D_LAN_MDI0+ (24)
D_LAN_MDI0- (24)
D_LAN_MDI1+ (24)
D_LAN_MDI1- (24)
D_LAN_MDI2+ (24)
D_LAN_MDI2- (24)
D_LAN_MDI3+ (24)
D_LAN_MDI3- (24)
D_LAN_ACTIVITY# (24)
D_LAN_LINK# (24)
L_LAN_MDI0+ (24)
L_LAN_MDI0- (24)
L_LAN_MDI1+ (24)
L_LAN_MDI1- (24)
L_LAN_MDI2+ (24)
L_LAN_MDI2- (24)
L_LAN_MDI3+ (24)
L_LAN_MDI3- (24)
L_LAN_ACTIVITY# (24)
L_LAN_LINK# (24)
PAD_GND
+AVDD33
C835
ISOLATEB
U34
PI3L500-AZFEX_TQFN56_11X5
0B1
1B1
LAN_MDI0+
+3V_LAN
1
2
C831
0.1U_0402_16V4Z
+3V_LAN
RTL8111C-GR_QFN64_9X9
8111C@
R900
1K_0402_1%
16
37
46
53
AVDD33
AVDD33
EGND
R934
1
5
6
7
8
CKTAL1
3.3V
25MHZ_20P
GND
NC
NC
VCC
AT93C46-10SI-2.7_SO8
SA000019910
1.2V
(30) EC_LAN_PME#
LED3
LED2
LED1
LED0
DO
DI
SK
CS
1
6
9
13
16
21
24
28
33
39
44
49
53
55
GLAN_TXN
4
3
2
1
GLAN_TXP
(20)
45
47
48
44
(20)
GLAN_TXP
LAN_DO
LAN_DI
LAN_SK
LAN_CS
EEDO
EEDI/AUX
EESK
EECS
56
50
38
27
18
10
4
C830 1
GLAN_RXN
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
GLAN_RXP
(20)
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
(20)
+3V_LAN
U41
0.1U_0402_16V4Z
R901
15K_0402_1%
2
Security Classification
Issued Date
2007/09/29
2007/09/29
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
401556
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Tuesday, April 29, 2008
Date:
5
Rev
B
Sheet
1
23
of
42
VIN_DOCK
(17) DVI_TXC-
DVI_TXC-
1
R954
C869 1800P_0402_50V7K
1
2
JDOCK1
DVI_R_TXC+
DVI_R_TXCD
DVI_R_TXD0+
DVI_R_TXD0DVI_R_TXD1+
DVI_R_TXD1DVI_R_TXD2+
DVI_R_TXD2D_CRT_R
(16) D_CRT_R
D_CRT_G
(16) D_CRT_G
D_CRT_B
(16) D_CRT_B
1K_0402_5%
R916 1
(17) DVI_DET
(17) DVI_SDATA
(17) DVI_SCLK
(16) D_VSYNC
(16) D_HSYNC
(16) D_DDC_CLK
(16) D_DDC_DATA
GND
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
GND
DVI_CLK
DVI_CLK#
GND
DVI_TX0
DVI_TX0#
GND
DVI_TX1
DVI_TX1#
GND
DVI_TX2
DVI_TX2#
GND
VGA_R
GND
VGA_G
GND
VGA_B
GND
20
21
22
23
24
25
26
27
28
29
30
31
32
DOCK_DT2#
HP_L
HP_R
HP_DT#
GNDA
DVI_DT
DVI_DCDT
DVI_DDCCK
VGA_VS
VGA_HS
VGA_DDCCK
VGA_DDCDT
5V_S0
69
70
71
GND
GND
GND
+5VS
P3 46
(67) 47
48
33 49
34 50
35 51
36 52
37 53
38 54
39 55
40 56
41 57
42 58
43 59
44 60
45 61
62
P4 63
(68) 64
1
P1
2 (65)
3
4
20
5
21
6
22
7
23
24
8
9
25
10 26
11 27
12 28
13 29
14 30
15 31
16 32
17
18 P2
19 (66)
D_HPOUT_L
D_HPOUT_R
D_HP_PLUG#
D_GNDA
DVI_DET
DVI_SDATA
DVI_SCLK
D_VSYNC
D_HSYNC
D_DDC_CLK
D_DDC_DATA
(26) D_HPOUT_L
(26) D_HPOUT_R
(25) D_HP_PLUG#
ACER DOCK
Normal
65
66
DVI_R_TXC-
2
0_0402_5%
@ WCM-2012-900T_0805
4
1
L57
+5VALW
19V_5A
5V_USB_3A
67
68
LIN_IN_DT#
LIN_IN_L
LIN_IN_R
MIC_DT#
MIC_L
MIC_R
GNDA
DOCK_DT1#
SPDIF
GND
LAN_2
LAN_2#
GND
33
34
35
36
37
38
39
40
41
42
43
44
45
GND
USB
USB#
USB_EN#
RESERVED
VGA_DT#
LAN_PWR
LAN_ACT
LAN_LINK
GND
LAN_0
LAN_0#
GND
LAN_1
LAN_1#
GND
LAN_3
LAN_3#
GND
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
GND
GND
GND
72
73
74
D_LINEIN_PLUG#
D_LINEIN_PLUG# (25)
D_LINE_L
D_LINE_L (26)
D_LINE_R
D_LINE_R (26)
MIC_PLUG#
MIC_PLUG# (25,26)
D_MIC1_L
D_MIC1_L (26)
D_MIC1_R
D_MIC1_R (26)
D_GNDA2 R886
1 0_0603_5%
DOCKIN#
DOCKIN# (30)
SPDIF
SPDIF
(25,26)
D_LAN_MDI2+
D_LAN_MDI2-
(17) DVI_TXC+
DVI_TXC+
1
R955
2
0_0402_5%
DVI_R_TXC+
DVI_TXD0-
1
R956
2
0_0402_5%
DVI_R_TXD0-
(17) DVI_TXD0-
@ WCM-2012-900T_0805
D_LAN_MDI2+ (23)
D_LAN_MDI2- (23)
(17) DVI_TXD0+
USB20_P8
USB20_N8
DVI_TXD0+
D_CRT_DET# (20)
D_LAN_ACTIVITY#
D_LAN_LINK#
(17) DVI_TXD1-
1
L58
1
R957
USB20_P8 (20)
USB20_N8 (20)
SYSON# (28,33,39)
D_CRT_DET#
DVI_TXD1-
1
R958
2007/12/07
D_LAN_ACTIVITY# (23)
D_LAN_LINK# (23)
D_LAN_MDI0+
D_LAN_MDI0-
1
L59
D_LAN_MDI1+ (23)
D_LAN_MDI1- (23)
D_LAN_MDI3+
D_LAN_MDI3-
D_LAN_MDI3+ (23)
D_LAN_MDI3- (23)
DVI_R_TXD1-
2
0_0402_5%
@ WCM-2012-900T_0805
D_LAN_MDI0+ (23)
D_LAN_MDI0- (23)
D_LAN_MDI1+
D_LAN_MDI1-
DVI_R_TXD0+
2
0_0402_5%
(17) DVI_TXD1+
DVI_TXD1+
1
R959
DVI_R_TXD1+
2
0_0402_5%
(17) DVI_TXD2-
DVI_TXD2-
1
R960
DVI_R_TXD2-
2
0_0402_5%
@ WCM-2012-900T_0805
JAE_SP07-10207-22
CONN@
(17) DVI_TXD2+
DVI_TXD2+
1
L60
1
R961
DVI_R_TXD2+
2
0_0402_5%
EMI
C939
2
220P_0402_50V7K
1
LAN Conn.
JRJ45
R999
+3V_LAN
T104
(23) L_LAN_MDI0+
(23) L_LAN_MDI0-
1
2
3
4
5
6
7
8
9
10
11
12
L_LAN_MDI0+
L_LAN_MDI0-
(23) L_LAN_MDI1+
(23) L_LAN_MDI1-
L_LAN_MDI1+
L_LAN_MDI1-
(23) L_LAN_MDI2+
(23) L_LAN_MDI2-
L_LAN_MDI2+
L_LAN_MDI2-
(23) L_LAN_MDI3+
(23) L_LAN_MDI3-
L_LAN_MDI3+
L_LAN_MDI3-
TCT1
TD1+
TD1TCT2
TD2+
TD2TCT3
TD3+
TD3TCT4
TD4+
TD4-
MCT1
MX1+
MX1MCT2
MX2+
MX2MCT3
MX3+
MX3MCT4
MX4+
MX4-
24
23
22
21
20
19
18
17
16
15
14
13
RJ45_MIDI0+
RJ45_MIDI0-
L_LAN_ACTIVITY#
2
C940
(23) L_LAN_ACTIVITY#
12
1 300_0402_5%
Amber LED+
11
Amber LED-
RJ45_MIDI3-
68P_0402_50V8J
RJ45_MIDI1+
RJ45_MIDI1-
RJ45_MIDI2+
RJ45_MIDI2RJ45_MIDI3+
RJ45_MIDI3-
PR4+
RJ45_MIDI1-
PR2-
RJ45_MIDI2-
PR3-
RJ45_MIDI2+
PR3+
RJ45_MIDI1+
PR2+
RJ45_MIDI0-
PR1-
RJ45_MIDI0+
PR1+
(23) L_LAN_LINK#
C837
0.1U_0402_16V4Z
2
2
C838
C839
0.1U_0402_16V4Z
2
R904
75_0402_1%
R905
75_0402_1%
RJ45_GND
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2 R146
+3V_LAN
C941
2
2
68P_0402_50V8J
C836
R903
75_0402_1%
2
R902
75_0402_1%
40mil
1 300_0402_5%
16
SHLD1
15
SHLD2
14
SHLD1
10
Green LED-
13
Green LED+
220P_0402_50V7K 2
C228 FOX_JM36113-L2R8-7F
1
RJ45_LANGND
LANGND
1
2CONN@
C942
1
1
1000P_1206_2KV7K
C226
C227
0.1U_0402_16V4Z
4.7U_0805_10V4Z
R574
FBMA-L10-160808-301LMT_0603
2
2
L_LAN_LINK#
SHLD2
PR4-
RJ45_MIDI3+
350uH_GSL5009LF
SP050003T10
EMI
Security Classification
2007/09/29
Issued Date
2007/09/29
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
B
401556
Sheet
24
of
42
HD Audio Codec
+AVDD_AC97
C709
C720
2
MIC1_L
(26)
MIC1_R
MIC1_L
2 R930
MIC1_R
2 R931
C730
1
1
2
75_0603_1%
1
1
2
75_0603_1%
C731
NC
LINE_OUT_R
36
AMP_RIGHT
HP_OUT_L
39
AMP_LEFT_HP
AMP_RIGHT_HP
NC
45
24
LINE1_R
DMIC_CLK
46
18
CD_L
NC
43
20
CD_R
NC
44
19
CD_GND
MIC1_C_L
21
MIC1_L
MIC1_C_R
22
MIC1_R
MONO_IN
12
PCBEEP
11
RESET#
(19) HDA_SDOUT_CODEC
HDA_GPIO0
HDA_GPIO3
SENSE_A
SENSE_B
CODEC_EAPD
(30) CODEC_EAPD
SPDIF
DMIC_DATA_R
(24,26)
SPDIF
R923
1
2 0_0402_5%
888VC@
2
DMIC_DATA
SDATA_IN
MONO_OUT
29
GPIO1
31
MIC1_VREFO_L
28
SDATA_OUT
2
3
13
34
GPIO0
GPIO3
SENSE A
SENSE B
47
EAPD
48
SPDIFO
4
7
DVSS1
DVSS2
C724 1
1U_0402_6.3V4Z
<BOM Structure>
SB_SPKR
AMP_LEFT_HP (26)
R589
1
2
560_0402_5%
C723
1
2
Q55
2
B
E
MONO_IN
1U_0402_6.3V4Z
1 Structure>2
<BOM
R587
1
2
560_0402_5%
R590 2.4K_0402_1%
2SC2411K_SOT23
AMP_RIGHT_HP (26)
DMIC_CLK
HDA_BITCLK_CODEC
1
R594
2
33_0402_5%
D47
R592
10K_0402_5%
C728
10P_0402_50V8J
R59310_0402_5%
1
1
2
HDA_BITCLK_CODEC
RB751V_SOD323
(19)
HDA_SDIN0 (19)
MIC1_VREFO_R
32
MIC2_VREFO
30
VREF
27
JDREF
40
NC
33
AVSS1
AVSS2
26
42
DMIC Conn.
2
JP41
10mil
10mil
6
5
4
3
2
1
+MIC1_VREFO_L
L35
MBK1608121YZF_0603 DMIC_CLK
1
2
DMIC_DATA
+MIC1_VREFO_R
ACZ_VREF
+3VS
10mil
ACZ_JDREF 20K_0402_1%
SENSE C
G2
G1
4
3
2
1
ACES_85204-04001
CONN@
C732
ALC888S-VB_LQFP48
R599
0_0603_5%
268@
(20)
AMP_RIGHT (26)
2
1U_0402_6.3V4Z
<BOM Structure>
37
LINE1_VREFO
SYNC
C722 1
1U_0402_6.3V4Z
<BOM Structure>
BEEP#
PCI Beep
AMP_LEFT (26)
268@
20_0603_5%1
R591
BIT_CLK
EC Beep
(30)
10U_0805_10V4Z
1
C733
1
1
C734
C735
0.1U_0402_16V4Z
100P_0402_50V8J
2
2
2
0.1U_0402_16V4Z
DMIC_DATA
DMIC_CLK
D27
PSOT24C-LF-T7_SOT23-3
SA000026V00
888VC@
R604
0_0603_5%
888VB@
MIC2_L
HP_OUT_R
(19) HDA_SYNC_CODEC
1
1
15
10
1
C721
R588
10K_0402_5%
AMP_LEFT
LINE1_L
4.7U_0805_6.3V6K
35
MIC2_R
(19) HDA_RST#_CODEC
2
LINE_OUT_L
23
4.7U_0805_6.3V6K
100P_0402_50V8J
10U_0805_10V4Z
NC
41
C725
(26)
0.1U_0402_16V4Z 680P_0402_50V7K
L61
MBK1608121YZF_0603
1
2
+1.5VS
C872
@
1
2
@
17
LINE_C_L
4.7U_0805_6.3V6K
LINE_C_R
4.7U_0805_6.3V6K
C718
LINE_R
1
75_0603_1%
LINE_R 2
1
R929 75_0603_1%
R586
10K_0402_5%
1
C719
(26)
LINE_L 2 R928
1 10U_0805_10V4Z
C716
C717
LINE_L
1
C715
14
16
(26)
DVDD
AVDD1
U27
38
@
@
2
100P_0402_50V8J
2
0.1U_0402_16V4Z
25
AVDD2
10U_0805_10V4Z 2
R968
1
0_0805_5%C714
20mil
2
C713
L34
1
2
+3VS
FBM-L11-160808-800LMT_0603
680P_0402_50V7K
C712
0.1U_0402_16V4Z
C711
+3VS_DVDD
40mil
680P_0402_50V7K
0.1U_0402_16V4Z
1
1
C710
DVDD_IO
L33 1
2
FBM-L11-160808-800LMT_0603
+VDDA
+VDDA
EMI
1 39.2K_0402_1%
2 10K_0402_1%
1 20K_0402_1%
SENSE_A
DMIC_DATA
DMIC_CLK
R924
1
R925
1
DMIC_DATA
1
R926
DMIC_CLK
1
R927
From Docking
HP_PLUG#
2 0_0402_5%
2 0_0402_5% LINEIN_PLUG#
SENSE B
39.2K
20K
10K
5.1K
KC FBM-L11-201209-221LMAT_0805
C740
C741
2
0_0603_5%
2
@ 0_0805_5%
SENSE C
39.2K
CD
20K
10K
5.1K
S/PDIF-IN
VIN
DELAY
ERROR
SENSE or ADJ
CNOISE
GND
SD
SI9182DH-AD_MSOP8
SA091820030
R610
69.8K_0603_1%
R611
24K _0402_1%
@
0_0402_5%
2007/09/29
Issued Date
Security Classification
2007/09/29
Deciphered Date
Title
SCHEMATICS,MB A4271
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
401556
Date:
VOUT
+VDDA
R612
2
(28,30,33,39) SUSP#
2007/12/07
1
R613
1
R614
+VDDA
U29
2
4.7U_0805_10V4Z
Adjustable Output
+5VS_VDDA
L38
1
C742
5.1K
+5VS
10K
20K
0.1U_0402_16V4Z
C743
SENSE A
Codec Signals
39.2K
Impedance
R609
Sense Pin
0.1U_0402_16V4Z
R606 1
R607 1
(24) D_HP_PLUG#
(24) D_LINEIN_PLUG#
HDA_GPIO0
2
268@
0_0402_5%
2
888VB@
0_0402_5%
HDA_GPIO3
2
888VB@
0_0402_5%
2
888VC@ FBMA-L10-160808-301LMT_0603
0_0402_5% 2
R601 2
R602 1
R603 2
4.7U_0805_10V4Z
(26) HP_PLUG#
(26) LINEIN_PLUG#
(24,26) MIC_PLUG#
Sheet
25
of
42
INTSPK_L1
INTSPK_L2
17
18
HP_R
HP_L
HP_R
HP_L
INR_H
INL_H
/SD
CVSS
15
VSS
16
GND
PGND
PGND
CGND
GND1
2
23
7
13
29
BEEP
CP+
CPBIAS
SPDIF_PLUG#
CVSS
2
G
Q40
Q39
AO3413_SOT23-3
2
G
Q38
8
9
LOUT+
LOUT-
HP EN
/AMP EN
HP_PLUG# (25)
2N7002_SOT23
2N7002_SOT23
+5VSPDIF
1
C757
1U_0603_10V6K
GND2
GND1
4
3
2
1
JP43
HP_PLUG#
R626
100K_0402_5%
R625
100K_0402_5%
1 1
INTSPK_R1
INTSPK_R2
22
21
D60
C760
1
HP_R
HPOUT_L_1
2
56.2_0603_1%
HPOUT_R_1
2
56.2_0603_1%
HPOUT_L_2
2
FBM-11-160808-700T_0603
HPOUT_R_2
2
FBM-11-160808-700T_0603
1
L41
1
L42
1
5
Docking Conn
VOL_AMP
1
R635
2 EC_MUTE
G
Q41
2N7002_SOT23
R637
1
22.6K_0402_1%
S
C761
2
0.01U_0402_16V7K
1
R633
1
R634
D_HPOUT_L
D_HPOUT_R
(24) D_HPOUT_L
(24) D_HPOUT_R
EC_MUTE (30)
PJDLC05_SOT23~D
JHP1
6
4
0.1U_0402_16V4Z
HP_L
@
1
2
3
C950
330P_0402_50V7K 330P_0402_50V7K
1
1
R631
10K_0402_5%
6
5
4
3
2
1
SPK_RSPK_R+
SPK_LSPK_L+
+5VALW
1
VDD
19
11
20
10
PVDD
PVDD
+5VALW
ROUT+
ROUT-
APA2056_TSSOP28
SA00001QD00
+5VALW
0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%
U30
INR_A
INL_A
30ms
2
2
2
2
CONN@
AMP_R
2
1
2 AMPR
1 R622
2
0_0402_5% INR_A
1U_0402_6.3V4Z
C748 1U_0402_6.3V4Z
3
AMP_L 1
5
2
2 AMPL
1 R624
2 INL_A
1U_0402_6.3V4Z
C749 1U_0402_6.3V4Z
0_0402_5%
AMP_EN#27
R623 1
2 100K_0402_5%
100K_0402_5%
HP_EN
R627 1
24
2
+5VS
0_0402_5%1
@ 2 R950
4
1
2 AMP_RHPIN
1 R628
2 INR_H
C752
4.7U_0805_6.3V6K 39K_0402_5% INL_H
6
1
2 AMP_LHPIN
1 R629
2
C753
4.7U_0805_6.3V6K 39K_0402_5%
26
VOL_AMP
1
2
2
1 AMP_BEEP 28
C754
R630 47K_0402_5%
0.47U_0402_6.3V6K
AMP_CP+
12
AMP_CP14
1
2
C755
1U_0603_10V6K
AMP_BIAS
25
1
2
C756
2.2U_0603_10V6K
2
1
C758
0.1U_0402_16V4Z
1
1
1
1
+3VALW
HVDD
EC_MUTE
EC_HP_EN
CVDD
C747
R616
R617
R618
R619
(25) AMP_LEFT_HP
(30) EC_HP_EN
(25) AMP_RIGHT_HP
C746
1
C750
1
C751
(25) AMP_LEFT
1.5K_0402_1%
2
1.5K_0402_1%
2
10U_0805_10V4Z
C745
1U_0402_6.3V4Z
0.1U_0402_16V4Z
W=40mil
680P_0402_50V7K
2
@
L40 KC FBM-L11-201209-221LMAT_0805
C744
(25) AMP_RIGHT
INTSPK_R2
INTSPK_R1
INTSPK_L2
INTSPK_L1
KC FBM-L11-201209-221LMAT_0805
2
R620
1
R621
1
20mil
+5VALW
+5VS_VDDA
ACES_88231-04001
R636
1
1
56.2_0603_1%
2
2
56.2_0603_1%
SPDIF_PLUG#
HP_L
HP_R
+5VSPDIF
(24,25)
SPDIF
7
3
8
SPDIF
1
2
C762
SINGA_2SJ1533-000111
2
100P_0402_50V8J
CONN@
LINE-IN JACK
Docking Conn
JLINE1
(24)
(24)
D_LINE_L
D_LINE_R
D_LINE_L
D_LINE_R
R639 1
R640 1
2 0_0603_5%
2 0_0603_5%
LINE_L
LINE_R
LINEIN_PLUG#
(25) LINEIN_PLUG#
3
XRE094PHDINB1-2-12-E-7016_3P
+3VS
(24)
(24)
R642
100K_0402_5%
2
10K_0402_5%
1
C767
2
LINE_R_L
LINE_L_L
1
L44
LINE_L_R
2
FBM-11-160808-700T_0603
1
1
D_MIC1_L
D_MIC1_R
D_MIC1_L
D_MIC1_R
R656 1
R655 1
2 0_0603_5%
2 0_0603_5%
3
2
1
SINGA_2SJ-0960-C01
C764
220P_0402_50V7K
CONN@
MIC JACK
+3VS
+MIC1_VREFO_L
C766
0.1U_0402_16V4Z
1
C768
2
CD1#
D1
CP1
SD1#
Q1
Q1#
GND
VCC
CD2#
D2
CP2
SD2#
Q2
Q2#
R645
2.2K_0402_5%
14
13
12
11
10
09
08
TC74LCX74FT_TSSOP14
ENCODER_DIR (30)
ENCODER_PULSE (30)
(25)
MIC1_R
(25)
MIC1_L
1
2
R1002 0_0603_5%
1
2
R1003 0_0603_5%
MIC1_R_L
MIC1_L_L
2 FBM-11-160808-700T_0603
C770
220P_0402_50V7K
2007/09/29
2007/09/29
Deciphered Date
C771
220P_0402_50V7K
Title
Date:
MIC2_L_1
2
1
SINGA_2SJ-0960-C01
CONN@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MIC2_R_1
Security Classification
MIC_PLUG# 5
4
C769
0.1U_0402_16V4Z
Issued Date
2 FBM-11-160808-700T_0603
1
L45
1
L46
(24,25) MIC_PLUG#
R647
2.2K_0402_5%
2
U33
1
2
3
4
5
6
7
NC7SZ14P5X_NL_SC70-5
JMIC1
+MIC1_VREFO_R
1
SNC00000K00
MIC1_L
MIC1_R
U32
A
3
1
R648
LINE_L
1
2
R1000 0_0603_5%
1
2
R1001 0_0603_5%
Docking Conn
2
1
5
P
3
0.01U_0402_16V7K
2
10K_0402_5%
GND
1
R646
0.01U_0402_16V7K
COM
LINE_L
LINE_R
0.1U_0402_16V4Z
R644
10K_0402_5%
2
2
A
(25)
C765
2
NC
1
4
R643
10K_0402_5%
GND
U31
LINE_R
FBM-11-160808-700T_0603
LINE_R_R
2
C763
220P_0402_50V7K
2
+3VS
+3VS
(25)
L43
1
Rev
B
401556
Sheet
26
of
42
+1.8VS_APVDD
40mil
0.1U_0402_16V4Z
1
C840
40mil
0.1U_0402_16V4Z
1
C841
1
C842
1
C843
C844
0.1U_0402_16V4Z
C845
1
C846
1
C847
+3V_MCVCC
1
C848
C867
XDWP_SDWP
0.1U_0402_16V4Z
2007/12/07
2
2
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
R906
XD_RB
0.1U_0402_16V4Z
1000P_0402_50V7K
R907
10K_0402_5%
10K_0402_5%
+3VS
XD_CLE
XDCD0#_SDCD#
1
R909
XDCD1#_MSCD#
1
R910
XD_RE
U43
(15) CLK_PCIE_READER#
(15) CLK_PCIE_READER
(20) PCIE_TXN5
(20) PCIE_TXP5
(20)
(20)
PCIE_RXN5
PCIE_RXP5
C849 1
C850 1
2
2
0.1U_0402_16V7K PCIE_C_RXN5
0.1U_0402_16V7K PCIE_C_RXP5
1
2
8.2K_0402_5%
R911
APREXT
12mil / <250mil
(7,18,20,22,23)
(20)
(20) CR_WAKE#
9
8
APRXN
APRXP
11
12
APTXN
APTXP
1
2
PLT_RST#
R970
2 0_0402_5%
PAD T110
CR_CPPE#
APCLKN
APCLKP
38
39
+3VS
D31
CH751H-40PT_SOD323-2
1
2
SEECLK
XDCD1#_MSCD#
XDCD0#_SDCD#
R908
3
4
l
i
m
0
2
>
MC_PWREN#
2
0_0805_5%
PCIES_EN
PCIES
JMB385
XRSTN
XTEST
13
14
SEEDAT
SEECLK
15
16
CR1_CD1N
CR1_CD0N
17
CR1_PCTLN
21
(32) 5IN1_LED#
5
10
30
DV33
DV33
DV33
DV18
DV18
19
20
44
18
37
MDIO0
MDIO1
MDIO2
MDIO3
MDIO4
MDIO5
MDIO6
MDIO7
MDIO8
MDIO9
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14
48
47
46
45
43
42
41
40
29
28
27
26
25
23
22
NC
NC
NC
34
35
36
APREXT
+3V_MCVCC
R460
1
APVDD
APV18
TAV33
APGND
GND
GND
GND
GND
CR1_LEDN
+1.8VS_APVDD
+3VS
10K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
+1.8VS_APVDD
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
SDCMD_MSBS_XDWE#
XDCE_SDCLK_MSCLK_R
XDWP_SDWP
XD_CLE
XD_MMC_D4
XD_MMC_D5
XD_MMC_D6
XD_MMC_D7
XD_RE
XD_RB
XD_ALE
22_0402_5%
1
2
R912
200K_0402_5%
XDCE_SDCLK_MSCLK
XD_ALE
R963
R913
200K_0402_5%
C
D55
24
31
32
33
XDCD0#_SDCD#
XDCD1#_MSCD#
XD_CD#
DAN202UT106_SC70-3
C851
<BOM Structure>
270P_0402_50V7K
JMB385-LGEZ0A_LQFP48_7X7
SA00001W910
(TOP)
JREAD1
B
+3V_MCVCC
+3V_MCVCC
2007/12/07
C853
C852
C854
0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
10U_0805_10V4Z
R914
150K_0402_5%
@
40mil
3
32
10
9
8
7
6
5
4
XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7
SDCMD_MSBS_XDWE#
XDWP_SDWP
XD_ALE
XD_CD#
XD_RB
XD_RE
XDCE_SDCLK_MSCLK
XD_CLE
34
33
35
40
39
38
37
36
XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE
11
31
7in1-GND
7in1-GND
41
42
SD-VCC
MS-VCC
21
28
SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-DAT4
SD-DAT5
SD-DAT6
SD-DAT7
20
14
12
30
29
27
23
18
16
XDCE_SDCLK_MSCLK
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XD_MMC_D4
XD_MMC_D5
XD_MMC_D6
XD_MMC_D7
SD-CD
SD-WP
SD-CMD
1
2
25
XDCD0#_SDCD#
XDWP_SDWP
SDCMD_MSBS_XDWE#
MS-SCLK
MS-BS
MS-INS
26
13
22
XDCE_SDCLK_MSCLK
SDCMD_MSBS_XDWE#
XDCD1#_MSCD#
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
17
15
19
24
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XD-VCC
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XD_MMC_D4
XD_MMC_D5
XD_MMC_D6
XD_MMC_D7
7 IN 1 CONN
+3V_MCVCC
+3V_MCVCC
7in1-GND
7in1-GND
TAITW_R015-A10-LM_NR
CONN@
Issued Date
Security Classification
2007/09/29
Deciphered Date
2007/09/29
Title
SCHEMATICS,MB A4271
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
401556
Date:
Sheet
1
27
of
42
10U_0805_10V4Z
2
C435
10U_0805_10V4Z
2
10U_0805_10V4Z
2
U24
+1.5VS
12
14
1.5Vin
1.5Vin
1.5Vout
1.5Vout
11
13
+3VS
2
4
3.3Vin
3.3Vin
3.3Vout
3.3Vout
3
5
17
+3VALW
PCI_RST#
(25,30,33,39) SUSP#
SYSON
20
SUSP#
AUX_OUT
15
OC#
19
SYSRST#
SHDN#
PERST#
C369
CP_PE#
10
(Internal Pull High to AUXIN)
CP_USB#
9
(Internal Pull High to AUXIN)
RCLKEN1
18
STBY#
NC
CPPE#
GND
C370
10U_0805_10V4Z
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C436
(20)
(20)
C437
USB20_N1
USB20_P1
CP_USB#
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z
40mil
(15,20,22) ICH_SMBCLK
(15,20,22) ICH_SMBDATA
+1.5VS_CARD
+1.5VS_CARD
60mils
(20,22) ICH_PCIE_WAKE#
+3VALW_CARD
+3VS_CARD
40mil
+3VS
PERST1#
16
R339
10K_0402_5%
CLKREQ1#
CPUSB#
RCLKEN
RCLKEN1 2
G
3
R5538D001-TR-F_QFN20_4X4
<BOM Structure>
NC7SZ32P5X_NL_SC70-5
Q15
2N7002_SOT23
PERST1#
+3VS_CARD
+3VS
+3VALW_CARD
(18,30) PCI_RST#
(30,33,38) SYSON
AUX_IN
C439
C374
R9890_0402_5% CLKREQ1#
CP_PE# 1
2 CP_PE#_R
(20) CP_PE#
(15) CLK_PCIE_CARD#
(15) CLK_PCIE_CARD
C438
0.1U_0402_16V4Z
U15
G Vcc
JEXP1
Imax = 0.75A
EXP_CLKREQ# (15)
(20)
(20)
PCIE_RXN1
PCIE_RXP1
(20)
(20)
PCIE_TXN1
PCIE_TXP1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
C375
+1.5VS_CARD
Imax = 1.35A
Imax = 0.275A
+1.5VS
+3VS
+3VS_CARD
GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PERn0
PERp0
GND
PETn0
PETp0
GND
GND1
GND2
29
30
GND3
GND4
SANTA_13181060-5_28P-T
CONN@
+5VALW
+USB_VCCA
U26
1
2
3
4
C568 0.1U_0402_16V4Z
2
1
GND
IN
IN
EN#
OUT
OUT
OUT
FLG
8
7
6
5
1
R172
100K_0402_5%
1
2
+3VALW
TPS2061DRG4_SO8
SYSON#
(24,33,39) SYSON#
C700
150U_D2_6.3VM
ON BOARD
2
JUSB1
USB_OC#4 (20)
+5VALW
(20)
(20)
+USB_VCCB
U37
OUT
OUT
OUT
FLG
8
7
6
5
TPS2061DRG4_SO8
SYSON#
USB20_P4
USB20_N4
R206
100K_0402_5%
1
2
+3VALW
GND
IN
IN
EN#
1
2
3
4
C569 0.1U_0402_16V4Z
2
1
USB20_N4
USB20_P4
USB20_N4
USB20_P4
VCC
DD+
GND
5
6
7
8
GND1
GND2
GND3
GND4
SUYIN_020173MR004G565ZR
CONN@
D17
PJDLC05_SOT23~D
USB_OC#5 (20)
1
2
3
4
+USB_VCCB
to small board
+USB_VCCD
JP50
+3VALW
JP51
+USB_VCCD
U50
ACES_85201-08051~N
1
2
3
4
C860 0.1U_0402_16V4Z
2
1
CONN@
R940
100K_0402_5%
right-up
GND
IN
IN
EN#
OUT
OUT
OUT
FLG
+3VALW
1
2
3
4
5
6
GND
GND
ACES_85201-06051
CONN@
D57
PJDLC05_SOT23~D
right-down
1
2
LID_SW#
USB20_P0
USB20_N0
R933
100K_0402_5%
1
2
CH751H-40PT_SOD323-2
D18
PJDLC05_SOT23~D
Security Classification
2007/09/29
Issued Date
2007/09/29
Deciphered Date
Title
(30)
USB20_N0
USB20_P0
(20) USB20_N0
(20) USB20_P0
USB_OC#0 (20)
USB20_N5
USB20_P5
D61
8
7
6
5
TPS2061DRG4_SO8
SYSON#
1
2
3
4
5
6
7
8
+5VALW
+3VALW
to small board
1
2
3
4
5
6
7
8
GND
GND
USB20_N5
USB20_P5
(20) USB20_N5
(20) USB20_P5
1
2
3
4
5
6
7
8
9
10
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
B
401556
Sheet
28
of
42
BIOS
+3VALW
U35
1
SPI_WP#
3
SPI_HOLD# 7
4
CE#
WP#
HOLD#
VSS
VDD
SCK
SI
SO
H1
H_3P0
8
6
5
2
R443 1
R445 1
R442 1
2 0_0402_5%
2 0_0402_5%
2 0_0402_5%
SPI_CLK (30)
FWR#
(30)
FRD#
(30)
H2
H_3P0
H3
H_3P0
D
FSEL#
+3VALW
4.7K_0402_5%
R935 1
2
R936 1
2
4.7K_0402_5%
(30)
2 0.1U_0402_16V4Z
<BOM Structure>
C551 1
MX25L8005M2C-15G_SOP8
H9
H_2P3
@
H33
H_6P0
@
H21
H_4P2
@
H24
H_6P0
H22
H_4P2
@
+3VALW
H29
H_3P0X8P0N
H30
H_3P0X8P0N
@
+3VALW
H28
H_4P0X3P0N
+3VS
Power ON Circuit
reserve
H20
H_4P2
H19
H_4P2
H23
H_3P2
H18
H_3P2
H17
H_3P2
2007/12/07
H11
H_2P3
14
H31
H_3P0N
H34
H_4P0X3P0N
SYS_PWROK
2
@ 0_0402_5%
PM_PWROK (20,30)
14
I
FIDUCIAL_C40M80
FD5
FD6
1
O
1
2
R920
0_0402_5%
SUSP
2
G
Q57
2N7002_SOT23
FIDUCIAL_C40M80
FD4
@
FIDUCIAL_C40M80
FIDUCIAL_C40M80
VS_ON
(38)
FIDUCIAL_C40M80
FIDUCIAL_C40M80
For +VCCP
C856
I
G
FD3
@
U45D
SN74LVC14APWLE_TSSOP14
14
P
2
SUSP
1
(33,39)
5
D
U45C
SN74LVC14APWLE_TSSOP14
FD2
@
+3VALW
1
R919
22K_0402_5%
+3VALW
1
R918
+3VALW
H36
H_3P0N
CH751H-40PT_SOD323-2
2
@
C855
1U_0402_6.3V4Z
1
@
U45B
SN74LVC14APWLE_TSSOP14
VR_ON
(30,40)
14
R917
180K_0402_5%
@
D56
U45A
SN74LVC14APWLE_TSSOP14
1
0.1U_0402_16V4Z
+3VALW
C857
0.1U_0402_16V4Z
+3VALW
10
13
12
I
G
11
U45F
SN74LVC14APWLE_TSSOP14
14
U45E
SN74LVC14APWLE_TSSOP14
14
Security Classification
2007/09/29
Issued Date
2007/09/29
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
B
401556
Sheet
29
of
42
+3VALW_EC
C447
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C448
1000P_0402_50V7K
2
2
1000P_0402_50V7K
Ra
C449
+3VALW
C450
2
+3VALW_EC
R451
1
R450
100K_0402_5%
+EC_AVCC
2
C446
M/B_ID
2
0_0805_5%
0.1U_0402_16V4Z
1
1
+3VALW_EC
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
@
C452
1
VCC
VCC
VCC
VCC
VCC
VCC
(19)
GATEA20
(19)
KB_RST#
(20)
SIRQ
(19) LPC_FRAME#
(19)
LPC_AD3
(19)
LPC_AD2
(19)
LPC_AD1
(19)
LPC_AD0
@ R457
2
2
33_0402_5%
15P_0402_50V8J
(15) CLK_PCI_EC
+3VALW
R458 1
1
C454
(18,28) PCI_RST#
2
47K_0402_5%
2
0.1U_0402_16V4Z
(20)
EC_SCI#
1
R943
(20) PM_CLKRUN#
GATEA20
KB_RST#
SIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
1
2
3
4
5
7
8
10
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC
CLK_PCI_EC
PCI_RST#
ECRST#
EC_SCI#
12
13
37
20
38
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
2 PM_CLKRUN#_R
0_0402_5%
(35)
(35)
(4)
(4)
(20)
(20)
(20)
(28)
DAC_BRIG
EN_FAN1
IREF
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
83
84
85
86
87
88
EC_MUTE
EC_HP_EN
DOCKIN#
BT_LED#
TP_CLK
TP_DATA
3S/4S#
4.7K_0402_5%
R465 1
2
65W90W#
77
78
79
80
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47
PS2 Interface
SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
97
98
99
109
SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#
119
120
126
128
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
73
74
89
90
91
92
93
95
121
127
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
100
101
102
103
104
105
106
107
108
EC_RSMRST#
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
110
112
114
115
116
117
118
SLP_S4#
ENABLT
V18R
124
GPIO
SM Bus
6
14
15
16
17
18
EC_PME#
19
25
28
BT_ON#
29
UTX
30
URX
31
ON/OFF
32
PWR_SUSP_LED34
NUM_LED#
36
CRY2
+3VALW
XCLK1
XCLK0
NC
IN
NC
OUT
32.768KHZ_12.5P_MC-306
2
AGND
122
123
GPI
Y5
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
@
R476
20M_0402_5%
SA00001J540
CRY1
KB926QFB0_LQFP128_14X14
+EC_AVCC
100K+/-5%
Rb
0V
0V
0V
8.2K+/-5%
0.216V
0.250V
0.289V
BATT_TEMP (35)
BATT_OVP (37)
ADP_I
(37)
18K+/-5%
0.436V
0.503V
0.538V
33K+/-5%
0.712V
0.819V
0.875V
PGD_IN
56K+/-5%
1.036V
1.185V
1.264V
100K+/-5%
1.453V
1.650V
1.759V
200K+/-5%
1.935V
2.200V
2.341V
NC
2.500V
3.300V
3.300V
(40)
L21
0_0603_5%
1
2
C457
0.1U_0402_16V4Z
<BOM Structure>
<BOM Structure>
R462 1
DOCKIN#
CAPS_LED#
SYSON
VR_ON
ACIN
2
PM_PWROK
BKOFF#
WL_OFF#
THERM_SCI#
SUSP#
PWRBTN_OUT#
E-KEY_BTN#
+3VALW
+3VALW
10K_0402_5%
C861
2
C862
2
BATT_OVP
ENCODER_PULSE (26)
FSTCHG (37)
BATT_GRN_LED# (32)
CAPS_LED# (32)
BATT_AMB_LED# (32)
PWR_LED (32)
SYSON
(28,33,38)
VR_ON
(29,40)
ACIN
(20,32,34,37)
1
10K_0402_5%
SLP_S4# (20)
ENABLT (9)
CODEC_EAPD (25)
THERM_SCI# (20)
SUSP#
(25,28,33,39)
PWRBTN_OUT# (20)
ARCADE# (32)
(32)
(32)
C478
4.7U_0805_6.3V6K
R948
(29)
(29)
(29)
(29)
ACIN
(32)
(32)
2
0_0603_5%
<BOM Structure>
100P_0402_50V8J
1
100P_0402_50V8J
1
For EMI
CP1
KSI0
KSI1
KSI2
KSO0
EC_RSMRST# (20)
EC_LID_OUT# (20)
EC_ON
(31)
EC_SWI# (20)
PM_PWROK (20,29)
BKOFF#
(17)
WL_OFF# (22)
HPD_7318_R_EC (17)
HPD_7318_EC (17)
EC_ON
10K_0402_5%
2007/12/07
ENCODER_PULSE
2 4.7K_0402_5%
R585
65W90W# (37)
EC_DOCKIN# (16,23)
E-KEY_BTN# (32)
FRD#
FWR#
SPI_CLK
FSEL#
V AD_BID max
2 4.7K_0402_5%
TP_DATA R463 1
FRD#
FWR#
SPI_CLK
FSEL#
V AD_BID typ
+5VS
TP_CLK
(32)
L22
1
V AD_BID min
EC_MUTE (26)
EC_HP_EN (26)
DOCKIN# (24)
BT_LED# (31,32)
TP_CLK
(31)
TP_DATA (31)
3S/4S# (37)
1
2
3
4
8
7
6
5
100P_1206_8P4C_50V8
CP2
1
8
2
7
3
6
4
5
KSO1
KSO2
KSI3
KSO3
2007/12/07
100P_1206_8P4C_50V8
CP3
ACES_85202-24051
KSI1
KSI2
KSO1
KSI3
+3VALW_EC
C456
15P_0402_50V8J
3.3V+/-5%
Board ID
DAC_BRIG (17)
EN_FAN1 (4)
IREF
(37)
Calibrate# (37)
69
ACES_85205-0400
URX
UTX
SLP_S3#
SLP_S5#
EC_SMI#
LID_SW#
C455
15P_0402_50V8J
1
2
CONN@
JP26
1
2
3
4
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
68
70
71
72
AD Input
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
SLP_S3#
SLP_S5#
EC_SMI#
LID_SW#
(7) MCH_TSATN_EC#
(4) FAN_SPEED1
(31)
BT_ON#
(22) UTX
(22) URX
(31) ON/OFF
(32) PWR_SUSP_LED
(32) NUM_LED#
EC DEBUG port
1
2
3
4
BATT_TEMP
BATT_OVP
ADP_I
M/B_ID
PWM Output
GND
GND
GND
GND
GND
EC_PME#
R452
0_0402_5%
Ra
INV_PWM (17)
BEEP#
(25)
ENCODER_DIR (26)
ACOFF
(37)
0.01U_0402_16V7K
ECAGND
C453
1
2
R469
2
0_0402_5%
(23) EC_LAN_PME#
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
63
64
65
66
75
76
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
R473
1
SMB_EC_CK1
SMB_EC_DA1
SMB_EC_CK2
SMB_EC_DA2
SMB_EC_CK1
SMB_EC_DA1
SMB_EC_CK2
SMB_EC_DA2
INV_PWM
BEEP#
ENCODER_DIR
ACOFF
DA Output
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
VCC
21
23
26
27
ECAGND
2
2
2
2
11
24
35
94
113
1
1
1
1
R453
R454
R455
R456
Rb
U18
SMB_EC_DA1
SMB_EC_CK1
SMB_EC_DA2
SMB_EC_CK2
0.1U_0402_16V4Z
67
+3VS
AVCC
+5VALW
9
22
33
96
111
125
C451
KSI4
KSI0
KSI1
KSI2
KSO0
KSO1
KSO2
KSI3
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSI4
KSO9
KSI5
KSI6
KSO10
KSO11
KSI7
KSO12
KSO13
KSO14
KSO15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
KSO4
KSO5
KSO6
KSO7
1
2
3
4
8
7
6
5
100P_1206_8P4C_50V8
CP4
1
8
2
7
3
6
4
5
KSO8
KSI4
KSO9
KSI5
100P_1206_8P4C_50V8
CP5
KSI6
KSO10
KSO11
KSI7
1
2
3
4
8
7
6
5
100P_1206_8P4C_50V8
CP6
1
8
2
7
3
6
4
5
KSO12
KSO13
KSO14
KSO15
100P_1206_8P4C_50V8
JP24
Security Classification
Issued Date
2007/09/29
Deciphered Date
2007/09/29
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
CONN@
Rev
B
401556
Tuesday, April 29, 2008
Sheet
30
of
42
Power Button
pin1
R579
2
@ 10K_0603_5%
2
@ 10K_0603_5%
R578
+3VALW
R580
100K_0402_5%
D44
2
ON/OFFBTN#
(32) ON/OFFBTN#
20mil
JP39
Bottom Side
ON/OFF switch
pin1
+3VALW
TOP Side
ON/OFF
1
3
5
7
9
11
(30)
(19) HDA_SDOUT_MDC
51ON#
51ON#
(32,34)
(19) HDA_SYNC_MDC
(19) HDA_SDIN1
(19) HDA_RST_MDC#
R583
HDA_SDIN1_MDC
33_0402_5%
2
+1.5V
0_0402_5%
2
0_0402_5%
C705
1U_0603_10V4Z
+3VALW
HDA_BITCLK_MDC (19)
1
DAN202UT106_SC70-3
2
4
6
8
10
12
GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK
@
1
R969
1
R962
GND
GND
GND
GND
GND
GND
RLZ20A_LL34
SP01000AT00
ACES_88018-124G
CONN@
13
14
15
16
17
18
D45
1000P_0402_50V7K
1
1
C704
R584
0_0402_5%
1
EC_ON
EC_ON
S 2N7002_SOT23
22P_0402_50V8J
Q36
2
G
(30)
2
D
C706
R581
10K_0402_5%
+3VS
2
2 0_0603_5%
+3VALW
R1006 1
2 0_0603_5%
(30)
1
R575
BT_ON#
R1005 1
@
+3VS
EMI
D26
PSOT24C-LF-T7_SOT23-3
C698
0.1U_0402_16V4Z
USB20_N6
USB20_P6
2
10K_0402_5%
C699
1U_0603_10V4Z
2
Q33
AO3413_SOT23
T/P Board
2
+BT_VCC
1
2
10K_0402_5%
1
2
3
4
5
6
7
8
JP37
@
(20)
(20)
USB20_P2
USB20_N2
1
R996
1 @
R997@
(22) WLAN_BT_DATA
(22) WLAN_BT_CLK
0.1U_0402_16V4Z
2 WLAN_BT_DATA_R
0_0402_5%
WLAN_BT_CLK_R
2
0_0402_5%
@
C461
100P_0402_50V8J
Left
BTN_R
SW4
EVQPLHA15_4P
3
1
5
6
Security Classification
2007/09/29
Issued Date
2007/09/29
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
10
5
6
BTN_L
4
D62
PJDLC05_SOT23~D
Right
SW3
EVQPLHA15_4P
3
1
1 GND
2
3
4
5
6
7
8 GND
USB20_P2
USB20_N2
3
@
C460
100P_0402_50V8J
1
2
3
4
5
6
7
8
ACES_87213-0800G
CONN@
TP_CLK (30)
TP_DATA (30)
BTN_L
BTN_R
ACES_85201-06051
CONN@
+BT_VCC
Q35
2N7002_SOT23
@
1
2
3
4
5
6
GND
GND
Q34
2N7002_SOT23
2
G
3
R577
D25
PSOT24C-LF-T7_SOT23-3
BT_LED# (30,32)
1 @
C459
JP47
2
G
+5VS
R576
300_0603_5%
4.7U_0805_10V4Z
2
0.1U_0402_16V4Z
1
2
3
4
G1
G2
JP44
TP_DATA
TP_CLK
C703
1
2
3
4
5
6
USB20_N6
USB20_P6
USB20_N6
USB20_P6
(20)
(20)
C702
+BT_VCC
CONN@
ACES_85201-04051
W=40mils
BT
+3V_FP
Rev
B
401556
Sheet
31
of
42
TO S/W B
+3VS
MINI1_LED#
MINI1_LED# (22)
BT_LED#
ARCADE_BTN#
KSO1
KSI1
KSI2
KSI3
KSI4
MEDIA_LED#
KSO1
KSI1
KSI2
KSI3
KSI4
(30)
(30)
(30)
(30)
(30)
1
R459
KSO1
KSI2
BT_BTN#
KSI3
EMAIL_BTN#
KSI4
IE_BTN#
ARCADE_BTN# 1
ARCADE# (30)
51ON#
SATA_LED# (19)
+3VALW +5VS +5VALW
5IN1_LED# (27)
NC7SZ08P5X_NL_SC70-5
JP45
1
2
3
4
5
6
7
8
GND
GND
JP46
D19
WL_BTN#
TO POWER BTN/B
SATA_LED#
+5VS
2
+3VALW
100K_0402_5%
U38
2
BT_LED# (30,31)
ACES_85201-1205
CONN@
KSI1
1
2
3
4
5
6
7
8
9
10
11
12
JP12
51ON#
(31,34)
DAN202UT106_SC70-3
1
2
3
4
5
6
GND
GND
1
2
3
4
5
6
7
8
NUM_LED# (30)
CAPS_LED# (30)
MEDIA_LED#
E-KEY_BTN#
E-KEY_BTN# (30)
1
ACES_85201-06051
CONN@
1
2
3
4
5
6
7
8
9
10
PWR_LED#
ACIN_LED#
ACES_85201-08051~N
C952
0.1U_0402_16V4Z
PWR_SUSP_LED#
ON/OFFBTN# (31)
2N7002_SOT23
D
1
+5VS
C951
Q59
0.1U_0402_16V4Z
S
2
G
ACIN
(20,30,34,37)
+3VS
CONN@
PWR_SUSP_LED#
PWR_LED#
Q42
DTC114EKA_SC59-3
Q43
DTC114EKA_SC59-3
10K
(30)
10K
PWR_LED
(30) PWR_SUSP_LED
10K
3
10K
HT-210UD/NB_AMB/BLUE
300_0402_5%
2
1
2
NB
+5VALW
1
3
R446
PWR_LED#
B
300_0402_5% R447
1
2 PWR_SUSP_LED#
UD
LED1
SC510UDB000
HT-210UD/UYG AMB/GREEN
NB
+3VALW
1
3
R448
120_0402_5%
1
2 BATT_GRN_LED#
R449
1
2 BATT_AMB_LED#
150_0402_5%
+5VS
BATT_GRN_LED# (30)
JP53
1
2
BATT_AMB_LED# (30)
3
4
UD
LED2
1
2
G1
G2
ACES_88266-02001
CONN@
SC510UDG000
Security Classification
2007/09/29
Issued Date
Deciphered Date
2007/09/29
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
B
401556
Sheet
32
of
42
+5VS
+3VALW
+3VS
U20
S
S
S
G
SI4800DY_SO8
1
Q27
2
G
2N7002_SOT23
8
7
6
5
D
D
D
D
S
S
S
G
1
2
3
4
SI4800DY_SO8
R548
330K_0402_5%
RUNON
D
SUSP
C646
C637
10U_0805_10V4Z
R546
200K_0402_5%
+VSB
1
C645
10U_0805_10V4Z
0.1U_0402_16V4Z
U21
1
D
D
D
D
C647
0.1U_0603_25V7K
SUSP
+3VS_GATE
+VSB
0.1U_0402_16V4Z
1
2
3
4
C644
10U_0805_10V4Z
8
7
6
5
1
Q28
2
G
2N7002_SOT23
C648
10U_0805_10V4Z
C649
D
RUNON
2
@ 0_0402_5%
R549 1
C650
0.1U_0603_25V7K
+1.8V
+5VALW
0_0805_5%
R984
C931
@ 1U_0402_6.3V6K
FB
VIN
+1.5V
1
C933
@ 0.01U_0402_25V7K
R986
@ 1.54K_0402_1%
APL5915KAI-TRL_SO8
R987
@47K_0402_5%
GND
EN
VOUT
@C932
@
C932
4.7U_0805_6.3V6K
C934
22U_0805_6.3V6M
C935
@ 0.1U_0402_16V7K
@ 10K_0402_1%
1
2
(28,30,38) SYSON
VIN
VOUT
POK
R985
VCNTL
U53
7
R988
@ 1.74K_0402_1%
+5VALW
1
+5VALW
Discharge circuit
R544
R545
47K_0402_5%
(25,28,30,39) SUSP#
2
D
Q11B
Q26
2
G
R547
2N7002_SOT23
10K_0402_5%
1
Q11A
2
G
Q49
S
2N7002_SOT23
2
3
2
6
2N7002DW T/R7_SOT363-6
R532
100K_0402_5%
470_0402_5%
SUSP
1
2N7002DW T/R7_SOT363-6
Q10B
SUSP
(28,30,38) SYSON
R503
470_0402_5%
2
Q10A
SUSP
SUSP
2N7002DW T/R7_SOT363-6
2N7002DW T/R7_SOT363-6
470_0402_5%
SUSP
R502
2N7002DW T/R7_SOT363-6
Q9B
SYSON#
SUSP
R501
470_0402_5%
2
3
Q9A
470_0402_5%
2N7002DW T/R7_SOT363-6
R500
R499
470_0402_5%
SUSP
1
R498
10K_0402_5%
(29,39)
(24,28,39) SYSON#
+0.9VS
+VCCP
+1.5VS
+1.8V
+3VS
+5VS
SYSON#
Security Classification
2007/09/29
Issued Date
2007/09/29
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
B
401556
Sheet
33
of
42
PDS1040-13_POWERDI5-3
PD11
1
3
PR3
84.5K_0402_1%
2
PR8
10K_0402_5%
1
2
PR6
20K_0402_1%
PD3
GLZ4.3B_LL34-2
PC5
0.1U_0603_25V7K
2
1
PJP1
PU1A
LM358DT_SO8
PR4
10K_0402_5%
PR7
1
(20,30,32,37) ACIN
PR5
22K_0402_5%
1
2
PD2
RB751V-40TE17_SOD323-2
2
1 1 0
PR2
10K_0402_5%
10K_0402_5%
2
PC151
820P_0402_50V7K
VIN
PC4
100P_0402_50V8J
VS
VIN
1
PC150
390P_0402_50V7K
2
1
PC139
330P_0402_50V7K
2
1
JUMP_43X79
PC3
1000P_0402_50V7K
PC1
1000P_0402_50V7K
PJ1
2DC_IN_S2
PC96
1000P_0402_50V7K
DC_IN_S1
PC2
100P_0402_50V8J
PL1
SMB3025500YA_2P
1
SINGA_B2011H02-4P_4P-T
PR1
1M_0402_1%
1
2
VIN
2
VIN_DOCK
PC107
4700P_0402_25V7K
2
1
SP020710240
PC6
1000P_0402_50V7K
RTCVREF
Vin Dectector
Min.
H-->L 16.976V
L-->H 17.430V
Typ
17.525V
17.901V
Max.
17.728V
18.384V
PJ2
VIN
+3VALWP
PJ3
1
+3VALW
+1.8VP
JUMP_43X118
+1.8V
JUMP_43X118
PD4
LL4148_LL34-2
LL4148_LL34-2
PJ4
PD5
N1
+5VALW
VS
+VSBP
PJ5
1
+VSB
+0.9VSP
+0.9VS
JUMP_43X79
PC8
0.1U_0603_25V7K
PJ8
0.22U_0603_25V7K
JUMP_43X118
PJ6
PC7
+1.05VP
2
PR13
22K_0402_1%
51ON#
JUMP_43X39
PR12
100K_0402_1%
(31,32)
PJ15
1
PR10
68_1206_5%
2
PR11
200_0603_5%
1
2
JUMP_43X118
PR9
PQ1
68_1206_5%
TP0610K-T1-E3_SOT23-3
CHGRTCP
+5VALWP
BATT+
+VCCP
JUMP_43X118
PJ9
2
RTCVREF
JUMP_43X118
PR14
200_0603_5%
OUT
IN
GND
PC9
10U_0805_10V4Z
N2
3.3V
G920AT24U_SOT89-3
PU2
PC10
PR16
560_0603_5%
1
2
+CHGRTC
PR15
560_0603_5%
1
2
1U_0805_25V4Z
Issued Date
Security Classification
2007/09/29
Deciphered Date
2007/09/29
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS,MB A4271
Document Number
Rev
B
401556
Sheet
34
of
42
VMB
PR17
47K_0402_1%
PR18
47K_0402_1%
1
2
PR19
7.5K_0402_1%
1
2
PJP2
PC13
0.01U_0402_25V7K
TM_REF1
LL4148_LL34-2
3
1
VL
PR23
100K_0402_1%
PR25
100K_0402_1%
PR26
1K_0402_1%
1
2
PC15
1000P_0402_50V7K
1
2
PR22
17.4K_0402_1%
+3VALWP
PR24
6.49K_0402_1%
2
1
PC14
0.22U_0603_16V7K
2
PR20
100_0402_1%
PR21
100_0402_1%
PD6
2
LM393DG_SO8
PQ2
DTC115EUA_SC70-3
PU3A
PC12
1000P_0402_50V7K
MAINPWON (36)
1
PC11
0.1U_0603_25V7K
PH1
100K_0603_1%_TH11-4H104FT
EC_SMCA
EC_SMDA
BATT+
BATT_S1
7
6
5
4
3
2
1
7
6
5
4
3
2
1
GND
GND
GND
GND
8
9
10
11
PL2
SMB3025500YA_2P
1
2
OCTEK_TBTJ-0710019
BATT_TEMP (30)
SMB_EC_CK1 (30)
SMB_EC_DA1 (30)
VL
@ PR27
@PR27
47K_0402_1%
@PR28
@
PR28
47K_0402_1%
1
2
PQ3
TP0610K-T1-E3_SOT23-3
@PH2
@
PH2
100K_0603_1%_TH11-4H104FT
8
+
@ PR32
@PR32
15.4K_0402_1%
1
3
LL4148_LL34-2
LM393DG_SO8
@PD7
@
PD7
O
@ PC18
@PC18
0.22U_0603_16V7K
PU3B
TM_REF1
1
2
2
1
2
@PR30
@
PR30
13.7K_0402_1%
1
2
VL
PC16
0.22U_1206_25V7K
PR31
22K_0402_1%
1
2
2
1
PR29
100K_0402_1%
VL
+VSBP
1
PC17
0.1U_0603_25V7K
B+
VL
PR34
0_0402_5%
2
SPOK
PQ4
2N7002W-T/R7_SOT323-3
2
G
(36)
PC19
0.1U_0402_16V7K
PR33
100K_0402_1%
Issued Date
Security Classification
2007/09/29
Deciphered Date
2007/09/29
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS,MB A4271
Document Number
Rev
B
401556
Tuesday, April 29, 2008
Sheet
D
35
of
42
ISL6237_B+
3
2
1
PR39
2.2_0603_5% PC32
PC31
0.1U_0603_25V7K
LX3
PHASE2
PHASE1
16
0.1U_0603_25V7K
LX5
LGATE1
18
DL5
3
2
1
25
PQ8
AO4712_SO8
DL3
23
FB3
VL
LGATE2
30
OUT2
32
REFIN2
PGND
22
OUT1
10
FB1
11
BYP
SKIP
29
2VREF_ISL6237
1
PC98
390P_0402_50V7K
2
1
PC97
1800P_0402_50V7K
2
1
PC25
2200P_0402_50V7K
2
1
PR41
61.9K_0402_1%
2
BST5A 2
1
+ PC35
220U_6.3V_M
DH5
17
2
PR43
10K_0402_1%
1
2
15
BOOT1
PR37
4.7_1206_5%
2
1
UGATE1
PL3
10UH_1164AY-100M=P3_4.7A_20%
2
1
PC34
680P_0603_50V7K
2
1
19
5
6
7
8
PC29
1U_0603_10V6K
1
2
PVCC
BOOT2
+5VALWP
UGATE2
24
VCC
26
LDO
TP
4.7U_0603_6.3V6M
PC28
2
1
1U_0603_10V6K
PC27
1
2
2
1
2
1
DH3
PR38
1 BST3A
2.2_0603_5%
33
PQ6
AO4466_SO8
4
PC24
4.7U_1206_25V6K
2
1
PC23
4.7U_1206_25V6K
2
1
5
6
7
8
8
7
6
5
8
7
6
5
1
2
3
1
PR42
10K_0402_1%
PQ7
AO4712_SO8
PC33
680P_0603_50V7K
2
1
+ PC30
220U_6.3V_M
PU4
PR36
4.7_1206_5%
2
1
PR40
0_0402_5%
PC26
0.1U_0603_25V7K
VIN
PL4
10UH_1164AY-100M=P3_4.7A_20%
1
2
+3VALWP
VL
PQ5
AO4466_SO8
4
1
2
3
PC22
2200P_0402_50V7K
2
1
PC21
4.7U_1206_25V6K
2
1
PC20
4.7U_1206_25V6K
2
1
PC100
1800P_0402_50V7K
2
1
PR35
0_0805_5%
1
2
PC99
390P_0402_50V7K
2
1
PJ10
JUMP_43X118
2 2
1 1
ISL6237_B+
B+
FB5
REF
PC36 0.22U_0603_10V7K
LDOREFIN
@ PR44
2
PR45
1
VS
EN_LDO
POK1
13
EN1
ILIM1
12
SPOK
PR48
ILM1
(35)
287K_0402_1%
1
GND
21
TON
2
31
ILIM2
1
287K_0402_1%
ISL6237IRZ-T_QFN32_5X5
ILIM2
PR53
0_0402_5%
2VREF_ISL6237 2
PR51
0_0402_5%
NC
EN2
PC103
1U_0402_6.3V6K
2VREF_ISL6237 1
1
2
PD12
1SS355_SOD323-2
0_0402_5%
PR55
@ 47K_0402_5%
PC39
0.047U_0402_16V7K
2
1
PR52
PR54
@ PR50
0_0402_5%
VL
(35) MAINPWON
28
27
14
POK2
VL
PR49
PC38
0.047U_0402_16V7-K
2
PQ33
TP0610K-T1-E3_SOT23-3
PC37
0.22U_0603_25V7K
806K_0603_1%
1
GLZ5.1B_LL34-2
NC
VS
20
PR46
100K_0402_1%
1
2
PR47
200K_0402_5%
1
2
PD8
0_0402_5%
1
0_0402_5%
2
Security Classification
2007/09/29
Issued Date
Deciphered Date
2007/09/29
Title
SCHEMATICS,MB A4271
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Wednesday, April 30, 2008
Date:
Rev
B
401556
Sheet
1
36
of
42
B+
PR60
2.2_0603_5%
1
2
HIDRV
26
DH_CHG
ACDRV
ACDET
PH
25
LX_CHG
PC54
1U_0603_10V6K
PQ13
AO4466_SO8
3
2
1
PC56
680P_0402_50V7K
DL_CHG
LODRV
23
PGND
22
AGND
LEARN
21
CELLS
20
CELLS
VDAC
19
SE_CHG+
18
SE_CHG-
BAT
17
TP
29
VADJ
CP setting
4.1V
887K
221K
4.2V
2007/09/29
Deciphered Date
1
1
3
PQ19
2N7002W-T/R7_SOT323-3
CHGEN#
(30) FSTCHG
2
G
2N7002W-T/R7_SOT323-3
4
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
PQ18
2
G
PR84
221K_0402_1%
Security Classification
Issued Date
24751_VREF
@PR168
@
PR168
4.3K_0402_5%
PR84
VADJ
Date:
2
G
PR81
100K_0402_1%
1
PR82
100K_0402_1%
2
1
2
1
2
LI-4S :18.0V----BATT-OVP=2.677V
BATT-OVP=0.1487*VMB
LI-3S :13.5V----BATT-OVP=2.007V
BATT-OVP=0.1487*VMB
Per cell=3.5V
PR78
4.0V
Calibrate#
@ PQ16
2N7002W-T/R7_SOT323-3
REGN
PR80
0_0402_5%
1
2
(20,30,32,34)
PQ17
SI2301BDS-T1-E3_SOT23-3
PR86
100K_0402_1%
Charger ADJ
ACGOOD#
2
PR76
499K_0402_1%
PC66
0.01U_0402_25V7K
ACIN
24751_VREF
PR78
887K_0402_1%
2
P
100K_0402_1%
@PR167
@
PR167
0_0402_5%
1
2
(30)
@PR75
@
PR75
100K_0402_1%
ADP_I
PR74
340K_0402_1%
8
+
PR70
1
S
(30) Calibrate#
2
1
3
PQ20
2N7002W-T/R7_SOT323-3
24751_VREF
IREF=0.77484*Icharge
PC63
@0.01U_0402_25V7K
RTCVREF
2
G
IREF (30)
ACSET
PR73
100K_0402_1%
(30) BATT_OVP
PR83
64.9K_0402_1%
24751_VREF 1
2
PC64
100P_0402_50V8J
VMB
VS
LM358DT_SO8
PU1B
2
1
17.4K_0402_1%
PQ40
SSM3K7002F_SC59-3
PR77
10K_0402_1%
1
2
15
PQ39
SSM3K7002F_SC59-3
SRSET
PR72
10_0603_5%
1
2
2
G
16
PR71
BQ24751ARHDR_QFN28_5X5
2
G
3
1
2
PR195
340K_0402_1%
2
1
Fsw : 300KHz
0.1U_0402_16V7K
PC168
ACOFF 1
SRSET
BATDRV
IADAPT
PR79
105K_0402_1%
PR194
100K_0402_1%
2
1
14
PQ15_GATE
PC65
0.01U_0402_25V7K
CP POINT=(1.436V/3.3V)*(0.1/0.015)=2.901A
/BATDRV
24751_VREF
24751_VREF
PR196
200K_0402_1%
2
1
Vacset=3.3*(50K/(50K+64.9K))=1.436V
Icharge Setting
ICHG setting
ACGOOD
13
PC61
0.1U_0603_25V7K
12
ACSET
ACGOOD#
CP Point=(Vacset/Vvdac)*(0.1/PR56)=4.04A
SRP
SRN
1U_0603_10V6K
VREF
VADJ
2
PC62
0.1U_0603_25V7K
90W adapter
Vacset=3.3*(100K/(64.9K+100K))=2.001V
11
@ PC59
@PC59
0.1U_0603_25V7K
1
2
CP point=Iadapter*85%
PQ15_GATE
CP Point Setting
PC60
PR69
100K_0402_1%
PC58
0.1U_0603_25V7K
24751_VREF
SI2301BDS-T1-E3_SOT23-3
24751_VREF 10
PQ15
(30)
PR68
54.9K_0402_1%
Cells selector
PR85
100K_0402_1%
ACOFF
PC57
0.1U_0402_16V7K
1
2
OVPSET
(30)
PQ14
@ 2N7002W-T/R7_SOT323-3
65W90W#
3S/4S#
(30)
2
7 ACOP
PC55
0.47U_0603_16V7K
BATT+
1
PR64
4.7_1206_5%
24
PR67
340K_0402_1%
OVPSET
2
G
PC51
0.1U_0603_25V7K
3
2
1
PR66
0_0402_5%
1
2
ACSET
REGN
CELLS
4 Cell
ACSET
VREF
PR63
54.9K_0402_1%
1
3 Cell
PD10
LL4148_LL34-2
PR62
0.02_2512_1%
PR65 @
100K_0402_1%
GND
REGN
PL5
10UH_PCMB104T-100MS_6A_20%
1
2
4
5
ACDRV
ACDET
ACN
ACP
2
3
ACN
ACP
/BATDRV
PQ11
AO4466_SO8
PC53
10U_1206_25V6M
BTST
PQ12
AO4407_SO8
PC52
10U_1206_25V6M
2
1
27
PR57
100K_0402_1%
5
6
7
8
BTST
PC40
0.01U_0402_25V7K
1
2
PC153
1800P_0402_50V7K
PVCC
PC152
390P_0402_50V7K
1
2
28
3
2
1
@PC50
@PC50
0.1U_0603_25V7K
PC49
0.1U_0603_25V7K
2
PVCC
2
CHGEN
1
PC47
0.1U_0603_25V7K
PU5
1
CELLS
CHG_B+
5
6
7
8
PC46
0.1U_0402_16V7K
1
2
PR61
340K_0402_1%
1
24751_VREF
JUMP_43X118
CHGEN#
PC44
2200P_0402_25V7K
1
2
PC43
4.7U_1206_25V6K
1
2
PC42
4.7U_1206_25V6K
1
2
PC48
2.2U_0805_25V6K
PJ11
1
1
2
PR59
100K_0402_1%
2
1
1
@PD9
@
PD9
RLZ24B_LL34
PR56
0.015_2512_1%
8
7
6
5
4
1
2
3
PC45
0.01U_0402_25V7K
1
2
3
PC41
0.01U_0603_50V7K
1
2
PC159
0.018U_0603_50V7J
PR166
PR58
3.3_1210_5%
3.3_1210_5%
2
1 2
1
PQ10
AO4407_SO8
8
7
6
5
5
6
7
8
PQ9
AO4407_SO8
VIN
SCHEMATICS,MB A4271
Document Number
Rev
B
401556
Tuesday, April 29, 2008
Sheet
D
37
of
42
PC67
1U_0402_6.3V6K
PC68
1U_0402_6.3V6K
PR87
2
+5VALW
2.2_0603_1%
PR88
2
+5VALW
2.2_0603_1%
PL6
2
2
1
PR92
18.2K_0402_1%
VIN2
GND_T
29
2
3
VCC2
VIN1
VCC1
6
FSET1
ISL6228_B+
2
8
FB1
PGOOD2
28
VO1
FB2
27
PR97
34K_0402_1%
PR98
PC74
3.3K_0402_5% 1000P_0402_25V8J
2
1
1
2
12K_0402_1%
2
7
PGOOD1
PR96
1
PR91
22K_0402_1%
FB1_1.8V
PR95
45.3K_0402_1%
2
2
2
PC72
1000P_0402_50V7K
PR93
22.6K_0402_1%
PR90
10_0603_1%
1000P_0402_50V7K
PC73
2
1
PR89
10_0603_1%
PC71
PR94
1000P_0402_25V8J 3.3K_0402_5%
2
1
1
2
PC70
0.1U_0603_25V7K
FSET2
ISL6228_B+
PC69
0.1U_0603_25V7K
PC138
2200P_0402_25V7K
1
2
PC137
330P_0402_50V7K
ISL6228_B+
FBMA-L11-322513-151LMA50T_1210
B+
ISL6228_B+
OCSET2
PU6
ISL6228_B+
EN2
24
UG_1.8V 13
UGATE1
PHASE2
23
UGATE2
22
8
7
6
5
3
2
1
1
+ PC84
330U_4V_M
2
PQ24
AO4712_SO8
PC85
0.1U_0402_16V7K
+1.05VP
PC87
470P_0402_50V7K
OS-CON
LG_1.05V
(29)
VS_ON
1.05V_EN
1
PR110
0_0402_5%
1.8V_EN
PR108
0_0402_5%
2
1
Freq=303KHz
Rfset=1/(1.5E-10 * Freq)=22K
Freq=366KHz
Rfset=1/(1.5E-10 * Freq)=18.2K
PC90
0.01U_0402_25V7K
@
Issued Date
Security Classification
2007/09/29
Deciphered Date
2007/09/29
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
1
2
PL8
1.8UH_SIL104R-1R8PF_9.5A_30%
PR107
4.7_1206_5%
PC89
1U_0402_6.3V6K
PC86
0.01U_0402_25V7K
(28,30,33) SYSON
5
6
7
8
BOOT2
LG_1.8V
PR104
12K_0402_1%
PQ23
AO4466_SO8
PR109
2.2_0603_5%
+5VALW
PC88
1U_0402_6.3V6K
LX_1.05V
BST_1.05V1
+5VALW
PR106
0_0603_5%
1
2
UG_1.05V
21
20
PVCC2
LGATE2
19
PGND2
18
17
16
PGND1
LGATE1
BOOT1
PR105
2.2_0603_5%
15
PC83
0.1U_0402_16V7K
1BST_1.8V
14
3
2
1
1
2
3
1 2
PC79
0.015U_0402_16V7K
PHASE1
5
6
7
8
12
1.05V_EN
0_0603_5%
25
1
2
3
EN1
26
ISL6228HRTZ-T_QFN28_4X4
PQ22
AO4712_SO8
2
PC82
470P_0402_50V7K
11
2
LX_1.8V
OS-CON
1.8V_EN
PR102
PR103
4.7_1206_5%
VO2
2
1
PC78
4.7U_1206_25V6K
2
1
PC81
4.7U_1206_25V6K
2
1
PC154
390P_0402_50V7K
2
1
PC155
1800P_0402_50V7K
1
1
PC80
330U_4V_M
OCSET1
12K_0402_1%
1
2
PL7
1.8UH_SIL104R-1R8PF_9.5A_30%
PR100
10
PQ21
AO4466_SO8
PR101
12K_0402_1%
+1.8VP
25.5K_0402_1%
PVCC1
PC77
0.015U_0402_16V7K
1
2
1
PC157
1800P_0402_50V7K
2
1
PC156
390P_0402_50V7K
2
1
PC75
4.7U_1206_25V6K
2
1
PC76
4.7U_1206_25V6K
8
7
6
5
PR99
FB2_1.05V
SCHEMATICS,MB A4271
Document Number
Rev
B
401556
Wednesday, April 30, 2008
D
Sheet
38
of
42
PJ12
JUMP_43X79
+1.8V
NC
REFEN
NC
VOUT
NC
GND
+3VALW
1
VCNTL
GND
PR111
1K_0402_1%
PC91
4.7U_0603_6.3V6M
VIN
2
1
PU7
1
PC92
1U_0402_6.3V6K
+0.9VSP
1
PR113
1K_0402_1%
1
3
PC93
0.1U_0402_16V7K
2
1
PR112
PQ25
0_0402_5% 2N7002W-T/R7_SOT323-3
1
2
2
G
1
2
PR169
PC94
0_0402_5%
0.1U_0402_16V7K
2
(29,33) SUSP
(24,28,33) SYSON#
RT9173DPSP_SO8
PC95
10U_0805_6.3V6M
C
+5VALW
PC141
1U_0402_6.3V6K
+1.8V
PJ18
JUMP_43X79
3
4
+1.5VS
FB
PC140
0.01U_0402_25V7K
APL5913-KAC-TRL_SO8
GND
1
2
PC143
4.7U_0805_6.3V6K
PR171
1.54K_0402_1%
EN
POK
VOUT
VOUT
8
7
PC142
22U_0805_6.3V6M
VCNTL
VIN
VIN
PU11
6
5
9
PR172
1.74K_0402_1%
PR170
PR184
47K_0402_5%
2
PC144
1U_0402_6.3V6K
(25,28,30,33) SUSP#
10K_0402_1%
1
2
2007/09/29
Issued Date
Security Classification
2007/09/29
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS,MB A4271
Document Number
Rev
B
401556
Wednesday, April 30, 2008
Sheet
1
39
of
42
+5VS
PHASE1
34
PHASE_CPU1
RBIAS
PGND1
33
VR_TT#
NTC
2
3
2
1
PC147
2200P_0402_50V7K
2
1
PC146
390P_0402_50V7K
2
1
1
2
1
PC149
1800P_0402_50V7K
2
1
PC115
10U_1206_25V6M
2
1
3.65K_0805_1%
1
2
PR149
CPU_B+
10KB_0603_5%_ERTJ1VR103J
PH3
11K_0402_1%
PC131 180P_0402_50V8J
1
2
PR165
1
2
1
2
3.24K_0402_1%
PR164 1K_0402_1%
PR161 0_0402_5%
PR162
20_0402_5%
PR163
VSSSENSE
PR159 20_0402_5%
(5)
ISEN2
VSUM
PC130
0.01U_0603_50V7K
PC129
@0.022U_0603_50V7K
+VCC_CORE
PR158 0_0402_5%
0.22U_0603_10V7K
PC128 820P_0603_50V7K
1
2
2
1
VCCSENSE
PC124
1
2
PC127
0.1U_0603_25V7K
PR157 1K_0402_1%
(5)
3
2
1
1
2
1
VSUM
1_0402_5%
PR151 @0_0603_5%
1
2
VCC_PRM
PR156
10_0603_5%
1
2
PC126 1000P_0402_50V7K
1
2
PR155 1
+5VS
PR150 1_0603_5%
PC123
1U_0402_6.3V4Z
PR160
255_0402_1%
1
PR148
2.61K_0402_1%
220P_0402_50V7K
2 PR154 1
1K_0402_1%
PR153 2
1
@ 0_0402_5%
470P_0402_50V7K
2
1
PC125
ISEN1
ISEN2
2
680P_0402_50V7K
PC121
PQ32
AO4456_SO8
PC120 1000P_0402_50V7K
PR152 97.6K_0402_1% PC122
1
2
2
PC109
1000P_0402_50V7K
PC158
1800P_0402_50V7K
2
1
PC135
1800P_0402_50V7K
2
1
PC106
2200P_0402_50V7K
2
1
3
2
1
PQ31
AO4456_SO8
24
23
VDD
22
21
20
19
RTN
VO
18
17
PC114
10U_1206_25V6M
2
1
25
0.36UH_FDU1040D-R36M_26A_20%
2
1
PL11
PR146
6.8_1206_5%
1 2
1
NC
SI7686DP-T1-E3_SO8
UGATE_CPU2-2
3
2
1
FB2
PR142
UGATE_CPU2-1 1
2
2.2_0603_1%
BOOT_CPU2
1
2
1
2
PR144
PC119
2.2_0603_1%
0.22U_0603_10V7K
5
6
7
8
12
PHASE_CPU2
5
6
7
8
26
ISEN1
BOOT2
ISEN2
FB
GND
11
VIN
27
VSUM
28
UGATE2
DFB
PHASE2
COMP
DROOP
VW
PQ30
4
CPU_B+
29
LGATE_CPU2
PC148
390P_0402_50V7K
2
1
PGND2
10
16
1
2
1000P_0402_50V7K
PR145 6.81K_0402_1%
1
2
PU9
15
13K_0402_1%
1
2
OCSET
13
PC118
SOFT
VSEN
PR143
VDIFF
PC117
0.022U_0603_25V7K
1
2
ISL6262ACRZ-T_QFN48_7X7
LGATE2
30
LGATE_CPU1
31
10K_0402_1%
32
PVCC
VCC_PRM
ISEN1
0.22U_0603_10V7K
PC116
2200P_0402_50V7K
2
1
LGATE1
+VCC_CORE
PR137
1_0402_5%
PR138
@0_0603_5%
1
2
PC113
1
2
VSUM
VR_TT#
C
PL10
PMON
PR136
10K_0402_1%
2
1
UGATE_CPU1-1
PR135
3.65K_0805_1%
2
1
36
35
BOOT1
UGATE1
PR134
6.8_1206_5%
1 2
1
BOOT_CPU1
PQ29
AO4456_SO8
3
2
1
37
5
6
7
8
5
6
7
8
0.36UH_FDU1040D-R36M_26A_20%
2
1
PR147
147K_0402_1%
SI7686DP-T1-E3_SO8
2.2_0603_1%
0.22U_0603_10V7K UGATE_CPU1-2
PR130
PC111
1
21
2
PC112
680P_0402_50V7K
2
PR141
PC108
220U_25V_M
PQ27
3
2
1
1
+
2
VID0
38
VID1
39
VID2
40
VID3
41
VID4
42
46
45
43
VID5
DPRSTP#
PSI#
47
48
3V3
PGOOD
PC105
10U_1206_25V6M
2
1
PC104
10U_1206_25V6M
2
1
PC145
390P_0402_50V7K
2
1
1
2
PC102
2.2U_0603_6.3V6K
PC136
4700P_0603_50V7K
2
1
(5)
(5)
(5)
(5)
CPU_VID2
(5)
CPU_VID1
(5)
CPU_VID0
(5)
(29,30)
CPU_VID3
CPU_VID4
2
1
2
@ 0_0402_5%
PR140
PGD_IN
DPRSLPVR
1
2
PR139 0_0402_5%
H_PSI#
14
(30)
VGATE
CLK_EN#
(7,20)
(5)
CPU_VID5
1
2
49
GND
499_0402_1%
PC110
1U_0402_6.3V6K
1
PR132
PR131
1.91K_0402_1%
+3VS
44
+3VS
0_0402_5%
2
VID6
PR126
1
0_0402_5%
2
2
1
PR121 0_0402_5%
2
1
PR127 0_0402_5%
2
1
PR128 0_0402_5%
2
1
PR129 0_0402_5%
2
1
PR122 0_0402_5%
2
1
PR123 0_0402_5%
2
1
PR124 0_0402_5%
2
1
PR125 0_0402_5%
PR120
1
CLK_ENABLE#
0_0402_5%
2
VR_ON
(5,7,19) H_DPRSTP#
PC101
0.022U_0402_16V7K
PR119
1
PL9
FBMA-L18-453215-900LMA90T_1812
2
499_0402_1%
2
(7,20) DPRSLPVR
CPU_VID6
VR_ON
PR118
B+
CPU_B+
PR117
1_0603_5%
VCC_PRM
PC132 0.1U_0402_16V7K
1
2
PC134
0.22U_0603_10V7K
2
2
PC133 0.22U_0402_6.3V6K
2007/09/29
Issued Date
Security Classification
2007/09/29
Deciphered Date
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
SCHEMATICS,MB A4271
Document Number
Rev
B
401556
Wednesday, April 30, 2008
Sheet
1
40
of
42
Fixed Issue
Exchange battery connector pin
2
3
36
36
34
37
36
39
39
Down size
12
39
Down size
13
39
Down size
14
37
Down size
11
40
Down size
15
EVT
2007
12/12
EVT
2007
12/12
EVT
2007
12/12
EVT
2007
12/12
EVT
2007
12/12
EVT
2007
12/12
EVT
2007
12/12
EVT
2007
12/12
EVT
2007
12/12
EVT
2007
12/12
EVT
2007
12/12
EVT
2007
12/12
EVT
2007
12/12
EVT
2007
12/12
EVT
2007
12/12
EVT
2007
12/12
EVT
2007
12/12
EVT
2007
12/12
EVT
2007
12/12
EVT
2007
12/12
EVT
2007
12/12
EVT
2007
12/12
EVT
Down size
10
2007
12/12
36
Down size
Phase
Down size
Date
Down size
Modify List
35
Down size
PG#
Page 1 of 2
for PWR
Rev.
35
Down size
35
16
For EMI
34
17
For EMI
34
18
For EMI
40
19
For EMI
40
20
For EMI
38
21
For EMI
38
22
For EMI
38
23
For EMI
38
SCHEMATICS,MB A4271
Size
Document Number
Date:
Rev
B
401556
Sheet
1
41
of
42
Fixed Issue
24
25
Rev.
2007
12/12
EVT
34
Delete PD1
2007
12/18
EVT
2007
12/18
EVT
2007
12/18
EVT
2007
12/18
EVT
2007
12/18
EVT
2007
12/18
EVT
2007
12/20
EVT
2007
12/31
EVT
2008
02/25
DVT
2008
02/25
DVT
2008
02/25
DVT
2008
02/27
DVT
Add PC168PQ39PQ40PR194PR195PR196
2008
02/27
DVT
2008
02/27
DVT
Add PC158PC159
2008
03/03
DVT
2008
03/14
PVT1
40
Down size
30
40
Down size
31
32
37
Down size
29
36
Down size
APL5913 EN pin impedance must keep
under 20K
33
40
39
34
36
35
40
For EMI
36
34
38
Add PC97PC98PC99PC100PC145PC146PC147PC148PC149
PC150PC151PC152PC153PC154PC155PC156PC157
Delete PR64PC56 "@" mark
Change PR38PR39PR60PR105PR109PR130PR144 from 0 to 2.2
For EMI
37
B
Phase
Down size
28
Date
34
37
27
Modify List
Page 1 of 2
for PWR
26
PG#
37
39
HW request
40
For EMI
41
Thermal request
39
35
42
43
44
45
A
46
Compal Electronics, Inc.
Title
SCHEMATICS,MB A4271
Size
Document Number
Date:
Rev
B
401556
Sheet
1
42
of
42