Abstract
Transformer inrush currents are known to cause problems for sensitive protection functions
applied to a power transformer itself, or in a near vicinity of a transformer. Inrush currents
contain significant and slowly decaying dc components. This makes CT saturation likely causing
problems for associated relays. Sensitive protection functions that respond to currents are
particularly affected.
This paper reviews impact of transformer inrush currents on four protection functions. For
each category the problem is reviewed and quantified, and practical solutions are presented.
First, an impact of inrush currents combined with CT saturation on Restricted Ground Fault
(RGF) protection is analyzed. The RGF, if implemented as a low-impedance scheme integrated
with a multi-function transformer relay, faces stability problems. Being sensitive, the function
responds to small unbalances in the 4 currents of the zone (ABC + G). Under CT saturation,
spurious unbalance is possible when energizing a transformer.
Second, the impact of inrush currents of a step-up transformer on generator protection is
presented. This includes both the main stator differential, and so-called zero-sequence
differential functions. These protections, if set sensitive, are exposed to problems related to CT
saturation during long-lasting inrush currents of the step-up transformer.
Third, impact of the combination of inrush currents and saturated CTs on sensitive ground
overcurrent protection is addressed. During inrush, any CT error could demonstrate itself as a
spurious zero- or negative-sequence current. Such spurious signals could last hundreds of
milliseconds or longer. As a result, if set sensitive, these overcurrent functions could pickup and
operate even if set to use a time delay before tripping.
Fourth, distance zones, if set too far as compared with the amount of inrush current could
pickup spuriously when energizing a large power transformer. This may result in false operations
particularly via instantaneously tripping teleprotection schemes, before the inrush current gets a
chance to decay substantially.
The paper delivers analysis of the above phenomena and provides practical application
guidelines regarding settings and scheme logic. Problems and solutions presented are illustrated
with field records.
1424400430/06/$20.002006IEEE
103
59thAnnualConferenceforProtectiveRelayEngineers
zero-sequence from the phase CTs). This well-known protection principle works satisfactory
when applied as a high-impedance scheme. It faces stability issues as a low-impedance relay.
With reference to Figure 1, RGF zones could be applied to wye-connected windings of
power transformers in single-breaker (a) and breaker-and-a-half (b) applications, as well as stator
windings of generators and large motors with (c) and without (d) a CT in the neutral connection.
Applications of REF on generators and motors is sometimes referred to as zero-sequence
differential and is applied for better sensitivity to ground faults as compared with the main
stator differential protection. The REF protection although more sensitive compared with the
main stator differential, should not be mistaken for the 100% stator ground fault protection based
on naturally generated 3rd harmonic voltages or artificially injected sub-harmonics.
Consider an external phase-to-phase fault. There is no ground current through the CT in the
neutral connection; and there is no zero-sequence current in the terminal CTs. The differential
current is balanced as zero versus zero. Should any of the phase CTs saturate, a spurious
differential signal is created.
Breaker-and-a-half applications call for extra consideration as both phase and ground fault
currents may enter and leave the RGF zone without producing any significant restraint.
The CTs could saturate on external faults due to high current amplitude, dc offset, high
residual flux, or the combination of thereof. The problem may get aggravated during ground
faults, because the neutral CT is quite often underrated.
But also, the phase CTs may saturate during magnetising inrush conditions due to large and
long lasting dc offset in the currents. The same applies to normal load currents when picking up
reactors connected to tertiary windings. In this case the dc time constants may be in the range of
hundreds of milliseconds.
(a)
IA
Transformer Winding
IG
(b)
(c)
IA
IB
IB
IC
IC
IG
Stator Winding
(d)
IA
Stator Winding
IA
IB
IB
IC
IC
IG
IG
IA2 IB2 IC2
104
105
The above solutions could be incorporated by the relay manufacturer as a part of the RGF
function, or added by the user when engineering the RGF application on modern transformer
relays.
1.2. Solutions based on restraint
One solution is founded on a unique definition of the restraining signal ensuring robust
performance under inrush and external fault currents, while providing for high sensitivity to
internal faults [1].
Differential current
The differential (operating) current is produced per principle of differential protection:
I D = IG + I N = IG + I A + I B + IC
(1)
where subscripts D, G, N, A, B and C stand for differential, ground, neutral (three times the
zero-sequence current) and phase currents, respectively; and | | symbolizes phasor magnitude.
Restraining current
Stability of the algorithm is founded on a unique way of producing the restraint. The
restraining signal is designed to take advantage of relations between symmetrical components of
three-phase currents for various fault types. This is done in order to maximize the restraint
during external faults. In a way, the applied restraining technique incorporates a crude phase
selection algorithm.
The restraining current for single-breaker applications is devised as the greatest among the
following three restraining currents:
I R _ aux = max( I R 0 , I R1 , I R 2
(2)
where:
IR_aux
IR0
IR1
IR2
Zero-sequence restraint is created as a vectorial difference between the neutral and ground
currents:
I R 0 = I G I N = I G (I A + I B + I C )
(3)
During external ground faults, the ground current is flowing through the RGF zone: the
current measured in the neutral connection and the tripled zero-sequence current in the terminal
connection are equal and out of phase. CT saturation would upset this balance, but still the
restraint calculated as a vectorial difference yields a value higher than the ground current (ideally
106
double). Given equations (1) and (3) when a relatively high slope setting is applied, it will take
one of the CTs to saturate completely to cause misoperation of this RGF function.
Positive-sequence restraint is created as follows:
If
If
else
else
I R1 =
then
then
I R1 = 3 ( I 1 I 0
(4a)
I R1 = 0
(4b)
1
I1
8
(4c)
If the positive-sequence current is below 150% of nominal, the restraint is reduced and
equals 1/8th of the positive-sequence current. This is to maximize sensitivity for low-current
internal faults under full-load conditions.
If the positive-sequence current is relatively high, the amount of restraint is the net difference
between the positive-sequence and zero-sequence currents. The zero-sequence current is
subtracted in order to reduce the restraint and consequently increase sensitivity on high-current
internal faults. The positive-sequence restraint does not have to be high on ground faults because
the zero-sequence portion of the restraint (3) ensures stability on external ground faults.
Negative-sequence restraint is created as follows:
I R2 = 3 I 2
OR
I R2 = I 2
(5)
Normally, a multiplier of 3 is used. However, when energizing the RGF zone such as during
magnetizing inrush conditions the digital filters transiently overestimate the negative-sequence
component [2]. To avoid some undesirable effects associated with post-filtering of the raw
restraining signal (2), multiplier of 1 is used in such circumstances. Figure 2 presents a simple
logic that controls the multiplier.
IA < 0.05 pu
Use multiplier 1
5cy
AND
IB < 0.05 pu
TIMER
2cy
Use multiplier 3
IC < 0.05 pu
Figure 2. Logic controlling the multiplier for the negative-sequence portion of the restraint.
Effective restraining current is created using exponentially decaying memory:
I R ( k ) = max I R _ aux ( k ) , A I R ( k 1)
(6)
where:
k
is a decaying factor (A < 1); the value of A selected in this implementation yields
50% decay in about 15 power cycles.
107
First, it produces significant restraint during periods of CT saturation following initial states
of saturation-free operation. Large restraining values produces shortly after fault inception decay
slowly due to the memory (6) providing proper restraint even if the saturated CTs produce lower
restraining currents.
Second, operation (6) extends the restraint after external faults are cleared. This is required to
cope with switch-off transients. An external fault may saturate one or more CTs and bring the
differential-restraining point close to the operating boundary of the characteristic. When the
external fault is subsequently cleared, both the differential and restraining currents start
decreasing. The resulting switch-off trajectory may temporarily enter the characteristic and cause
misoperation (Figure 3a). A crude way of preventing this from happening is to delay
intentionally after detecting a fault but not operating for it operation of the differential
function. Memory introduced by equation (6) substitutes such crude timer.
The differential characteristic used by this RGF algorithm is a single slope function with an
independent pickup setting as shown in Figure 3b.
(b)
external fault
with severe CT
saturation
uncontrolled
switch-off
trajectory
controlled
switch-off
trajectory
differential
differential
(a)
restraining
S
restraining
(7)
I R 0 = I G (I N 1 + I N 2 ) = I G (I A1 + I B1 + I C1 + I A 2 + I B 2 + I C 2 )
(8)
(9)
(10)
108
4
2
0
0
-2
-2
-4
-4
-6
-8
0.04
0.06
0.08
0.1
0.12
-6
0.04
0.045
0.14
0.05
0.055
0.16
0.06
0.065
time [sec]
0.5
-0.5
-1
0.04
0.06
0.08
0.1
0.12
0.14
0.16
time [sec]
1.5
I1
I0
Symmetrical Currents [A]
I2
0.5
0.04
0.06
0.08
0.1
0.12
0.14
0.16
time [sec]
109
Restraint
Components [A]
10
IR0
IR1
IR2
0.04
0.06
0.08
0.1
0.12
0.14
0.16
0.12
0.14
0.16
time [sec]
Total Restraint [A]
10
0.04
0.06
0.08
0.1
time [sec]
RESTRAINING
DIFFERENTIAL
0.04
0.06
0.08
0.1
0.12
0.14
0.16
time [sec]
110
10
Differential [A]
CTs SLOWLY
GOING OUT OF
SATURATION
SWITCH-OFF
TRAJECTORY
FAULT
10
Restraining [A]
111
I D = IT I N
Where: subscripts D, T and N stand for differential, terminal-side and neutral-side currents,
respectively and | | symbolizes phasor magnitude.
The restraining current is produced as the greater of the two currents:
I R1 = max I T , I N
(12)
The maximum of definition of the restraining current brings in two advantages. First,
during heavy internal faults, the ratio between the differential and restraining currents is much
higher than 100%, resulting in fast and reliable operation. Second, during an external fault with
saturation of one set of CTs, the restraining current is not reduced by the saturation as long as
one of the CTs (neutral or terminal) is not saturated.
Differential relays must cope with switch-off transients (Figure 3a and Figure 8). As delaying
even conditionally operation of protection is not desired, this algorithm applies additional
post-filtering to the raw restraining current in order to cope with switch-off transients, instead of
using a switch-off delay timer. The effective restraining current is a maximum instantaneous
value in the last power system cycle:
I R ( k ) = max I R1( k p )
p = 0 .. 1 cycle
(13)
When clearing an external fault that has just heavily saturated the CTs and thus has produced
a spurious differential current, it will take approximately one full cycle for such spurious
112
differential current to disappear. During that time the restraining current (13) owing to its onecycle memory does not decrease at all. This results in a well-behaved switch-off trajectory
(Figure 3a).
differential
SH
SL
BL
BH
restraining
BL: lower breakpoint marks the ac-saturation-free region; it is assumed that below this value
CT saturation will not occur due to the ac component even with 80% residual flux.
BH: higher breakpoint marks the ac-saturation region; it is assumed that above this value CT
saturation will occur due to the ac component alone even with 0% residual flux.
SL: lower slope controls sensitivity of protection under low currents; it should be set above
maximum spurious differential current with no CT saturation.
SH: higher slope recommended to be set at about 60%; this value is of a secondary
importance, as stability of the algorithm does not depend on the differential characteristic
alone.
Saturation detection
CT saturation detection combines three distinctive parts. First, fast saturation due to large ac
current components is detected. Second, slower saturation under small ac currents, but
significant and long-lasting dc currents is detected. Third, extra security measures applied after
detecting CT saturation are kept in place for an extended period of time by a dedicated memory
circuit. This is required because the applied CT saturation detection techniques are of a transient
nature and will not latch themselves.
The saturation flag, SAT, is set by a state-machine of Figure 11. A state machine is a
computational model consisting of a number of states (conditions) and functions that control the
transition between states. In this case the state machine controls a flag that determines when the
differential requires additional security (SAT flag).
113
RESET-1
NORMAL
(SAT := false)
SC
DIF
RESET-2
EXTERNAL FAULT
(SAT := true)
EXTERNAL FAULT
WITH CT SATURATION
(SAT := true)
(14)
While in the EXTERNAL FAULT state, the state machine may step further into the
EXTERNAL FAULT WITH CT SATURATION state. This is programmed to occur if the
differential characteristic is entered while in the EXTERNAL FAULT state. In order to reset
the EXTERNAL FAULT WITH CT SATURATION state, a RESET-2 condition must be
present for 200msec. The RESET-2 condition requires the differential/restraining point to stay
outside the differential characteristic:
RESET 2 = NOT (DIF )
(15)
To be effective, the saturation flag, SAT, must be set before actual CT saturation. Therefore,
the flag is set in both the EXTERNAL FAULT and EXTERNAL FAULT WITH CT
SATURATION states.
Consequently the saturation flag is set during all external faults even if they do not saturate
any CTs. If none or moderate CT saturation occurs, the saturation flag will reset 100msec after
clearing the external fault. If severe saturation occurs, the flag will reset approximately 300msec
after clearing the fault.
On the other hand the saturation flag is not set on any internal faults, even if some CTs
saturate.
AC saturation detection
Both ac and dc saturation detection methods employed by this algorithm are based on the
assumption that a given CT performs well for a short period of time even if it saturates heavily
114
later on. If so, the differential current will stay low during the initial period of saturation-free CT
operation while the restraining current develops quickly due to the fault.
Unlike busbar protection where CTs may saturate very heavily and very quickly, stator
differential protection is not exposed to very fast CT saturation. Saturation detection methods
intended for busbar applications may use short-window filtering techniques or even current
derivatives to cope with very short periods of saturation-free CT operation. Stator differential
protection may use a much simpler approach such as:
SC ac = (I D < S L I R ) AND (I R > B L )
(16)
Equation (16) declares CT saturation due to ac components if the restraining current is above
the lower breakpoint (boundary of guaranteed saturation-free CT operation), while the
differential current is relatively low (no differential pickup). Graphically, the ac saturation
detection may be illustrated as a differential/restraining current trajectory flying through a
particular window as depicted in Figure 12a. Under subsequent CT saturation, condition (16)
would reset, hence the need for the CT saturation memory circuit discussed above and shown in
Figure 11.
DC saturation detection
DC saturation occurs due to long-lasting dc components in the currents, even if both the ac
and dc components are relatively low. Relative dc components are used in this algorithm as
predictors of possible CT saturation.
First, the dc components are calculated over one-cycle windows for both the neutral-side and
terminal-side currents:
1
N
I dc ( n ) =
N 1
(17)
( nk )
k =0
Where N = 64 s/c.
Second, presence of significant dc components in the terminal-side and neutral-side currents
is checked using the ac components as adaptive thresholds:
) AND ( I T
) AND ( I N
DC T = I dcT > D1 I T
DC N = I dcN > D1 I N
>P
>P
(18)
(19)
Significant dc current is detected if the dc component is higher than a certain portion of the
ac magnitude (D1) and the ac magnitude is greater than the pickup threshold of the differential
characteristic. The latter condition is introduced to prevent detection of dc components on very
low currents where small dc offset of the relay A/D converter may impact the algorithm. D1 is a
factory constant adjusted at 0.5.
As shown in Figure 12b, dc saturation is declared 1.5 power system cycle after large dc
components are detected and no significant differential current is present. The 1.5 cycle delay is
introduced to give the algorithm a chance to operate on internal faults without additional security
measures. Owing to this delay, low-current internal faults are detected with no degradation in
sensitivity before the dc saturation algorithm operates. On the other hand, the 1.5 cycle delay sets
115
a limitation on security of the algorithm: if CTs saturate faster than in 1.5 cycle under very low
currents, the saturation will go undetected and may result in a nuisance operation.
(b)
DCT
SL
BL
DCN
external
faults
TIMER
AND
internal
faults
OR
differential
(a)
1.5cy
5cy
SCdc
DIF
restraining
Figure 12. Illustration of the ac saturation detector (a); effective logic of the dc saturation
algorithm (b).
The final saturation condition, SC, used by the state machine of Figure 11 is produced as
follows:
SC = SC ac OR SC dc
(20)
When CT saturation is detected, the stator differential function is not blocked or delayed, but
extra security measures are applied. Effectively, the relay switches to a 2-out-of-2 logic with the
differential and phase-comparison protection principles working in parallel.
Phase comparison supervision
The phase comparison principle checks the relative direction of the neutral-side and terminalside currents (Figure 13a, b). Both the currents must be relatively high in order to check the
direction. If at least one current is low, the angle is not checked and permission to trip is granted.
In order to maintain high sensitivity and avoid user settings that may be difficult to calculate, the
currents are compared in an adaptive way using the raw restraining current (12) as a base:
If ( I T
> B L OR
then
else
( IT
))
AND ( I N > B L OR
(IN
) (21a)
(21b)
DIR1 = true
(21c)
116
DIR1
DIF
IT
TIMER
AND
(c)
IN
AND
(a)
DIR
1.5cy
1.5cy
SAT
(d)
SAT
IT
DIR
AND
IN
OR
(b)
OP
DIF
Figure 13. Phase-comparison principle: internal fault (a); external fault (b);
implementation (c); final operating logic of the stator differential protection (d).
Numerous simulations and the up-to-date filed experience show that the adaptive logic of
Figure 13d ensures an excellent balance between speed, sensitivity and security. Nevertheless,
the three critical flags (DIF, DIR and SAT) are available in user-programmable logic for custom
applications.
Two field examples collected in North and South Americas as an outcome of misoperation of
originally installed relays are presented. Results of waveform playback to the enhanced relay [5]
are discussed below.
Example 1. Load change
Figure 14 presents a case of load change. The current is at the level of 0.3 of CT nominal,
increasing to about 0.5 of nominal. The associated dc component was enough to saturate one of
the CTs (Figure 14b) resulting in enough spurious differential current to cause misoperation of
the installed relay. The new algorithm detects CT saturation (SAT) well before the differential
principle misoperates (PKP). The directional element restrains on this through-current condition
(DIR), and the stator differential protection remains stable (OP).
Example 2. Inrush current
Figure 15 presents a case of transformer magnetizing inrush. The fully offset current is at the
level of 2.1 of CT nominal. The associated dc component was enough to saturate one of the CTs
as soon as in 2 cycles (Figure 15b) resulting in enough spurious differential current to cause
misoperation of the installed relay. The new algorithm is stable for this case.
117
(b)
0.8
(a)
0.6
0.4
0.2
-0.2
-0.4
0.24
0.26
0.28
0.3
0.32
0.34
0.36
0.38
0.4
0.42
(a)
0.5
-0.5
-1
-1.5
-2
0.25
0.3
0.35
0.4
118
0.45
0.44
x 10
iABC, Amperes
0.5
0
-0.5
-1
-1.5
0.15
0.2
0.25
0.3
0.35
4000
zero-sequence (waveform)
3000
2000
1000
0
-1000
0.15
0.2
0.25
time, sec
0.3
0.35
Figure 16. Transformer is energized from its delta winding. Spurious zero-sequence current
as high as 30% of the inrush current.
Desensitizing the function as a way of coping with spurious operating signals defeats the
purpose of sensitive ground overcurrent protection. One solution [] uses an adaptive threshold
a small portion of the positive-sequence current is subtracted from the operating signal prior to
comparing with the constant, potentially sensitive, user setting. In this way, the amount of extra
security increases automatically as the danger of saturation increases (current magnitude).
With reference to Figure 17 this approach uses a positive-sequence restraint to cope with
spurious symmetrical components, and on energy-based directional comparison in the directional
part to cope with angle uncertainty during transients.
119
Positive-sequence restraint
The operating quantity for the overcurrent part of the negative/zero sequence directional
overcurrent protection element is compensated with a small portion of the positive-sequence
current:
I op = I 2 K I 1
(22)
This solution is more favorable than just raising the threshold for the zero- or negativesequence current magnitude. The system unbalance and errors of instrument transformers are
proportional to the amount of current and the linear additive compensation (22) is justified.
Often, the K factor is a user-adjustable setting.
OVERCURRENT PART
iA
Current
Pre-filtering
(dc offset removal)
iB
iC
vA
vB
vC
I2
I1
Phasor &
Symmetrical
Component
Estimation
Voltage
Pre-filtering
(CVT transient
removal)
Positive-Sequence
Restraint
Iop > D
Iop = I2 - K I1
AND
V2
Operate
Operating
Energy
Figure 17. Logic diagram of the ground directional functions (negative-sequence shown).
Energy-based directional comparison
In order to cope with angle uncertainties during transient conditions and to provide for fast
operation, the energy-based directional discrimination is applied. The principle reproduces to
some extent electro-mechanical directional relays. Power required to move the virtual rotor is
emulated as follows:
P = S1 S 2 cos ( )
(23)
where S1 and S2 are magnitudes of the polarizing and operate signals, respectively; and is
an angle between the two signals.
The relay operates if the energy is sufficient to complete movement of the relay rotor. This
approach gives an extra security because: (1) The mechanism moves faster if the signals are
larger. (2) The mechanism moves faster if the angle is closer to 0 degrees. (3) The direction of
the movement is positive (towards operation) if the fault is in the relay direction, and negative if
the fault is in the reverse direction (owing to the cosine function).
In this solution the operating and polarizing signals are calculated accordingly to the required
functionality. For example, for the forward-looking negative-sequence polarized negativesequence IOC:
S1 = I 2 1 RCA ,
S 2 = V2
(24)
120
M 1 1
1( n k )
S 2 ( n k ) g ( n k )
k =0
(25)
The function g is an equivalent of the cosine in the electro-mechanical world. The adopted
shape of this function accommodates an adjustable limit angle and is shown in Figure 18.
The restraining energy uses the positive sequence current and is calculated as a maximum
of the restraining power over M2 samples:
For a forward-looking element:
))
(26a)
1
E rst ( n ) = K 2 MAX kM=201 I 1( n k ) S 2( n k )
4
))
(26b)
The constants M1 and M2 are internal relay parameters and in one relay [6] they are fixed at a
quarter, and a half of the power cycle, respectively.
The K2 constant is another internal relay parameter, which controls the balance between
speed and security. The directional elements will tend to operate faster for lower values of K.
One relay uses a K2 of 0.25 [6].
The forward-looking element operates if its operating energy is above its restraining energy;
the reverse-looking element operates if its operating energy (negative) is below its restraining
energy (negative).
(a)
(b)
90o
1.0
energy factor in a
digital algorithm
forward
fault
reverse forward
fault fault
angle
angle
reverse
fault
180o
adjustable
limit angle
180o
equal areas
4. Distance Protection
Distance protection is being used in a vicinity of power transformers.
121
Impedance relays provide for transformer backup protection. However, they typically work
in a permissive over-reaching scheme and as such are not impacted by transformer inrush
current.
In different applications a sub-transmission line may be configured to pickup a transformer at
the far end of the line. Transmission line could have tapped transformers to feed subtransmission network or a load center. It is important that in such applications distance functions
do not operate spuriously on transformer inrush currents.
For this purpose of analysis it is justified to consider the initial inrush due to energisation of a
transformer since the recovery inrush after clearing an external fault would generate much lower
inrush currents.
It may be further assumed that the voltage signal will not drop during the energisation inrush
conditions. In reality a small voltage dip may occur due to the elevated inrush current. A safety
factor may be used if needed assuming that the voltage at the distance relay location drops to say
80% of nominal during inrush conditions for a near-by transformer.
For a given distance relay it may be approximated how much of a typical inrush waveform is
seen by a relay circuit or algorithm as the operating signal. Based on that approximation, the
maximum secure reach may be calculated.
This information could be obtained by testing or theoretical analysis assuming knowledge of
internal workings of a given relay model. For example, one particular algorithm would pickup if
the reach exceeds the following value [7]:
Z max = 2.5
Vn
I peak _ inrush
(27)
If a large transformer is tapped on a long line, but close to the substation, the above reach
condition may get violated: a distance zone set to reach the remote line terminal, would pickup
on transformer energisation.
One common solution is to use harmonic or THD inhibit to supervise distance functions
permanently, or for a brief period of time following energisation of the circuit.
5. Conclusions
Transformer inrush current exposes CTs to considerable saturation. This includes dc
saturation on low current magnitudes but substantial and long lasting dc offsets.
CT saturation errors impact sensitive or long-reaching protection functions applied in
vicinity. Harmonic inhibit is a crude solution to the problem.
New protection designs tend to address the issue by applying sophisticated algorithms while
utilizing full intelligence of digital relays.
6. References
[1] B.Kasztenny, L.Sevov, A.Jaques, New Algorithm for Low-Impedance Restricted Earth Fault
Protection (8th Developments in Power System Protection Conference, Amsterdam, April 58, 2004, pp.372-375).
122
123