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P-N JUNCTION: - When a P-type crystal is joined with a N-type crystal in such a
manner that crystal structure remains continuous then this structure is called as
P-N Junction.
Formation of P-N junction: - Diffusion method is used to form a P-N Junction.
In this method an element of III group (like Boron) is coated on a slice of N-type
semiconductor called wafer or an element of V group (like phosphorus) is coated
on P-type semiconductor. When this semiconductor is heated at a high
temperature (about 500C) the impurity is diffused inside the semiconductor.
Diffusion is more at surface and decreases as the depth increases. The depth up
to which the diffusion takes place, a junction is formed which is called P-N
Junction. On the one side of this junction there is P-type semiconductor and on
the other side there is N-type semiconductor.
What happens at the time of formation of P-N Junction (formation of
depletion region and potential barrier): As soon as a junction is formed the
holes from p-region diffuse towards n- region and electron from n- region diffuse
towards p-region due to the high concentration of holes and electron into two
different regions. In the vicinity of junction the
Potential Barrier
P-TypeN-Type
Electrons
majority carrier
Holes
majority carrier
Depletion region
Immobile - ve ions
electrons and holes recombines with each other and vanishes, due to which
there is a excess of immobile +ve ions in n-region and ve ions in p-region. Thus
an electric field and hence a potential difference called potential barrier is
developed across the junction which stops the further diffusion of holes and
electrons. The region free form charge-carriers on both side of junction is called
depletion region or space charge region.
0.7
ElectricField 6 7 10 5 Vm 1
10
PN
The thickness of
-6
the depletion region is of the order of 10
meter while the potential barrier is about 0.7
volt. Therefore
B
A
Biasing of p-n junction: -
Depletion layer
PHYSICS DEPARTMENT, V.B.P.S., NOIDA
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Forward biasing
SEMICONDUCTOR DEVICES
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(I)
Forward Bias: - When p-region of a p-n junction is joined to the (+) ve
pole of a battery and n-region to -ve pole then the junction is said to be forward
biased.
Action of p-n junction: - When the p-n junction is made forward bias the (+)
ve pole of the battery repels the holes towards n-region and the (-) ve pole
repels the electron towards p-region. Due to which the electrons and holes enter
the depletion region and the thickness of depletion region decreases. If the
external potential is greater than the potential barrier then near the junction
electrons recombine with holes. For each electron-hole combination that takes
place near the junction, a covalent bond breaks in p-region near the positive
pole of battery. Due to which electrons and holes are produced in pair, the
electron is captured by the (+) ve terminal, while the hole moves towards the
junction. At the same time an electrons enters the n-region from the ve
terminal of the battery, thus a forward current flows in the circuit due to the flow
of electrons and hole.
During the forward bias the applied D.C. voltage opposes the potential barrier
due to which the thickness of the depletion layer decreases. Thus p-n junction
offers low resistance in forward bias.
(II) Reverse Bias: - When p-region of a p-n
junction is joined to the (-) ve pole of a
P N
battery and n-region to +ve pole then the
junction is said to be reversed biased
Action of p-n junction: - when p-n junction
is reversed biased, the ve pole of the battery
attracts the holes present in P-region, while the
+ve pole of the battery attracts the electrons
present in the n-region. Thus the electrons and
holes get away from the junction and the
thickness of depletion region increases. But a
very small current flows through the junction
Reverse biasing
due to the recombination of minority carriers.
This current is called as reverse current. If the reverse bias voltage is made very
high, all the covalent bonds near the junction break and a large number of
electron-hole pairs are created due to which reverse current increases abruptly.
This phenomenon is called avalanche breakdown and the reverse voltage at
which this phenomenon occurs is called as reverse break down voltage or zener
voltage which depends upon the density of impurity atoms. Due to the over
heating at this voltage, the p-n junction may be damaged.
During the reverse bias the applied D.C. voltage aids the potential barrier
due to which the thickness of the depletion layer increases and hence it offers
the high resistance in reverse bias.
Symbol of p-n junction diode:-
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SEMICONDUCTOR DEVICES
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Forward Current If
Rh
BATTERY
Vf
From the graph it is clear that initially there is no current. When the applied
voltage is less than the potential barrier, the current flow through the junction is
very small. As the forward voltage increases above the potential barrier, current
increases approximately linearly. When the forward voltage is equal to voltage
of potential barrier then the curve becomes like a knee and called as knee
voltage. At this voltage the thickness of depletion layer becomes negligibility
and the diffusion of electrons and holes across the junction take place easily i.e.
the p-n junction offer low resistance when it is forward bias and the resistance is
of the order of 100 ohm.
(II) Reverse Characteristic Curve: Make the connection according to the circuit shown in the following figure.
Change the reverse voltage and note the corresponding reverse current. The
graph plotted between reverse voltages and reverse current is called as reverse
bias curve. Practically in reverse bias there is no current if the applied voltage is
low but a very small flow due to minority carriers. On increasing the reverse
REVERSE VOLTAGE
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Reverse Current Ir (
Zener Voltage
SEMICONDUCTOR DEVICES
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A.C. Input
Voltage
D.C. 0utput
Voltage
Voltage to a very high value, the current increases abruptly, which is clear from
graph. It is due to the fact that at very high voltage, the entire covalent bond
near the junction is broken. Due to which a large number of holes & electrons
are liberate and the corresponding voltage is called as Zener voltage. In reverse
bias the thickness of depletion layer increases due to which the further diffusion
of charge carriers stops and no current flows through the junction. Thus in
reverse bias the junction offers very high resistance.
Vd
V
I
the small change in the current is called as dynamic or a.c. resistance of the
junction diode. It is represented by Vd.
The region of the characteristic curve where dynamic resistance is almost
independent of the applied voltage is called the linear region of junction diode.
Page |4
A.C. Input
Voltage
D.C. 0utput
Voltage
SEMICONDUCTOR DEVICES
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Arrangement:- The p-region of the junction diode is joined to the one terminal
of the secondary coil of a step down transformer and the load resistance is
joined between n-region and the IInd terminal of the secondary coil.
Working:- Let during the first half cycle of the input a.c. upper end i.e. point S 1
of secondary is at +ve potential and the lower end i.e. point S 2 is at ve
potential. Thus the diode is forward bias. During first half cycle and current flows
through diode in loadresistance from C to D.
During the next half cycle the upper end becomes ve and lower end
becomes +ve and thus the diode gets reverse biased and no current fows
through it. In the next half cycle diode gets forward biased and current flows
through it from C to D and this process repeated again and again. The current
obtain in output is discontinuous and pulsating d.c. due to which there is a huge
loss of energy.
Full-wave Rectifier:- A rectifier which rectifies both halves of the a.c. input is
called a full wave rectifier.
Principle:- It is based on the principle that the diode offers low resistance when
it is forward bias and offers high resistance when it is reverse biased.
Arrangement:- The a.c. supply is fed across the primary coil P of a step down
transformer. Two two ends of the secondary coil S of the transformer are
connected to the p- regions of the junction diodes D 1 and D2 . A load resistance
RL is connected beteen the n-regions of the two diodes and the ncentral tapping
of the secondary coil. The out put d.c. is obtained across the load reistance.
Working:-Suppose that during first half of the input, the upper end S 1 of the
secondary is at + ve pot. and lower end S 2 is at () ve pot. So the diode D1
gets forward bias and D2 gets reverse bias hence current flows through D 1 in
load resistance from C to D. During the next half cycle S 1 becomes ve and S2
becomes +ve and hence D 1 gets reverse bias and D2 gets forward bias. Thus the
current flows through D2 from C to D in load resistance.
Hence the full wave rectifier, rectifies the both halves of a.c. The
output d.c. is continuous but pulsating. To reduce the fluctuations, filter circits
are used in output circits. Electrolytic condenser and zener diodes are use to
reduce the fluctuations of d.c.
Different types of junction diode :-
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SEMICONDUCTOR DEVICES
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(I) Zener diode:- A specially designed diode in which P and N region are
heavily dopped due to which the depelation layer junctioin width is small and
the junction field ie potential barrier is high and it can operate continuously,
with out being damaged in the region of reverse breakdown voltage, is called
zener diode.
VZ
VZ
Input Voltage (Vi)
Reverse bias
I1
I2
I3
I4
Volts
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SEMICONDUCTOR
DEVICES
LIGHT
ut
5. In electronic counters.
Light Emitting Diode (LED): - A light emitting diode is simply a forward
biased p-n junction made of gallium arsenide or indium phosphide and emits
spontaneous light radiation. When a LED is made forward bias then the energy
is released due to the recombination of electrons and holes, falls in visible
region or infrared region of EM spectrum.
Advantages over conventional incandescent lamps:
1. Low operational voltage and less power consumption.
PHYSICS DEPARTMENT, V.B.P.S., NOIDA
Page |7
RL
SEMICONDUCTOR DEVICES
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E
B
Page |8
SEMICONDUCTOR DEVICES
(II)
ut
C
PNP Transistor:
- A junction transistor in which a thin layer of N-type
semiconductor is sandwiched between two layers of P-type
semiconductors
P N P is known as PNP transistor.
E
Emitter
Collector
C
B
Page |9
SEMICONDUCTOR DEVICES
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In a transistor base is lightly doped and very thin. The region, which is lightly
doped and very thin, is called as Base. The region, which is highly doped, is
called emitter while the remaining one is called collector. When a transistor is
used in a circuit, base emitter junction is always forward bias while the collector
base junction is reverse bias.
Action of Transistor: (a) Action of n-p-n Transistor: - The emitter base junction is made forward bias
by using a battery VEE while the collector base junction is made reversed bias by
N
E
IE
Emitter
IB
Collector
IC
VEE
VCC
using the VCC. The ve pole of battery V EE repels the electrons in emitter region
(as majority carrier in n-region) towards base. Since the base is very thin and
lightly doped, hence about 95% electrons cross over the base region and
entered the collection region where they are attracted by the +ve pole of the
battery VCC. As soon as an electron enters the +ve pole of the battery V CC, at the
same time an electron enters the emitter region from the ve pole of the battery
VEE and this process is carried out continuously. About 5% electrons recombined
with holes in base region. For each recombination a covalent bond breaks which
creates the hole and electron in pair. Electron enters +ve pole of V EE through B
and hence base current IB flows which is very small.
If IE, IC and IB are the emitter, collector and base current then (According to
Kirchhoffs 1st law)
IE = I B + I C
It may note that in n-p-n transistor current flows due to the flow of electrons in
and outside of transistor.
SEMICONDUCTOR DEVICES
P
ut
IE
Emitter
IB
Collector
VEE
IC
VCC
Characteristics of n-p-n transistor in Common Emitter configuration: Common Emitter characteristics of a transistor are the graph plotted between
the voltage and the current when emitter is earthed, base is used as input
terminal and the collector as output terminal.
Ic
C
mA
IB
n-p-n
A
VCC
VBB
+
+
VBE
__
VCE
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ut
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ut
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ut
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ut
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ut
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ut
SEMICONDUCTOR DEVICES
ut
N-P-N Transistor: -The base emitter circuit is made forward biased by using a
battery VBB while the emitter, collector circuit is made reversed bias by using
battery VCC. To draw the characteristic the circuit arrangement is shown in the
above figure in which a n-p-n transistor is used.
A transistor has two types of characteristics.
PHYSICS DEPARTMENT, V.B.P.S., NOIDA
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SEMICONDUCTOR DEVICES
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VBE
Rin
I B
VCE
VCE
Rout
I C
IB
I B
VCE
(VCE) = 2v
(VCE) =3v
(VBE)
Input Characteristics
(VCE)
=
=
=
=
=
250
200
150
100
50
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0utput Characteristics
IC (mA)
IC (m A)
IB (mA)
IB
IB
IB
IB
IB
(VCE) = 3V
IB (mA)
Transfer Characteristics
SEMICONDUCTOR DEVICES
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Amplifier circuit using n-p-n transistor: - The emitter is common to both the
input and output. The emitter is made forward bias by the battery V BB and
collector emitter circuit is made
reversed bias by the battery V CC Thus the input resistance is low and the output
resistance is high. The low input voltage signal is plied across emitter base
circuit and amplified output voltage is obtained across collector emitter circuit.
Let IE , IB and IC are the emitter base and collector current so according to
Kirchoffs lawIE = IB + IC ---------------------- (1)
PHYSICS DEPARTMENT, V.B.P.S., NOIDA
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SEMICONDUCTOR DEVICES
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If RL is the load resistance then ICRL will be voltage drop across it. If VCE is the
voltage across emitter collector then
VCE =VCC IC RL ---------------------(2)
The variation in input signal voltage cause the variation in emitter current which
produce the variation in collector current and hence in collector voltage. These
variations in collector voltage appear as amplified output-voltage. The input
signal and output signal are in opposite phase.
Phase relation between input and output signals: - The input signal and
the output signal are in opposite phase, which can be explained as belowWhen an a.c. signal is fed to the input circuit, the forward bias increases
during positive half cycle of the input. This results in increase in IC and
consequent decrease in VCE , thus during positive half cycle of the input, the
collector becomes less positive.
During negative half cycle of the input, forward bias decreases, therefore,
the value of IE and IC also decreases and VCE would increase making the
collector more positive. In common emitter amplifier, thus there is 180out of
phase amplification.
I C
I B
Vout
I C Rout
Vin
I B Rin
AV
I C Rout
I B Rin
A V ac Resistance Gain
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SEMICONDUCTOR DEVICES
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Since > so the voltages gain in common emitter amplifier is very large as
compared to that in common base amplifier.
Change in output power
Change in input power
PO
AP
Pi
AP
AP
I c 2 RO
I B 2 Ri
AP 2 resistance gain
I c
VBE
gm
gm
VC E
I C
I B
I B
VBE
g m ac
1
Rin
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SEMICONDUCTOR DEVICES
ut
We know that
I E I B IC
or I E I B I C
divide by I C on both sides
I E
I B
1
I C
I C
1
1
1
1
1
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SEMICONDUCTOR DEVICES
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Working: - When the tapping key K is pressed for a moment, a small current
starts flowing through the coil L1 due to the change of current, an emf is
induced in inductor L. Due this induced
voltage the emitter current and hence the
collector current increases. Due to the
increase in collector current the magnetic
flux linked with L & L1 increases; thus the
voltage induced in L also increases and
hence forward bias is further increased
which increases IC and IE. This process
continues until the induced emf across
the inductor attains a saturation value.
During this process the upper plate of the
capacitor gets +ve charge. When induced
emf attains saturation value the induced
emf becomes zero. Now the capacitor
discharges through L; as a result emitter current decreases and hence collector
current also decreases. The decreasing collector current will induced emf in
inductor L in the reverse direction, which decrease the emitter current and
hence collector current. This process continues till the collector current reduces
to zero. Now the mutual induction stops playing its role. At this stage the lower
plate of the capacitor C will get + ve charge and discharges through L. Thus the
emitter current and hence the collector current again start to increasing i.e. the
process gets repeated and the collector current oscillates between a maximum
and zero value. The repeated process generates oscillations of constant
amplitude and the relation gives freq.
= 1/ 2 LC
By changing the value of C the freq. of the oscillations can be changed
TRANSISTOR AS A SWITCH
A transistor can be used as a switch; the following fig (1) shows the circuit
diagram of a base biased n-p-n transistor in CE configuration states Here R B is a
resistor in the input circuit and Rc in the output circuit.
Applying Kirchhoffs rule to the input and output circuits separately, we get
VBB = IBRB + VBE = Vi -----------------------------(1)
VCE=VCCICRC = Vo ------------------------------(2)
The voltage VBB has been regarded as the dc input voltage Vi and VCE as the dc
output voltage V0.
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SEMICONDUCTOR DEVICES
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Fig. 2 shows typical output voltage (V0) input voltage (Vi) characteristic, called
the transfer characteristic of the base biased transistor. It has three well-defined
regions as follows:
1. Cutoff region: When Vi increases from zero to a low value (less than 0.6 V in
case of a Si transistor), the forward bias of the emitter-base junction is
insufficient to start a forward current i.e. I B = 0 and hence Ic = 0. The transistor
is said to be in the cutoff region. From equation (1), the output voltage Vo = Vcc.
2. Active region: When Vi increases slightly above 0.6 V. a current Ic flows in
the output circuit and the transistor said to be in the active state.
3. Saturation region: When Vi becomes very high , a large collector current Ic
flows which produces such a large potential drop across load resistance Rc that
the emitter-collector junction also gets forward biased and output voltage V 0
decreases to almost zero. Now the transistor is said to be in the saturation state
because it cannot pass any more collector current Ic.
Switching action of a transistor: A transistor can be used as a switch if it is
operated in its cutoff and saturation states only. A switch circuit is designed in
such a manner that the transistor does not remain in the active state. As long as
the input voltage is low and unable to forward-bias the transistor, the output
voltage V0 (at Vcc) is high. If Vi is high enough to drive the transistor into
saturation, then V0 is low, nearly zero. Thus when the transistor is not
conducting (in cutoff region), it is said to be switched off and when it is driven
into saturation, it is said to be switched on.
DIGITAL ELECTRONICS
In these electronics circuits, the current or voltages will have only two
values, High (1) and Low (0). In digital circuits, the electrical pulses of two
levels only are used as signal voltages.
Logic Gates:
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SEMICONDUCTOR DEVICES
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OR gate
b.
AND gate
c.
NOT gate
All other logic gates can be formed by combination of these three gates.
Truth Table:
It is table that indicate all possible combinations of input signals and their
output.
Boolean Algebra:
This is the algebra which can be applied to logic gates based on Binary
number system.
OR Gate:
It is a two input single output gate. The output is one if any of the two
inputs or both the inputs are one.
The truth table and symbol of OR
gate are:
A
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SEMICONDUCTOR DEVICES
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AND Gate:
It is also a two input single output gate. The output is one if both the inputs
are one.
(a) Suppose A=0 and B=0: The potentials at A and B are forward biased
and offers no resistance. The diode D1 conducts and net potential difference
appears across R and Y=0.
(b) Suppose A = 0 and B = 1: In this case also A is forward biased and B is
in off state. The diode D1 conducts and net potential difference appears across
R and Y = 0.
(c) When A = 1 and B = 0: In this case also A is in off state and B is
forward biased. The diode D2 conducts and Y = 0
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SEMICONDUCTOR DEVICES
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(d) When A = 1 and B = 1: Here both diodes are in off state, hence no
potential drop occurs across R and Y = 1.
NOT Gate:
It is a single input single output gate. The truth table and symbol is
A
Y A
YX
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NOR Gate:
It is OR gate followed by a NOT gate. It is a two input single output gate.
The truth table and symbol are,
A
YX
Y AB A B
Y AB A B
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