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8086 Architecture

BIU (Bus Interface Unit):

It sends out tasks.

It fetches instructions from memory.

It reads data from memory and ports.

It also writes data from memory and ports.

So BIU takes care of all the address and data transfers on the
buses.

Execution Unit:

It tells the BIU, from where to fetch the instruction or data.

It decodes the fetched instructions.

It executes the fetched instructions.


EU takes care of performing operations on data.

The Bus Interface unit (BIU):-

This unit handles all transfer of data and addresses on the buses for
the EU(execution unit). This unit sends out addresses, fetches
instructions from memory, reads data from ports and memory and
writes data to ports and memory.

Different Parts of BIU:


a. Segment Register
b. Instruction Pointer
c. The Queue

1.)Segment Register:- BIU contains four 16-bit segment registers as


follows:

Code segment (CS) register


Stack segment (SS) register
Extra segment (ES) register
Data segment (DS) register

Function of Segment Register:-

In 8086 complete 1MB memory is divided into 16 logical segments.


Each segment thus contains 64 KB of memory.
While addressing any location in the memory bank, the Physical
address is calculated from two parts, the first part is Segment
address, and the second is Offset.
The segment registers contain 16-bit segment base addresses
related to different segments.
Thus the CS, DS, ES, SS segment registers, respectively contain the
segment addresses for the Code, Data, Extra and Stack segments.
They may or may not be physical separated.

Each segment register contains a 16-bit base address that points to


the lowest-addressed byte of that particular segment in memory.

Generation of physical address:-

Segment address- 1005H


Offset address

- 5555H

Segment address-1005H- 0001 0000 0000 0101


Shifted by 4-bit positions-0001 0000 0000 0101 0000
+
Offset address

0101 0101 0101 0101

Physical address

-0001 0101 0101 1010 0101


1

Instruction Pointer: It is 16-bit register, which identifies the location of the next
word of instruction code that is to be fetched in the current code
segment.
IP contains an offset instead of the actual address of the next
instruction.

The 20-bit address produced after addition of the offset stored


in IP to segment base address in the CS is called the Physical address
of the code byte.

The Queue: The last section of BIU is the FIFO group of registers called a
queue. It is basically a group of registers.
This arrangement makes possible for the BIU to fetch the
instruction byte while EU is decoding an instruction or executing an
instruction which does not require use of buses.

This arrangement is called pipelining.

This is done to speed up the program execution.

Execution Unit (EU) : Execution unit receives program instruction


codes and data from the BIU, executes them and stores
the results in the general registers. It can also store the data in a
memory location or send them to an I/O device by passing the data
back to the BIU. This unit, EU, has no connection with the system
Buses. It receives and outputs all its data through BIU.

ALU (Arithmetic and Logic Unit) : The EU unit contains a circuit board
called the Arithmetic and Logic Unit. The ALU can perform
arithmetic, such as, +,-,,/ and logic such as OR, AND, NOT
operations.

Register : A register is like a memory location where the exception is


that these are denoted by name rather than numbers.
It has 4 data registers, AX, BX, CX, DX and 2 pointer registers SP, BP
and 2 index registers SI, DI and 1 temporary register and 1 status
register FLAGS. AX, BX, CX and DX registers has two 8-bit registers to
access the high and low byte data registers.
The high byte of AX is called AH and the low byte is AL. Similarly, the
high and low bytes of BX, CX, DX are BH and BL, CH and Cl, DH and DL
respectively. All the data, pointer, index and status registers are of 16
bits.
Else these, the temporary register holds the operands for the ALU
and the individual bits of the FLAGS register reflect the result of a
computation.

Memory Segmentation

The total memory size is divided into segments of various sizes.


A segment is just an area in memory.
The process of dividing memory this way is called Segmentation.

In memory, data is stored as bytes.


Each byte has a specific address.
Intel 8086 has 20 lines address bus.
With 20 address lines, the memory that can be addressed is
2^20bytes.
2^20= 1,048,576 bytes (1 MB).
8086 can access memory with address ranging from 00000 H to
FFFFF H.

In 8086, memory has four different types of segments.


These are:

Each of these segments are addressed by an address stored in


corresponding segment register.
-bit in size.
corresponding segment.

nnot store 20 bits, they only store


the upper 16 bits

. IP - the instruction pointer:


Always points to next instruction to be executed
Offset address relative to CS
IP register always works together with CS segment register and it
points to currently executing instruction.

FLAGS REGISTER

Flags Register - determines the current state of the processor. They


are modified automatically by CPU after mathematical operations,
this allows to determine the type of the result, and to determine
conditions to transfer control to other parts of the program.
Generally you cannot access these registers directly.
Carry Flag (CF) - this flag is set to 1 when there is an unsigned
overflow. For example when you add bytes 255 + 1 (result is not in
range 0...255). When there is no overflow this flag is set to 0.
Parity Flag (PF) - this flag is set to 1 when there is even number of
one bits in result, and to 0 when there is odd number of one bits.
Auxiliary Flag (AF) - set to 1 when there is an unsigned overflow for
low nibble (4 bits).

Zero Flag (ZF) - set to 1 when result is zero. For non-zero result this
flag is set to 0.
Sign Flag (SF) - set to 1 when result is negative. When result is
positive it is set to 0. (This flag takes the value of the most significant
bit.)
Trap Flag (TF) - Used for on-chip debugging.
Interrupt enable Flag (IF) - when this flag is set to 1 CPU reacts to
interrupts from external devices.
Direction Flag (DF) - this flag is used by some instructions to process
data chains, when this flag is set to 0 - the processing is done
forward, when this flag is set to 1 the processing is done backward.
Overflow Flag (OF) - set to 1 when there is a signed overflow. For
example, when you add bytes 100 + 50 (result is not in range 128...127).

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