Digital Logic

and

Microprocessor
(Digital Principals and Applications)
(Digital Electronics)
(Choice Based Credit System (CBCS) Pattern) New Syllabus
(For B. Sc. Computer Science, B,.Sc, Electronics, B.Sc. Physics, BCA, M.Sc. Computer
Science, MCA and B.E. Courses)

By

Dr. P.Rizwan Ahmed, MCA., M.Sc.,M.A.,M.Phil.,Ph.D,

Head of the Department
Department of Computer Applications &
Post Graduate Department of Information Technology
Mazharul Uloom College, Ambur - 635 802
Vellore Dist. Tamil Nadu.

Margham Publications
No.24, Rameswaram Road, T- Nager,
Chennai- 600 017 Phone:(044) 2432 2469
Web Site: www.margham.in

E-mail: www.margham.tn@gmail.com

CONTENTS
Preface
Acknowledgement

Chapter 1

Introduction to Computer

1.1 Introduction to Computer

1.2 Applications/ Uses of Computer
1.3 Different Types of Computer Systems
1.3.1 Classification based on operational principle
1.3. 1.1 Analog Computers:
1.3.1.2 Hybrid computers:
1.3.2 Classification based on Capacity
1.3.2.1Mainframe Computer
1.3.2.2 Microcomputer
1.3.2.3 The Mini computer
1.4 Programming Languages
1.4.1 Types of Programming Language
1.4.1.1 Low Level or Machine language.
1.4.1.2 Assembly Language
1.4.1.3 High level language
1.4.1.4 Difference between machine, assembly and High-level language

Summary
Review Questions
Chapter 2
2.1 Introductions
2.2 Digital Computers
2.2.1 Control Unit
2.2.2 Memory, Processor, I/O Unit
2.3 Digital systems
Summary
Review Question

Digital Computer and Digital Systems

Chapter 3

Number Systems

3.1 Introduction
3.2 Number System
3.2.1 Binary Number System
3.2.2 Octal Number System
3.2.3 Decimal Number System
3.2.4 Hexadecimal Number System
3.3 Representation of Numbers Systems
3.4 Number Base Conversions
3.4.1 Decimal to Binary Conversion (Integer
3.4.2 Binary to Decimal Conversion (Integer)
3.4.3 Octal to Decimal Conversion (Integer)
3.4.4 Decimal to Octal Conversion (Integer)
3.4.5 Decimal to Hexadecimal Conversion (Integer)
3.4.6 Hexadecimal to Decimal Conversion (Integer)
3.4.7 Octal to Binary Conversion (Integer)
3.4.8 Binary to Octal Conversion (Integer)
3.4.9 Hexadecimal to Binary Conversion (Integer)
3.4.10 Binary to Hexadecimal Conversion (Integer)
3.4.11 Hexadecimal to Octal Conversion (Integer)
3.4.12 Octal to Hexadecimal Conversion (Integer)
Summary
Review Question

Chapter 4

Binary Arithemtics

4.1 Introduction
4.1.1 Binary Addition
4.1.2 Binary Subtraction
4.1.3 Binary Multiplication
4.1.4 Binary Division
Summary
Review Question
Chapter 5
5.1 Introduction
5.2 rs Complement
5.2.1 1s Complement
5.2.2 Subtraction using 1s Complement
5.3 2s Complement

Complements

5.3.1 Subtraction using 2s Complement

5.4 Comparison of 1s Complement and 2s Complement
5.5 (r-1)s Complement
5.5.1 9s Complement
5.5.2 10s Complement
5.5.3 Subtraction using 9s complement
5.5.4 Subtraction using 10s complement
Summary
Review Questions
Chapter 6
6.1 Introduction
6.2 Needs for Binary Codes
6.3 Advantages of Binary Code
6.4 Classification of Binary Codes
6.4.1 Weighted Code
6.4.2 BCD (Binary Coded Decimal) Code
6.4.2.1 8421 Code
6.4.2.2 2421 Code
6.4.2.3 5211 Code
6.4.3 Non-weighted Codes
6.4.3.1 Excess-3(XS-3) Code
6.4.3.1.1 Excess-3 Arithmetic
6.4.3.2 Gray Code
6.4.3.2.1 Conversion of a binary number to gray code
6.4.3.2.2 Conversion from gray code to binary
6.4.4Application of Gray Code
6.5 Reflective Codes
6.6 Sequential Codes
6.7 Alphanumeric Codes
6.7.1 ASCII Code
6.7.2 EBCDIC Code
6.7.3 Hollerith Code
6.8 Error-Detecting and Error-Correcting Code
6.8.1 Error Detecting Codes
6.8.1.1 Parity
6.8.2 Error Correcting Codes
6.8.2.1 Hamming Code
Summary
Review Questions

Binary Codes

Chapter 7

Binary Storage and Registers

7.1 Binary Cell Defined

7.2 Definition of Register
7.3 Register Transfer
7.4 Binary Logic
7.4.1 Fundamental Operations
7.5 Integrated Circuits
7.5.1 Types of Integrated Circuits
7.5.2 Levels of Integration
7.6 Digital Logic Families
7.6.1 TTL (Transistor Transistor- Logic)
7.6.2 ECL ( Emitter Coupled Logic)
7.6.2.1 Characteristics of ECL
7.6.3 CMOS ( Complementary Metal Oxide Semiconductor)
Summary
Review Questions
Chapter 8
8.1 Logic Levels
8.1.1 Positive logic system
8.1.2 Negative logic system
8.2 Basic Logic Gates
8.2.1 AND Gate
8.2.2 OR Gate
8.2.3 NOT Gate
8.3 Universal Gates / Universal Building Blocks(UBB)
8.3.1 NAND Gate
8.3.2 NOR Gate
8.4 EX-OR Gate
8.5 EX-NOR Gate
8.6 Realization of gates using universal gates
8.6.1 NAND Gate is a Universal Gate
8.6.1.1 Implementing an Inverter Using only NAND Gate
8.6.1.2 Implementing AND Using only NAND Gates
8.6.1.3 Implementing OR Using only NAND Gates
8.6.2 NOR Gate is a Universal Gate:
8.6.2.1 Implementing an Inverter Using only NOR Gate
8.6.2.2 Implementing OR Using only NOR Gates
8.6.2.3 Implementing AND Using only NOR Gates
Summary
Review Questions

Digital Logic Gates

Chatper-9

Boolean Algebra

9.1 Introduction
9.2 Basic Definitions of Boolean Algebra
9.3 Axiomatic Definition of Boolean Algebra
9.4 Basic theorems and Properties of Boolean Algebra
9.4.1 Principle of Duality
9.4.2 Basic Theorems
9.5 De Morgans Theorem
9.5.1 First Law
9.5.2 Second Law
9.6 Operator Precedence
9.7 Boolean Functions
9.8 Simplification of Boolean Expressions
Summary
Review Questions
Chapter 10

Canonical and Standard Form

10.1 Minterms and Maxterms

10.1.1 Minterm
10.1.2 MaxTerms
10.1.3 Minterms vs. Maxterms
10.2 Canonical Forms
10.2.1 Sum of Minterms(SoM)
10.2.2 Product of Maxterms (PoM)
10.3 Conversion between Canonical Forms
10.4 Standard form
10.4.1 Sum of products (SOP)
10.4.2 Product of Sums (POS)
10.5 Conversion of Sum of Products Expressions into Canonical Form
10.6 Conversion of Product of Sums Expression into Canonical Form
Summary
Review Questions
Chapter 11
11.1 Introduction
11.2 Karnaugh Map (K-Map)
11.2.1 Two-Variable Karnaugh Maps
11.2.2 Three - Variable K. Map
11.2.3 Four - Variable K- Map
11.2.4 Product of Sums Simplification
11.2.5 Dont Care Conditions
11.2.6 Advantages of K-Map

Simplification of Boolean Functions

11.2.7 Disadvantages of K-Map

11.3 NAND Implementation
11.3.1 Algebraic Method
11.3.2 Graphical Method
11.4 NOR Implementation
11.4.1 Algebraic Method
11.4.2 Graphical Method
11.5 Implementing Boolean Expressions Using NAND Gates
11.6 Implementing Boolean Expressions Using NOR Gates
Summary
Review Questions
Chapter 12

Tabulation Method

12.1 Introduction
12.2 Determination of Prime Implicants
12.3 Minimal Cover Generation
12.4 Advantages of Quine-McCluskey method
12.5 Disadvantages of Quine-McCluskey method
Summary
Review Questions
Chapter 13
13.1 Introduction
13.2 Design Procedure
13.3 Adders / Arithmetic Building Blocks
13.3.1 Half Adder
13.3.2 Full Adder
13.4 Subtractor
13.4.1 Half Subtractor
13.4.2 Full Subtractor
13.5 Binary adders
13.6 Binary Parallel Adder
13.7 4-bit Binary Adder/Subtractor
13.8 BCD Adder /Decimal Adder
13.9 Digital Comparator
13.9.1 One bit Comparator
13.10 Parity Generators and Checkers
13.11 Magnitude Comparator
13.11.1 4-bit Magnitude Comparator
Summary
Review Questions

Combinational Logic Circuits I

Chapter 14

Combinational Logic Circuits - II

14.1 Encoder
14.1.1 Octal to-Binary Encoder
14.1.2 Decimal to Binary Encoder
14.2 Priority Encoder
14.3 Decoder
14.3.1 Binary Decoder
14.3.2 3-to-8 line Decoder
14.3.3 1 of 16 Decoder
14.3.4 BCD -to- Decimal decoders
14.3.5 BCD to Seven Segment Decoder
14.4 Multiplexer
14.4.1 4-to-1 Multiplexer
14.4.2 8-to-1 Multiplexer
14.4.3 16 to-1 Multiplexer
14.5 Demultiplexer
14.5.1 1-to-4 Demultiplexer
14.5.2 1-to-8 Demultiplexer
Summary
Review Questions
Chapter 15

Sequential Logic Circuits - I

15.1 Sequential Circuits

15.1.1 Asynchronous Sequential Circuit
15.1.2 Synchronous Sequential Circuit
15.1.3 Comparison of Sequential Circuits and Combinational Circuits
15.1.4 Comparison of Synchronous Sequential Circuits and Asynchronous Sequential
Circuits
15.4 Flip Flops
15.4.1 Types of Flip-Flops
15.4.1.1 S-R (Set-Reset) Flip-op
15.4.1.2 RS Flip-flop
15.4.1.3 Clocked RS Flip-Flop
15.4.1.4 J-K Flip-Flop
15.4.1.5 Master-Slave J-K Flip-fl op (JKMS)
15.4.1.6 D Flip-Flop (Delay Flip Flop)
15.4.1.7 T Flip-Flop
15.5 Master-Slave Flip-Flop
Summary
Review Questions

Chapter 16

Sequential Logic Circuits - II

16.1 Register
16.2 Shift Register
16.2.1 Serial-in to Parallel-out (SIPO)
16.2.2 Serial-in to Serial-out (SISO)
16.2.3 Parallel-in to Serial-out (PISO)
16.2.4 Parallel-in to Parallel-out (PIPO)
16.3 Applications of Shift register
Summary
Review Questions
Chapter 17

Sequential Logic Circuits -III

17.1 Counters
17.1.1 Synchronous Counter
17.1.2 Asynchronous Counter
17.2 Difference between Asynchronous Counter and Synchronous Counter
17.3 Ripple Counters or Asynchronous Counters
17.4 BCD Ripple Counter
17.5 Synchronous Counters
17.5.1 Binary Counter
17.5.2 Binary Up-Down Counter
17.5.4 Binary counter with parallel load
17.5.5 Shift Register Counter
17.5.5.1 Ring Counter
17.5.5.2 Johnson Counter (Twisted Counter)
Summary
Review Questions
Chapter 18

Programmable Logic Device

18.1 Programmable Logic Device

18.1.1 Programmable Read-only Memory (PROM)
18.1.2 Programmable Logic Array (PLA)
18.1.3 Programmable Array Logic (PAL)
Summary
Review Questions
Chapter -19

Introduction to Microcomputer

19.1 Overview of Microcomputer structure and operation

19.2 Memory
19.3 Input/Output
19.4 Data Bus
19.5 Address Bus
19.6 Control Bus
19.7 Central Processing Unit(CPU)
19.8 Hardware, Software and Firmware
Summary
Review Questions
Chapter 2

20.1 Microprocessor
20.2 History and Evolution of Microprocessor
20.2 Working of a Microprocessor
20.4 Applications of Microprocessor
20.5 Architecture of 8085 Microprocessor
20.5.1 Register
20.5.1.1 General Purpose Register
20.5.1.2 Temporary Register
20.5.1.3 Special Purpose Register
20.5.2 Memory Pointer Register
20.5.2.1 Stack Pointer
20.5.2.2 Program Counter
20.5.3 Arithmetic Logic Unit
20.5.4 Instruction Decoder
20.5.5 Machine Cycle Encoder
20.5.6 Address Buffer
20.5.7 Data/Address Buffer
20.5.8 Incrementer/Decremeter Address Latch
20.5.9Interrupt Control
20.5.10 Serial I/O Control
20.5.11Timing and Control Unit
20.6 Pin Configurations of 8085
20.6.1 Power supply and clock signals
20.6.2 Address bus
20.6.3Data bus
20.6.4 Control and status signals
20.6.5 Interrupts and externally initiated signals
Summary
Review Questions

8085 Microprocessor

Chapter 21

Instruction Classifications of 8085 MP

21.1 Instruction set classifications of 8085 MP

21.1.1 Data Transfer operations
21.1.2 Arithmetic operations
21.1.3 Logical operations
21.1.4 Branching operations
21.1.5 Machine Control operations.
Summary
Review Questions

Chapter - 22

Instruction set of 8085

22.1 Instruction set of 8085

22.1.1 Data Transfer Instructions
22.1.2 Arithmetic Instructions
22.1.2.1 Addition Instructions
22.1.2.2 Subtraction Instructions
22.1.2.3 Increment Instructions
22.1.2.4 Decrement Instructions
22.1.3 Branching Instructions
22.1.4 Logical Instructions
22.1.5 Machine Control Instructions
.
Summary
Review Questions
Chapter 23
23.1 Programming Techniques
23.1.1 Continuous loop
23.1.2 Conditional loop
23.1.3 Counter
23.1.4 Indexing
23.2 Addressing Modes of 8085
23.2.1 Immediate Addressing
23.2.2 Direct Addressing
23.2.3 Register Addressing
23.2.4 Register Indirect Addressing
23.2.5. Implied / Implicit Addressing
Summary
Review Questions

Programming Techniques and Addressing Modes

Chapter - 24

Assembly Language

24.1 Assembly Language

24.1.1 Advantages of Assembly Language
24.1.2 Disadvantages of Assembly Language
24.2 Assembly Language programming (ALP)
24.3 Assembly Language Statement format
24.4 Assembler Directives
24.5 Instruction Format
24.5.1 One byte instruction
24.5.2 Two byte instruction
24.5.3 Three byte instruction
Summary
Review Questions
Chapter -25

Writing Assembly Language Programs

25.1 Writing Assembly Language Programs

25.1.1 Store 8-bit data
25.1.2 Exchange the content of memory location
25.1.3 Find the 2s complement
25.1.4 Find the 1s complement
25.1.5 Addition of two numbers
25.1.6 Find the sum of series
25.1.7 Subtraction of two numbers
25.1.8 Multiplication of two numbers
25.1.9 Arranging numbers in the ascending order
25.1.10 Find the largest of given numbers
25.1.11 Find the factorial of a number
25.1.12 Multiplication of two 16-bit numbers
25.1.13 Find the smallest number in an array
257.1.14 Find Even and Odd numbers
25.1.15 Division of two 8-bit numbers
Summary
Review Questions
Chapter 26
26.1 Dynamic Debugging
26.2 Tools for Dynamic Debugging
26.2.1 Single step
26.2.2 Register Examiner

Dynamic Debugging and Time Delay

26.2.3 Break Point

26.3 Counter
26.4 Time Delay
26.4.1 Time delay using one register
26.4.2 Time delay using register pair
26.4.3 Time delay using looping technique
Summary
Review Questions
Chapter 27
Debugging Counter and Time Delay program
27.1 Debugging Counter and Time Delay program
27.1.1 Debugging the program
27.1.2 Delay calculations
Summary
Review Questions
Chapter 28

Stack and Subroutines

28.1 Stack
28.1.1 Stack Instructions
28.1 .2Programming with stack
28.2 Subroutine
Summary
Review Questions

Chapter- 29

Conditional Call and Return Instructions

29.1 Conditional Call and Return Instructions

29.1.1 CALL instruction
29.1.2 Conditional Cal
29.1.3 UnConditional Return
29.1.4 Conconditional Return
29.1.5 Restart Instructions
Summary
Review Questions
Chapter -30
30.1 BCD numbers
30.2 BCD to-Binary Conversion
30.3 Binary-to-BCD Conversion
30.4 BCD-to-HEX Conversion

Code Conversion-I

30.5 HEX-to-BCD Conversion

Summary
Review Questions
Chapter-31
31.1 ASCII to-BCD Conversion
31.2 BCD-to-ASCII Conversion
31.3Binary-to-ASCII Conversion
31.4ASCII-to-BinaryConversion
31.5 BCD-to-Seven Segment LED Code
Summary
Review Questions
Chapter 32
32.1 BCD Arithmetic
32.1.1 BCD Addition
32.1.2 BCD Subtraction
Summary
Review Questions
Chapter 33

Code Conversion II

BCD Arithmetic

Hexadecimal Counter, Modulo 10

Counter and Pulse Timing for flashing lights

33.1 Hexadecimal Counter

33.2 Modulo 10 Counter
33.3. Pulse Timing for flashing lights
Summary
Review Questions
Chapter 34
34.1 Interrupts in 8085
34.2 Types of Interrupts
34.2.1Software Interrupts
34.2.2 Hardware Interrupts
34.3 TRAP
34.4 RIM
34.5 SIM
Summary
Review Questions
Chapter 35

Interrupts in 8085

DMA, Memory Interfacing and I/O Interfacing

35.1 Direct Memory Access (DMA)

35.2 Memory Interfacing

35.3 Semiconductor Memories
35.3.1 RAM
35.3.2 ROM
35.3.2.1 PROM
35.3.2.2 EPROM
35.3.2.3 EEPROM
35.3.3 Difference between RAM and ROM.
35.4 Address Space Partitioning
35.5 I/O Interfacing
35.5.1 I/O Mapped I/O
35.5.2 Memory mapped I/O
35.5.3 Differentiate between Memory mapped I/O and I/O mapped I/O
Summary
Review Questions
Chapter 36

Programmable Peripheral Interface (8255)

36.1 Programmable Peripheral Interface (8255)

36.2 Pin diagram of 8255
36.3 Signal diagram of 8255
36.4 Features of 8255
36.5 Block Diagram of 8255
36.6 Modes of operation of 8255
Summary
Review Questions
Chapter 37
37.1 Stepper Motor
37.2 Temperature Control
Summary
Review Questions

Applications

Chapter 38
8085 Programming- I
Exercise 1: Block data transfer
Exercise 2: Adding 2 BCD numbers without carry
Exercise 3: Adding 2 Hexa-decimal numbers without carry
Exercise 4: Multiplication of two 8 bit numbers
Exercise 5: Division of two 8 bit numbers
Exercise 6: 1s complement of a number
Exercise 7: 2s complement of a number
Exercise 8: Swapping the numbers
Exercise 9: Write an assembly program to find greatest between two numbers
Exercise 10: Finding the smallest number in an array.

Exercise 11: Sorting of an array of 8 bit data in ascending order

Exercise 12: Sorting of an array of 8 bit data in descending order
Chapter 39
Exercise 1 To add two 8-bit data
Exercise 2 To add two 8-bit data present in the memory
Exercise 3 To add two 16-bit data
Exercise 4 To subtract two 16-bit data
Exercise 5 To add two 2-digit BCD data
Exercise 6 To add two 4-digit BCD data
Exercise 7 To multiply two numbers of 8-bit data
Exercise 8 To multiply two numbers of 16-bit data
Exercise 9 To divide two numbers of 8-bit data
Exercise 10 To add an array of data
Exercise 11 To search smallest data in the array
Exercise 12 To search largest data in the array
Exercise 13 To sort an array of data in ascending order
Exercise 14 To sort an array of data in descending order
Exercise 15 To find the square root of an 8-bit binary number
Exercise.16 To convert 2 digit BCD to binary number
Exercise 17 To convert 8-bit binary number to BCD
Exercise 18 To convert 8-bit binary to ASCII
Exercise 19 To convert ASCII code to binary value
Exercise 20Transfer a block of data from one location to another
Chapter 40

8085 Programming- II

Introduction to 8086 Microprocessor

40.1 Introduction to 8086 Microprocessor

40.2 Features of 8086 Microprocessor
40.3 Pin diagram of 8086
40.4 Signal group of 8086
40.5 Signal Description of 8086
40.6 Architecture of 8086 Microprocessor / Block diagram of 8086
40.6.1 Bus Interface Unit (BIU)
40.6.2 Instruction Queue
40.6.3 Execution Unit (EU)
40.7 General Purpose Registers of 8086
40.8 Segment Registers
40.9 Pointer register and Index register
40.10 Flag Registers of 8086
40.11 Addressing Modes of 8086
40.12 8086 Assembly Language Statement Format
Summary
Review Questions

Chapter 41

Instruction Set of 8086

41.1 Instruction Set

41.1.1 Data Transfer Instructions
41.1.1.1 MOV Instruction
41.1.1.2 XCHG instruction
41.1.2 Arithmetic Instructions
41.1.2.1 Addition and Subtraction Instructions
41.1.2.2 Multiplication and Division Instructions
41.1.2.3 NEG, INC, DEC Instructions
41.1.3 Jump Instructions
41.1.3.1Unconditional Jump
41.1.3.2 Conditional Jump
41.1.4 Rotation and shifting Instructions
Summary
Review Questions

APPENDIX A; Glossary
APPENDIX B: Digital Logic Two marks Questions with Answers
APPENDIX C: Microprocessor Two marks Questions with Answers
APPENDIX D: Past University Question Papers
APPENDIX E: University Solved Question Papers