OptiMOS3 Power-Transistor
IPD075N03L G
IPF075N03L G
IPS075N03L G
IPU075N03L G
Product Summary
Features
Fast switching MOSFET for SMPS
Optimized technology for DC/DC converters
V DS
30
R DS(on),max
7.5
ID
50
1)
IPD075N03L G
IPF075N03L G
IPS075N03L G
IPU075N03L G
Package
PG-TO252-3-11
PG-TO252-3-23
PG-TO251-3-11
PG-TO251-3-21
Marking
075N03L
075N03L
075N03L
075N03L
Symbol Conditions
ID
Value
V GS=10 V, T C=25 C
50
V GS=10 V, T C=100 C
43
V GS=4.5 V, T C=25 C
49
V GS=4.5 V,
T C=100 C
35
Unit
A
I D,pulse
T C=25 C
350
I AS
T C=25 C
50
E AS
I D=12 A, R GS=25
50
mJ
V GS
20
1)
Rev. 1.1
page 1
2009-01-14
IPD075N03L G
IPF075N03L G
IPS075N03L G
IPU075N03L G
Symbol Conditions
Power dissipation
P tot
T j, T stg
Value
T C=25 C
Parameter
Unit
47
55/175/56
Values
Symbol Conditions
Unit
min.
typ.
max.
3.2
minimal footprint
75
6 cm cooling area 4)
50
Thermal characteristics
Thermal resistance, junction - case
R thJC
R thJA
K/W
30
V GS(th)
2.2
I DSS
V DS=30 V, V GS=0 V,
T j=25 C
0.1
V DS=30 V, V GS=0 V,
T j=125 C
10
100
I GSS
V GS=20 V, V DS=0 V
10
100
nA
R DS(on)
V GS=4.5 V, I D=30 A
9.1
11.4
V GS=10 V, I D=30 A
6.3
7.5
1.3
30
61
5)
Gate resistance
RG
Transconductance
g fs
2)
3)
4)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 m thick) copper area for drain
connection. PCB is vertical in still air.
5)
Measured from drain tab to source pin
Rev. 1.1
page 2
2009-01-14
Parameter
IPD075N03L G
IPF075N03L G
IPS075N03L G
IPU075N03L G
Values
Symbol Conditions
Unit
min.
typ.
max.
1400
1900
580
770
Dynamic characteristics
Input capacitance
C iss
V GS=0 V, V DS=15 V,
f =1 MHz
Output capacitance
C oss
Crss
29
44
t d(on)
4.3
Rise time
tr
3.6
t d(off)
17
Fall time
tf
2.8
Q gs
4.6
Q g(th)
2.2
Q gd
2.1
Switching charge
Q sw
4.4
Qg
8.7
V plateau
3.3
Qg
V DD=15 V, I D=30 A,
V GS=0 to 10 V
18
Q g(sync)
V DS=0.1 V,
V GS=0 to 4.5 V
7.6
Output charge
Q oss
V DD=15 V, V GS=0 V
15
42
350
V DD=15 V, V GS=10 V,
I D=30 A, R G=1.6
pF
ns
V DD=15 V, I D=30 A,
V GS=0 to 4.5 V
nC
nC
Reverse Diode
Diode continuous forward current
IS
I S,pulse
V SD
V GS=0 V, I F=30 A,
T j=25 C
0.89
1.1
Q rr
V R=15 V, I F=I S,
di F/dt =400 A/s
10
nC
6)
Rev. 1.1
T C=25 C
page 3
2009-01-14
IPD075N03L G
IPF075N03L G
IPS075N03L G
IPU075N03L G
1 Power dissipation
2 Drain current
P tot=f(T C)
50
60
50
40
40
I D [A]
P tot [W]
30
30
20
20
10
10
0
0
50
100
150
200
50
100
T C [C]
150
Z thJC=f(t p)
parameter: t p
parameter: D =t p/T
103
10
limited by on-state
resistance
1 s
102
0.5
10 s
1
0.2
Z thJC [K/W]
I D [A]
100 s
DC
101
1 ms
0.05
0.02
0.01
single pulse
10-1
10-1
100
101
102
V DS [V]
Rev. 1.1
0.1
0.1
10 ms
10
200
T C [C]
0.01
10-6
10-5
10-4
10-3
10-2
10-1
100
t p [s]
page 4
2009-01-14
IPD075N03L G
IPF075N03L G
IPS075N03L G
IPU075N03L G
parameter: V GS
parameter: V GS
120
20
5V
4.5 V
3.2 V
100
16
10 V
3.5 V
R DS(on) [m]
80
I D [A]
4V
60
4V
12
4.5 V
5V
8
10 V
40
3.5 V
11.5 V
3.2 V
20
3V
2.8 V
0
0
20
40
V DS [V]
60
80
100
80
100
I D [A]
parameter: T j
100
80
80
60
60
I D [A]
g fs [S]
100
40
40
20
20
175 C
25 C
0
0
Rev. 1.1
20
40
60
I D [A]
V GS [V]
page 5
2009-01-14
IPD075N03L G
IPF075N03L G
IPS075N03L G
IPU075N03L G
16
2.5
14
2
10
V GS(th) [V]
R DS(on) [m]
12
98 %
typ
1.5
4
0.5
2
0
-60
-20
20
60
100
140
180
-60
-20
20
60
100
140
180
T j [C]
T j [C]
11 Typ. capacitances
I F=f(V SD)
parameter: T j
104
103
25 C
103
175 C, 98%
Ciss
102
10
175 C
I F [A]
C [pF]
Coss
Crss
25 C, 98%
101
101
100
100
0
10
20
30
V DS [V]
Rev. 1.1
0.5
1.5
V SD [V]
page 6
2009-01-14
IPD075N03L G
IPF075N03L G
IPS075N03L G
IPU075N03L G
13 Avalanche characteristics
parameter: T j(start)
parameter: V DD
100
12
15 V
6V
24 V
10
100 C
150 C
25 C
V GS [V]
I AV [A]
10
10-1
100
101
102
103
t AV [s]
12
16
20
24
Q gate [nC]
34
V GS
Qg
32
V BR(DSS) [V]
30
28
26
V g s(th)
24
Q g(th)
22
Q sw
Q gs
20
-60
-20
20
60
100
140
Q g ate
Q gd
180
T j [C]
Rev. 1.1
page 7
2009-01-14
Package Outline
Footprint:
Rev. 1.1
IPD075N03L G
IPF075N03L G
IPS075N03L G
IPU075N03L G
PG-TO252-3-11
Packaging:
page 8
2009-01-14
Package Outline
IPD075N03L G
IPF075N03L G
IPS075N03L G
IPU075N03L G
PG-TO252-3-23
PG-TO252-3-23: Outline
Footprint:
Rev. 1.1
page 9
2009-01-14
Package Outline
IPD075N03L G
IPF075N03L G
IPS075N03L G
IPU075N03L G
PG-TO251-3-11
PG-TO251-3-11: Outline
PG-TO251-3-21: Outline
Rev. 1.1
page 10
2009-01-14
Package Outline
IPD075N03L G
IPF075N03L G
IPS075N03L G
IPU075N03L G
PG-TO251-3-21
PG-TO251-3-11: Outline
PG-TO251-3-21: Outline
Rev. 1.1
page 11
2009-01-14
IPD075N03L G
IPF075N03L G
IPS075N03L G
IPU075N03L G
Published by
Infineon Technologies AG
81726 Munich, Germany
2008 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of
conditions or characteristics. With respect to any examples or hints given herein, any typical
values stated herein and/or any information regarding the application of the device,
Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind,
including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please
Rev. 1.1
page 12
2009-01-14