Acer Emachines d725 - Wistron Hm40-Mv

5
Project code: 91.4BW01.001

PCB P/N
: 48.4BW01.0SB
REVISION
: 08242-SB
HM40-MV Block Diagram

CLK GEN.
ICS 9LPRS365BKLFT (71.09365.A03)

SILEGO SLG8SP513VTR(71.08513.003)
3
Mobile CPU
PCB STACKUP
THERMAL EMC2102
Penryn 479
32
TOP
VCC
4, 5
DDR2 DIMM1
667/800 MHz
HOST BUS
667/800MHz
667/800 MHz
Cantiga
SYSTEM DC/DC
TPS51125
GND
CRT
AGTL+ CPU I/F
INPUTS
667/800MHz
BOTTOM
19
5V_S5
INTEGRATED GRAHPICS
DCBATOUT
LCD
LVDS, CRT I/F
3D3V_S5
18
6,7,8,9,10,11
17
X4 DMI
400MHz
Codec
AZALIA
CX20561
SYSTEM DC/DC
C-Link0
TPS51124
INPUTS
ICH9M
PCIex1
6 PCIe ports
OUTPUTS
4 SATA
DCBATOUT
LAN
TXFM
Atheros
AR8114
AR8132
ACPI 2.0
MIC In
25
24
1D8V_S3
RJ45
25
RT9026
43
DDR_VREF_S0
1D8V_S3
DDR_VREF_S3
12 USB 2.0/1.1 ports
28
ETHERNET (10/100/1000MbE)
PCIex1
High Definition Audio
OP AMP
CPU DC/DC
LPC BUS
ISL6266A
28
BIOS
KBC
Winbond
W25X16
16M Bits
KBC773L
33
12,13,14,15
INPUTS
LPC
34
Blue Tooth
22
(USB)
ODD SATA
INT.
KB 33
INPUTS
DCBATOUT
USB
2 Port
23
0.35~1.5V
CardReader
Realtek
RTS5159
30
46
OUTPUTS
BT+
20
SATA
VCC_CORE_S0
BQ24745
Touch
Pad 35
SATA
21
MS/MS Pro/xD
30
/MMC/SD
DCBATOUT
UMA Two Phase 2

A
5 in 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Power Board
Title
36
Size
A3
Date:
CHARGER
Camera
(USB) 18
USB
41
OUTPUTS
DCBATOUT
DEBUG
CONN.34
USB
HDD SATA
1D5V_S0
31
Active Managemnet Technology(DO)
Line Out
(NO SPDIF)
43
1D8V_S3
a/b/g/n
Serial Peripheral I/F

Matrix Storage Technology(DO)
INT.SPKR
RT9018A
Mini Card
Kedron
LPC I/F
G1454 27
44
1D05V_S0
PCI/PCI BRIDGE
26
28
42
OUTPUTS
DDR Memory I/F
667/800/1067MHz@1.05V
16
DDR2 DIMM2
BLOCK DIAGRAM
Document Number
Rev
SB
HM40-MV
Monday, November 24, 2008
Sheet
1
of
51
ICH9M Functional Strap Definitions

ICH9 EDS 642879 Rev.1.5
ICH9M Integrated Pull-up

and Pull-down Resistors
page 92
Comment
Signal
Usage/When Sampled
HDA_SDOUT
XOR Chain Entrance/

PCIE Port Config1 bit1,
Rising Edge of PWROK
Allows entrance to XOR Chain testing when TP3

pulled low.When TP3 not pulled low at rising edge
of PWROK,sets bit1 of RPC.PC(Config Registers:
offset 224h). This signal has weak internal pull-down
CL_CLK[1:0]
CL_DATA[1:0]
PULL-UP 20K
HDA_SYNC
PCIE config1 bit0,

Rising Edge of PWROK.
This signal has a weak internal pull-down.

Sets bit0 of RPC.PC(Config Registers:Offset 224h)
CL_RST0#
PULL-UP 20K
GNT2#/
GPIO53
PCIE config2 bit2,

DPRSLPVR/GPIO16
PULL-DOWN 20K
ENERGY_DETECT
PULL-UP 20K
GPIO20
Reserved
This signal has a weak internal pull-up.

Sets bit2 of RPC.PC2(Config Registers:Offset 0224h)
This signal should not be pulled high.
HDA_BIT_CLK
PULL-DOWN 20K
GNT1#/
GPIO51
ESI Strap (Server Only)

HDA_DOCK_EN#/GPIO33
PULL-UP 20K
HDA_RST#
PULL-DOWN 20K
HDA_SDIN[3:0]
PULL-DOWN 20K
HDA_SDOUT
PULL-DOWN 20K
GNT3#/
GPIO55
GNT0#:
SPI_CS1#/
GPIO58
SPI_MOSI
3
GPIO49
Top-Block
Swap Override.
ICH9 EDS 642879
SIGNAL
ESI compatible mode is for server platforms only.

This signal should not be pulled low for desttop
and mobile.
Sampled low:Top-Block Swap mode(inverts A16 for
all cycles targeting FWH BIOS space).
Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.
CFG[2:0]
CFG[4:3]
CFG8
CFG[15:14]
CFG[18:17]
Strap Description
Boot BIOS Destination

Selection 0:1.
Controllable via Boot BIOS Destination bit

(Config Registers:Offset 3410h:bit 11:10).
GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.
GNT[3:0]#/GPIO[55,53,51]
PULL-UP 20K
GPIO[20]
PULL-DOWN 20K
Integrated TPM Enable,

Rising Edge of CLPWROK
Sample low: the Integrated TPM will be disabled.

Sample high: the MCH TPM enable strap is sampled
low and the TPM Disable bit is clear, the
Integrated TPM will be enable.
GPIO[49]
PULL-UP 20K
LDA[3:0]#/FHW[3:0]#
PULL-UP 20K
LAN_RXD[2:0]
PULL-UP 20K
LDRQ[0]
PULL-UP 20K
LDRQ[1]/GPIO23
PULL-UP 20K
PME#
PULL-UP 20K
PWRBTN#
PULL-UP 20K
SATALED#
PULL-UP 15K
No Reboot.
If sampled high, the system is strapped to the

"No Reboot" mode(ICH9 will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.
SPI_CS1#/GPIO58/CLGPIO6
PULL-UP 20K
SPI_MOSI
PULL-DOWN 20K
SPI_MISO
PULL-UP 20K
TP3
XOR Chain Entrance.

This signal should not be pull low unless using

XOR Chain testing.
SPKR
PULL-DOWN 20K
TACH_[3:0]
PULL-UP 20K
GPIO33/
HDA_DOCK
_EN#
Flash Descriptor
Security Override Strap
Sampled low:the Flash Descriptor Security will be

overridden. If high,the security measures will be
in effect.This should only be enabled in manufacturing
environments using an external pull-up resister.
TP[3]
PULL-UP 20K
USB[11:0][P,N]
PULL-DOWN 15K
0.5
Configuration
000 = FSB1067
011 = FSB667
010 = FSB800
others = Reserved
FSB Frequency
Select
Reserved
CFG5
DMI x2 Select
CFG6
iTPM Host
Interface
0 = DMI x2
1 = DMI x4 (Default)
0= The iTPM Host Interface is enabled(Note2)
1=The iTPM Host Interface is disalbed(default)
0 = Transport Layer Security (TLS) cipher
suite with no confidentiality
1 = TLS cipher suite with
confidentiality (default)
CFG7
Intel Management
engine Crypto strap
CFG9
PCIE Graphics Lane
0 = Reverse Lanes,15->0,14->1 ect..

1= Normal operation(Default):Lane
Numbered in order
CFG10
PCIE Loopback enable
0 = Enable (Note 3)
1= Disabled (default)
PULL-DOWN 20K
Signal has weak internal pull-up. Sets bit 27

of MPC.LR(Device 28:Function 0:Offset D8)
SPKR
Pin Name
The pull-up or pull-down active when configured for native

GLAN_DOCK# functionality and determined by LAN controller
PCI Express Lane

Reversal. Rising Edge
of PWROK.
SATALED#
page 218
PULL-UP 20K
GLAN_DOCK#
DMI Termination Voltage, The signal is required to be low for desktop

applications and required to be high for
mobile applications.
Montevina Platform Design guide 22339
Rev.1.5
Resistor Type/Value
HDA_SYNC
Cantiga chipset and ICH9M I/O controller

Hub strapping configuration
CFG[13:12]
CFG16
CFG19
00
10
01
11
XOR/ALL
=
=
=
=
Reserve
XOR mode Enabled
ALLZ mode Enabled (Note 3)
Disabled (default)
FSB Dynamic ODT
0 = Dynamic ODT Disabled

1 = Dynamic ODT Enabled (Default)
DMI Lane Reversal
0 = Normal operation(Default):
Lane Numbered in Order
1 = Reverse Lanes
DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3)
DMI x2 mode[MCH -> ICH]:(3->0,2->1)
CFG20
SDVO_CTRLDATA
Digital Display Port

(SDVO/DP/iHDMI)
Concurrent with PCIe
0 = Only Digital Display Port

or PCIE is operational (Default)
1 =Digital display Port and PCIe are
operting simulataneously via the PEG port
0 =No SDVO Card Present (Default)
SDVO Present
1 = SDVO Card Present
L_DDC_DATA
Local Flat Panel

(LFP) Present
0 = LFP Disabled (Default)

1= LFP Card Present; PCIE disabled
NOTE:
1. All strap signals are sampled with respect to the leading edge of
the (G)MCH Power OK (PWROK) signal.
2. iTPM can be disabled by a 'Soft-Strap' option in the
Flash-decriptor section of the Firmware. This 'Soft-Strap' is
activated only after enabling iTPM via CFG6.
Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.
SMBus
EMC2102
Thermal
USB Table
USB
PCIE Routing
LANE1
LAN Atheros AR8114A
LANE2
MiniCard WLAN
LANE3
NC
LANE4
NC
LANE5
NC
LANE6
NC
Pair
KBC
BAT_SCL
Device
USB1
NC
NC
MINIC1
WEBCAM
NC
NC
Bluetooth
NC
USB2(High speed)
10
NC
11
CardReader
BATTERY
UMA Two Phase 2
ICH9M
Wistron Corporation

Title
SMBC_ICH
9LPRS365BKLFT
DDR
Size
A3
Date:
Reference
Document Number
Rev
SB
HM40-MV
Sheet
of
51
GEN_XTAL_OUT
3
2
DY
DY
1
EC33
DY
EC34
EC66
1
EC62
DY
19
27
43
52
33
56
DY
1
2
EC31
CLK48_5159
X1
X2
61
60
CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4
CPU
CPUT1_F
CPUC1_F
58
57
CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6
NB
CPUT2_ITP/SRCT8
CPUC2_ITP/SRCC8
54
53
CLK_PCIE_LAN 24
CLK_PCIE_LAN# 24
LAN
EC25
CPUT0
CPUC0
PCLK_FW H
DY
82.30005.891
2nd = 82.30005.951
VDD96_IO
VDDPLL3_IO
VDDSRC_IO
VDDSRC_IO
VDDSRC_IO
VDDCPU_IO
4
16
9
46
62
23
VDDREF
VDD48
VDDPCI
VDDSRC
VDDCPU
VDDPLL3
R91
0R2J-2-GP
2
1
CLK48_ICH
Do Not Stuff
X4
X-14D31818M-35GP
U14
1126 modify RN61 and RN62
Do Not Stuff
C229
SB
SC33P50V2JN-3GP
GEN_XTAL_IN
1
2
PCLK_ICH
Do Not Stuff
RN61 and RN62
SB 1120 modify RN61 and RN62
CL=20pF0.2pF
PCLK_KBC
Do Not Stuff
SB 1120 add RN61 and RN62
3D3V_CLKPLL_S0
Do Not Stuff
SB
1127 swap the nets of
SRN470J-3-GP
1
2
1
2
1
2
1
2
1
2
1
4
3
2
1
5
6
7
8
CLK_ICH14
3D3V_48MPW R_S0
Do Not Stuff
8 PCIE_REQ_LAN#_R
7 PCLKCLK0
6 PCIE_REQ_MINI#_R
5 PCLKCLK1
1
2
3
4
C205
DY
0915 add EC34 for EMI demand
RN62
24 PCIE_REQ_LAN#
13 SATACLKREQ#
31 PCIE_REQ_MINI#
7
CLK_MCH_OE#
Do Not Stuff
3D3V_CLKGEN_S0
1 R87
C1550R2J-2-GP
SCD1U16V2ZY-2GP
DY
C224
SCD1U16V2ZY-2GP
C152
C226
SCD1U16V2ZY-2GP
DY
3D3V_CLKGEN_S0
C179
SCD1U16V2ZY-2GP
0R2J-2-GP
DY
C204
Do Not Stuff
C173
2
Do Not Stuff
C196
DY
Do Not Stuff
C156
Do Not Stuff
1 R80
SCD1U16V2ZY-2GP
C176
SCD1U16V2ZY-2GP
C149
SC4D7U10V5ZY-3GP
DY
SRN10KJ-6-GP
RN61
C165
3D3V_S0
1015 modify component size of R87
3D3V_CLKPLL_S0
Do Not Stuff
Do Not Stuff
DY
3D3V_S0
C227
SC1U16V3ZY-GP
C221
3D3V_48MPW R_S0
0R2J-2-GP
1 R95
DY
1 R302
2
Do Not Stuff
SB
1124 add R302

1
3D3V_S0
3D3V_S0
1D05V_S0
RN20
GEN_XTAL_OUT_R
30
13
C230
SC33P50V2JN-3GP
1
2
CLK48_5159
CLK48_ICH
4,7
CPU_SEL0
R88
4
3
CLK48 17
USB_48MHZ/FSLA
SRN22-3-GP
1
2K2R2J-2-GP
13 PM_STPPCI#
13 PM_STPCPU#
45
44
15,16,17 SMBC_ICH
15,16,17 SMBD_ICH
7
6
13 CLK_PW RGD
1
Do Not Stuff
63
SRCT7/CR#_F
SRCC7/CR#_E
51
50
SRCT6
SRCC6
48
47
SRCT10
SRCC10
41
42
SRCT11/CR#_H
SRCC11/CR#_G
40
39
SRCT9
SRCC9
37
38
CLK_PCIE_MINI1 31
CLK_PCIE_MINI1# 31
SRCT4
SRCC4
34
35
CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7
SRCT3/CR#_C
SRCC3/CR#_D
31
32
SRCT2/SATAT
SRCC2/SATAC
28
29
CLK_PCIE_SATA 12
CLK_PCIE_SATA# 12
27MHZ_NONSS/SRCT1/SE1
27MHZ_SS/SRCC1/SE2
24
25
DREFSSCLK 7
DREFSSCLK# 7
SRCT0/DOTT_96
SRCC0/DOTC_96
20
21
DREFCLK 7
DREFCLK# 7
PCI_STOP#
CPU_STOP#
3D3V_S0
CPU_SEL2
3D3V_S0
8
7
6
5
4,7
2
R89
1
2
3
4
RN28
SRN10KJ-6-GP
DY
PCLKCLK0
PCLKCLK1
PCLKCLK2
RN23
PCLKCLK2
CPU_SEL2_R
PCLKCLK4
PCLKCLK5
13
1
2
3
4
CLK_ICH14
33
13
PCLK_KBC
PCLK_ICH
4,7
CPU_SEL1
8
7
6
5
CPU_SEL2_R
PCLKCLK3
PCLKCLK4
PCLKCLK5
SCLK
SDATA
CK_PWRGD/PD#
8
10
11
12
13
14
PCI0/CR#_A
PCI1/CR#_B
PCI2/TME
PCI3
PCI4/27_SELECT
PCI_F5/ITP_EN
64
5
FSLB/TEST_MODE
REF0/FSLC/TEST_SEL
SRN33J-7-GP
NC#55
ICS9LPRS365BKLFT-GP-U
ICS9LPRS365BKLFT setting table

PIN NAME
DESCRIPTION
71.09365.A03
2nd = 71.08513.003
PCI0/CR#_A
Byte 5, bit 7
0 = PCI0 enabled (default)
1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair
Byte 5, bit 6
0 = CR#_A controls SRC0 pair (default),
1= CR#_A controls SRC2 pair
PCI1/CR#_B
Byte 5, bit 5
0 = PCI1 enabled (default)
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair
Byte 5, bit 4
0 = CR#_B controls SRC1 pair (default)
1= CR#_B controls SRC4 pair
PCI2/TME
0 = Overclocking of CPU and SRC Allowed

1 = Overclocking of CPU and SRC NOT allowed
PCI3
3.3V PCI clock output
PCI4/27M_SEL
0 = Pin24 as SRC-1, Pin25 as SRC-1#, Pin20 as DOT96, Pin21 as DOT96#

1 = Pin24 as 27MHz, Pin25 as 27MHz_SS, Pin20 as SRC-0, Pin21 as SRC-0#
PCI_F5/ITP_EN
0 =SRC8/SRC8#
1 = ITP/ITP#
SRCT3/CR#_C
Byte 5, bit 3
0 = SRC3 enabled (default)
1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pair
Byte 5, bit 2
0 = CR#_C controls SRC0 pair (default),
1= CR#_C controls SRC2 pair
GND
1014 add ER5 for EMI deamnd
SB 1120 swap these

nets(CLK_MCH_3GPLL,CLK_MCH_3GPLL#,
CLK_PCIE_MINI1,CLK_PCIE_MINI1#)
SB
PCIE_REQ_MINI#_R
1126 add the net(PCIE_REQ_MINI#)
MINI1
NB CLK
SB 1120 move these nets
(CLK_PCIE_MINI1,CLK_PCIE_MINI1#)
SB SATA
NB CLK
NB CLK
(96 MHz)
SEL2 SEL1 SEL0

FSC FSB FSA
PIN NAME
DESCRIPTION
SRCC3/CR#_D
Byte 5, bit 1
1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pair
Byte 5, bit 0
0 = CR#_D controls SRC1 pair (default)
1= CR#_D controls SRC4 pair
SRCC7/CR#_E
Byte 6, bit 7
0 = SRC7# enabled (default)
1= CR#_F controls SRC6
SRCT7/CR#_F
Byte 6, bit 6
1= CR#_F controls SRC8
SRCC11/CR#_G
Byte 6, bit 5
0 = SRC11# enabled (default)
1= CR#_G controls SRC9
SRCT11/CR#_H
Byte 6, bit 4
1= CR#_H controls SRC10
1
0
0
0
0
0
0
1
1
0
1
1
1
0
0
CPU
FSB
100M
133M
166M
200M
266M
X
533M
667M
800M
1066M
UMA Two Phase 2
Wistron Corporation

Title
Size
Clock Generator
Document Number
Rev
HM40-MV
Date:
SB DMI
CLK_PCIE_ICH 13
CLK_PCIE_ICH# 13
65
DY
55
GND
GNDSRC
GNDSRC
GNDSRC
GNDCPU
GND
1 PCLKCLK3
Do Not Stuff
22
30
36
49
59
26
ER5
GND48
GNDPCI
GNDREF
PCLK_FW H
18
15
1
34
CPU_SEL2_R
SB 1126 add the net(PCIE_REQ_LAN#)
PCIE_REQ_LAN#_R
Monday, December 01, 2008
Sheet
E
SB
3
of
51
H_A#[35..3]
H_A#[35..3]
H_DINV#[3..0]
U33A 1 OF 4
1
H_TRDY#
H_HIT#
H_HITM#
6
6
H_THERMDA
DY
H_THERMDC
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#
1D05V_S0
R63
68R2-GP
RSVD#M4
RSVD#N5
RSVD#T2
RSVD#V3
RSVD#B2
RSVD#C3
RSVD#D2
RSVD#D22
RSVD#D3
RSVD#F6
BCLK0
BCLK1
B1
H_DSTBN#0
H_DSTBP#0
H_DINV#0
D21 CPU_PROCHOT#
A24
B25
H_THERMDA 32
H_THERMDC 32
C7
PM_THRMTRIP-A# 7,12,39
A22
A21
1
R62
DY
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
CPU_PROCHOT#_R
41
Do Not Stuff
CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
1D05V_S0
PM_THRMTRIP#
should connect to
ICH9 and MCH
without T-ing
( No stub)
6
6
6
R179
1KR2F-3-GP
Layout Note:
"CPU_GTLREF0"
0.5" max length.
H_DSTBN#1
H_DSTBP#1
H_DINV#1
CPU_GTLREF0
HCLK
6
6
6
THERMTRIP#
C438
Do Not Stuff
PROCHOT#
THRMDA
THRMDC
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
R181
2KR2F-3-GP
DY C352
Do Not Stuff
KEY_NC
BGA479-SKT6-GPU7
62.10079.001
Do Not Stuff
Do Not Stuff
2nd: 62.10053.401
3,7
3,7
3,7
TP18
TP44
TP60
CPU_SEL0
CPU_SEL1
CPU_SEL2
E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
DSTBN0#
DSTBP0#
DINV0#
N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
DSTBN1#
DSTBP1#
DINV1#
AD26
TEST1
C23
TEST2
D25
1RSVD_CPU_12 C24
TEST4
AF26
1RSVD_CPU_13 AF1
1RSVD_CPU_14 A26
B22
B23
C21
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
DATA GRP2
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
MISC
BSEL0
BSEL1
BSEL2
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DSTBN2#
DSTBP2#
DINV2#
Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN3#
DSTBP3#
DINV3#
AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
COMP0
COMP1
COMP2
COMP3
R26
U26
AA1
Y1
COMP0
COMP1
COMP2
COMP3
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
E5
B5
D24
D6
D7
AE6
H_DSTBN#2 6
H_DSTBP#2 6
H_DINV#2 6
H_DSTBN#3 6
H_DSTBP#3 6
H_DINV#3 6
R53
R51
R45
R44
2 54D9R2F-L1-GP
XDP_TDI
R48
2 54D9R2F-L1-GP
XDP_BPM#5
R43
2 54D9R2F-L1-GP
H_CPURST#
R213 1
XDP_TCK
R41
XDP_TRST#
R42
1
1
DY
2
2
2
2
27D4R2F-L1-GP
54D9R2F-L1-GP
27D4R2F-L1-GP
54D9R2F-L1-GP
H_DPRSTP# 7,12,41
H_DPSLP# 12
H_DPW R# 6
H_PW RGD 12,39,48
H_CPUSLP# 6
PSI#
41
62.10079.001
Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5" .
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .
Follow Demo Circuit

R50
1
1
1
1
BGA479-SKT6-GPU7
1D05V_S0
XDP_TMS
U33B 2 OF 4
6
DATA GRP3
BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#
H_RS#0
H_RS#1
H_RS#2
G6
E4
H_D#[63..0]
12
HIT#
HITM#
CONTROL
C1
F3
F4
G3
G2
H_INIT#
H_LOCK# 6
H_CPURST# 6,48
H_RS#[2..0]
RSVD_CPU_11
RESET#
RS0#
RS1#
RS2#
TRDY#
H_BREQ#0 6
TP20
H4
H_DSTBP#[3..0]
H_IERR#
Do Not Stuff
Do Not Stuff
LOCK#
H_DSTBN#[3..0]
Place testpoint on
H_IERR# with a GND
0.1" away
R64
56R2J-4-GP
THERMAL
ICH
F1
D20
B3
H_D#[63..0]
STPCLK#
LINT0
LINT1
SMI#
H_DEFER# 6
H_DRDY# 6
H_DBSY# 6
H_DSTBP#[3..0]
1D05V_S0
H_STPCLK#
H_INTR
H_NMI
H_SMI#
D5
C6
B4
A3
H5
F21
E1
6
6
6
A20M#
FERR#
IGNNE#
H_ADS#
H_BNR#
H_BPRI#
DATA GRP1
H_A20M#
H_FERR#
H_IGNNE#
A6
A5
C4
M4
N5
T2
V3
B2
C3
D2
D22
D3
F6
BR0#
TP11 Do Not Stuff
H1
E2
G5
IERR#
INIT#
H_DINV#[3..0]
H_DSTBN#[3..0]
DATA GRP0
H_ADSTB#1
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
ADSTB1#
ADDR GROUP 1
12
12
12
12
DEFER#
DRDY#
DBSY#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1
Side Band
Non GTL
12
12
12
K3
H2
K2
J3
L1
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
ADS#
BNR#
BPRI#
XDP/ITP SIGNALS
H_ADSTB#0
H_REQ#[4..0]
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
ADSTB0#
RESERVED
6
6
J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1
ADDR GROUP 0
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
1
R65
DY
2 TEST1
Do Not Stuff
2 Do Not Stuff
1
R215
DY
2 54D9R2F-L1-GP
2
C343
Net "TEST4" as short as possible,

make sure "TEST4" routing is
reference to GND and away other
noisy signals
TEST2
Do Not Stuff
TEST4
1
Do Not Stuff
DY
2 54D9R2F-L1-GP
UMA Two Phase 2
3D3V_S0
All place within 2" to CPU

XDP_DBRESET# R60
DY
Wistron Corporation
2 Do Not Stuff

1D05V_S0
Title
XDP_TDO
R47
DY
2 Do Not Stuff
Size
Document Number
CPU (1 of 2)
Rev
SB
HM40-MV
Date:
A
Sheet
E
of
51
U33D
VCC_CORE
1
2
1
4
2
3
C79
C71
C49
1
2
C80
SC10U6D3V5MX-3GP
C62
SC10U6D3V5MX-3GP
C48
SC10U6D3V5MX-3GP
C381
SC10U6D3V5MX-3GP
TP46
NEC
77.E9071.011
SC10U6D3V5MX-3GP
Do Not Stuff
ST900U2D5VM-1-GP
SC10U6D3V5MX-3GP
TC6
1126 add C48,C49,C71,C79...
SC10U6D3V5MX-3GP
CAP
C384
SC10U6D3V5MX-3GP
CAP
C382
Do Not Stuff
CAP
C383
Do Not Stuff
CAP
C61
Do Not Stuff
C90
Do Not Stuff
CAP
Do Not Stuff
CAP
C70
C92
SB
VCC_CORE
DY
1
2
1
2
1
2
1
2
1
2
1
2
1
2
DY
C52
Do Not Stuff
DY
C96
Do Not Stuff
DY
C93
Do Not Stuff
DY
C59
Do Not Stuff
DY
C53
Do Not Stuff
DY
C91
Do Not Stuff
DY
C97
Do Not Stuff
1D05V_S0
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
VCCA
VCCA
B26
C26
VID0
VID1
VID2
VID3
VID4
VID5
VID6
AD6
AF5
AE5
AF4
AE3
AF3
AE2
VCCSENSE
AF7
VCC_SENSE 41
VSSSENSE
AE7
VSS_SENSE 41
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
C446
DY
PBY160808T-121Y-GP
68.00206.021
2nd = 68.00230.041
BGA479-SKT6-GPU7
Layout Note:
R39
100R2F-L1-GP-U
VCCSENSE and VSSSENSE lines

should be of equal length.
62.10079.001
Layout Note:
Provide a test point (with
no stub) to connect a
differential probe
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.
Do Not Stuff
C66
SC4D7U6D3V3KX-GP
C65
SCD1U10V2KX-4GP
DY
C63
Do Not Stuff
R38
100R2F-L1-GP-U
C83
SCD1U10V2KX-4GP
DY
C429
C82
SCD1U10V2KX-4GP
VCC_CORE
C420
SC10U6D3V5MX-3GP
41
Do Not Stuff
H_VID[6..0]
C81
SCD1U10V2KX-4GP
L10
C69
SCD1U10V2KX-4GP
1D5V_S0
1D5V_VCCA_S0
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
C78
SCD1U10V2KX-4GP
layout note: "1D5V_VCCA_S0"

as short as possible
C68
DY
1D05V_S0
C84
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
C54
Do Not Stuff
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
Do Not Stuff
A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18
SCD1U10V2KX-4GP
VCC_CORE
VCC_CORE
U33C 3 OF 4
Do Not Stuff
VCC_CORE
VCC_CORE
A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3
4 OF 4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
Do Not Stuff
TP45
1
1
Do Not Stuff
Do Not Stuff
TP48
TP21
1
1
Do Not Stuff
Do Not Stuff
TP61
TP43
BGA479-SKT6-GPU7
62.10079.001
Wistron Corporation
Title
Size
Document Number
CPU (2 of 2)
Rev
SB
HM40-MV
Date:
A
Sheet
E
of
51
1 OF 10
U35A
H_A#[35..3]
H_SWING routing Trace width and

Spacing use 10 / 20 mil
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
1D05V_S0
H_D#[63..0]
H_D#[63..0]
R239
221R2F-2-GP
H_SWING Resistors and

Capacitors close MCH
500 mil ( MAX )
1
H_SW ING
R238
100R2F-L1-GP-U
C478
SCD1U10V2KX-4GP
H_RCOMP routing Trace width and

Spacing use 10 / 20 mil
1
R226
2
24D9R2F-L-GP
H_RCOMP
Place them near to the chip ( < 0.5")
F2
G8
F8
E6
G2
H6
H2
F6
D4
H3
M9
M11
J1
J2
N12
J6
P2
L2
R2
N9
L6
M5
J3
N2
R1
N5
N6
P13
N8
L7
N10
M3
Y3
AD14
Y6
Y10
Y12
Y14
Y7
W2
AA8
Y9
AA13
AA9
AA11
AD11
AD10
AD13
AE12
AE9
AA2
AD8
AA3
AD3
AD7
AE14
AF3
AC1
AE3
AC3
AE11
AE8
AG2
AD6
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
HOST
H_SW ING
H_RCOMP
4,48 H_CPURST#
4
H_CPUSLP#
H_AVREF
A11
B11
1
R240
2KR2F-3-GP
C12
E11
C479
SCD1U16V2ZY-2GP
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
J8
L3
Y13
Y1
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
L10
M7
AA5
AE6
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
L9
M8
AA6
AE5
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
B15
K13
F13
B13
B14
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_SWING
H_RCOMP
H_CPURST#
H_CPUSLP#
H_RS#_0
H_RS#_1
H_RS#_2
B6
F12
C8
H_RS#0
H_RS#1
H_RS#2
H_AVREF
H_DVREF
H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR# 4
H_BPRI# 4
H_BREQ#0 4
H_DEFER# 4
H_DBSY# 4
CLK_MCH_BCLK 3
CLK_MCH_BCLK# 3
H_DPW R# 4
H_DRDY# 4
H_HIT# 4
H_HITM# 4
H_LOCK# 4
H_TRDY# 4
H_DSTBN#[3..0]
H_DSTBP#[3..0]
H_REQ#[4..0]
H_RS#[2..0]
H_DINV#[3..0]
H_DSTBN#[3..0]
H_DSTBP#[3..0]
H_REQ#[4..0]
H_RS#[2..0]
CANTIGA-GM-GP-U-NF
R241
1KR2F-3-GP
C5
E3
A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20
H_DINV#[3..0]
1D05V_S0
H_A#[35..3]
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
71.CNTIG.00U
UMA Two Phase 2
Wistron Corporation
Title
Size
Cantiga (1 of 6)_HOST
Document Number
Rev
SB
HM40-MV
Date:
5
W ednesday, November 26, 2008
Sheet
1
of
51
2 OF 10
U35B
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLK
R247
80D6R2F-L-GP
2
M_RCOMPP
PEG_CLK
PEG_CLK#
2
100R2J-2-GP
C147
DY
Do Not Stuff
RN29
PM_EXTTS#0
PM_EXTTS#1
4
3
1
2
SRN10KJ-5-GP
BG22
BH21
M_RCOMPP
M_RCOMPN
BF28
BH28
SM_RCOMP_VOH
SM_RCOMP_VOL
AV42
AR36
BF17
BC36
SM_REXT
1R243
TP_SM_DRAMRST#
B38
A38
E41
F41
DREFCLK
DREFCLK#
DREFSSCLK
DREFSSCLK#
18 GMCH_TXAOUT018 GMCH_TXAOUT118 GMCH_TXAOUT2-
H47
E46
G40
A40
18 GMCH_TXAOUT0+
18 GMCH_TXAOUT1+
18 GMCH_TXAOUT2+
H48
D45
F40
B40
DDR_VREF_S3
2
499R2F-2-GP
TP36Do Not Stuff
DREFCLK 3
DREFCLK# 3
DREFSSCLK 3
DREFSSCLK# 3
F43
E43
CLK_MCH_3GPLL 3
CLK_MCH_3GPLL# 3
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3
LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3
A41
H38
G37
J37
0912 delete GMCH_TXB*
C250
DMI
AE41
AE37
AE47
AH39
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
AE40
AE38
AE48
AH40
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
AE35
AE43
AE46
AH42
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
AD35
AE44
AF46
AH43
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3
B42
G38
F37
K37
TVA_DAC
TVB_DAC
TVC_DAC
13
13
13
13
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3
F25
H25
K25
TVA_DAC
TVB_DAC
TVC_DAC
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
TV_DCONSEL_0
TV_DCONSEL_1
DMI_TXP0 13
DMI_TXP1 13
DMI_TXP2 13
DMI_TXP3 13
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
19
13
13
13
13
GMCH_BLUE
19 GMCH_GREEN
19
DMI_RXP0 13
DMI_RXP1 13
DMI_RXP2 13
DMI_RXP3 13
GMCH_RED
GMCH_BLUE
E28
GMCH_GREEN
G28
GMCH_RED
19 GMCH_DDCCLK
19 GMCH_DDCDATA
19 GMCH_HSYNC
19 GMCH_VSYNC
2
1
3
4
GMCH_DDCDATA
GMCH_HS
GMCH_VS
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLKREQ#
ICH_SYNC#
CRT_IRTN
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC
1
49D9R2F-GP
Close to GMCH as 500 mils.
H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40
J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46
J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46
CANTIGA-GM-GP-U-NF
CL_CLK0 13
CL_DATA0 13
PWROK
13,39
CL_RST#0
13
CLPWROK_MCH 2 R111
1
Do Not Stuff
MCH_CLVREF
0912 add these parts for EMI demand

1017 delete these parts(EC208~EC210)
CRT_IREF routing Trace

width use 20 mil
R93
1KR2F-3-GP
1014 swap these nets
RN14
Do Not Stuff
TP34
CLK_MCH_OE# 3
MCH_ICH_SYNC# 13
MCH_TSATN# 2
GMCH_BLUE
R92
511R2F-2-GP
1
2
3
4
GMCH_GREEN
GMCH_RED
8
7
6
5
SRN150F-1-GP
FOR Cantiga:500 ohm

Teenah: 392 ohm
1D05V_S0
RN15
56R2J-4-GP
HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC
H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39
PEG_CMP 2
71.CNTIG.00U
1D05V_S0
B12
T37
T36
FOR Cantiga: 1.02k_1% ohm

Teenah: 1.3k ohm
R242
TSATN#
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
CRT_RED
H32
J32
J29
E29
L29
RN21
SRN33J-5-GP-U
1
2 CRT_IREF
R253
1K02R2F-1-GP
C34
N28
M28
G36
E36
K36
H36
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
CRT_GREEN
J28
GMCH_DDCCLK
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
CRT_BLUE
G29
B33
B32
G33
F33
E33
AH37
AH36
AN36
AJ35
AH34
TV_RTN
C31
E32
C231
NC
3D3V_S0
NC#BG48
NC#BF48
NC#BD48
NC#BC48
NC#BH47
NC#BG47
NC#BE47
NC#BH46
NC#BF46
NC#BG45
NC#BH44
NC#BH43
NC#BH6
NC#BH5
NC#BG4
NC#BH3
NC#BF3
NC#BH2
NC#BG2
NC#BE2
NC#BG1
NC#BF1
NC#BD1
NC#BC1
NC#F1
NC#A47
17
17
16
16
SCD1U10V2KX-4GP
4,12,39 PM_THRMTRIP-A#
13,41 PM_DPRSLPVR
BG48
BF48
BD48
BC48
BH47
BG47
BE47
BH46
BF46
BG45
BH44
BH43
BH6
BH5
BG4
BH3
BF3
BH2
BG2
BE2
BG1
BF1
BD1
BC1
F1
A47
M_ODT0
M_ODT1
M_ODT2
M_ODT3
L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
1
R211
GFX_VR_EN
ME
PLT_RST1#
1
Do Not Stuff
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4
13,24,30,31,33,34
2
R110
PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
MISC
13,39 PWROK
R29
B7
N33
P32
AT40
AT11
T20
R32
PM
PM_SYNC#
H_DPRSTP#
PM_EXTTS#0
PM_EXTTS#1
PWROK_GD
RSTIN#
PM_THRMTRIP-A#
PM_DPRSLPVR
13
PM_SYNC#
4,12,41 H_DPRSTP#
BD17
AY17
BF15
AY13
M29
C44
B43
E37
E38
C41
C40
B37
A37
18 GMCH_TXACLK18 GMCH_TXACLK+
2 Do Not Stuff
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
GRAPHICS VID
DY
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
HDA
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
17
17
16
16
GMCH_LCDVDD_ON
LIBG
1 L_LVBG
Do Not Stuff
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
VGA
R98
T25
R25
P25
P20
P24
C25
N24
M24
E21
C23
C24
N21
P21
T21
R20
M20
L21
H21
P29
R28
CFG20 T28
CFG
3D3V_S0
CPU_SEL0
CPU_SEL1
CPU_SEL2
M_CS0#
M_CS1#
M_CS2#
M_CS3#
TP73
TV
3,4
3,4
3,4
BA17
AY16
AV16
AR13
18 GMCH_LCDVDD_ON
PEG_COMPI
PEG_COMPO
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
H24
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
M_RCOMPN
R246
80D6R2F-L-GP
17
17
16
16
M33
K33
J33
R99
L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
GRAPHICS
SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST#
M_CKE0
M_CKE1
M_CKE2
M_CKE3
LCTLB_DATA
CLK_DDC_EDID
DAT_DDC_EDID
18 CLK_DDC_EDID
18 DAT_DDC_EDID
SCD1U10V2KX-4GP
1D8V_S3
SM_RCOMP_VOH
SM_RCOMP_VOL
BC28
AY28
AY36
BB36
L32
G32
M32
PCI-EXPRESS
layout take note
SM_RCOMP
SM_RCOMP#
17
17
16
16
RESERVED#BG23
RESERVED#BF23
RESERVED#BH18
RESERVED#BF18
M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3
BG23
BF23
BH18
BF18
SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1
AR24
AR21
AU24
AV20
L_BKLTCTL
GMCH_BL_ON
LCTLA_CLK
18 L_BKLTCTL
33 GMCH_BL_ON
RESERVED#AY21
AY21
C483
C484
SCD01U16V2KX-3GP SC2D2U6D3V3MX-1-GP
SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1
17
17
16
16
LVDS
SM_RCOMP_VOL
R248
1KR2F-3-GP
SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
RESERVED#B31
RESERVED#B2
RESERVED#M1
SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1
AP24
AT21
AV24
AU20
B31
B2
M1
SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1
C487
SCD01U16V2KX-3GP SC2D2U6D3V3MX-1-GP
R250
3K01R2F-3-GP
C489
RSVD
SM_RCOMP_VOH
DDR CLK/ CONTROL/COMPENSATION
1
2
R251
1KR2F-3-GP
RESERVED#M36
RESERVED#N36
RESERVED#R33
RESERVED#T33
RESERVED#AH9
RESERVED#AH10
RESERVED#AH12
RESERVED#AH13
RESERVED#K12
RESERVED#AL34
RESERVED#AK34
RESERVED#AN35
RESERVED#AM35
RESERVED#T24
1D05V_S0
3 OF 10
U35C
M36
N36
R33
T33
AH9
AH10
AH12
AH13
K12
AL34
AK34
AN35
AM35
T24
1D8V_S3
TVA_DAC
TVB_DAC
TVC_DAC
B28
B30
B29
C29
A28
1
2
3
4
8
7
6
5
SRN75J-1-GP
CANTIGA-GM-GP-U-NF
3D3V_S0
71.CNTIG.00U
RN32
LCTLB_DATA
LCTLA_CLK
CLK_MCH_OE#
5
6
7
8
4
3
2
1
SRN10KJ-6-GP
RN22
Pin Name
Strap Description
Configuration
GMCH_LCDVDD_ON
GMCH_BL_ON
Low = Only digital DisplayPort

(SDVO/DP/HDMI) or
PCIE is operational (default)
LIBG
CFG20
Digital DisplayPort
(SDVO/DP/HDMI)
Concurrent with
PCIE
1
2
3
4
8
7
6
5
A
SRN100KJ-8-GP-U
R103
1
2
2K37R2F-GP
Wistron Corporation
High = Digital DisplayPort

(SDVO/DP/HDMI) and
PCIE are operating simultaneously via the PEG port
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Title
Cantiga (2 of 6)_DMI/PM/CFG
Size
Document Number
Rev
HM40-MV
Date:
5
SB
Sheet

1
of
51
SA_RAS#
SA_CAS#
SA_WE#
BB20
BD20
AY20
M_A_RAS# 17
M_A_CAS# 17
M_A_W E# 17
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14
BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_DQS[7..0]
M_A_DQS#[7..0]
M_A_A[14..0]
M_A_DM[7..0] 17
M_A_DQS[7..0] 17
M_A_DQS#[7..0] 17
M_A_A[14..0] 17
M_B_DQ[63..0]
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AK47
AH46
AP47
AP46
AJ46
AJ48
AM48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11
BG8
BH12
BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1
AH1
AM2
AM3
AH3
AJ3
5 OF 10
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
SB_BS_0
SB_BS_1
SB_BS_2
BC16
BB17
BB33
M_B_BS#0 16
M_B_BS#1 16
M_B_BS#2 16
SB_RAS#
SB_CAS#
SB_WE#
AU17
BG16
BF14
M_B_RAS# 16
M_B_CAS# 16
M_B_W E# 16
D
M_B_DM[7..0]
M_A_BS#0 17
M_A_BS#1 17
M_A_BS#2 17
MEMORY
BD21
BG18
AT25
SYSTEM
U35E
16 M_B_DQ[63..0]
SA_BS_0
SA_BS_1
SA_BS_2
M_A_DM[7..0]
MEMORY
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
SYSTEM
AJ38
AJ41
AN38
AM38
AJ36
AJ40
AM44
AM42
AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36
AW36
BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12
BB9
BA9
AU10
AV9
BA11
BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6
AT5
AN10
AM11
AM5
AJ9
AJ8
AN12
AM13
AJ11
AJ12
DDR
M_A_DQ[63..0]
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
4 OF 10
U35D
17 M_A_DQ[63..0]
DDR
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14
AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_DM[7..0] 16
M_B_DQS[7..0]
M_B_DQS[7..0] 16
M_B_DQS#[7..0]
M_B_DQS#[7..0] 16
M_B_A[14..0]
M_B_A[14..0] 16
Wistron Corporation
Title
Size
Cantiga (3 of 6)_DDR
Document Number
Rev
SB
HM40-MV
Date:
5
Sheet
1
of
51
G9
1
VCC_GMCH_35
T32
VCC CORE
2
1
C450
DY
1
2
C456
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
POWER
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
VCC
Do Not Stuff
Place CAP where

LVDS and DDR2 taps
1
2
1
2
C211
AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
CANTIGA-GM-GP-U-NF
SB
1118 delete TC27
C235
C253
C246
C172
1
2
C136
SCD22U10V2KX-1GP
2
C140
SC1U10V3KX-3GP
C153
71.CNTIG.00U
SC1U10V3KX-3GP
VCC SM LF
VCC GFX
DY
SC10U6D3V5MX-3GP
C210
Do Not Stuff
C208
SC10U6D3V5MX-3GP
C202
DY
Do Not Stuff
SCD1U10V2KX-4GP
C225
Place on the Edge
AV44 SM_LF1_GMCH
BA37 SM_LF2_GMCH
AM40 SM_LF3_GMCH
AV21 SM_LF4_GMCH
AY5 SM_LF5_GMCH
AM10 SM_LF6_GMCH
BB13 SM_LF7_GMCH
SCD47U16V3ZY-3GP
CANTIGA-GM-GP-U-NF
C203
SCD1U10V2KX-4GP
C207
DY
1D8V_S3
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
1D05V_S0
VCC NCTF
POWER
Coupling CAP
Do Not Stuff
VCC GFX NCTF
AE33
AC33
AA33
Y33
W33
V33
U33
AH28
AF28
AC28
AA28
AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24
AJ23
AH23
AF23
Coupling CAP 370 mils from the Edge
Do Not Stuff
VCC SM
DY
SCD1U10V2KX-4GP
Do Not Stuff
Do Not Stuff
Do Not Stuff
DY
C145
C177
SCD1U10V2KX-4GP
C193
SCD1U10V2KX-4GP
C175
SC1U10V3ZY-6GP
SCD1U10V2KX-4GP
C194
C144
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
FOR VCC SM
VCC_AXG_SENSE
VSS_AXG_SENSE
71.CNTIG.00U
C164
DY
DY
C111
AG34
AC34
AB34
AA34
Y34
V34
U34
AM33
AK33
AJ33
AG33
AF33
Coupling CAP
SCD22U10V2KX-1GP
AJ14
AH14
C183
C112
DY
SCD1U10V2KX-4GP
1
1
C162
Place on the Edge
SCD1U10V2KX-4GP
Do Not Stuff
Do Not Stuff
C163
DY
Do Not Stuff
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
DY
TC21
Do Not Stuff
Y26
AE25
AB25
AA25
AE24
AC24
AA24
Y24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
Y21
AH20
AF20
AE20
AC20
AB20
AA20
T17
T16
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
Y15
V15
U15
AN14
AM14
U14
T14
DY
1D05V_S0
Do Not Stuff
6 OF 10
U35F
C455
SC10U6D3V5MX-3GP
1D05V_S0
1D05V_S0
SC10U6D3V5MX-3GP
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
Do Not Stuff
BA36
BB24
BD16
BB21
AW16
AW13
AT13
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16
Do Not Stuff
TP33
TP32
U35G
AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32
AW32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29
AW29
AV29
AU29
AT29
AR29
AP29
667MTS 2400mA
800MTS 3000mA
1D05V_S0
7 OF 10
1D8V_S3
place near Cantiga
Wistron Corporation
Title
Size
Cantiga (4 of 6)_POWER
Document Number
Rev
SB
HM40-MV
Date:
5
Sheet

1
of
51
1120 modify EC78
VTT
1
2
1
2
1
2
1
2
CRT
A PEG
A SM
1
2
1D8V_SUS_SM_CK_RC
V48
U48
V47
U47
U46
VCC_DMI
VCC_DMI
VCC_DMI
VCC_DMI
AH48
AF48
AH47
AG47
3D3V_HV_S0
106mA
R104
1
2
Do Not Stuff
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
VCC_HV
VCC_HV
VCC_HV
C35
B35
A35
C262
SC1KP50V2KX-1GP
K47
C159
SC10U6D3V5MX-3GP
1D8V_S3
AXF
SM CK
VCC_TX_LVDS
C254
SC1U10V3KX-3GP
VTTLF
VTTLF
VTTLF
A8
L1
AB2
71.CNTIG.00U
C133
1
C139
1
SCD1U10V2KX-4GP
C244
SC10U6D3V5MX-3GP
C198
1
2
1
2
DY
VTTLF1
VTTLF2
VTTLF3
C467
SCD47U6D3V2KX-GP
C218
DY
C460
Do Not Stuff
DY
1D05V_S0
456mA
C457
C462
SC10U6D3V5MX-3GP
VCCD_LVDS
VCCD_LVDS
C222
C466
DY
HDA
VCCD_PEG_PLL
1782mA
1
M38
L37
1R2F-GP
1D8V_TXLVDS_S3
VCCD_HPLL
R81
1
2
Do Not Stuff
119mA
HV
VCCD_QDAC
1D8V_S3
R82
1
C166
SCD1U10V2KX-4GP
BF21
BH20
BG20
BF20
PEG
L28
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
60.3mA
1
124mA
B22
B21
A21
CANTIGA-GM-GP-U-NF
1D8V_S3
VCCD_TVDAC
AF1
VCC_AXF
VCC_AXF
VCC_AXF
1
2
1
2
DY
1D05V_S0
LVDS
1
1
C261
SCD1U10V2KX-4GP
C239
C480
Do Not Stuff
SC10U6D3V5MX-3GP
VCC_HDA
1D05V_RUN_PEGPLL AA47
C201
SCD1U10V2KX-4GP
R255
10R2F-L-GP
SCD47U6D3V2KX-GP
2nd = 68.00214.051
C481
SCD47U6D3V2KX-GP
A32
M25
3D3V_HV_S0
R254
2
1
Do Not Stuff
C497
BAT54-5-GP
83.BAT54.D81
2nd = 83.BAT54.X81
3rd = 83.00054.Z81
Do Not Stuff
1D5VRUN_QDAC
1D05V_HV_S0 1
Do Not Stuff
L4
3D3V_S0
SC22U6D3V5MX-2GP
C134
SCD1U10V2KX-4GP
1D5V_S0
D18
Do Not Stuff
35mA
2
1
SCD1U10V2KX-4GP
1D5VRUN_QDAC
157.2mA
180ohm 100MHz
VCCA_TV_DAC
VCCA_TV_DAC
1D5V_S0
1D05V_S0
2
PBY160808T-181Y-GP
B24
A24
50mA
C181
68.00206.041
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
DY
POWER
VTTLF
1
2
C482
SCD01U16V2KX-3GP
C260
SCD1U10V2KX-4GP
2nd = 68.00217.521
220ohm 100MHz
AP28
AN28
AP25
AN25
AN24
AM28
AM26
AM25
AL25
AM24
AL24
AM23
AL23
C138
Do Not Stuff
DY
1D05V_S0
D TV/CRT
79mA
50mA
68.00119.111
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
C135
1D05V_S0
C468
SCD1U10V2KX-4GP
1D05V_RUN_PEGPLL
SBK160808T-221Y-N-GP
AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16
C214
322mA
TV
DY
1D05V_S0
VCCA_PEG_PLL
C213
1D8V_SUS_SM_CK
3D3V_S0_DAC
L5
VCCA_PEG_BG
C220
C180
C184
M_VCCA_MPLL
1
2
DY
139.2mA
1
2
1
2
2nd = 68.00217.161
120ohm 100MHz
Do Not Stuff
68.00119.101 C463
DY
C178
DY
SCD1U10V2KX-4GP
VSSA_LVDS
26mA
Do Not Stuff
L13
C469
Do Not Stuff
Do Not Stuff
SC4D7U6D3V3KX-GP
C464
1
2
1D05V_S0
C160
1
2
1
1
2
C157
M_VCCA_HPLL
68.00119.101
VCCA_LVDS
C209
SC1U10V3KX-3GP
C161
DY
SC1U10V3KX-3GP
24mA
1D05V_RUN_PEGPLL AA48
SC1U10V3KX-3GP
C169
2nd = 68.00217.161
J48
C256
SCD1U10V2KX-4GP
720mA
1
2
1D05V_S0
DY
VCCA_MPLL
DMI
1
2
1
2
1
C265
Do Not Stuff
L12
AE1
AD48
M_VCCA_DPLLB
120ohm 100MHz
M_VCCA_MPLL
1D5V_S0
1D05V_S0
VCCA_HPLL
13.2mAJ47
Do Not Stuff
AD1
1D8V_TXLVDS_S3
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
C267
VCCA_DPLLB
M_VCCA_HPLL
DY
65mA
R116
1
2
Do Not Stuff
C258
Do Not Stuff
VCCA_DPLLA
L48
U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1
SCD1U10V2KX-4GP
SC10U6D3V5MX-3GP
C263
F47
M_VCCA_DPLLB
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
1D8V_TXLVDS_S3
M_VCCA_DPLLA
1
2
Do Not Stuff
M_VCCA_DPLLA
PLL
2nd = 68.00084.A01
VCCA_DAC_BG
VSSA_DAC_BG
A LVDS
65mA
C490
SCD1U10V2KX-4GP
VCCA_CRT_DAC
VCCA_CRT_DAC
A CK
68.00331.011
1
2
HFB1608VF-102-GP
1113 modify 2nd of U19

1D05V_S0
R108
5mA
B27
A26
M_VCCA_DAC_BG A25
B25
3D3V_S0_DAC
R249
1
SB
1
2
SC4D7U10V3KX-GP
C494
SCD1U10V2KX-4GP
Do Not Stuff
74.09091.J3F
2nd = 74.09198.Q7FDY
C492
SC4D7U6D3V3KX-GP
EC78
EC77
Do Not Stuff
G9091-330T11U-GP
0R2J-2-GP
C485
SC22U16V0KX-1GP
SC2D2U6D3V3MX-1-GP
852mA
8 OF 10
U35H
SC4D7U6D3V3KX-GP
NC#4
3D3V_CRTDAC_S0
SC4D7U6D3V3KX-GP
VOUT
73mA
SCD01U16V2KX-3GP
VIN
GND
EN
1D05V_S0
1 R252
1
2
3
3D3V_S0_DAC
3D3V_S0_DAC
U44
Imax = 300 mA
5V_S0
SB
Wistron Corporation
Title
Size
Cantiga (5 of 6)_POWER
Document Number
Rev
SB
HM40-MV
Date:
5
Sheet
1
10
of
51
10 OF 10
U35J
VSS
AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6
BA16
VSS
AU16
AN16
N16
K16
G16
E16
BG15
AC15
W15
A15
BG14
AA14
C14
BG13
BC13
BA13
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AN13
AJ13
AE13
N13
L13
G13
E13
BF12
AV12
AT12
AM12
AA12
J12
A12
BD11
BB11
AY11
AN11
AH11
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Y11
N11
G11
C11
BG10
AV10
AT10
AJ10
AE10
AA10
M10
BF9
BC9
AN9
AM9
AD9
G9
B9
BH8
BB8
AV8
AT8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1
VSS
VSS
VSS
VSS
U24
U28
U25
U29
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17
NCTF_VSS_SCB#BH48
NCTF_VSS_SCB#BH1
NCTF_VSS_SCB#A48
NCTF_VSS_SCB#C1
NCTF_VSS_SCB#A3
BH48
BH1
A48
C1
A3
VSS NCTF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NCTF TEST PIN:

A3,C1,A48,BH1,BH48
AU48
AR48
AL48
BB47
AW47
AN47
AJ47
AF47
AD47
AB47
Y47
T47
N47
L47
G47
BD46
BA46
AY46
AV46
AR46
AM46
V46
R46
P46
H46
F46
BF44
AH44
AD44
AA44
Y44
U44
T44
M44
F44
BC43
AV43
AU43
AM43
J43
C43
BG42
AY42
AT42
AN42
AJ42
AE42
N42
L42
BD41
AU41
AM41
AH41
AD41
AA41
Y41
U41
T41
M41
G41
B41
BG40
BB40
AV40
AN40
H40
E40
AT39
AM39
AJ39
AE39
N39
L39
B39
BH38
BC38
BA38
AU38
AH38
AD38
AA38
Y38
U38
T38
J38
F38
C38
BF37
BB37
AW37
AT37
AN37
AJ37
H37
C37
BG36
BD36
AK15
AU36
BG21
L12
AW21
AU21
AP21
AN21
AH21
AF21
AB21
R21
M21
J21
G21
BC20
BA20
AW20
AT20
AJ20
AG20
Y20
N20
K20
F20
C20
A20
BG19
A18
BG17
BC17
AW17
AT17
R17
M17
H17
C17
VSS SCB
9 OF 10
U35I
NC#E1
NC#D2
NC#C3
NC#B4
NC#A5
NC#A6
NC#A43
NC#A44
NC#B45
NC#C46
NC#D47
NC#B47
NC#A46
NC#F48
NC#E48
NC#C48
NC#B48
1
1
1
1
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
TP71
TP67
TP74
TP65
TP66
E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48
Wistron Corporation
Title
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
Size
Document Number
Cantiga (6 of 6)
Rev
SB
HM40-MV
Date:
5
Sheet
1
11
of
51
C76
1
RTC_X1
2
1MR2J-1-GP
C396
SC1U16V3ZY-GP
62.70001.011
1119 add G84 and C540
Do Not Stuff
TP50
near DIMM door

2
GLAN_COMP place within 500 mil of ICH9M
RTCRST#
SRTCRST#
INTRUDER#
INTVRMEN
LAN100_SLP
B22
A22
INTVRMEN
LAN100_SLP
E25
GLAN_CLK
LAN_RSTYNCC13
F14
G13
D14
Do Not Stuff
LAN_TXD0
LAN_TXD1
LAN_TXD2
B10
GLAN_DOCK#/GPIO56
B28
B27
GLAN_COMPI
GLAN_COMPO
ACZ_BIT_CLK_R
ACZ_SYNC_R
AF6
AH4
HDA_BIT_CLK
HDA_SYNC
ACZ_RST#_R
AE7
HDA_RST#
GLAN_DOCK#
13 GLAN_DOCK#
1R207
2 GLAN_COMP
24D9R2F-L-GP
26 ACZ_SDATAIN0
3D3V_S0
ACZ_SDATAOUT_R
TP62 Do Not Stuff
1
R228
HDA_DOCK_RST#
DY
HDA_DOCK_EN#
2
Do Not Stuff
33,36 MEDIA_LED#
HDD
B
ODD
RTC_AUX_S5
20
20
20
20
21
21
21
21
LAN_RXD0
LAN_RXD1
LAN_RXD2
AF4
AG4
AH3
AE5
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
AG5
HDA_SDOUT
AG7
AE8
HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34
AG8
SATALED#
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0
C55
C56
C58
C57
1
1
1
1
2
2
2
2
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C
AJ16
AH16
AF17
AG17
SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1
C285
C286
C289
C288
1
1
1
1
2
2
2
2
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SATA_RXN1_C
SATA_RXP1_C
SATA_TXN1_C
SATA_TXP1_C
AH13
AJ13
AG14
AF14
RTC_AUX_S5
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
K5
K4
L6
K2
FWH4/LFRAME#
K3
LDRQ0#
LDRQ1#/GPIO23
J3
J1
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
H_DPSLP#
LPC_LFRAME# 33,34
N7
AJ27
DPRSTP#
DPSLP#
AJ25
AE23
H_DPRSTP#
FERR#
AJ26
H_FERR#_R
1
1
Do Not Stuff
Do Not Stuff
TP58
TP12
KA20GATE 33
H_A20M# 4
H_DPRSTP# 4,7,41
H_DPSLP# 4
1D05V_S0
RN54
H_THERMTRIP_R
CPUPWRGD
AD22
IGNNE#
AF25
H_PW RGD 4,39,48

4
H_IGNNE# 4
INIT#
INTR
RCIN#
AE22
AG25
L3
H_INIT# 4
H_INTR 4
KBRCIN# 33
NMI
SMI#
AF23
AF24
H_NMI 4
H_SMI# 4
STPCLK#
AH27
THRMTRIP#
AG26
H_THERMTRIP_R
PECI
AG27
ICH_TP8
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
AH11
AJ11
AG12
AF12
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
AH9
AJ9
AE10
AF10
SATA_CLKN
SATA_CLKP
AH18
AJ18
SATARBIAS#
SATARBIAS
AJ7
AH7
H_FERR#
SB
LAN100_SLP
1126 delete R230,R233,R235,R236 and RN63
Low=Disable
Layout note: R373 needs to placed
within 2" of ICH9, R379 must be
placed within 2" of R373 w/o stub
Do Not Stuff
CLK_PCIE_SATA# 3
CLK_PCIE_SATA 3
SATARBIAS
2
1
R227
24D9R2F-L-GP
1D05V_S0
3D3V_S0
DY
RN55
Do Not Stuff

H_INIT#_G
integrated VccLan1_05VccCL1_05
High=Enable
DY R229
TP25 Do Not Stuff
3
4
1117 delete MDC function(R231,R237,R232,R234)
Low=Disable
1D05V_S0
R198
Do Not Stuff
DY
SB
High=Enable
R222
Do Not Stuff
1 DY
2
H_PW RGD
Place within 500 mils of

ICH9 ball
RN63
1
2
3
4
ACZ_RST#_R
ACZ_SDATAOUT_R
ACZ_SYNC_R
ACZ_BIT_CLK_R
DY
Q24
C
FW H_INIT# 1
TP70 Do Not Stuff
Do Not Stuff
SRN47J-4-GP
8
7
6
5
EC73
Do Not Stuff
DY
26
ACZ_RST#_AUDIO
26 ACZ_SDATAOUT_AUDIO
26 ACZ_SYNC_AUDIO
26 ACZ_BITCLK_AUDIO
H_INIT#
2
1
R197
Do Not Stuff
integrated VccSus1_05,VccSus1_5,VccCL1_5
INTVRMEN
DY
LAN100_SLP
H_FERR#_R
C
1
2
1
INTVRMEN
8
7
6
5
H_STPCLK# 4
ICH9M-GP-NF
R199
330KR2F-L-GP
1
2
3
4
SRN56J-5-GP
71.ICH9M.00U
R200
330KR2F-L-GP
R223
Do Not Stuff
DY
LDRQ0#
3D3V_LDRQ1_S0
A20GATE
A20M#
LAN_RSTSYNC
D13
D12
E13
1D5V_S0
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
RTCX1
RTCX2
A25
F20
C22
33,34
C23
C24
RTC_RST#
SRTC_RST#
INTRUDER#
G84
1124 delete C540
C392
SC1U16V3ZY-GP
RTC_X2
LPC_LAD[0..3]
2
1
BAT-CON2-1-GP-U
R193
C281
Do Not Stuff
SC12P50V2JN-3GP
3
4
DY
LPC_LAD[0..3]
1 OF 6
U16A
RTC
LPC
RN51
SRN20KJ-GP-U
2
1
PWR
GND
NP1
NP2
RTC_BAT
1
2
NP1
NP2
R121
1
2
1KR2J-1-GP
1D05V_S0
C77
1
LAN / GLAN
CPU
83.R0304.B81
2nd = 83.R2004.C81
RTC1
IHDA
CH715FPT-GP
C391
SC1U16V3ZY-GP
RTC_BAT_R
R57
10MR2J-L-GP
82.30001.861
2nd = 82.30001.691
RTC_AUX_S5
1016 modify X2
1
X2
X-32D768KHZ-46GP
D16
SATA
3D3V_AUX_S5
SC12P50V2JN-3GP
EC65
Do Not Stuff
UMA Two Phase 2

A
DY
Wistron Corporation
Title
Size
ICH9-M (1 of 4)_SATA/HDA/RTC
Document Number
Rev
SB
HM40-MV
Date:
5
Sheet
1
12
of
51
3 OF 6
U16C
2 OF 6
3D3V_S0
32,41 VGATE_PWRGD
1
0R2J-2-GP
PLT_RST1# 7,24,30,31,33,34
PCLK_ICH 3
Do Not Stuff
R225
10KR2J-3-GP
TP22 Do Not Stuff
33
33
PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#
SB
1120 add the net(SATACLKREQ#)
3 SATACLKREQ#
Do Not Stuff
PCI_REQ#3
INT_PIRQF#
INT_PIRQG#
PCI_SERR#
3D3V_S0
1
2
3
4
5
10
9
8
7
6
INT_PIRQD#
PCI_IRDY#
PCI_TRDY#
ECSCI#_1
TP51
INT_SERIRQ
PCI_DEVSEL#
PCI_STOP#
PCI_FRAME#
PERN2
PERP2
PETN2
PETP2
J29
J28
K27
K26
PERN3
PERP3
PETN3
PETP3
G29
G28
H27
H26
SPI_CS#1
E29
E28
F27
F26
PERN5
PERP5
PETN5
PETP5
C29
C28
D27
D26
PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP
D23
D24
F23
D25
E23
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#8
USB_OC#9
USB_OC#10
USB_OC#11
USB_OC#0
R73
PERN4
PERP4
PETN4
PETP4
N4
N5
N6
P6
M1
N2
M4
M3
N3
N1
P5
P3
USB_RBIAS_PN AG2
AG1
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
V27
V26
U29
U28
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
7
7
7
7
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
Y27
Y26
W 29
W 28
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
7
7
7
7
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
AB27
AB26
AA29
AA28
DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2
7
7
7
7
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
AD27
AD26
AC29
AC28
DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3
7
7
7
7
DMI_CLKN
DMI_CLKP
DMI_ZCOMP
DMI_IRCOMP
USBP0N
USBP0P
USBP1N
USBP1P
SPI_CLK
USBP2N
SPI_CS0#
USBP2P
SPI_CS1#/GPIO58/CLGPIO6 USBP3N
USBP3P
SPI_MOSI
USBP4N
SPI_MISO
USBP4P
USBP5N
OC0#/GPIO59
USBP5P
OC1#/GPIO40
USBP6N
OC2#/GPIO41
USBP6P
OC3#/GPIO42
USBP7N
OC4#/GPIO43
USBP7P
OC5#/GPIO29
USBP8N
OC6#/GPIO30
USBP8P
OC7#/GPIO31
USBP9N
OC8#/GPIO44
USBP9P
OC9#/GPIO45
USBP10N
OC10#/GPIO46
USBP10P
OC11#/GPIO47
USBP11N
USBP11P
USBRBIAS
USBRBIAS#
USB
22D6R2F-L1-GP
T26
T25
CLK_PCIE_ICH# 3
CLK_PCIE_ICH 3
AF29
AF28
DMI_IRCOMP_R
AC5
AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2
USBPN0 23
USBPP0 23
USBPN3
USBPP3
USBPN4
USBPP4
31
31
18
18
M7
AJ24
B21
AH20
AJ20
AJ21
SPKR
MCH_SYNC#
TP3
PW M0
PW M1
PW M2
BATLOW #
B13
PM_BATLOW#_R
PW RBTN#
R3
PWRBTN#_ICH
LAN_RST#
D20
SATA
GPIO
RSMRST#
RSMRST#_SB
D22
CK_PW RGD
R5
CLK_PWRGD 3
CLPW ROK
R6
PWROK
SLP_M#
B16
CL_CLK0
CL_CLK1
F24
B19
CL_DATA0
CL_DATA1
F22
C19
CL_VREF0
CL_VREF1
C25
A19
CL_RST0#
CL_RST1#
F21
D18
GPIO24/MEM_LED
GPIO10/SUS_PW R_ACK
GPIO14/AC_PRESENT
GPIO9/W OL_EN
A16
C18
C11
C20
PM_SLP_M#
TP4
1
2
3
4
SMLINK0
SMLINK1
RSMRST#_SB
3D3V_S5
1
2
3
4
5
1D5V_S0
10
9
8
7
6
1
2
3
4
5
3D3V_S5
PWROK
CL_DATA0 7
CL_VREF0_ICH
CL_VREF1_ICH
CL_RST#0
3D3V_S5
Do Not Stuff
TP3
GPIO24 1
GPIO10
GPIO14
GPIO9
1
C390
R55
Do Not Stuff
Do Not Stuff
TP54
10
9
8
7
6
USB_OC#5
SMB_LINK_ALERT#
GPIO10
SMB_ALERT#
10
9
8
7
6
USB_OC#4
DBRESET#
USB_OC#3
USB_OC#6
DY
R205
453R2F-1-GP
R56
Do Not Stuff
DY
RP6
3D3V_S5
USB_OC#8
USB_OC#9
USB_OC#10
USB_OC#11
3D3V_S5
1
2
3
4
5
SRN10KJ-L3-GP
10
9
8
7
6
3D3V_S5
SB_GPIO13
GPIO14
B
GLAN_DOCK# 12
SRN10KJ-L3-GP
GPIO57
SRN10KJ-L3-GP
R224
24D9R2F-L-GP
R195
1
2
Do Not Stuff
DY
USB
Pair
Device
USB1
NC
NC
MINIC1
BOOT BIOS Strap
WEBCAM
PCI_GNT#0
NC
NC
USBPN9 23
USBPP9 23
Bluetooth
NC
D15
RSMRST#_SB
1
3
33 RSMRST#_KBC
0
1
1
1
0
1
BOOT BIOS Location
A16 swap override strap

PCI_GNT#3
USB2(High speed)
10
NC
11
CardReader
SPI
PCI
LPC(Default)
BAT54-5-GP
83.BAT54.D81
2nd = 83.BAT54.X81
3rd = 83.00054.Z81
SPI_CS#1
PCI_GNT#3
GNT0 and SPI_CS#1
have a weak internal pull up
1
R210
1
R212
1
R208
Do Not
2 Stuff
DY
Do Not
2 Stuff
DY
Do Not
2 Stuff
DY
Wistron Corporation
Title
ICH9-M (2 of 4)_PCIE/USB/DMI
Size
Document Number
Rev
SB
HM40-MV
Date:
UMA Two Phase 2
low = A16 swap override enable

high = default
PCI_GNT#0
R196
100KR2J-1-GP
SPI_CS#1
1017 modify USB signal connection
71.ICH9M.00U
R204
3K24R2F-GP
SRN10KJ-L3-GP
USB_OC#2
USB_OC#7
PM_RI#
PCIE_WAKE#
RP7
1
2
3
4
5
Do Not Stuff
3D3V_S5
RP2
SATA0GP
SATA1GP
GPIO36
GPIO37
3D3V_S0
7,39
CL_CLK0 7
DY
USB_OC#1
PM_BATLOW#_R
ECSWI#
USB_OC#0
PM_PWRBTN# 33
C75
RP1
PM_DPRSLPVR 7,41
3
83.00016.B11
2 BAS16-1-GP
2nd = 83.00016.F11
71.ICH9M.00U
SRN10KJ-6-GP
USBPN7 22
USBPP7 22
USBPN11 30
USBPP11 30
8
7
6
5
3D3V_S5
ICH9M-GP-NF
5
TACH1/GPIO1
TACH2/GPIO6
TACH3/GPIO7
GPIO8
LAN_PHY_PW R_CTRL/GPIO12
ENERGY_DETECT/GPIO13
TACH0/GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
GPIO27
GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
GPIO49
GPIO57/CLGPIO5
RN5
TXN2
TXP2
L29
L28
M27
M26
MINICARD1
23
SST
7,39
R216 1
DY 2
Do Not Stuff
D17
1
PERN1
PERP1
PETN1
PETP1
PCI-Express
1
1
N29
N28
P27
P26
Direct Media Interface
C418 SCD1U10V2KX-5GP 2
1
1
TXN1
TXP1
SPI
PCIE_RXN2
PCIE_RXP2
PCIE_TXN2
PCIE_TXP2
A20
AG19
AH21
AG21
A21
C12
C21
AE18
K1
AF8
AJ22
A9
D19
L1
AE19
AG22
AF21
AH24
A8
No Reboot Strap
SPKR
LOW = Defaule
High=No Reboot
4 OF 6
U16D
31
31
31
31
Do Not Stuff
VRMPW RGD
PWROK
PM_DPRSLPVR
ICH9M-GP-NF
SRN8K2J-2-GP-U
1 ICH_TP3
GPIO49 should be pulled down to

GND only when using Teenah. When
using Cantiga, this ball should
be left as No Connect.
3D3V_S0
LAN
PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1
SDATAOUT1
1 GPIO49
GPIO57
Do Not Stuff
26
ACZ_SPKR
7 MCH_ICH_SYNC#
SRN8K2J-2-GP-U
10
9
8
7
6
24
24
24
24
TP68
D21
G20
M2
INT_PIRQH#
PCI_REQ#0
INT_PIRQC#
INT_PIRQB#
3D3V_S0
W AKE#
SERIRQ
THRM#
PW ROK
DPRSLPVR/GPIO16
TP53 Do Not Stuff
Do Not Stuff
3D3V_S0
1
2
3
4
5
RP4
3D3V_S0
SRN8K2J-2-GP-U
RP3
PCI_REQ#2
PCI_REQ#1
SDATAOUT1
PM_CLKRUN#
TP19
TP63
TP69
CLKRUN#
S4_STATE#1
SCD1U10V2KX-4GP
3D3V_S0
10
9
8
7
6
1 GPIO12
SB_GPIO13
PSW_CLR#
1 GPIO18
1 GPIO20
1 GPIO22
G61
ICH9M-GP-NF
1
2
3
4
5
ICH_TP7
SB_GPIO1
TP52
Do Not Stuff
Do Not Stuff
Do Not Stuff
DY Do Not Stuff
TP64
EC_TMR
ECSCI#_1
ECSWI#
33
1 R194
C10
C405
Do Not Stuff
S4_STATE#/GPIO26
TP57 Do Not Stuff
DY
E20
M5
AJ23
Do Not Stuff
RP5
PCI_PERR#
INT_PIRQE#
PCI_LOCK#
INT_PIRQA#
L4
24 PCIE_WAKE#
33 INT_SERIRQ
32
THRM#
R209
H4
K6
F2
G2
STP_PCI#
STP_CPU#
33 PM_CLKRUN#
ICH_PME#
Interrupt I/F
SMBALERT#/GPIO11
A14
E19
PM_SLP_S3# 33,39,43,44
PM_SLP_S4# 33,43,44
PCI_DEVSEL#
PCI_PERR#
PCI_LOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PM_STPPCI#
PM_STPCPU#
SLPS5#
3
3
TP55 Do Not Stuff
C16
E16
G17
PCI_IRDY#
PCI_PAR
A17
PM_SUS_CLK 32
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
PMSYNC#/GPIO0
C14 PLT_RST#_R
D4
R2
SMB_ALERT#
SUS_STAT#/LPCPD#
SYS_RESET#
CLK_ICH14 3
CLK48_ICH 3
P1
PLTRST#
PCICLK
PME#
M6
H1
AF3
D3
E3
R1
C6
E4
C2
J4
A4
F5
D7
TP59
PM_SYNC#
CLK14
CLK48
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
RI#
D8
B4
D6
A5
R4
G19
SATA0GP
SATA1GP
GPIO36
GPIO37
AH23
AF19
AE21
AD20
Do Not Stuff
C/BE0#
C/BE1#
C/BE2#
C/BE3#
F19
1 PM_SUS_STAT#
DBRESET#
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37
PM_RI#
PCI_REQ#3
PCI_GNT#3
SMBCLK
SMBDATA
LINKALERT#/GPIO60/CLGPIO4
SMLINK0
SMLINK1
SMB
PCI_REQ#2
71.ICH9M.00U
G16
A13
SMB_LINK_ALERT# E17
SMLINK0
C17
SMLINK1
B18
SMB_CLK
SMB_DATA
Clocks
15
15
PCI_REQ#0
PCI_GNT#0
PCI_REQ#1
SYS GPIO
Power MGT
F1
G4
B6
A7
F13
F12
E6
F6
J5
E1
J6
C4
REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55
MISC
GPIO
Controller Link
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
PCI
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
D11
C8
D9
E12
E9
C9
E10
B7
C7
C5
G11
F8
F11
E7
A3
D2
F10
D5
D10
B3
F7
C3
F3
F4
C1
G7
H7
D1
G5
H6
G1
H3
U16B
Sheet

1
13
of
51
1D5V_S0
23mA
A10
A11
A12
B12
C385 1
SCD1U10V2KX-4GP
2
DY
C421
Do Not Stuff
80mA
D28
D29
E26
E27
1
2
DY
2
C397
SC4D7U6D3V3KX-GP
A26
3D3V_S0
C408
Do Not Stuff
1mA
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
1
2
1
2
C435
Do Not Stuff
1D05V_S0
C417
DY
C419
SC4D7U6D3V3KX-GP
VCCCL1_5
VCCCL3_3
VCCCL3_3
1
2
1
2
1
2
3D3V_S0
11mA
3D3V_S5
C470
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
1D5V_S5
C410
SCD1U10V2KX-4GP
1D5V_S5
3D3V_S5
C445
C432
C399
C401
SCD1U10V2KX-4GP
C394
DY
VCCSUS3_3=212mA
C437
Do Not Stuff
DY
G22 VccSus1_05[3]
G23 VccSus1_5[3] 1
TP56 Do Not Stuff
3D3V_S5
T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7
11mA
C475
SCD1U10V2KX-4GP
AF1
C412
A18
D16
D17
E22
DY
VCCCL1_05
AD8
F18
C400
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
C471
SCD1U10V2KX-4GP
C436
C465
SCD1U10V2KX-4GP
1D05V_S0
2mA
1
2
68.1R220.10D
DY
1
2
1
2
1
2
1
2
1
2
1
2
1
2
2
VCCSUS3_3
CORE
C404
1D5V_S0
DY
3D3V_S0
C411
Do Not Stuff
A24
B24
19mA in S0;73mA in S3/S4/S5
VCCLAN1_05
VCCLAN1_05
VCCLAN3_3
VCCLAN3_3
A
VCCGLANPLL
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5
GLAN POWER
1D5V_S0
A27
VCCUSBPLL
23mA
C442
1
2
DY
VccLan1D05
SCD1U10V2KX-4GP
Do Not Stuff
C73
C409
19mA in S0;78mA in S3/S4/S5
DY
AA7
AB6
AB7
AC6
AC7
VCC1_5_A
VCC1_5_A
VCC1_5_A
C407
2
IND-1D2UH-10-GP
C403
AC8 VccSus1_05
F17
1
2
1
2
2
3D3V_S0
C451
SCD1U10V2KX-4GP
VCC1_5_A
VCC1_5_A
USB CORE
Do Not Stuff
C473
VCCPSUS
1
1
AJ5
C454
SCD1U10V2KX-4GP
VCCPUSB
VCC1_5_A
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
AJ4
AJ3
C402
SCD1U10V2KX-4GP
USBPLL=11mA
VCCSUS1_5
DY
SCD1U10V2KX-4GP
VCC1_5_A
VCC1_5_A
AC21
AC12
AC13
AC14
VCCSUS1_5
VCC1_5_A
AC18
AC19
G10
G9
VCCSUS1_05
VCCSUS1_05
C406
SCD1U10V2KX-4GP
AC9
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
C474
SCD1U10V2KX-4GP
Do Not Stuff
AC11
AD11
AE11
AF11
AG10
AG11
AH10
AJ10
L11
DY
C448
Do Not Stuff
DY
3D3V_S0
VCCHDA
VCCSUSHDA
ATX
DY
DY
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
DY
3D3V_S0
B9
F9
G3
G6
J2
J7
K7
C395
48mA
1 R221
2
Do Not Stuff
VCC3_3=308mA 3D3V_S0
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCCP_CORE
VCCSATAPLL
ARX
C472
SCD1U10V2KX-4GP
1D5V_S0
AC16
AD15
AD16
AE15
AF15
AG15
AH15
AJ15
C413
Do Not Stuff
Do Not Stuff
C458
PCI
2
1
C440
SC1U16V3ZY-GP
C74
SCD1U10V2KX-4GP
AD19
AF20
AG24
AC20
AJ19
AC10
VCC3_3
VCC3_3
VCC3_3
VCC3_3
1
2
1
2
1
2
1
2
1
2
1
1
A
K
1
2
A
K
1.34A
C452
SC4D7U6D3V3KX-GP
C117
SCD1U16V2ZY-2GP
1D5V_S0
VCC3_3
C423
SCD1U10V2KX-4GP
V5REF_S5
D7
R72
100R2J-2-GP
RB751V-40-2-GP
83.R2004.B8F
2nd = 83.R0304.A8F
3rd = 83.R3004.A8F
AJ6
C447
Do Not Stuff
2mA
VCC3_3
C444
SCD1U10V2KX-4GP
5V_S5
AG29
C441
C431
SCD01U16V2KX-3GP
SCD1U10V2KX-4GP
3D3V_S5
VCC3_3
C422
Do Not Stuff
Layout Note:
Place near ICH9
AB23
AC23
DY
1D5V_DMIPLL_ICH_S0
W23 1D05V_DMI_ICH_S0
Y23
V_CPU_IO
V_CPU_IO
C439
SCD1U10V2KX-4GP
C72
SCD1U16V2ZY-2GP
DY
Do Not Stuff
C477
VCCDMI
VCCDMI
C434
Do Not Stuff
C476
SC10U6D3V5MX-3GP
R29
1D05V_S0
SCD1U10V2KX-4GP
68.1R220.10D
VCCDMIPLL
1.63A
Layout Note:Place near ICH9M
SCD1U10V2KX-4GP
2
IND-1D2UH-10-GP
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
Do Not Stuff
D6
R54
100R2J-2-GP
RB751V-40-2-GP
83.R2004.B8F
2nd = 83.R0304.A8F
3rd = 83.R3004.A8F
V5REF_SUS
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCCA3GP
V5REF_S0
C
1D5V_APLL_S0
L14
SC1U16V3ZY-GP
2mA
V5REF
SCD1U10V2KX-4GP
47mA
1D5V_S0
VCCRTC
SCD1U10V2KX-4GP
C461
1015 modify component size of C390,C419
5V_S0
AE1
AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29
F25
G25
H24
H25
J24
J25
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
U25
V24
V25
U23
W24
W25
K23
Y24
Y25
SCD1U10V2KX-4GP
DY
*Within a given well, 5VREF needs to be up before the

corresponding 3.3V rail
3D3V_S0
A6
Do Not Stuff
C453
V5REF_S5
A23
Do Not Stuff
C388
SCD1U10V2KX-4GP
C443
SCD1U10V2KX-4GP
C415
DY
SC4D7U6D3V3KX-GP
DY
SCD1U10V2KX-4GP
C459
Do Not Stuff
Do Not Stuff
C414
V5REF_S0
6 OF 6
SCD1U10V2KX-4GP
646mA
6uA in G3
Do Not Stuff
1D5V_S0
SCD1U10V2KX-4GP
C389
U16F
RTC_AUX_S5
Wistron Corporation
VCCGLAN3_3
Title
ICH9M-GP-NF
Size
71.ICH9M.00U
ICH9-M (3 of 4)_POWER
Document Number
Rev
SB
HM40-MV
Date: Monday, December 01, 2008
5
Sheet
1
14
of
51
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25
NCTF_VSS#A1
NCTF_VSS#A2
NCTF_VSS#B1
NCTF_VSS#A29
NCTF_VSS#A28
NCTF_VSS#B29
NCTF_VSS#AJ1
NCTF_VSS#AJ2
NCTF_VSS#AH1
NCTF_VSS#AJ28
NCTF_VSS#AJ29
NCTF_VSS#AH29
A1
A2
B1
A29
A28
B29
AJ1
AJ2
AH1
AJ28
AJ29
AH29
3D3V_S5
3D3V_S0
8
7
6
5
RN50
SRN2K2J-2-GP
1
2
3
4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NCTF TEST PIN:

A1,A2,B1,A28,A29,B29
AH1,AJ1,AJ2,AH29,AJ28,AJ29
AA26
AA27
AA3
AA6
AB1
AA23
AB28
AB29
AB4
AB5
AC17
AC26
AC27
AC3
AD1
AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29
AD4
AD5
AD6
AD7
AD9
AE12
AE13
AE14
AE16
AE17
AE2
AE20
AE24
AE3
AE4
AE6
AE9
AF13
AF16
AF18
AF22
AH26
AF26
AF27
AF5
AF7
AF9
AG13
AG16
AG18
AG20
AG23
AG3
AG6
AG9
AH12
AH14
AH17
AH19
AH2
AH22
AH25
AH28
AH5
AH8
AJ12
AJ14
AJ17
AJ8
B11
B14
B17
B2
B20
B23
B5
B8
C26
C27
E11
E14
E18
E2
E21
E24
E5
E8
F16
F28
F29
G12
G14
G18
G21
G24
G26
G27
G8
H2
H23
H28
H29
5 OF 6
U16E
5V_S0
Q7
13
13
SMB_CLK
6 2N7002DW -1-GP
SMBC_ICH 3,16,17
2
SMB_DATA
SMBD_ICH 3,16,17
SMBUS
1
1
1
1
1
1
1
1
1
1
1
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
TP1
TP2
TP10
TP8
TP7
TP9
TP30
TP31
TP28
TP29
TP27
TP26
Wistron Corporation
Title
Size
ICH9M-GP-NF
71.ICH9M.00U
ICH9-M (4 of 4)
Rev
SB
HM40-MV
Date:
Document Number
Sheet
E
15
of
51
DM1
RN27
8
7
6
5
1
2
3
4
M_B_A14
M_B_A11
M_B_A7
SRN56J-5-GP
RN13
8
7
6
5
1
2
3
4
M_B_BS#0
M_B_CAS#
M_CS3#
M_ODT3
SRN56J-5-GP
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
DY
1
2
C290
SCD1U16V2ZY-2GP
C292
Do Not Stuff
114
119
M_ODT2
M_ODT3
202
MH1
VREF
VSS
GND
GND
MH1
MH2
OTD0
OTD1
Place these Caps near DM1
1D8V_S3
C200
C174
DY
C488
DY
C195
DY
C502
C499
C503
DY
C496
SC2D2U6D3V3MX-1-GP
7
7
1D8V_S3
C493
SCD1U16V2ZY-2GP
DDR_VREF_S3_1
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
SCD1U16V2ZY-2GP
13
31
51
70
131
148
169
188
DY
Do Not Stuff
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
C428
Do Not Stuff
Do Not Stuff
8 M_B_DQS[7..0]
11
29
49
68
129
146
167
186
Do Not Stuff
C217
SCD1U16V2ZY-2GP
C223
DY
Do Not Stuff
C171
SCD1U16V2ZY-2GP
C206
SCD1U16V2ZY-2GP
C243
DY
Do Not Stuff
C191
SCD1U16V2ZY-2GP
C237
SCD1U16V2ZY-2GP
C154
DY
Do Not Stuff
C190
DY
Do Not Stuff
C234
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C219
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196
2
R220
10KR2J-3-GP
SC2D2U6D3V3MX-1-GP
8 M_B_DQS#[7..0]
81
82
87
88
95
96
103
104
111
112
117
118
DDRB_SA0
Do Not Stuff
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
50
69
83
120
163
SC2D2U6D3V3MX-1-GP
Decoupling Capacitor
Put decap near power(0.9V)
and pull-up resistor
DDR_VREF_S3
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
198
200
SRN56J-5-GP
3D3V_S0
M_B_RAS#
M_CS2#
M_ODT2
M_B_A13
3,15,17
3,15,17
1
2
3
4
SMBD_ICH
SMBC_ICH
199
8
7
6
5
SA0
SA1
NC#50
NC#69
NC#83
NC#120
NC#163/TEST
195
197
RN10
SDA
SCL
VDDSPD
SRN56J-5-GP
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_CLK_DDR3 7
M_CLK_DDR#3 7
M_B_DM[7..0]
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
SRN56J-5-GP
RN18
1 M_B_A1
2 M_B_A3
3 M_B_A10
4 M_B_WE#
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
10
26
52
67
130
147
170
185
8
7
6
5
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
8 M_B_DQ[63..0]
BA0
BA1
M_CLK_DDR2 7
M_CLK_DDR#2 7
164
166
SRN56J-5-GP
RN26
1 M_B_A6
2 M_B_A9
3 M_B_A8
4 M_B_A5
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
30
32
8
7
6
5
CK1
CK1#
M_CKE2 7
M_CKE3 7
107
106
Do Not Stuff TP37
CK0
CK0#
M_CS2# 7
M_CS3# 7
79
80
M_CKE3
M_CKE2
M_B_A12
M_B_BS#2
CKE0
CKE1
SRN56J-5-GP
RN31
8
1
7
2
6
3
5
4
M_B_BS#1
M_B_A0
M_B_A2
M_B_A4
M_B_RAS# 8
M_B_WE# 8
M_B_CAS# 8
110
115
1
2
3
4
CS0#
CS1#
108
109
113
M_B_BS#0
M_B_BS#1
Put decap near power(0.9V) and pull-up resistor

RN19
8
7
6
5
RAS#
WE#
CAS#
8
8
DDR_VREF_S3
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2
M_B_BS#2
PARALLEL TERMINATION
102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A[14..0]
REVERSE TYPE
201
MH2
DDR2-200P-23-GP-U1
High 9.2mm
62.10017.A71
2nd = 62.10017.B51
3rd = 62.10017.K51
Wistron Corporation
Title
DDR2 Socket 0 (DM1)

Size
Date:
A
Document Number
Rev
SB
HM40-MV

E
Sheet
16
of
51
DM2
M_A_A[14..0]
8
7
6
5
1
2
3
4
M_A_BS#2
8
8
M_A_BS#0
M_A_BS#1
107
106
M_A_A13
M_CS0#
M_ODT0
M_A_RAS#
SRN56J-5-GP
RN24
8
7
6
5
1
2
3
4
M_A_A5
M_A_A8
M_A_A9
M_A_A3
Do Not Stuff TP38
SRN56J-5-GP
RN11
8
7
6
5
1
2
3
4
M_A_WE#
M_A_CAS#
M_CS1#
M_ODT1
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
8 M_A_DQ[63..0]
SRN56J-5-GP
RN30
8
7
6
5
1
2
3
4
M_CKE0
M_A_BS#2
M_A_A12
SRN56J-5-GP
RN25
8
7
6
5
1
2
3
4
M_A_A7
M_A_A11
M_A_A14
M_CKE1
SRN56J-5-GP
RN17
8
7
6
5
1
2
3
4
M_A_A2
M_A_A0
M_A_A6
M_A_A4
SRN56J-5-GP
RN16
8
7
6
5
1
2
3
4
M_A_A1
M_A_BS#1
M_A_A10
M_A_BS#0
SRN56J-5-GP
Decoupling Capacitor
1
C249
C215
C189
DY
1
2
1
2
1
2
C170
SCD1U16V2ZY-2GP
DY
SCD1U16V2ZY-2GP
C187
Do Not Stuff
C236
DY
SCD1U16V2ZY-2GP
DY
Do Not Stuff
C233
Do Not Stuff
DY
Do Not Stuff
C232
Do Not Stuff
C216
SCD1U16V2ZY-2GP
C167
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C188
Put decap near power(0.9V)

and pull-up resistor
DDR_VREF_S3
8 M_A_DQS#[7..0]
8 M_A_DQS[7..0]
11
29
49
68
129
146
167
186
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
13
31
51
70
131
148
169
188
114
119
M_ODT0
M_ODT1
DY
1
2
C293
Do Not Stuff
1
2
1
2
1
2
C238
7
7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
1
2
C291
202
SCD1U16V2ZY-2GP
DDR_VREF_S3_1
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2
/RAS
/WE
/CAS
/CS0
/CS1
CKE0
CKE1
CK0
/CK0
CK1
/CK1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
BA0
BA1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
SDA
SCL
VDDSPD
SA0
SA1
NC#50
NC#69
NC#83
NC#120
NC#163/TEST
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VREF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
GND
/DQS0
/DQS1
/DQS2
/DQS3
/DQS4
/DQS5
/DQS6
/DQS7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
ODT0
ODT1
108
109
113
M_A_RAS# 8
M_A_WE# 8
M_A_CAS# 8
110
115
M_CS0# 7
M_CS1# 7
79
80
M_CKE0 7
M_CKE1 7
30
32
M_CLK_DDR0 7
M_CLK_DDR#0 7
164
166
10
26
52
67
130
147
170
185
M_CLK_DDR1 7
M_CLK_DDR#1 7
M_A_DM[7..0]
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
195
197
SMBD_ICH
SMBC_ICH
3,15,16 3D3V_S0
3,15,16
199
198
200
50
69
83
120
163
81
82
87
88
95
96
103
104
111
112
117
118
C433
Do Not Stuff
DY
1D8V_S3
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196
201
SKT-SODIMM20022U2GP
62.10017.691
2nd = 62.10017.891
3rd = 62.10017.K41
High 5.2mm
SCD1U16V2ZY-2GP
C168
SC2D2U6D3V3MX-1-GP
C498
DY
Do Not Stuff
C491
DY
Do Not Stuff
C212
SC2D2U6D3V3MX-1-GP
C486
SCD1U16V2ZY-2GP
Do Not Stuff
C495
DY
C500
SC2D2U6D3V3MX-1-GP
DY
Do Not Stuff
C241
Place these Caps near DM2
1D8V_S3
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85
Put decap near power(0.9V) and pull-up resistor

RN12
DDR_VREF_S3
PARALLEL TERMINATION
4
REVERSE TYPE
Wistron Corporation
Title
DDR2 Socket 1 (DM2)

Size
Date:
A
Document Number
Rev
HM40-MV

E
SB
Sheet
17
of
51
1015 modify F1
CCD Pin
1015 modify LCD1 pin define
Pin
1016 modify LCD1 pin define
CCD_PWR
USB-
SB
USB+
SB
1128 modify LCD1
GND
GND
CLK_DDC_EDID
DAT_DDC_EDID
R124 2
7
7
BLON_OUT
1 33R2J-2-GP
BRIGHTNESS_CN
DCBATOUT
13
13
USBPP4_R
DY
3D3V_S0
EC1
FUSE-1D1A6V-4GP-U
C1
Do Not Stuff
BLON_OUT_1
CLK_DDC_EDID
DAT_DDC_EDID
1
3D3V_S0 C2
DY
69.50007.691
2ND = 69.50007.771
EC2
DY
F2
69.50007.A31EC3
2nd = 69.50007.A41
DY
C3
SC10U25V6KX-1GP
20.F1296.040
POLYSW -1D1A24V-GP
SCD1U50V3ZY-GP
Do Not Stuff
ACES-CONN40C-4-GP
1
1
EC87
PW R_INVERTER
7 GMCH_TXAOUT0+
7 GMCH_TXAOUT0-
USBPN4
USBPP4
F1
7 GMCH_TXAOUT1+
7 GMCH_TXAOUT1-
2 0R0402-PAD
2 0R0402-PAD
CCD_PW R
7 GMCH_TXAOUT2+
7 GMCH_TXAOUT2-
USBPN4_R
R2 1
R1 1
Do Not Stuff
7 GMCH_TXACLK+
7 GMCH_TXACLK-
USBPN4_R
USBPP4_R
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Do Not Stuff
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
42
SC4D7U10V5ZY-3GP
2
1
41
40
Symbol
LCD1
C305
SCD1U25V3ZY-1GP
1
2
DY
Do Not Stuff
C304
SC10U10V5ZY-1GP
C302
LCDVDD
LCD/CCD CONN
R126
1
Do Not Stuff
L_BKLTCTL 7
1
Do Not Stuff
BRIGHTNESS 33
R125
BRIGHTNESS_CN
DY
BLON_OUT
C308
DY
Do Not Stuff
Do Not Stuff
DY
BLON_OUT 33
C309
SB
1106 modify R125,R126
SB
1125 modify R125,R126
3D3V_S0
2
1
1014 swap the part

RN34
3
4
SRN2K2J-1-GP
CLK_DDC_EDID
DAT_DDC_EDID
Layout 40 mil
LCDVDD
3D3V_S0
IN#5
IN#4
SB
EN
GND
OUT
C303
C307
G5285T11U-GP
SC4D7U6D3V3KX-GP
Do Not Stuff
DY
74.05285.07F
2nd = 74.09724.09F
1015 modify component size of C303,C307
UMA Two Phase 2
Wistron Corporation
C306
Do Not Stuff
DY
1
2
3
GMCH_LCDVDD_ON
U30
7 GMCH_LCDVDD_ON

Title
Size
LCD CONN
Document Number
Rev
SB
HM40-MV
Date:
Friday, November 28, 2008
Sheet
18
of
51
Layout Note:
Place these resistors
close to the CRT-out
connector
7
Ferrite bead impedance: 10 ohm@100MHz
Hsync & Vsync level shift
L3
1016 modify U8
5V_S0
GMCH_RED
CRT_R
68.00119.081 2nd = 68.00230.021

CRT_G
14
68.00119.081 2nd = 68.00230.021

L1
1016 modify L1,L2 and L3
C27
Do Not Stuff
C21
U8A
TSAHCT125PW -GP
73.74125.L13
2nd = 73.74125.L12 CRT_VSYNC1
DY
U8B
TSAHCT125PW -GP
DY
7 GMCH_VSYNC
CRT_HSYNC1
14
C38
1
2
1
2
1
2
8
7
6
5
7 GMCH_HSYNC
Do Not Stuff
1
2
3
4
C42
SC6D8P50V2DN-GP
C46
SC6D8P50V2DN-GP
DY
68.00119.081
2nd = 68.00230.021
SC6D8P50V2DN-GP
DY
EC18 SBK160808T-100Y-N-GP
Do Not Stuff
DY
EC19
Do Not Stuff
EC20
Do Not Stuff
RN39
SRN150F-1-GP
CRT_B
GMCH_BLUE
C44
SCD1U16V2ZY-2GP
7 GMCH_GREEN
L2
4
73.74125.L13
2nd = 73.74125.L12
Layout Note:
* Must be a ground return path between this ground and the ground on
the VGA connector.
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.
DDC_CLK & DATA level shift
CRT I/F & CONNECTOR

5V_CRT_S0
CRT_G
CRT_B
CRT_IN#_R
C39
7
2
8
3
9
4
10
5
DAT_DDC1_5
13
CRT_HSYNC1
14
CRT_VSYNC1
15
CLK_DDC1_5
16
SCD01U16V2KX-3GP
VIDEO-15-75-GP-U
5V_CRT_S0
F3
RN38
SRN2K2J-1-GP
5V_CRT_DDC
FUSE-1D1A6V-4GP-U
1016 modify D4
RN37
SRN10KJ-6-GP
69.50007.691
2nd = 69.50007.771
Q5
CRT_IN#_R
CLK_DDC1_5
20.20715.015
CRT_VSYNC1
CRT_HSYNC1
CLK_DDC1_5
DAT_DDC1_5
CH551H-30PT-GP
D4
11
12
3D3V_S0
6
1
7
2
8
3
9
4
10
5
3D3V_S0
83.R5003.C8F
2nd = 83.R5003.H8H
3rd = 83.5R003.08F
1
2
3
4
CRT_R
1127 modify CRT1
3
4
SB
17
6
1
2
1
5V_S0
CRT1
8
7
6
5
2nd = 20.20728.015
7 GMCH_DDCCLK
2N7002DW -1-GP
7 GMCH_DDCDATA
1
2
5V_S0
C26
Do Not Stuff
UMA Two Phase 2
D3
DY
CRT_IN#_R
CRT_IN#_R
36
C40
Wistron Corporation
DY

Do Not Stuff
1
Title
1
2
1
2
DY
C20
Do Not Stuff
SC18P50V2JN-1-GP
C23
SC18P50V2JN-1-GP
C30
DAT_DDC1_5
1
SC100P50V2JN-3GP
Size
CRT Connector
Document Number
Rev
SB
HM40-MV
Date:
A
Sheet
E
19
of
51
SATA Connector
1001 delete these parts for EMI demand
1021 modify SATA1
SATA1
23
NP1
1
C
2
3
4
5
6
7
SATA_RXN0 12
SATA_RXP0 12
1016 modify D23

D5
SR24-GP
C50
SCD1U16V2ZY-2GP
DY
TC5
SKT-SATA22P-47-GP
B
5V_S0
1021 modify TC5
Do Not Stuff
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
NP2
24
SATA_TXP0 12
SATA_TXN0 12
83.2R004.J8M
2nd = 83.2R004.H8M
B
62.10065.741
UMA Two Phase 2
Wistron Corporation
Title
Size
Document Number
HDD
Rev
HM40-MV
Date:
5
SB
Sheet
1
20
of
51
SATA ODD Connector

5V_S0
SATA_TXP1
SATA_TXN1
SATA_RXP1
SATA_RXN1
TC7
SC10U10V5ZY-1GP
12
12
12
12
SCD1U16V2ZY-2GP
C273

1001 delete these parts for EMI demand
ODD1
P2
P3
+5V
+5V
S2
S3
S6
S5
A+
AB+
B-
NP1
NP2
NP1
NP2
DP
MD
P1
P4
GND
GND
GND
GND
GND
GND
GND
S1
S4
S7
P5
P6
8
9
ODD_DP
ODD_MD
1
1
TP40 Do Not Stuff

TP39 Do Not Stuff
SKT-SATA7P+6P-22-GP
62.10065.351
2nd = 62.10065.521
3rd = 62.10065.421
UMA Two Phase 2

A
Wistron Corporation

Title
ODD
Size
Document Number
Rev
HM40-MV
5
SB
Sheet
1
21
of
51
BLUETOOTH MODULE
1.5A / High Active Voltage 2V
D
3D3V_BT_S0
3D3V_S0
U48
EC85
SCD1U16V2ZY-2GP
VOUT
GND
FLG#
VIN
EN
C530
SC4D7U10V5ZY-3GP
2
BLUETOOTH_EN 33
SB
74.09715.A7F
2nd = 74.05240.A7F
1113 modify U48
BLUE1
R123
Do Not Stuff
2
1
2
1
3D3V_BT_S0
EC92
DY
Do Not Stuff
Do Not Stuff
5
ETY-CON4-21-GP-U
EC93
USBPN7
USBPP7
13
13
R122
Do Not Stuff
USB_7USB_7+
4
3
2
EC21 put near

BLUE1 / all
USB put one
choke near
connector by
EMI request
1
2
3
RT9715CGBG-GP
3D3V_BT_S0
DY
48
48
48
20.F0984.004
2nd = 20.D0197.104
USB_7USB_7+
3D3V_BT_S0
USB_7USB_7+
3D3V_BT_S0

SB
1125 add EC92 and EC93
0930 modify BLUE1

1017 modify BLUE1
UMA Two Phase 2

A
Wistron Corporation

Title
Size
Bluetooth
Document Number
Rev
HM40-MV
Date: Wednesday, November 26, 2008
5
SB
Sheet
1
22
of
51

1021 modify and swap these parts(USB1 and USB2)
D
5V_USB1_S0
USB2
13
13
R218
Do Not Stuff
2
1
2
1
USBPN9
USBPP9
USB2
6
8
1
USB_9USB_9+
2
3
4
7
5
R219
Do Not Stuff
SKT-USB-177-GP
22.10218.U11
5V_S5
13
13
USBPN0
USBPP0
R245
Do Not Stuff
C142
SC4D7U10V3KX-GP
2
3
4
7
5
33 USB_PWR_EN#
GND
VIN
VIN
EN#
VOUT
VOUT
VOUT
FLG#
8
7
6
5
USB_OC#0 13
USB_0USB_0+
6
8
1
R244
Do Not Stuff
2
1
2
1
RT9715DGF-GP
1
2
3
4
USB1
Do Not Stuff
DY
74.09715.079
EC32
USB1
5V_USB1_S0
U12
5V_USB1_S0
2nd = 74.00547.A79
SKT-USB-177-GP
22.10218.U11
1021 delete TC23

5V_USB1_S0
1
2
DY
2
EC69
EC74
80.15715.12L
2nd = 77.C1571.09L
EC75
DY
Do Not Stuff
EC76
DY
Do Not Stuff
EC70
DY
Do Not Stuff
Do Not Stuff
EC72
DY
DY
Do Not Stuff
TC22
ST150U6D3VBM-2-GP
Do Not Stuff
USB_0USB_0+
USB_9USB_9+
100 mil
UMA Two Phase 2

A
Wistron Corporation
Title
Size
USB
Document Number
Rev
HM40-MV
Date:
5
Sheet
1
SB
23
of
51
1D2V_LAN_S5
25 LAN_ACT_LED
25 10M/100M_LED#
LAN_RXP1
C130
LAN_RXN1
PCIE_RXP1 13
FOR AR8114A LAN_ACT_LED is high enable pin
1016 modify RN53 and U10

GND
LED_10_100#
LED_ACT#
DVDDL
DVDDL
RX_N
RX_P
AVDDL/AVDDL_REG
REFCLKP
REFCLKN
AVDD
TX_P
TX_N
1D2V_LAN_S5
LANX1
LANX2
2
R59
2K37R2F-GP
1D2V_LAN_S5_D
SB
R61
Do Not Stuff
Do Not Stuff
1
TP23
VPD_DATA
VPD_CLK
1D2V_LAN_S5_D
DY
Do Not Stuff
PCIE_REQ_LAN#
AR8114
82.30020.791
2nd = 82.30020.851
1113
X3
LANX2 1
2 LANX1
1
2
1D2V_LAN_S5
1D2V_LAN_S5
MDI1+
MDI1-
MDI0+
MDI0-
PLT_RST1#
1
2
C103 and C106
C106
SC18P25V2JN-GP
LAN_RST
1
0R2J-2-GP
1D2V_LAN_S5_D
C114
Do Not Stuff
2
MDI1+
MDI1-
DY
Close to AR8114 Pin28
DY
25
25
XTAL-25MHZ-96GP
C103
SC15P50V2JN-2-GP
modify
R68
7,13,30,31,33,34
SRN49D9F-1-GP
25
25
SB
13
14
15
16
17
18
19
20
21
22
23
24
2
SCD1U10V2KX-4GP
2
SCD1U10V2KX-4GP
MDI0+
MDI0-
8MDIS1_LAN
1
C95
7
6MDIS0_LAN
1
5
1
2
3
4
VPD_CLK
VPD_DATA
72.24C08.I01
AVDDH
C94
8
7
6
5
VCC
WC#
SCL
SDA
2nd = 72.24C08.J01

RN9
NC#1
NC#2
E2
VSS
M24C08-W MN6TP-GP
R304
0R2J-2-GP
AR8132
AR8114-AL1E-GP
1001 modify RN9
1
2
3
4
1126 add R303,R304
R303 1
RN53
SRN4K7J-8-GP
U10
4
3
3D3V_LAN_S5
TP24 Do Not Stuff
1
SC1KP50V2KX-1GP
SCD1U10V2KX-4GP
C104
Close to U13 Pin8
1D2V_LAN_S5
36
35
34
33
32
31
30
29
28
27
26
25
TRXP0
TRXN0
AVDDH
AVDD
TRXP1
TRXN1
AVDDH
NC#20
NC#21
AVDDL
NC#23
NC#24
C102
SCD1U10V2KX-4GP
AVDD
NO_CONN
TESTMODE
SMDATA
VDDL
SMCLK
TWSI_DATA
TWSI_CLK
DVDDL
LED_DUPLEX#
NC#26
AVDDH
CTRL12
AVDDHO
SC1KP50V2KX-1GP
PCIE_W AKE#
13
C109
3D3V_LAN_S5
LAN_RST
VDD18O
VDD33
PERST#
WAKE#
CTR12
VDDHO
VBG1P18V
AVDD
XTLO
XTLI
AVDDL_REG
RBIAS
1
2
3
4
5
6
7
8
9
10
11
12
VDD18O
C449
U11
3D3V_LAN_S5
MDI1MDI1+
MDI0MDI0+
C128
SCD1U10V2KX-4GP
PCIE_RXN1 13
49
48
47
46
45
44
43
42
41
40
39
38
37
2
SCD1U10V2KX-4GP
2
SCD1U10V2KX-4GP
LAN_ACT_LED
R70
10KR2J-3-GP
R71
0R2J-2-GP
AR8114A Atheros suggestion change to Bead

60 ohms/100Mhz 500mA (68.60090.0D1)
AVDDL_REG
C129
CLK_PCIE_LAN 3
CLK_PCIE_LAN# 3
2
2SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AR8132 use 0 ohm resiter
CLK_PCIE_LAN_1
1
CLK_PCIE_LAN#_1 C127 1
C126
PCIE_TXP1
PCIE_TXN1
13
13
DY
to AR8114 Pin2
C116
1D2V_LAN_S5
C119
SCD1U10V2KX-4GP
DY
Do Not Stuff
SB
AVDDL_REG
C122
1D2V_LAN_S5_D
1D2V_LAN_S5_D
Do Not Stuff
SCD1U10V2KX-4GP
C118
3D3V_LAN_S5
0R2J-2-GP
Close
1
R69
3D3V_S5

AR8114 use 0ohm resister

AR8132 Atheros suggest to change 4.7uH choke
SB

1D8V_LAN_S5
1016 modify Q8
1
2
SB
C132
SC10U6D3V5KX-1GP
AR8132
1
AR8132
Do Not Stuff

SB
AR8114
Do Not Stuff
1D2V_LAN_S5
C115
1
C101
1
C125
1
C108
1
C99
1
C131
VDD18O
C538
C537
Do Not Stuff
84.00069.B1B
2nd = 84.DCP69.01B
3rd = 84.00069.A1B
DY
SB
0R2J-2-GP
BCP69-GP
Q8
R295 1
Do Not Stuff
1128 Add L19
AR8132
C146
SC4D7U6D3V3KX-GP
CTRL12
SB
Do Not Stuff
C143
DY
0R2J-2-GP
R66
4K7R2J-2-GP
2
Do Not Stuff
2
SCD1U10V2KX-4GP
2
Do Not Stuff
2
SCD1U10V2KX-4GP
1D2V_LAN_S5
L19
1
3D3V_LAN_S5_2
R79
3D3V_LAN_S5
1
C113
1
C107
1
C124DY
1
C123

C121
Do Not Stuff
SB
2
Do Not Stuff
2
SCD1U10V2KX-4GP
2
SCD1U10V2KX-4GP
2
SCD1U10V2KX-4GP
2
Do Not Stuff
DY
DY
AVDDH
1
C110
1
C105
1
C98
1
C100
DY

SB
2
SC1U6D3V2KX-GP
2
SCD1U10V2KX-4GP
2
SCD1U10V2KX-4GP
2
Do Not Stuff
DY
1D2V_LAN_S5_D
1D2V_LAN_S5
1D8V_LAN_S5
2
A
R296 1
AVDDHO
Do Not Stuff
R67
AR8114
1
0R2J-2-GP
Atheros suggestion change to Bead

60 ohms/100Mhz 500mA (68.60090.0D1)
AVDDH
AR8132
2
R297 1
UMA Two Phase 2

A
0R2J-2-GP
Wistron Corporation
1D8V_LAN_S5

C539
SC1U6D3V2KX-GP
DY
AR8114
C89
SB
1
C120
2
Do Not Stuff
Title
2
SC1KP50V2KX-1GP
Size
A3
Atheros AR8114/8132

Date:
5
Document Number
Rev
SB
HM40-MV
Sheet
1
24
of
51
LAN Connector
3D3V_LAN_S5
R214 1
2
510R2F-L-GP
10M/100M_LED#
EC67 1
DY Do Not Stuff
CONN_PW R_2
EC68 1
DY Do Not Stuff
ACT_LED_B2
EC61 1
DY Do Not Stuff
ACT_LED_B1
EC64 1
DY Do Not Stuff
2
2
2
RJ1
24 10M/100M_LED#
SB
RJ45_1
RJ45_2
RJ45_3
SB
LAN_ACT_LED
3D3V_LAN_S5
R298 1
2 0R2J-2-GP ACT_LED_B1
R299 1
2 Do Not Stuff ACT_LED_B2
SB
RJ45_78
ACT_LED_B1
ACT_LED_B2
AR8132
A2(+) A3(-):ORANGE
2
3
4
5
6
7
8
B1
RJ45_45
RJ45_6
AR8114
24
A2(+) A1(-)::GREEN
9
A1
A2
A3
1
CONN_PW R_2
B1(+) B2(-):YELLOW
B2
10
AR8132
RJ45-125-GP-U1
R300 1
2
Do Not Stuff
R301 1
2
510R2F-L-GP
AR8114
ACT_LED_B1
ACT_LED_B2
22.10277.021
10/100 Lan Transformer
2nd = 22.10277.081
XF1
1D8V_LAN_S5
24
R58
MDI1-
XRF_TDC
12
RJ45_6
10
MCT2
MCT1
MCT2
RJ45_45
RJ45_78
1
2
DY
C87
24
MDI1+
11
RJ45_3
24
MDI0-
RJ45_2
MCT1
RJ45_1
24
MDI0+
RN6
SRN75J-1-GP
5
6
7
8
DY
C88
Do Not Stuff
SB
Do Not Stuff
C86
SCD01U16V2KX-3GP
DY
C85
Do Not Stuff
SB
0R2J-2-GP
4
3
2
1
XFORM-271-GP
LAN_TERMINAL
68.HD081.301
2nd = 68.68160.30B
3rd = 68.NS014.301
C64
1
2
SC1KP2KV8KX-GP
1016 modify XF1
1.route on bottom as differential pairs.

2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.
RJ11 signal must leave the other signal
or power plane 100mil.
DOC_TIP,DOC_RING,TIP,RING:
W/S : 10/100 @ Surface layers
10/20 @ Inner layers
1
10/100 LAN Transformer
RJ45 PIN
TD+ --> TX+
RJ45-1
TD- --> TX-
RJ45-2
RD+ --> RX+
RJ45-3
RD- --> RX-
RJ45-6
UMA Two Phase 2
Wistron Corporation
Title
Size
A3
Date:
LAN Connector
Document Number
Rev
SB
HM40-MV
Sheet
E
25
of
51
3D3V_S0
3VA_S0
1
2
RESET#
12 ACZ_BITCLK_AUDIO
12 ACZ_SYNC_AUDIO
12 ACZ_SDATAIN0
12 ACZ_SDATAOUT_AUDIO
6
10
8
5
BIT_CLK
SYNC
SDATA_IN
SDATA_OUT
C501
1
2
RN56
AVDD
AVDD
AVEE
34
35
MICBIASB
MIC_L
MIC_R
19
20
21
MICBIASC
PORTC_L
20K PORTC_R
18
16
17
PORTD_L
PORTD_R
27
28
PORTB_L
10K PORTB_R
14
15
MONO
STEREO_L
STEREO_R
29
30
31
SENSEA
13
CX_SENSE
VREF
24
FLY_P
FLY_N
39
37
AUD_AVREF
C271
FLY_P 1
2SC1U10V3KX-3GP
FLY_N
39.2K
12
PC_BEEP
48
S/PDIF
45
46
47
GPIO2
GPIO1
EAPD#/GPIO0
1
2
DMIC_CLOCK
DMIC_1/2
C505
AVSS
AVSS
DVSS
DVSS
22
23
32
33
25
38
7
41
CX20561-15Z-GP
VREF_LO
VREF_HI
RESERVED#32
RESERVED#33
VREF_LO
VREF_HI
Populate
Populate
-6dB
Omit
Omit
1 SC2D2U10V3KX-1GP
1 SC2D2U10V3KX-1GP
AUD_MICIN_L
AUD_MICIN_R
28
28
C504
C507 C506
0911 add net name(FLY_P,FLY_N,VREF_LO,VREF_HI)
EC35
3VA_S0
R257
5K1R2F-2-GP
AUD_GPIO2
2
1
DY
AUD_GPIO1
2
1
0dB
C251 2
C255 2
SC1U10V3KX-3GP
R614
AUD_MICIN_L
AUD_MICIN_R
4
3
SOUNDL 27
SOUNDR 27
Do Not Stuff
R615
DY
SRN2K2J-1-GP
10K GPIO RESISTORS
GAIN
C280
Do Not Stuff
1014 modify these nets
1
2
MIC1-L_PORT-C
MIC1-R_PORT-C
ACZ_BITCLK_AUDIO
DY
Do Not Stuff
2nd = 74.09198.G7F
RN33
MICBIASC
SC1U10V3KX-3GP
Default gain is -6dB without populating the

10K-ohms pull-down resistors going to GPIO1 and
GPIO2.
0912 add the part for EMI demand
49
PC BEEP GAIN CONTROL
GND
CX20561
R106
Do Not Stuff
SB
SCD1U10V2KX-4GP
EAPD#
R105
10KR2J-3-GP
FRONTL 28
FRONTR 28
AUD_GPIO2
AUD_GPIO1
Do Not Stuff
Do Not Stuff
DY
NC#4
SC1U10V3KX-3GP
SRN1KJ-7-GP
27
DIB_P
DIB_N
C274
PORTA_L
5.11K PORTA_R
4
3
1118 delete R107 and add L18
SC10U10V5ZY-1GP
2
1
2
KBC_BEEP
ACZ_SPKR
AUDIP_PC_BEEP
33
13
AUDIO_BEEP
SB
SB
VOUT
1
2
C541
SC27P50V2JN-2-GP
1126 add C541 and modify R101

43
42
1001 Add R107
SB
ACZ_SDATAOUT_AUDIO
R101 1
2 ACZ_SDATAIN0_R
ACZ_SDATAOUT_AUDIO
47R2J-2-GP
DY
VIN
GND
EN
C277 C276
26
40
36
9
4
3
44
VDD_IO
DVDD_1_8
DVDD_3_3
DVDD
11
1
2
3
1
2
0911 add net name(ACZ_SDATAIN0_R)
U19
SCD1U10V2KX-4GP
12 ACZ_RST#_AUDIO
3VA_S0
68.00119.081
2nd = 68.00230.021
AUD_AVEE
DY
U18
5V_S0
C247
0911 add net name(DVDD_1_8)
3D3V_S0
L18
SCD1U10V2KX-4GP
3D3V_S0
3VA_S0
C264
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1118 delete C245 and C270
SCD1U10V2KX-4GP
DVDD_1_8
Do Not Stuff
2
C242 C248
C259
Do Not Stuff
2
DY
SB
VDD_20561
1 R102
2
Do Not Stuff
CX_SENSE
R256
1 5K1R2F-2-GP
2
LINEOUT_JD#
1 R258
MIC_JD# 28
28
20KR2F-L-GP
1014 modify R258 from 10k to 20k ohm
-12dB
Populate
Omit
-18dB
Omit
Populate
UMA Two Phase 2
Wistron Corporation
Title
Size
A3
Date:
5
Azalia codec CX20561

Document Number
Rev
HM40-MV
SB
Sheet
1
26
of
51
AUDIO OP AMPLIFIER
5V_S0
5VA_OP_S0
G2
2
1
1
Do Not Stuff
C6
SC4D7U10V5ZY-3GP
AGND
1009 modify net name for GND to AGND

26
SOUNDL
C15
1
RN2
L_LINE_IN_1
LIN+RC
1
2
SCD47U16V3ZY-3GP
L_LINE_IN
LIN+
4
3
SRN20KJ-GP-U
26
SOUNDR
C13
1
RN3
R_LINE_IN_1
RIN+RC
1
2
SCD47U16V3ZY-3GP
R_LINE_IN
RIN+
4
3
3D3V_S0
5VA_OP_S0
1
2
SRN20KJ-GP-U
5VA_OP_S0
U1
AGND
VCC
VCC
BYPASS
SHUTDOWN
5
14
BYPASS
7
8
15
16
RINRIN+
LINLIN+
LVO1
LVO2
RVO1
RVO2
1
4
12
9
SPKR_LSPKR_L+
SPKR_RSPKR_R+
VSS
VSS
3
10
GND
17
C9
1
SC4D7U6D3V3KX-GP
4
3
2
11
AGND
DY
R134
C14
C16
2 RIN+RC
SCD47U16V3ZY-3GP
2 LIN+RC
SCD47U16V3ZY-3GP
AGND AGND
6
13
NC#6
NC#13
SPKR_LSPKR_L+
SPKR_RSPKR_R+
28,48
28,48
28,48
28,48
R_LINE_IN
RIN+
L_LINE_IN
LIN+
AMP_SHUTDOW N# 33
R135
G1454R41U-GP
1
Do Not Stuff
Q1
C8
C7
SC1U16V3ZY-GP
SC4D7U10V5ZY-3GP
2
1
EAPD#_R
1
0R2J-2-GP
EAPD#
26
2N7002-11-GP
84.27002.N31
AGND
74.01454.013
RN35
SRN10KJ-5-GP
AC decopling
RN36
R5
R4
1 0R2J-2-GP
L_LINE_IN
LIN+
R_LINE_IN
RIN+
1 Do Not Stuff
DY
1
2
3
4
8
7
6
5
SPKR_LSPKR_L+
SPKR_RSPKR_R+
SRN51KJ-GP
AGND
UMA Two Phase 2
Wistron Corporation
Title
Size
Document Number
AUDIO AMP
Rev
SB
HM40-MV
Date:
A
Sheet
E
27
of
51
MIC IN
0930 add 2nd for MIC1
MIC1
1015 modify RN57

26
RN57
1
Do Not Stuff
2
SB
EU3
EU4
EC79
PHONE-JK233-GP-U3
DY
22.10133.B01
2nd = 22.10251.491
DY
MLVS0603M04-1-GP
2
Do Not Stuff
Do Not Stuff
2
2
Do Not Stuff
LINE OUT
EC80
DY DY
AUD_MIC_L
SRN100J-3-GP
R260
R259
1
1
AUD_MIC_R
4
3
MLVS0603M04-1-GP
1
2
26 AUD_MICIN_R
26 AUD_MICIN_L
NP2
NP1
5
4
3
6
2
1
MIC_JD#
SHIELDING
0930 modify
LOUT1
1126 modify EU1,EU2 and add EU3,EU4

LOUT1
26 LINEOUT_JD#
26
26
NP2
NP1
5
4
3
6
2
1
RN58
1
2
FRONTR
FRONTL
LOUT_R+1
4
3
LOUT_L+1
EU2
2
1
22.10133.B21
MLVS0603M04-1-GP
2
1
PHONE-JK235-GP-U2
4
3
DY
Do Not Stuff
DY
Do Not Stuff
Do Not Stuff
DY
MLVS0603M04-1-GP
1
2
EC81
EC82
ERN1
1014 swap the part
EU1
SHIELDING
SRN68J-5-GP
2nd = 22.10251.511
0930 add 2nd for SPK1
Internal Speaker
SB
1119 modify SPK1
SPK1
27,48
27,48
27,48
SPKR_LSPKR_L+
SPKR_R-
SPKR_LSPKR_L+
SPKR_R-
ER1
ER2
ER3
1
1
1
2 0R3-0-U-GP SPKR_L-_R
2 0R3-0-U-GP SPKR_L+_R
2 0R3-0-U-GP SPKR_R-_R
4
3
2
27,48
SPKR_R+
SPKR_R+
ER4
2 0R3-0-U-GP SPKR_R+_R
1
5
1
1
1
1
2
2
2
2
ACES-CON4-7-GP-U
DY DY
DY DY
EC6
EC7
EC8
EC9
UMA Two Phase 2
20.F0772.004
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Wistron Corporation
Title
Size
Document Number
AUDIO JACK
Rev
SB
HM40-MV
Date:
5
Sheet
1
28
of
51
MDC 1.5 CONN

1002 modify MDC1
C
SB
1112 delete MDC function
UMA Two Phase 2

A
Wistron Corporation

Title
MDC
Size
Document Number
Rev
SB
HM40-MV
Date: Monday, November 24, 2008
5
Sheet
1
29
of
51
3D3V_S0
3D3V_D_S0
XD_CD#
SD_WP
SD_CD#
XD_D4/SD_DAT1
XD_D5/MS_BS
XD_D3/MS_D1
SD_DAT0/XD_D6/MS_D0
SD_DAT7/XD_D2/MS_D2
MS_INS#
SD_DAT6/XD_D7/MS_D3
SD_CLK/XD_D1/MS_CLK
SD_DAT5/XD_D0
SD_DAT4/XD_WP#
XD_R/B#
SD_DAT3/XD_WE#
SD_DAT2/XD_RE#
XD_ALE
XD_CE#
XD_CLE
R84
Do Not Stuff
1
2
CARD_3D3V_S0
DY
C186
Do Not Stuff
U15
2RREF
6K19R2F-GP
1009 add R96

1
Do Not Stuff
RST#
1 R97
45
36
14
2
44
MODE_SEL
SD_CMD
GPIO0
RREF
RST#
RST#_CHIP
0R2J-2-GP
DY
NC#30
NC#7
NC#3
30
7
3
GND
GND
GND
GND
6
12
32
46
RTS5159-GR-GP
D3V3
D3V3
5
4
PLT_RST1#
24
22
U15
33
11
R96
7,13,24,31,33,34
MS_D5
MS_D4
EEDO
EEDI
MODE_SEL
SD_CMD
3V3_IN
15
18
R86
1
VREG
EESK
EECS
C192
Do Not Stuff
10
17
16
DY
DY
C252
SCD1U16V2ZY-2GP
3D3V_D_S0
C197
Do Not Stuff
C182
SC4D7U6D3V3KX-GP
3V_VBUS_S0
AV_PLL
XTLO
XTLI
VREG
CARD_3V3
XTAL_CTR
R83
Do Not Stuff
1
2
3D3V_S0
47
48
AV_PLL
13
1015 modify component size of C182
C199
SCD1U16V2ZY-2GP
DP
DM
R85
Do Not Stuff
1
2
C185
SC1U10V3KX-3GP
SP1
SP2
SP3
SP4
SP5
SP6
SP7
SP8
SP9
SP10
SP11
SP12
SP13
SP14
SP15
SP16
SP17
SP18
SP19
19
20
21
23
25
26
27
28
29
31
34
35
37
38
39
40
41
42
43
0910 update footprint of
71.05159.00G

13
3D3V_D_S0
USBPP11
USBPN11
13
3D3V_D_S0
3
R94
0R2J-2-GP
C228
Do Not Stuff
DY
C240
SC1U10V3KX-3GP
CLK48_5159
RST#
MODE_SEL
R100
100KR2J-1-GP
5 IN1 CARD-READER (SD/MMC/MS/MS PRO/XD)
1013 modify card1
CARD_3D3V_S0
DY
DY
DY
DY
EC36
EC41
EC43
2
1
38
37
GROUND
GROUND
DY
13
22
4IN1_GND
4IN1_GND
DY
EC39
XD_D5/MS_BS
MS_INS#
SD_CLK/XD_D1/MS_CLK
21
17
15
MS_BS
MS_INS
MS_SCLK
DY
DY
EC37
UMA Two Phase 2

A
CARD-PUSH-36P-GP-U1
Wistron Corporation
C275
SC4D7U10V5ZY-3GP
NP2
NP1
SD_DAT0/XD_D6/MS_D0
XD_D3/MS_D1
SD_DAT7/XD_D2/MS_D2
SD_DAT6/XD_D7/MS_D3
EC38
NP2
NP1
19
20
18
16
EC40
MS_DATA0
MS_DATA1
MS_DATA2
MS_DATA3
EC42
Do Not Stuff
XD_R/B
XD_RE
XD_CE
XD_CLE
XD_ALE
XD_WE
XD_WP
XD_CD_SW
SD_CMD
SD_CLK/XD_D1/MS_CLK
SD_CD#
SD_W P
Do Not Stuff
1
2
3
4
5
6
7
34
12
24
36
35
SD_CLK/XD_D1/MS_CLK
SD_CMD
SD_CD#
SD_W P
Do Not Stuff
XD_R/B#
SD_DAT2/XD_RE#
XD_CE#
XD_CLE
XD_ALE
SD_DAT3/XD_W E#
SD_DAT4/XD_W P#
XD_CD#
SD_CMD
SD_CLK
SD_CD_SW
SD_WP_SW
SD_DAT0/XD_D6/MS_D0
XD_D4/SD_DAT1
SD_DAT2/XD_RE#
SD_DAT3/XD_W E#
Do Not Stuff
XD_D0
XD_D1
XD_D2
XD_D3
XD_D4
XD_D5
XD_D6
XD_D7
SD_DAT0/XD_D6/MS_D0
XD_D4/SD_DAT1
SD_DAT2/XD_RE#
SD_DAT3/XD_W E#
Do Not Stuff
8
9
26
27
28
30
31
32
25
29
10
11
Do Not Stuff
SD_DAT5/XD_D0
SD_CLK/XD_D1/MS_CLK
SD_DAT7/XD_D2/MS_D2
XD_D3/MS_D1
XD_D4/SD_DAT1
XD_D5/MS_BS
SD_DAT0/XD_D6/MS_D0
SD_DAT6/XD_D7/MS_D3
SD_DAT0
SD_DAT1
SD_DAT2
SD_DAT3
Do Not Stuff
SD_VCC
MS_VCC
XD_VCC
Do Not Stuff
23
14
33
CARD1
CARD_3D3V_S0
1009 modify this net

C279
Do Not Stuff
DY
Title
Size
20.I0043.001
CARD READER- RTS5159
Document Number
Rev
HM40-MV
Date:
5
SB
Sheet
30
1
of
51
Mini Card Connector(WLAN)

4
1D5V_S0
3D3V_MINI
3D3V_MINI
MINIC1
3 PCIE_REQ_MINI#
3 CLK_PCIE_MINI1#
3 CLK_PCIE_MINI1
33
33
E51_RxD
E51_TxD
13 PCIE_RXN2
13 PCIE_RXP2
3
13 PCIE_TXN2
13 PCIE_TXP2
3D3V_MINI
5V_S5
3
5
7
9
11
13
15
4
6
8
10
12
14
16
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
NP2
54
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
PLT_RST1#_W LAN
Do Not Stuff
2
R37
300R2F-GP
R168
1DY
2
Do Not Stuff
C47
DY
W IRELESS_EN 33
PLT_RST1# 7,13,24,30,33,34
1MINI_W AKE#
Do Not Stuff TP49
53
NP1
1

USBPN3 13
USBPP3 13
LED_W W AN#
LED_W PAN#
SKT-MINI52P-20-GP
TP42 Do Not Stuff

W LAN_LED#_MC 36
TP41 Do Not Stuff
1015 modify component size of R158,R159
20.F1117.052
2nd = 62.10043.391
3D3V_S0
1 R159
3D3V_S5
0R2J-2-GP
1 R158
2
Do Not Stuff
3D3V_MINI
DY
Place near MINIC1
1021 modify TC16

2
3D3V_MINI
1D5V_S0
DY
Do Not Stuff
2nd = 77.C3371.051
1
2
C330
SB
C356
1
2
1
2
C333
DY
Do Not Stuff
SB
SC1U6D3V2KX-GP
DY
C326
Do Not Stuff
C334
Do Not Stuff
SC1U6D3V2KX-GP
C360
SCD1U16V2ZY-2GP
C332
SCD1U16V2ZY-2GP
TC16
Do Not Stuff
DY
SB
UMA Two Phase 2

1
Wistron Corporation
Title
Size
MINI CARD
Document Number
Rev
HM40-MV
Date:
A
SB
Sheet
E
31
of
51
G7922_FAN_TACH 48
G7922_FAN_DRIVE
48
FAN1
R165
G7922_FAN_TACH
3
2
G7922_FAN_DRIVE
10KR2J-3-GP
A
Layout notice :
Both H_THERMDA and THERMDC routing
10 mil trace width and 10 mil spacing
THRM# 13
SMBC_Therm
SMBD_Therm
G7922_VDD_3D3
R177
Do Not Stuff
ALERT# 2
C370
C377
SC470P50V2JN-GP
H_THERMDA
G7922_DXP2
G7922_DXP3
SB
G7922_DXP2
DXP1
DXP2
DXP3
8
9
10
15
17
21
NC#8
NC#9
NC#10
NC#15
NC#17
NC#21
28
G7922_FAN_TACH
FAN1#25
FAN1#26
25
26
G7922_FAN_DRIVE
THERM_SET
THERM#
THERMTRIP#
11
12
13
POWER_OK
14
2
4
6
G7922RV1U-GP
G7922_SGND3
V_DEGREE
PURE_HW _SHUTDOW N#
VGATE_PW RGD
C355
GND
DGND
20
CLK
RESET#
C372 must be near EMC2102

C375 must be near Q8
18
16
Layout notice : Both SGND3 and DXP3 routing

SGND1
SGND2
SGND3
1124 modify U42
2.System Sensor, Put between CPU and NB.
C349
Pin 10
--> Fan is OFF
G7922_DXP3
TRIP_SET Pin Voltage

V_DEGREE
=(((Degree-75)/21)
R180
3KR2F-GP
T8 90 degree
G7922_PW ROK 39
3.HW T8 sensor
R178
10KR2F-2-GP
THERM_SET
=(Test-75)*(1/32)*(15/33)VCCS
H_THERMDC
G7922_SGND2
G7922_SGND3
-->Channel 3
C373
SC470P50V2JN-GP
CLK_32K
DY
C51
Do Not Stuff
B
C
84.T3904.C11
2nd = 84.03904.L06
3RD = 84.03904.H11
Pin 9
MMBT3904-4-GP
Q6
19
ALERT#
22
23
SDA
SCL
FG1
SCD1U16V2ZY-2GP
3
5
7
VCCS
U42
SB 1127 modify C377
DY
B
C
84.T3904.C11
2nd = 84.03904.L06
E
MMBT3904-4-GP
Q14
C272
Do Not Stuff
C357
Do Not Stuff
SCD1U16V2ZY-2GP
G7922_SGND2
SB
3D3V_S0
DY
27
24
C361
SC4D7U10V5ZY-3GP
DVCC
DVCC
Layout notice : Both SGND2 and DXP2 routing

C373 must be near EMC2102
SCD1U16V2KX-3GP
C374 must be near Q7
1.For CPU Sensor
DY
5V_S0
49D9R2F-GP
H_THERMDA
H_THERMDA
33
33
R188
MLX-CON3-10-GP-U
20.F1000.003
2nd = 20.F0714.003
29
3D3V_S0
D11
SSM14PT-GP-U
83.1R004.080
3rd = 83.1R004.M8M
2nd = 83.1R004.K8M
C376
SC470P50V2JN-GP
FAN1
FAN1
H_THERMDC
H_THERMDC
*Layout* 15 mil
1
2
C346
SC22U6D3V5MX-2GP
0930 modify
1017 modify
3D3V_S0
EC60
Do Not Stuff
DY
RUN_POW ER_ON
SB 1125 modify RN40 and delete RN42

3D3V_S0
3D3V_AUX_S5
RN40
CLK_32K_R
PURE_HW _SHUTDOW N#
RSMRST#
THRM#
CLK_32K
1
R170
240KR3-GP
2N7002-11-GP
SRN10KJ-6-GP
84.27002.N31
32K suspend clock output
3D3V_AUX_S5
DY
13,41 VGATE_PW RGD
D10
Do Not Stuff
Do Not Stuff
2nd = 83.BAT54.X81
3rd = 83.00054.Z81
RSMRST#
UMA Two Phase 2
Wistron Corporation
RSMRST# 33,39

2N7002-11-GP
(dummy, KBC already delay)
84.27002.N31
C335 DY
Do Not Stuff
Title
PURE_HW _SHUTDOW N#
Q21
PM_SUS_CLK
4
3
2
1
13
5
6
7
8
Q22
Size
Thermal/Fan Controllor
Document Number
Rev
SB
HM40-MV
Date:
Sheet
32
of
51
3D3V_AUX_S5
AVCC
THERMAL----->
ECSCI#_KBC
GMCH_BL_ON
ECSWI#_KBC
36
81
NUM_LED
22 BLUETOOTH_EN
84
83
82
91
SHBM
31 WIRELESS_EN
36 WLAN_TEST_LED
31
31
E51_TxD
E51_RxD
E51_TxD
E51_RxD
111
113
112
38
S5_ENABLE 2
2K2R2J-2-GP
S5_ENABLE_KBC
114
14
15
VCORF
44
DC_BATFULL
1
R192
GPIO74/SDA2
GPIO73/SCL2
GPIO22/SDA1
GPIO17/SCL1
VREF
A/D
LPC
D/A
SMB
SP
GPIO66/G_PWM
GPIO77
GPIO76/SHBM
GPIO75
GPIO81
SPI
GPIO
GPO83/SOUT_CR/BADDR1
GPIO87/SIN_CR
GPO84/BADDR0
GPIO16
GPIO34
GPIO36
SER/IR
GPI90/AD0
GPI91/AD1
GPI92/AD2
GPI93/AD3
GPIO05
GPIO04
GPI94
GPI95
GPI96
GPI97
GPIO01/TB2
GPIO03
GPIO06
GPIO07
GPIO23
GPIO24
GPIO30
GPIO31
GPIO32/D_PWM
GPIO33/H_PWM
GPIO40/F_PWM
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45/E_PWM
GPIO46/TRST#
GPIO47
GPIO50/TDO
GPIO51
GPIO52/RDY#
GPIO53
GPIO70
GPIO71
GPIO72
GPO82/TRIS#
104
97
98
99
100
108
96
AD_IA
46
TP_LOCK_BN# 36
WIRELESS_BTN# 36
101
105
106
107
64
95
93
94
119
6
109
120
65
66
16
17
20
21
22
23
24
25
26
27
28
73
74
75
110
KBC_THERMALTRIP#
2 R201
1
R49
PLATFORM_ID
2
20MR3-GP
KBC_XI
Pin 120: MODEL_ID_0

PWRLED 38
STDBY_LED 38
CAP_LED 36
AD_OFF
45
RSMRST#_KBC 13
PM_SLP_S4# 13,43,44
CHARGE_LED 38
AD_OFF
RSMRST#_KBC
34
34
34
34
TPDATA
TPCLK
77
KBC_XO 79
30
63
117
31
32
118
62
PM_PWRBTN#
CHG_ON#
KBC_BEEP
EC_TMR
BRIGHTNESS
35
35
2 OF 2
U9B
X1
PM_SLP_S3# 13,39,43,44
KBC_PWRBTN# 36
AC_IN#
46
LID_CLOSE# 37
KBC_PWRBTN#
13
12
11
10
71
72
TPDATA
TPCLK
86
87
90
92
SPIDI
SPIDO
SPICS#
SPICLK
32KX1/32KCLKIN
KBSOUT0/JENK#
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KBSOUT4/JEN0#
KBSOUT5/TDO
KBSOUT6/RDY#
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17
32KX2
GPIO55/CLKOUT
GPIO14/TB1
GPIO20/TA2
GPIO56/TA1
GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM
GPIO12/PSDAT3
GPIO25/PSCLK3
GPIO27/PSDAT2
GPIO26/PSCLK2
GPIO35/PSDAT1
GPIO37/PSCLK1
F_SDI
F_SDO
F_CS0#
F_SCK
KBC
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
PS/2
FIU
VCC_POR#
Pin 24: MODEL_ID_1

BLON_OUT
Pin 28:UMA=NC; DIS=PL
SPI_WP# 34
TP_LOCK_LED 36
BLON_OUT 18
0916 move net(SPI_WP#) from U9 pin120 to pin25
53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33
KCOL0
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
54
55
56
57
58
59
60
61
KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
ECRST#
85
WPCE773LA0DG-GP
3
RN46
3D3V_AUX_S5
USB_PWR_EN#
23
3D3V_S0
KA20GATE
KBRCIN#
E51_TxD
SHBM
WPCE773LA0DG-GP
8
7
6
5
5
6
7
8
ECRST#
4
3
2
1
KBC_THERMALTRIP#
LID_CLOSE#
SRN10KJ-6-GP
1
2
3
4
32,39
Q23
B
RSMRST#
MMBT3906-3-GP
84.03906.R11
2ND = 84.03906.F11
3RD = 84.03906.P11
SRN10KJ-6-GP
SB
FOR KBC DEBUG
3D3V_AUX_S5

3D3V_S5
KCOL2
8
7
6
5
Do Not Stuff
EC63 1
KCOL3
2
Do Not Stuff
BAT_SCL
BAT_SDA
RN48
2 Do Not Stuff
8
7
6
5
DY
AD_OFF
1
2
3
4
DY:
SPIDI
RN49
SRN4K7J-12-GP
R203
DY
C378
1106 modify net connection of RN46 and RN44
3D3V_S0
R202
DY
1 Do Not Stuff
DY
13
46
26
13
18
CRT_DEC# 36
GND
GND
GND
GND
GND
GND
5
18
45
78
89
116
AGND
R46
39
VCORF
103
C67
3
SC1U10V3KX-3GP
X-32D768KHZ-46GP
27 AMP_SHUTDOWN#
KBC_THERMALTRIP#
PCB_VER0
PCB_VER1
RN45
C387
SCD1U16V2ZY-2GP
82.30001.861
2nd = 82.30001.691
1
2
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
2
1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
1
SCD1U16V2ZY-2GP
2
1
1
2
Do Not Stuff
2
1
1KBC_XO_R 2
19
46
76
88
115
AVCC
VCC
VCC
VCC
VCC
VCC
102
80
VDD
GPIO10/LPCPD#
LRESET#
LCLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
SERIRQ
GPIO11/CLKRUN#
KBRST#
GA20
ECSCI#/GPIO54
GPIO65/SMI#
GPIO67/PWUREQ#
U9A
39,42,48 S5_ENABLE
124
7
2
3
126
127
128
1
125
8
122
121
29
9
123
68
67
69
70
32 SMBD_Therm
32 SMBC_Therm
45,46 BAT_SDA
45,46 BAT_SCL
BATTERY----->
1016 modify X1
KBRCIN#
KA20GATE
DY
C362
2PCLK_KBC_RC
C359
12
12
C380
1
C371
C386
12,34 LPC_LFRAME#
12,34 LPC_LAD0
12,34 LPC_LAD1
12,34 LPC_LAD2
12,34 LPC_LAD3
13 INT_SERIRQ
13 PM_CLKRUN#
DY
Do Not Stuff
C354
33KR2J-3-GP
PLT_RST1#_1
PCLK_KBC
R187
Do Not Stuff
C353
C60
1 OF 2
DY
BAT_IN#
BAT_IN#
GPIO41
1
2
DY
3D3V_S0
SB
C359,C362 colse to Pin VDD

45
Do Not Stuff
C368
C374
SC15P50V2JN-2-GP
2 0R2J-2-GP
SC10U10V5ZY-1GP
2
1
DY
3D3V_S0
SC15P50V2JN-2-GP
R189 1
PLT_RST1#
Do Not Stuff
7,13,24,30,31,34
C363
SCD1U16V2ZY-2GP
SB
C366
3D3V_AUX_S5
2 R184
1
Do Not Stuff
R191
1
2
1KR2J-1-GP
1
2
3
4
RSMRST#_KBC
S5_ENABLE_KBC
BLON_OUT
8
7
6
5
PLATFORM_ID
WIRELESS_BTN#
MEDIA_LED#
TP_LOCK_BN#
SRN10KJ-6-GP
SMBC_Therm
SMBD_Therm
RN44
ISP Mode disable
PCLK_KBC
C369 DY
1
2
3D3V_S0
Do Not Stuff
1
2
3
4
MEDIA_LED#
12,36
D14
13
ECSCI#_1
SRN10KJ-6-GP
ECSCI#_KBC
3D3V_AUX_S5
RN47
13
ECSWI#
1
2
ECSWI#_KBC
0930 modify net name for BIOS demand
4
3
KBC_PWRBTN#
BAT_IN#
SRN100KJ-6-GP
CH731UPT-GP
28
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
KCOL0
0930 modify
KB1
Internal KeyBoard CONN

1
26
48
48
48
48
KCOL4
KCOL3
KCOL2
KCOL1
48
48
48
48
KROW0
KROW7
KROW6
KROW5
48
48
48
48
KROW4
KROW3
KROW2
KROW1
48
48
48
48
KCOL12
KCOL11
KCOL10
KCOL9
KCOL8
KCOL7
KCOL6
KCOL5
1
2
KCOL8
KCOL7
KCOL6
KCOL5
48
48
48
48
KCOL16
KCOL15
KCOL14
KCOL13
2
R173
SB
R176
DY
PlanarID
(0,1)
SA: 0,0
SB: 0,1
SC: 1,0
SD: 1,1
KCOL16
KCOL15
KCOL14
KCOL13
R175
Do Not Stuff
KCOL0
48
48
48
48
PCB_VER0
PCB_VER1
10KR2J-3-GP
48
KCOL0
2nd = 20.K0320.026
KCOL17
DY
KCOL17
20.K0326.026
48
R174
10KR2J-3-GP
KB1
PTWO-CON26-1-GP
2nd = 83.R2002.B8E
3rd = 83.R3004.A8E
Do Not Stuff
Internal KeyBoard Connector
3D3V_AUX_S5
1
83.R0304.A8H
1118 modify PCB Ver. from SA to SB
KCOL4
KCOL3
KCOL2
KCOL1
KROW0
KROW7
KROW6
KROW5
KROW4
KROW3
KROW2
KROW1
UMA Two Phase 2
Wistron Corporation
........
CHECK KB SPEC. AND PIN DEFINE
KCOL12
KCOL11
KCOL10
KCOL9
Title
KBC WPCE773L
Size
Document Number
Custom
Rev
SB
HM40-MV
Date:
A
Wednesday, November 26, 2008
Sheet
33
of
51
3D3V_AUX_S5
ERN2
5
6
7
8
SPICLK_ROM
SPIDO_ROM
SPIDI_ROM
RN41
3D3V_AUX_S5
16M Bits
SPI FLASH ROM
SPI_HOLD#
SPICS#
2
ER6
Do Not Stuff
CS#
DO
WP#
GND
1
VCC
HOLD#
CLK
DIO
8
7
6
5
3D3V_AUX_S5_SPI_ROM
SPI_HOLD#
SPICLK_ROM
SPIDO_ROM
GOLDEN FINGER FOR DEBUG BOARD
1
2
Do Not Stuff
72.25X16.A01
2nd = 72.25165.A01
DY
EC57
W 25X16AVSSIG-GP
Do Not Stuff
SPI_W P#
SPIDI_ROM
SPI_W P#
33
33
33
EC59
SC4D7P50V2CN-1GP
33
DY
EC55
1
2
3
4
SPICLK
SPIDO
SPIDI
SRN0J-7-GP
U40
33
8
7
6
5
4
3
2
1
SRN10KJ-6-GP
1
2
3
4
DY
EC58
Do Not Stuff
3D3V_S0
SB
72.25X16.A01
GF1
1
2
3
4
5
6
7
8
9
10
11
12
SPI_HOLD#EC56 1
2 Do Not Stuff
DY
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
PLT_RST1#
PCLK_FW H
LPC_LAD[0..3]
LPC_LAD[0..3]
PCLK_FW H 3
PCLK_FW H
Do Not Stuff
DY
12,33
LPC_LFRAME# 12,33
PLT_RST1# 7,13,24,30,31,33
1013 modify U40 from 72.25X16.001 to
EC26
Do Not Stuff
DY
Do Not Stuff
UMA Two Phase 2
Wistron Corporation
Title
Size
BIOS/GOLDEN FINGER
Document Number
Rev
SB
HM40-MV
Date:
A
Sheet
E
34
of
51
5V_S0
TOUCH PAD
EC27
DY
0930 modify
TPAD1
T/P
1013 modify
TPAD1
1015 modify
TPAD1
Do Not Stuff
Do Not Stuff
EC28
DY
1124 modify
TPAD1
TPAD1
7
1
TP_CLK
TP_DATA
37,48
37,48
2
3
4
5
6
TP_LEFT
TP_RIGHT
5V_S0
PTW O-CON6-12-GP
1
2
20.K0382.006
2nd = 20.K0320.006
RN7
4
3
SRN10KJ-5-GP
RN8
33
33
TPDATA
TPCLK
1
2
4
3
TP_DATA
TP_CLK
TP_DATA 48
TP_CLK 48
DY
Do Not Stuff
Do Not Stuff
DY
0910 delete RIGHT1 and LEFT1
EC30
EC29
SRN33J-5-GP-U
UMA Two Phase 2

A
Wistron Corporation
Title
Size
Document Number
Touch pad
Rev
SB
HM40-MV
Date:
5
Sheet
1
35
of
51
SB
1119 modify R130 and R133

5V_S0
Q18
R133
R130
W LAN_LED#
15R2J-GP
R1
2
10R2F-L-GP
C4
1
W LAN_LED#_R
DTA143ZUB-GP
EC4
1
Q19
2N7002-11-GP
84.00143.F1K
D
EC5
1
17
33 TP_LOCK_LED
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
R132
R1
TP_LOCK_LED#
TP_LOCK_LED#_R
2
100R2J-2-GP
R2
DTC143ZUB-GP
84.00143.G1K
2nd = 84.00143.D1K
3rd = 84.00143.E1K
33
NUM_LED
R1
NUM_LED#
R129
1
2
604R2F-2-GP
CAP_LED#_R
MEDIA_LED#_R
SB
20.K0384.016
2nd = 20.K0395.016
1112 remove the signal( STDBY_LED#_R)

C
1
R128
Q15
CAP_LED
PW RLED#_R
KBC_PW RBTN#_1
W LAN_LED#_R 48
W IRELESS_BTN#_1 48
TP_LOCK_LED#_R 48
TP_LOCK_BN#_1 48
PW RLED#_R 48
KBC_PW RBTN#_1 48
3D3V_S0
CAP_LED#_R 48
NUM_LED#_R 48
MEDIA_LED#_R 48
KYO-CON16-GP
NUM_LED#_R
84.00143.G1K
2nd = 84.00143.D1K
3rd = 84.00143.E1K
33
SB
1120 modify PowerCN1 pin3 and remove EC44
TP_LOCK_LED#_R
18
2
R2
DTC143ZUB-GP
Do Not Stuff
2
1016 modify Q15,Q16 and Q17
Q16
Do Not Stuff
2
DY
Q17
1013 modify these power
DY
PowerCN1
33 W LAN_TEST_LED
1016 modify Q18
Do Not Stuff
2
DY
R2
31 W LAN_LED#_MC
W LAN_LED#_1
CAP_LED#
R1
CAP_LED#_R
1
2
604R2F-2-GP
16
2
R2
DTC143ZUB-GP
84.00143.G1K
2nd = 84.00143.D1K
3rd = 84.00143.E1K
12,33 MEDIA_LED#
38 PW RLED#_FR
R3
1
2
604R2F-2-GP
MEDIA_LED#_R
R127
1
2
604R2F-2-GP
PW RLED#_R
SB
1112 remove these signals( STDBY_LED#_FR and STDBY_LED#_R) and R131
RN1
KBC_PW RBTN#_1
W IRELESS_BTN#_1
TP_LOCK_BN#_1
33
CRT_DEC#
1
2
3
4
8
7
6
5 CRT_IN#_R
SRN470J-3-GP
KBC_PW RBTN# 33
W IRELESS_BTN# 33
TP_LOCK_BN# 33
CRT_IN#_R 19
KBC_PW RBTN#_1
Do Not Stuff
EC47
DY
UMA Two Phase 2
Do Not Stuff
EC49
DY
Do Not Stuff
EC45
DY
Do Not Stuff
EC46
DY
Do Not Stuff
W LAN_LED#_R
TP_LOCK_LED#_R
NUM_LED#_R
CAP_LED#_R
G1
Wistron Corporation
Title
Size
Document Number
Power Board
Rev
SB
HM40-MV
Date:
5
Sheet
1
36
of
51
TP_LEFT
1017 modify RN60
TP_L1
RN60
TP_LEFT#_1
TP_LEFT
35,48
TP_RIGHT 35,48
Cover Up Switch
EC84
Do Not Stuff
3D3V_AUX_S5
SRN470J-4-GP-U
DY
SW -TACT-119-GP
62.40009.671
TP_RIGHT
VDD
LID_CLOSE#
OUT
LID_CLOSE# 33
GND
EC22
Do Not Stuff
DY
1
R40
Do Not Stuff
DY
U4
2nd = 62.40012.101
4
2
4
3
1
2
ME268-002-GP
TP_RIGHT#_1
74.00268.07B
EC21
SCD1U16V2ZY-2GP
EC83
Do Not Stuff
TP_R1
DY
SW -TACT-119-GP
1016 modify U4
62.40009.671
C
1017 modify U4
2nd = 62.40012.101
1017 add U61,R52,EC24 and EC23

1020 delete U61,R52,EC24 and EC23
UMA Two Phase 2
Wistron Corporation
Title
Size
SWITCHS
Document Number
Rev
SB
HM40-MV
Date:
5
Sheet
1
37
of
51
1015 modify the power from 3D3V_S5 to 5V_S5

SB
1106 modify LED11
PW RLED#_FR 36
Q27
33
PW RLED
R1
3
2
R2
DTC143ZUB-GP
84.00143.G1K
2nd = 84.00143.D1K
3rd = 84.00143.E1K
PW RLED#_FR
STDBY_LED#_FR
R291
1
2
604R2F-2-GP
1 R292
2
100R2J-2-GP
Blue
PW RLED#_FR_R
STDBY_LED#_FR_R
1
2
LED11
SB
Orange
LED-BO-4-GP
83.00195.G70
2nd = 83.19223.A70
Q28
33
STDBY_LED
R1
2
R2
DTC143ZUB-GP
84.00143.G1K
2nd = 84.00143.D1K
3rd = 84.00143.E1K
1112 remove the signal( STDBY_LED#_FR)

1017 modify R291 and R293
1014 modify these LEDs(LED11,LED12)

1015 modify the power from 3D3V_S5 to 5V_S5
Blue
33
DC_BATFULL
R1
1
2
604R2F-2-GP
SB 1106 modify LED12

DC_BATFULL#_FR
1106 modify LED power from 5V_S5 to 5V_AUX_S5
R2
DTC143ZUB-GP
84.00143.G1K
2nd = 84.00143.D1K
3rd = 84.00143.E1K
2
LED12
LED-BO-4-GP
Q30
33
5V_AUX_S5
R293
Q29
C
5V_S5
CHARGE_LED
R1
R294
1
2
100R2J-2-GP
CHARGE_LED_FR
Orange
83.00195.G70
2nd = 83.19223.A70
2
R2
DTC143ZUB-GP
84.00143.G1K
2nd = 84.00143.D1K
3rd = 84.00143.E1K
1016 modify Q27~Q30
UMA Two Phase 2
Wistron Corporation
Title
Size
LED
Document Number
Rev
SB
HM40-MV
Date:
5
Sheet
1
38
of
51
Aux Power
3D3V_AUX_S5
Run Power
I min = 300 mA
5V_AUX_S5
U43
3D3V_AUX_S5
DY
C269
1
330KR2J-L1-GP
DY
R117
100KR2J-1-GP
K
R120
D9
PDZ9D1B-GP
3D3V_S0
3D3V_S5
1
2
3
4
83.9R103.C3F
2nd = 83.9R103.F3F
U21
S
S
S
G
D
D
D
D
8
7
6
5
AO4468-GP
1016 modify D9
84.04468.037
Q12
Z_12V_D3
DY
C278
2
Z_12V_D4
3D3V_runpwr 2
DY
8
7
6
5
AO4468-GP
1
R115
Z_12V_G3
D
D
D
D
D
1
R118
1
U20
S
S
S
G
84.04468.037
Z_12V
10KR2J-3-GP
R109
Do Not Stuff
C372
Q11
Do Not Stuff
Z_12V_D3
2N7002DW -1-GP
84.27002.D3F
PM_SLP_S3# 13,33,43,44
3D3V_S5
Do Not Stuff
C257
1
U17
VCC
DY
PW ROK 7,13
GND
74LVC1G08GW -1-GP
1D05V_S0
73.01G08.L04
2nd = 73.7SZ08.AAH
3rd = 73.01G08.L03
1D05V_S0
R112
Do Not Stuff
DY
R113
56R2J-4-GP
C266
1
DY
B
R114
1KR2J-1-GP
DY
E
E
H_PW RGD#
C268
SC2D2U16V3KX-GP
4,12,48 H_PW RGD
32 G7922_PW ROK
13,33,43,44 PM_SLP_S3#
G7922_PW ROK
2
Do Not Stuff
KBC_THERMALTRIP# 33
Q9
Q10
MMBT2222A-3-GP
Do Not Stuff
84.02222.V11
2nd = 84.02222.R11
Do Not Stuff
Do Not Stuff
3D3V_S0
SB
DY
1
2
3
4
RUN_POW ER_ON
330KR2J-L1-GP
R190
Do Not Stuff
2
1
R119
1
SCD22U25V3KX-GP
5V_AUX_S5
Q13
NDS0610-NL-GP
DCBATOUT
C379
10KR2J-3-GP
3D3V_AUX_S5_EN
Do Not Stuff
2nd = 74.09198.Q7F
DY
Do Not Stuff
C375
NC#4
5V_S5
5V_S0
VOUT
VIN
GND
EN
Do Not Stuff
Do Not Stuff
DY
1
2
3
D8
33,42,48 S5_ENABLE
1
3
83.00016.B11
2 BAS16-1-GP
2nd = 83.00016.F11
RSMRST# 32,33
UMA Two Phase 2
Wistron Corporation
Title
Size
RUN POWER and 3D3V_AUX_S5

Document Number
Rev
SB
HM40-MV
Date:
Sheet
39
of
51
CPU_CORE
ISL6266A
VID0
D
VID1
VID2
VID3
VID4
VID5
VID6
VID Setting
Input Power
Output Signal
VID0(I / 3.3V)
PGOOD
VGATE_PWRGD
DCBATOUT_51125
RT9018A
1D5V_S0
Output Power
VIN
5V(O)
1D8V_S3
5V_S5 (6A)
VIN
1D5V_S0 (2.5A)
1D5V(O)
VID1(I / 3.3V)
S5_ENABLE
VID2(I / 3.3V)
VID3(I / 3.3V)
Output Power
VID4(I / 3.3V)
VCC_CORE_PWR(O)
VCC_CORE(Imax=38A) ALW_PWRGD_3V_5V
Input Signal
3D3V(O)
EN0
5V(O)
Output Signal
PGOOD
3D3V(O)
VID5(I / 3.3V)
3D3V_S5 (6A)
PM_SLP_S3#
EN
CPUCORE_ON
PGOOD
5V_AUX_S5
RT9026
3D3V_AUX_S5
5V_S5
0D9V_S0
VIN
1D8V_S3
VLDOIN
VID6(I / 3.3V)
PM_SLP_S4#
Input Signal
CPUCORE_ON
TPS51125
5V/3D3V
EN (I / 3.3V)
0D9V_S3 (1A)
VTT
S3
0D9V_S3_1
VTTREF
S5
Voltage Sense
VCC_SENSE
VSS_SENSE
VSEN(I / Vcore)
RGND(I / Vcore)
Input Power
DCBATOUT_6266A
5V_S0
3D3V_S0
VCC(I)
Charger BQ24745
VCC(I)
Input Signal
VCC(I)
CHG_ON#
24750_CELLS
TPS51124
1D8V/1D05V
5V_S5
DCBATOUT_51124
PM_SLP_S4#
PM_SLP_S3#
A
Input Power
VCC
Input Signal
1D8V (O)
1D05V(O)
1D8V_S3 (10A)
AD+
EN1
Input Signal
AD_OFF
EN2
Output Power
ACN
BT+
VOUT (O)
VOUT (O)
Output Signal
(I)
AD_IA
SRSET
CELLS
Adapter
1D05V_S0 (15A)
AC_IN#
ACGOOD#
CHGEN#
Input Power
Output Power
VDD
Output Signal
(O)
AD_IN#
DCBATOUT
UMA Two Phase 2
Wistron Corporation
CPUCORE_ON
Output Signal
Input Power
PGOOD1
AD_JK
PGOOD2
5V_AUX_S5

Output Power
VCC(I)
VCC(O)
Title
AD+
Power Sequence Logic

Size
B
VCC(I)
Document Number
Date: Monday, November 24, 2008

5
Rev
HM40-MV
Sheet
1
SB
40
of
51
1
2
4
1
2
1
2
5
6
7
8
4
3
2
1
1
2
VCC_CORE
one phase
TC3
68.R3610.20ACAP
2nd = 68.R3610.20C
G60
Do Not Stuff
5
6
7
8
L-D36UH-1-GP
4
3
2
1
U36
BSC057N03MSG-GP
SA
2
10R2F-L-GP
C31
SC1U25V3KX-1-GP
4
3
2
1
U6
one phase
5
6
7
8
5V_S0
2
TC1
CAP
2
BSC057N03MSG-GP
DY
DY
C316
Do Not Stuff
L9
6266A_PHASE2
5V_S0
R25
1
C11
Cyntec 10*10*4
DCR=1.05+-5%mohm, Irating=30A
Isat=60A
6266A_UGATE2
R20
1
2
Do Not Stuff
2 phase
DY
C312
G59
Do Not Stuff
Do Not Stuff
Do Not Stuff
2nd = 77.C3371.0512nd = 77.C3371.051
6266A_LGATE2
R31
1
2
Do Not Stuff
C36
SCD01U25V2KX-3GP
6266A_VSUM
6266A_ISEN2
6266A_ISEN1
Single Phase
R47=1.2K, R63=5.6K,R460=0R
C33=47p, C49=0.033u, C52=0.1u
R27
1
R26
1
R29
1
R28
1
one phase
2 3K65R2F-1-GP
6266A_ISEN2_P2_VCORE
2 10KR2F-2-GP
one phase
one phase
1R2F-GP
2 10KR2F-2-GP
A
UMA Two Phase 2
one phase
Wistron Corporation
Title
DY=U7,U28,U29,L9,R62,R56,R42,
R45,R37,R39,R48,C20
Size
A3
1013 modify R162

5
BSC057N03MSG-GP
4
3
2
1
26266A_VO
SCD22U10V2KX-1GP
1
2
1
2
C310
one phase
-1
5
6
7
8
ISEN1
ISEN2
-1
2008/05/06
24
6266A_ISEN223
VDD
GND
22
6266A_VDD
21
one phase
4
3
2
1
VID1
VID2
VID3
VID4
VID5
VSUM
VIN
6266A_VIN 20
C33
DCBATOUT_6266A
one phase
C34
6266A_ISEN1
R156
6266A_BOOT2 1
26266A_BOOT2_R
2D2R2J-GP
1
1
R162
NTC-10K-26-GP
6266A_VSUM_R_VO
2 10KR2F-2-GP
U34
BSC120N03MS-G-GP
one phase
2 1R2F-GP
1 R34
6266A_UGATE2
1 R35
28
R30
2K61R2F-1-GP
R32
11KR2F-L-GP
4
3
2
1
5
6
7
8
PHASE2
6266A_ISEN2
C329
SCD22U25V3KX-GP
6266A_VO
6266A_PHASE2
6266A_VO
1
2
C43
1
6266A_D0
37
6266A_D1
38
6266A_D2
39
6266A_D3
40
6266A_D4
41
6266A_D5
42
VO
1
18
6266A_VO
6266A_VSUM 19
6266A_DFB 17
DFB
DROOP
RTN
6266A_RTN 15
16266A_DROOP
16
1
1
2
1
2
2 10KR2F-2-GP
one phase
Do Not Stuff
1 R36
Do Not Stuff
6266A_ISEN1
SC2D2U16V3KX-GP
20081121
SCD033U25V3KX-GP
6266A_VO
S
S
S
G
C41
C45
SCD22U50V3ZY-1GP
5
6
7
8
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
6266A_D6
6266A_VR_ON 2
44
43
VID6
VR_ON
VID0
29
G58
Do Not Stuff
TC2
CAP
D
D
D
D
6266A_VSUM
PGND2
S
S
S
G
SB
6266A_LGATE2
D
D
D
D
VSS_SENSE
C28
SC330P50V2KX-3GP
0R2J-2-GP
1
2
2 3K65R2F-1-GP
C29
SCD33U10V3KX-3GP
VCC_SENSE
0R2J-2-GP
1
2
R22
5
5V_S0
one phase
10R3F-GP
SCD01U25V2KX-3GP
20080930
1 R33
SCD22U10V2KX-1GP
R24
C37
SC180P50V2JN-1GP
POWER SB
SB 20081121
C35
SC330P50V2KX-3GP
1
R144 0R2J-2-GP
1
R143 0R2J-2-GP
1
R139 0R2J-2-GP
1
R138 0R2J-2-GP
1
R146 0R2J-2-GP
1
R142 0R2J-2-GP
1
R137 0R2J-2-GP
1
R136 0R2J-2-GP
0R2J-2-GP
6266A_DPRSLPVR 2 R145
DPRSTP#
DPRSLPVR
48
VSEN
VDIFF
R18
DY
R21
31
30
25
2
2
R16
Do Not Stuff
PVCC
DCBATOUT_6266A
TC20
Do Not Stuff
Do Not Stuff 2nd = 77.C3371.051
2nd = 77.C3371.051
6266A_VSUM
C327
LGATE2
NC#25
R23
G57
Do Not Stuff
6266A_ LGATE1
C321
SCD22U25V3KX-GP
TC4
CAP
FB2
1KR2F-3-GP
6266A_SOFT
2
1KR2F-3-GP
6266A_ LGATE1
26
2K87R2F-1-GP
R15
1
32
BOOT2
R14
1KR2F-3-GP
one phase
C32
2 6266A_FB2_R 1
2
100R2F-L1-GP-U
SC2200P50V2KX-2GP
33
68.R3610.20A
2nd = 68.R3610.20C
Do Not Stuff
2
SC270P50V2KX-1GP
PGND1
LGATE1
L-D36UH-1-GP
SC10U25V6KX-1GP
C24
1
6266A_PHASE1
UGATE2
6266A_FB2 12
PHASE1
34
FB
COMP
6266A_VSEN14
11
36
35
27
6266A_VDIFF
B
47
49
GND
6266A_FB
VW
U37
Do Not Stuff
2 6266A_COMP_R
97K6R2F-GP
2
10K5R2F-GP
OCSET
6266A_VDIFF13
1
R13
2
SC100P50V2JN-3GP
BOOT1
UGATE1
R151
6266A_BOOT1 1
2
6266A_BOOT1_R
2D2R2J-GP
1
6266A_UGATE1
S
S
S
G
R19
1
6266A_COMP
10
POWER SB
D
D
D
D
R17
1
6266A_DPRSTP# 2 R140
1
2
1
2
POWER SA
SOFT
U7
BSC057N03MSG-GP
Id=19.5A
Qg=21.5~33nC,
Rdson=5.5~6.7mohm
74.06266.073
NTC
VCC_CORE
Do Not Stuff
6266A_NTC
1 R161
26266A_NTC_R1 R155
2
6
NTC-470K-8-GP
4K02R2F-GP
C328
C325
6266A_SOFT
1
2
7
SCD015U50V3KX-GP
1
2
SCD01U25V2KX-3GP
6266A_VO 1
26266A_OCSET
8
R157 12KR3F-GP
1013 modify R161
C22 1
6266A_VW 9
2 SC1000P50V3JN-GP
ISL6266AHRZ-GP
SE330U2VDM-L-GP
4 CPU_PROCHOT#_R
L8
6266A_PHASE1
PSI#
6266A_PMON_R 1
2 6266A_PMON
3 PMON
R150 4K99R2F-L-GP
SCD1U25V3KX-GP
1
26266A_RBIAS4 RBIAS
R152 147KR2F-GP
5 VR_TT#
C25
1
PGOOD
DY
C317
Do Not Stuff
Vcc_core
Iomax=38A
Do Not Stuff
C320
1
6266A_UGATE1
S
S
S
G
1
0R2J-2-GP
R1491
26266A_PSI# 2
PSI#
DY
C313
D
D
D
D
C311
Cyntec 10*10*4
DCR=1.05+-5%mohm, Irating=30A
Isat=60A
S
S
S
G
20080930
C12
DY
20080930
U5
R148
1K91R2F-1-GP
13,32 VGATE_PW RGD
U38
BSC120N03MS-G-GP
D
D
D
D
6266A_3V3
3D3V_S0
20081117
46
SCD1U10V2KX-4GP
45
R147
R147
2
DY
499R2F-2-GP
1
2
C314
79.10712.L02 Do Not Stuff

2nd = 79.10112.3JL
1D05V_S0
R154
68R2-GP
Do
1 Not Stuff
Do Not Stuff
G47
1
2
3V3
2
1
2
SE100U25VM-L1-GP
Do Not Stuff
TC18
SC10U25V6KX-1GP
Do Not Stuff
G49
1
2
Do Not Stuff
G51
1
2
H_VID[6..0]
Do Not Stuff
R141
10R3F-GP
S
S
S
G
Do Not Stuff
G54
1
2
2008/05/06
43,44
D
D
D
D
DY
Do Not Stuff
G50
1
2
TC17
Do Not Stuff
CPUCORE_ON
Do Not Stuff
Do Not Stuff
G52
1
2
3D3V_S0
G48
PM_DPRSLPVR 7,13
CLK_EN#
G53
4,7,12 H_DPRSTP#
DCBATOUT_6266A
DCBATOUT_6266A
DCBATOUT
DCBATOUT_6266A
DCBATOUT
Date:
3
ISL6266A_CPU_CORE
Document Number
Rev
SB
HM40-MV
Sheet
1
41
of
51
POWER SA
Do Not Stuff
G43
1
2
Do Not Stuff
G12
1
2
Do Not Stuff
G44
1
2
Do Not Stuff
G38
1
2
Do Not Stuff
Do Not Stuff
3
4
51125_ENTIP1
51125_ENTIP2
C521
2N7002DW -1-GP
R268
110KR3F-GP
C519
R275
120KR3F-GP
SB
1121 modify R275
Do Not Stuff
G36
1
2
51125_ENTIP1
2N7002DW -1-GP
DY
Do Not Stuff
G83
1
2
S5_ENABLE 33,39,48
Do Not Stuff
G34
1
2
Do Not Stuff
G10
1
2
DY
Do Not Stuff
G75
1
2
Do Not Stuff
G41
1
2
51125_ENTIP2
33,39,48 S5_ENABLE
Do Not Stuff
G35
1
2
Q26
RN59
SRN100KJ-6-GP
Do Not Stuff
G74
1
2
Q25
2
1
Do Not Stuff
G11
1
2
5V_S5
G37
Do Not Stuff
G46
1
2
5V_PW R
5V_AUX_S5
Do Not Stuff
G40
1
2
Do Not Stuff
G45
1
2
Do Not Stuff
3D3V_S5
G30
Do Not Stuff
79.68612.30L
2nd = 79.68612.L01
3D3V_PW R
TC30
SE68U25VM-3-GP
DCBATOUT_51125
G73
1
2
DCBATOUT
Do Not Stuff
G31
1
2
Do Not Stuff
G32
1
2
TC13
Do Not Stuff
Do Not Stuff
1020 delete C537 for Power demand
20081117
DY
DCBATOUT_51125
DCBATOUT_51125
DCBATOUT_51125
51125_DRVL1
VFB2
VFB1
51125_FB1
TONSEL
GND
25
14
SKIPSEL
VCLK
18
1
DY
Do Not Stuff
51125_VREF
1
DY
Do Not Stuff
C524
SC10U10V5KX-2GP
R283
1
2
1
2
Id=7.7A
Qg=8.5~13nC
Rdson=16.5~21mohm
R273 DY
Do Not Stuff
1 2
C518
3D3V_S5
Do Not Stuff
5V_AUX_S5
DY
1013 modify TC11 and add TC12
51125_FB1_R
DY
SB 1118 delete TC12
R266
20KR2F-L-GP
DY
Close to VFB Pin (pin2)
C534
SC10U10V5KX-2GP
A
UMA Two Phase 2
R281
Close to VFB Pin (pin5)

3D3V_AUX_S5
R270
30KR2F-GP
R276
Do Not Stuff
Do Not Stuff
C283
79.22710.6AL
2nd = 77.92271.021
15V_AUX_S5_51125
R261
3D3V_AUX_S5
Do Not Stuff
G80
Do Not Stuff
3D3V_AUX_S5_5_51125
G79
51125_VCLK
VREG5
74.51125.073
2
1
51125_ENTIP1
GND
TPS51125RGER-GP
R264
Do Not Stuff
2
1
51125_PGOOD
VREF
51125_SKIPSEL
3D3V_AUX_S5
23
1
51125_TONSEL
PGOOD
ENTRIP1
15
51125_FB2_R
C516
DYDo Not Stuff
C517
ENTRIP2
VREG3
1 2
Id=7.7A
Qg=8.5~13nC
R262
Do
Not
Stuff
Rdson=16.5~21mohm
DY
EN0
TC11
G39
2 51125_EN 13
820KR2F-GP
51125_ENTIP2 6
84.04812.A37
2nd = 84.08878.037
51125_VREF
51125_VREF
5
6
7
8
D
D
D
D
51125_FB2
17
1
2
3
4
1
2
1
2
24
SE220U6D3VM-7GP
VO1
Do Not Stuff
1
R280
SCD22U6D3V2KX-1GP
R269
10KR2F-2-GP
VO2
68.3R310.20A
2nd = 68.3R31A.10E
Do Not Stuff
77.C2271.00L
2nd = 77.22271.27L
R265
6K65R2F-GP
SI4812BDY-T1-E3-GP
84.04812.A37
2nd = 84.08878.037
D
D
D
D
IND-3D3UH-57GP
U29
51125_VO1
G
S
S
S
SI4812BDY-T1-E3-GP
G42
19
51125_VO2
8
7
6
5
LL1
DRVL1
5V_PW R
DRVL2
Iomax=5A
L6
12
51125_LL1
LL2
51125_DRVL2
U23
51125_DRVH1
20
D
D
D
D
TC8
D
Do Not Stuff
ST220U6D3VDM-15GP
Do Not Stuff
DY
C287
21
Cyntec 7*7*3
DCR=30mohm, Irating=6A
Isat=13.5A
SI4800BDY-T1
11
51125_LL2
1
2
IND-3D3UH-57GP
VBST1
DRVH1
DRVH2
10
51125_VBST1
VBST2
51125_DRVH2
22
DY
SCD1U25V3KX-GP
L15
DY
51125_VBST2
G
S
S
S
C529
SCD1U25V3KX-GP
3D3V_PW R
1
2
3
4
68.3R310.20AS
2nd = 68.3R31A.10E
C528
2
1
4
3
2
1
VIN
84.04800.D37
2nd = 84.08884.037
G
S
S
S
Iomax=5A
U28
5
6
7
8
U47
84.04800.D37
2nd = 84.08884.037
Id=7A
Qg=8.7~13nC
Rdson=23~30mohm
C294
G
S
S
S
2
16
8
7
6
5
D
D
D
D
U22
SI4800BDY-T1
C299
4
3
2
1
1
2
1
2
1
2
C301
Do Not Stuff
Id=7A
Qg=8.7~13nC
Rdson=23~30mohm
DY
Do Not Stuff
C295
Do Not Stuff
DY
SC10U25V6KX-1GP
Do Not Stuff
Cyntec 7*7*3
DCR=30mohm, Irating=6A
Isat=13.5A
C508
SC10U25V6KX-1GP
C298
SCD01U50V2KX-1GP
C533
Wistron Corporation
1
0R2J-2-GP

R282
DY
Title
1
Do Not Stuff
Size
A3
Date:
5
DCDC 5V/3D3V (TPS51125)
Document Number
Rev
SB
HM40-MV
Sheet
1
42
of
51
1D5V_S0
Iomax=2.5A
1D8V_S3
DY
2
R76
2
PM_SLP_S3#
13,33,39,44 PM_SLP_S3#
SC10U10V5KX-2GP
Do Not Stuff
C150
C151
G6
15912_EN_U111
Do Not Stuff
Do Not Stuff
G8
2
Do Not Stuff
G7
2
Do Not Stuff
G5
2
Vo(cal.)=1.5024V
20081001
1D5V_LDO
3D3V_S0
1D5V_LDO
C158
5912_FB_U111
G966-25ADJF1UF-GP-U
SC1U16V3KX-2GP
R75
20K5R2F-GP
5
7
DY
Do Not Stuff
C148
NC#5
ADJ
VEN
POK
5912_POK_U111
1
Do Not Stuff
C141
R77
2
41,44 CPUCORE_ON
C137
2
1
R74
18KR2J-GP
9
8
GND
GND
1D5V_S0
Do Not Stuff
VO
VIN
VPP
SC10U10V5KX-2GP
6
3
4
SC100P50V2JN-3GP
5V_S5
R78
2K2R2J-2-GP
U13
74.0G966.03D
2nd = 74.09018.A3D
Vo=0.8*(1+(R1/R2))
20081001
1016 modify U45
G78
10
9
8
7
6
9026_S5
9026_S3
VIN
S5#
GND
S3#
VTTREF
VDDQSNS
VLDOIN
VTT
PGND
VTTSNS
Do Not Stuff
G76
1
2
1
2
3
4
5
Do Not Stuff
1
2
74.02997.A79
2nd = 74.09026.079
C509
SC10U10V5KX-2GP
G2997BP71U-GP
C513
SC1U10V2KX-1GP
DDR_VREF_S3_1
R267
2
1
R263
Do Not Stuff
2
1
Do Not Stuff
Do Not Stuff
G77
1
2
U45
13,33,44 PM_SLP_S4#
DDR_VREF_S3
DDR_VREF_PW R
C523
SCD1U10V2KX-4GP
C522
SC10U10V5KX-2GP
C520
SC1U10V3KX-3GP
Iomax=1A
OCP>2A
1D8V_S3
5V_S5
C512
SC10U10V5KX-2GP
UMA Two Phase 2

A
Wistron Corporation
Title
Size
A3
Date:
5
Document Number
1D5V & 0D9V
Rev
SB
HM40-MV
Sheet
1
43
of
51
1D8V_S3
1D8V_PW R
VO1
VO2
2
2
1
SCD1U16V2KX-3GP
51124_V5FILT
SB
GND
OPEN
DY
2
1
1
2
DY
C284
51124_VFB2
C536
R289
30KR2F-GP
360k/CH1
420k/CH2
300k/CH1
360k/CH2
SB
1128 add TC25

DY
Vout=0.758V*(R1+R2)/R2 --> PWM mode

Vout=0.764V*(R1+R2)/R2 --> Skip Mode
Do Not Stuff
2nd = 79.3971V.E0L
Do Not Stuff
G66
1
2
Do Not Stuff
UMA Two Phase 2

A
Wistron Corporation
Title
Size
A3
Date:
Do Not Stuff
G14
1
2
Do Not Stuff
G15
1
2
TC25
1017 add TC25
Do Not Stuff
G13
1
2
20081117
Do Not Stuff
240k/CH1
300k/CH2
Do Not Stuff
G16
1
2
V5FILT
1D05V_S0
TONSEL
TC9
1D05V Iomax=14A
OCP>24A
1127 modify U27
Do Not Stuff
G17
1
2
77.23371.13L
2nd = 77.C3371.10L
Id=7.7A
Qg=8.5~13nC
Rdson=16.5~21mohm
84.01712.037
4
3
2
1
U27
AOL1712-GP
Do Not Stuff
G64
1
2
1121 modify L16,R286 1D05V_PW R
5
6
7
8
2
1
Do Not Stuff
51124_VBST2
R287
Do Not Stuff
Do Not Stuff
G63
1
2
ST330U2D5VDM-9GP
C526
1
DY
1D05V_S0
Do Not Stuff
G62
1
2
SB
R286
11K8R2F-GP
S
S
S
G
Do Not Stuff
L16
1
2
IND-D88UH-GP
DY R288
Cyntec 10*10*4
DCR=4.2mohm, Irating=16A
Isat=33A
Do Not Stuff
51124_VBST1
SCD1U16V2KX-3GP
51124_LL2
Do Not Stuff
G23
1
2
C296
DY
DY
84.01426.037
2nd = 84.07686.037
Id=7A
Qg=8.7~13nC
Rdson=23~30mohm
Do Not Stuff
TPS51124RGER-GPU1
C510
Do Not Stuff
2
2
1
C514
SC10U25V6KX-1GP
D
D
D
D
51124_LL1
1
G
S
S
S
4
3
2
1
1
2
24
7
U26
AOL1426-GP
20081121
C527
1
Do Not Stuff
G24
1
2
G65
17
14
1
51124_DRVH2
51124_LL2
51124_DRVL2
10
11
12
74.51124.073
R272
10KR2F-2-GP
1121 modify R271,R272
77.23371.L01
2nd = 77.C3371.10L
1D05V_PW R
DRVH2
LL2
DRVL2
S
S
S
G
SB
Do Not Stuff
G27
1
2
20081117
51124_TONSEL
R271
19K6R3F-GP
Do Not Stuff
G29
1
2
DCBATOUT_51124
51124_TRIP1
51124_TRIP2
DY
Do Not Stuff
G26
1
2
TC10
1013 modify TC10 and add TC26
D
D
D
D
BC1
Do Not Stuff
51124_DRVH1
51124_LL1
51124_DRVL1
21
20
19
Do Not Stuff
G18
1
2
1D8V Iomax=10A
OCP>15A
Id=7.7A
Qg=8.5~13nC
Rdson=16.5~21mohm
5
6
7
8
84.04812.A37
2nd = 84.08878.037
C532
SC1000P50V3JN-GP
C282
R290
21K5R3F-GP
4
3
2
1
GND
GND
PGND2
PGND1
PGOOD1
PGOOD2
EN1
EN2
3
25
13
18
DRVH1
LL1
DRVL1
TONSEL
23
8
VBST1
VBST2
51124_EN1
51124_EN2
0R2J-2-GP
DY1
2
5
VFB1
VFB2
V5FILT
V5IN
R277
U25
SI4812BDY-T1-E3-GP
R284
Do Not Stuff
Do Not Stuff
G20
1
2
Do Not Stuff
15
16
TRIP1
TRIP2
20080930
51124_V5FILT
22
9
BC2
Do Not Stuff
51124_VFB1
DY1
1
6
SC1U10V3KX-3GPU46
13,33,39,43 PM_SLP_S3#
1D05V_PW R
1D8V_PW R
51124_VFB2
51124_VFB1
C300
R278
0R2J-2-GP
1
2
DY
D
D
D
D
51124RGER_PG1
51124RGER_PG2
1
R274
3D3R3J-L-GP
1
C
C525
SC4D7U10V5KX-1GP
Do Not Stuff
G19
1
2
SE330U2D5VDM-LGP
R285
30KR2F-GP
C535
1
2
IND-1D5UH-34-GP
C531
Do Not Stuff
Do Not Stuff
41,43
DY
Do Not Stuff
5V_S5
C297
DY
1D8V_PW R
68.1R510.10J
2nd = 68.1R51A.10A
L17
CPUCORE_ON
Do Not Stuff
Id=7A
Qg=8.7~13nC
Rdson=23~30mohm
C515
Do Not Stuff
Do Not Stuff
G22
1
2
Cyntec 10*10*4
DCR=4.2mohm, Irating=16A
Isat=33A
2008/06/16
R279
Do Not Stuff
2
1
C511
SC10U25V6KX-1GP
2
1
5
6
7
8
84.04800.D37
2nd = 84.08884.037
20081117
Do Not Stuff
G72
1
2
Do Not Stuff
G21
1
2
DY
G
S
S
S
Do Not Stuff
G70
1
2
U24
SI4800BDY-T1
D
D
D
D
79.68612.30L
2nd = 79.68612.L01
Do Not Stuff
G25
1
2
Do Not Stuff
Do Not Stuff
G67
1
2
13,33,43 PM_SLP_S4#
DCBATOUT_51124
TC29
SE68U25VM-3-GP
4
3
2
1
TC28
Do Not Stuff
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Do Not Stuff
G68
1
2
1
2
DY
79.3971V.6AL
2nd = 79.3971V.E0L
TC26
SE390U2D5VM-2GP
Do Not Stuff
G69
1
2
D
SB 1128 add TC26
Vtrip(mV)=Rtrip(Kohm)*10(uA)
Iocp=(Vtrip/Rdson)+((1/(2*L*f))*((Vin-Vout)*Vout)/Vin))
G71
1D8V_S3
G28
DCBATOUT_51124
5
6
7
8
DCBATOUT
TPS51124_1D8V_1D05V
Document Number
Rev
SB
HM40-MV
Sheet
1
44
of
51
Adaptor in to generate DCBATOUT
DC1
SB 1121 add the part(EC88) for EMI demand
GND
6
5
4
1
2
3
NP1
SB 1125 add the part(EC91) for EMI demand
84.04407.F37
2nd = 84.04433.A37
1013 modify U2
R6
100KR2J-1-GP
2
2
R2
DTC124EUB-GP
84.00124.T1K
2nd = 84.00124.N1K
3rd = 84.00124.K1K
R1
AD_OFF
C10
SC1U50V5ZY-1-GP
DTA124EUB-GP
Q4
8
7
6
5
D
D
D
D
Q3
AD_OFF#_JK
33
R7
200KR2F-L-GP
U2
S
S
S
G
AO4407A-GP
1
2
3
4
AD+_2
DY
1
2
2
1
1022 modify DC1
DY
C5
D1
SCD1U50V3ZY-GP P6SMBJ20A-GP
83.P6SMB.AAG
2nd = 83.P6SBM.AAG
R1
22.10037.F11
EC91
Do Not Stuff
DC-JACK131-GP
EC88
Do Not Stuff
SCD1U50V3KX-GP
EC11
R2
AD+
AD_JK
1016 modify Q3
1016 modify Q4
3
84.00124.S1K
2nd = 84.00124.M1K
3rd = 84.00124.H1K
BATA_SDA_1 48
BATA_SCL_1 48
BAT_IN#_1 48
BATTERY CONNECTOR
SB 1127 modify BAT1
BAT1
9
8
7
6
5
4
3
2
1
RN4
1
2
3
4
33,46 BAT_SDA
33,46 BAT_SCL
33 BAT_IN#
EC50
EC51
DY DY
DY
1
2
1
2
DY
EL2
Do Not Stuff
EL1
Do Not Stuff
EL3
Do Not Stuff
EC52
Do Not Stuff
EC53
SB
DY
Do Not Stuff
SB
MLVS0402M04-GP
DY
Do Not Stuff
EC14
SCD1U50V3ZY-GP
DY
BATA_SDA_1
BATA_SCL_1
BAT_IN#_1
SRN33J-7-GP
BT+
EC13
SCD1U50V3ZY-GP
D2
Do Not Stuff
8
7
6
5
GND
GND
GND
GND
DAT
CLK
BAT_IN
BT+2
BT+1
SYN-CON7-40-GP
20.81171.007
UMA Two Phase 2
Wistron Corporation
46 BATT_SENSE
1119 modify EC52 and EL3
R8
1
2
Do Not Stuff
Title
AD/BATT CONN
Size
Document Number
Rev
SB
HM40-MV
A
Sheet
45
of
E
51
1013 modify U3
DCBATOUT
R11
100KR2J-1-GP
1
2
G
S
S
S
VICM
SI4800BDY-T1
1
2
SCD1U50V3KX-GP
NC#16
16
VFB
15
BQ24745RHDR-GP
BATT_SENSE
BATT_SENSE 45
C318
C18
C19
C322
C323
MAX8731A_CSIP
MAX8731A_CSIN
C338
SC1U10V3KX-3GP
FBO
EAI
EAO
VREF
CE
GND
GND
6
BQ24745_EAI
5
BQ24745_EAO
4
BQ24745_VREF
3
BQ24745_CHG_ON 7
12
29
74.24745.073
C364
SCD1U25V2ZY-1GP
1
2
C341
SC56P50V2JN-2GP
C337
R167
SC2200P50V2KX-2GP
7K5R2F-1-GP
2
1BQ24745_EAO_RC2
1
C348
SC220P50V2KX-3GP
BQ24745_FBO_RC
R171
1
2
200KR2F-L-GP
84.04800.D37
2nd = 84.08884.037
C365
R166
1
2BQ24745_FBO
4K7R2J-2-GP
18
17
G55
Do Not Stuff
SC150P50V2JN-3GP
CSOP
CSON
G56
Do Not Stuff
CHG_AGND
BQ24745_IINP
68.5R610.10I
2nd = 68.5R610.201
U39
4
3
2
1
CHG_AGND
NC#14
D01R2512F-4-GP
SCD1U50V3KX-GP
14
24745_LOW _G
BT+_R
2
IND-5D6UH-32-GP
SC10U25V6KX-1GP
19
SC10U25V6KX-1GP
PGND
BQ24745_LX1
R160
1
SC10U25V6KX-1GP
20
BT+
L7
1
2
C351
SCD1U50V3KX-GP
SC10U25V6KX-1GP
LGATE
SI4800BDY-T1
D
D
D
D
CHG_AGND
23
DY
SCL
PHASE
DY
83.R0203.08F
2nd = 83.R2003.A8M
24745_HIGH_G
ACOK
SDA
CH520S-30PT-GP SC1U10V3KX-3GP
BQ24745_BST
BQ24745_VDDP
24
C367
1
UGATE
D12
25
21
5
6
7
8
BOOT
VDDP
BQ24745_CSSN
TP47
D
D
D
D
27
26
DY
G
S
S
S
VDDSMB
U32
C319
Do Not Stuff
CSSN
ICOUT
ACIN
84.04800.D37
2nd = 84.08884.037
C17
33,45 BAT_SDA
28
C331
10
CSSP
C315
C350
SC1U10V3KX-3GP
33,45 BAT_SCL
SCD1U25V3KX-GP
AC_OK
C344
SCD1U50V3KX-GP
CHG_AGND
R183
1
2BQ24745_ACOK 13
Do Not Stuff
DCBATOUT
4
3
2
1
2
11
DCIN
Do Not Stuff
22
Do Not Stuff
U41
5
6
7
8
SCD1U50V3KX-GP
CHG_AGND
BQ24745_ACIN
Do Not Stuff
C347
C340
2
1 BQ24745_CSSP
3D3V_AUX_S5
C336
1
POWER SB
BQ24745_DCIN
AD_IA
8
7
6
5
84.04433.A37
2nd = 84.04407.F37
SC10U25V6KX-1GP
SC1U25V5KX-1GP
AC_OK
C
33
D
D
D
D
R153
470KR2J-2-GP
C358
R164
309KR3F-GP
C342
SCD01U50V2KX-1GP
Do Not Stuff
83.00400.C1F
2nd = 83.1S400.A2F
G4
K
3
AD+
G3
1016 modify D13
C324
SCD1U25V2ZY-1GP
D13
1SS400GPT-GP
Q2
2N7002DW -1-GP
BT+
AO4433-GP
AD+
20080605
DC_IN_D
R172
1
2
Do Not Stuff
U31
S
S
S
G
1
2
3
4
AD+
D01R2512F-4-GP
R12
49K9R2F-L-GP
AD+_G_2
AD+_G_1
R169
49K9R2F-L-GP
R9
1
AD+_TO_SYS
84.04433.A37
2nd = 84.04407.F37
R10
10KR2F-2-GP
1013 modify U31
DCBATOUT
AO4433-GP
EC54
SCD1U50V3KX-GP
1
1
2
3
4
ICREF
U3
S
S
S
G
D
D
D
D
8
7
6
5
NEAR
AD+
R163
1
2
Do Not Stuff
CHG_AGND
CHG_AGND
CHG_AGND
BQ24745_VREF
RN43
3D3V_AUX_S5
1
2
3
4
8
7
6
5
AC_OK
CHG_ON#
AC_IN#
BQ24745_CHG_ON
Q20
SRN100KJ-8-GP-U
C345
DY
AC_OK
UMA Two Phase 2

CHG_ON#
CHG_ON#
AC_IN#
Do Not Stuff
BQ24745_CHG_ON
33
Wistron Corporation
AC_IN# to KBC
Title
2N7002DW -1-GP
AC_IN#
C339
SC1U10V3KX-3GP
Size
A3
Date:
5
33
BQ24745 Charger
Document Number
Rev
SB
HM40-MV
Sheet
1
46
of
51
5V_S0
5V_S0
1020 delete TC14,TC15
11
TSAHCT125PW -GP
U8D
TC24
TSAHCT125PW -GP
73.74125.L13
2nd = 73.74125.L12
73.74125.L13
2nd = 73.74125.L12
1117 delete TC19
SE100U25VM-L1-GP
U8C
SB
12
13
14
10
14
DCBATOUT
79.10712.L02
2nd = 79.10112.3JL
1016 modify U32

1017 add these parts(EC10,EC12,EC15~EC17,EC86) for EMI demand
SB
1020 add the part(EC86) for EMI demand
1128 add EC94,EC95 for EMI demand

1D8V_S3
DY
1
2
1
2
1
2
DY
EC86
EC95
Do Not Stuff
DY
EC94
Do Not Stuff
DY
EC90
Do Not Stuff
EC89
Do Not Stuff
DY
EC16
Do Not Stuff
Do Not Stuff
DY
EC17
SCD1U25V2ZY-1GP
EC10
SCD1U25V2ZY-1GP
Do Not Stuff
EC12
Do Not Stuff
EC15
DCBATOUT
DY
DY
1016 add GND1 and GND2 for EMI demand

1017 add GND3 and modify GND2 for EMI demand
34.42Y01.011
GND7
Do Not Stuff
DY Do Not Stuff
GND4
Do Not Stuff
DY Do Not Stuff
GND8
Do Not Stuff
DY Do Not Stuff
H17
Do Not Stuff
Do Not Stuff
Do Not Stuff
H30
Do Not Stuff
H29
Do Not Stuff
Do Not Stuff
H43
UMA Two Phase 2
Wistron Corporation
Do Not Stuff
H28
Do Not Stuff
1
1
H8
Do Not Stuff
H7
H27
Do Not Stuff
Do Not Stuff
Do Not Stuff
H26
Do Not Stuff
Do Not Stuff
H6
Do Not Stuff
H24
Do Not Stuff
H23
Do Not Stuff
Do Not Stuff
Do Not Stuff
H5
Do Not Stuff
34.49U23.001
SB 1128 Add GND4,GND7,GND8
H22
Do Not Stuff
Do Not Stuff
H4
GND3
SPRING-9-GP
SB 1120 remove H31and H32
Do Not Stuff
H3
34.4F822.002
1016 modify H31 and H32
H21
Do Not Stuff
Do Not Stuff
Do Not Stuff
H2
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
H1
Do Not Stuff
H20
Do Not Stuff
H19
Do Not Stuff
GND2
SPRING-51-GP
34.42Y01.011
1016 modify H35~H38

1016 delete H9~H12
H18
Do Not Stuff
GND1
SPRING-58-GP
34.4B312.002
TOP
H38
34.42Y01.011
H37
H36
HOLE355X355R111-S1-GP
34.42Y01.011
CPU
H35

Title
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
SB 1128 Add H43

Size
EMI/Spring/Boss
Document Number
Rev
SB
HM40-MV
Date:
5
Sheet
1
47
of
51
1
1
1
1
SPKR_R+
SPKR_RSPKR_L+
SPKR_L-
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
TP244
TP243
TP245
TP246
Touch pad
5V_S0
35
35
35,37
35,37
TP_DATA
TP_CLK
TP_RIGHT
TP_LEFT
LED
Speaker
27,28
27,28
27,28
27,28
1
1
1
1
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
TP109
TP105
TP110
TP114
TP113
5V_S0
36 WLAN_LED#_R
36 TP_LOCK_LED#_R
36 TP_LOCK_BN#_1
36 WIRELESS_BTN#_1
36
CAP_LED#_R
36
NUM_LED#_R
36 MEDIA_LED#_R
36
3D3V_S0
PWRLED#_R
36 KBC_PWRBTN#_1
Do Not Stuff
TP88
1
1
1
1
1
1
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
TP229
TP228
TP230
TP231
TP91
TP90
TP234
1
1
Do Not Stuff
Do Not Stuff
TP253
TP252
Do Not Stuff
TP254
SB
1112 remove the signal( STDBY_LED#_R)
Battery
Keyboard
33
33
33
33
KCOL16
KCOL15
KCOL14
KCOL13
1
1
1
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
TP127
TP139
TP148
TP146
33
33
33
33
KCOL8
KCOL7
KCOL6
KCOL5
1
1
1
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
TP98
TP99
TP101
TP100
KCOL4
KCOL3
KCOL2
KCOL1
1
1
1
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
TP118
TP138
TP122
TP123
45
45
45
BATA_SDA_1
BATA_SCL_1
BAT_IN#_1
BT+
BT+
AD_JK
1
1
1
1
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
TP16
TP17
TP15
TP14
TP13
1
1
Do Not Stuff
Do Not Stuff
TP6
TP5
Check test point

1
Do Not Stuff
TP237
Do Not Stuff
TP240
3D3V_S5
Do Not Stuff
TP236
5V_S5
Do Not Stuff
TP238
4,12,39 H_PWRGD
Do Not Stuff
TP241
33,39,42 S5_ENABLE
Do Not Stuff
TP242
Do Not Stuff
TP239
3D3V_S0
33
33
33
33
33
33
33
33
KROW0
KROW7
KROW6
KROW5
1
1
1
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
TP152
TP154
TP153
TP151
3D3V_AUX_S5
4,6
B
33
33
33
33
KROW4
KROW3
KROW2
KROW1
1
1
1
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
TP94
TP95
TP92
TP97
33
33
33
33
KCOL12
KCOL11
KCOL10
KCOL9
1
1
1
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
TP260
TP116
TP117
TP102
33
33
KCOL17
KCOL0
1
1
Do Not Stuff
Do Not Stuff
TP72
TP87
H_CPURST#
Test Point
Dimm Door
FAN
Bluetooth
A
22
22
22
USB_7USB_7+
3D3V_BT_S0
1
1
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
32 G7922_FAN_TACH
Do Not Stuff
TP187
32 G7922_FAN_DRIVE
Do Not Stuff
TP188
UMA Two Phase 2
TP134
TP136
TP133
Wistron Corporation

Title
Size
AFTE test point
Document Number
Rev
SB
HM40-MV
5
Sheet
1
48
of
51
0910 delete F4(Page 18)

0910 update footprint of U15(Page 30)
0910 delete RIGHT1 and LEFT1(Page 33)
0910 modify net names of TP_LEFT and TP_RIGHT(Page 36)
0910 modify
test points of AFTE and TPAD
0911 modify net name from LPC_RST to PLT_RST1#(Page 24)

0911 add net name(RBIAS,LED_DUPLEX#,SMDATA,SMCLK)(Page 24)
0911 add net name(DVDD_1_8,ACZ_SDATAIN0_R,FLY_P,FLY_N,VREF_LO,VREF_HI)(Page 26)
0911 add net name(EAPD#_R)(Page 27)
0912 modify the schematic of Page 33
0912 delete GMCH_TXB*(Page 7& 18)
0912 add these parts for EMI demand(page 7,18,20,21,23,26,28,29,30,32,33,34,35)
0915 modify
net name from 10M/100M/1G_LED# to 10M/100M_LED#(page24,25)
0915 delete these parts for EMI demand(page 30)

0915 add EC34 for EMI demand(page3)
0915 add EC73 for EMI demand(page 12)
0915 modify LEDs port
0916 move net(SPI_WP#) from U9 pin120 to pin25(page33)
0930 modify BLUE1(page22)
C
0930 add 2nd for SPK1, MIC1 and modify LOUT1 (page28)
0930 modify
FAN1(page32)
0930 modify
TPAD1(page35)
0930 modify
KB1(page33)
0930 modify net name for BIOS demand(page33)

1001 delete these parts for EMI demand(ED1~8)
1009 modify net name for GND to AGND(page27)
1009 add R4,R5 for AC decopling(page27)
1009 add R96(page30)
1013 modify
TPAD1(page35)
1013 modify U40 from 72.25X16.001 to 72.25X16.A01(page 34)

1013 modify TC11 and add TC12(page42)
1013 modify TC10 and add TC26(page44)
1013 modify U2(page45)
B
1013 modify U3 and U31(page 46)
1013 modify R161 and R162(page41)

1013 modify card1(page 30)
1014 modify these LEDs(LED11,LED12)(page38)
1014 modify these nets(page 26)
1014 modify R258 from 10k to 20k ohm(page26)
1014 add ER5 for EMI deamnd(page3)
1015 modify LCD1 pin define(page 18)
1015 modify the power from 3D3V_S5 to 5V_S5(page38)
1015 modify TPAD1(page35)
1015 modify RN57(page28)
1015 modify F1(page18)
UMA Two Phase 2

A
Wistron Corporation
Title
Size
Change List
Document Number
Rev
SB
HM40-MV
Date:
5
Sheet
1
49
of
51
1016 modify L1,L2 and L3(page 19)

1016 modify XF1(page 25)
1016 modify RN53 and U10(page 24)
1016 modify U8(page19,47)
1016 modify U4(page 37)
1016 modify U23(page 43)
D
1016 modify X2(page12)
1016 modify X1(page 33)

1016 modify X3(page 3)
1016 modify D13(page 46)
1016 modify Q3 and Q4(page45)
1016 modify Q18(page 36)
1016 modify Q15~Q17(page 36)
1016 modify Q27~Q30(page38)
1016 modify Q6 and Q14(page 32)
1016 modify Q8(PAGE 24)
1016 add GND1 nad GND2 for EMI demand(page 47)
C
1016 modify LCD1 pin define(page 18)
1016 delete H9~H12 and modify H35~H38,H31,H32(page 47)

1017 add these parts for EMI demand(page 47)
1017 delete these parts(EC208~EC210)(page 7)
1017 modify BLUE1(page 22)
1017 modify FAN1(page 32)
1017 modify R291 and R293(page 38)
1017 add U61,R52,EC23 and EC24(page 37)
1017 modify RN60(page37)
1017 add TC25(page 44)
1017 add GND3 and modify GND2 for EMI demand(page 47)
1017 modify USB signal connection(page13,18,22,23,30,31,48)
1020 delete C537 for Power demand(page42)
1020 add the part(EC86) for EMI demand(page 47)
1020 delete U61,R52,EC24 and EC23(page 37)
B
1020 delete TC14,TC15(page 47)

1021 modify TC16(page 31)
1021 delete TC23(page 23)
1021 modify TC5(page 20)
1021 modify and swap these parts(USB1 and USB2)(page 23)
1021 modify SATA1(page 20)
1022 modify DC1(page 45)
UMA Two Phase 2

A
Wistron Corporation
Title
Size
Change List
Document Number
Rev
SB
HM40-MV
Date:
5
Sheet
1
50
of
51
SA to SB
1127 modify C377(page32) for
1106 modify net connection of RN46 and RN44(page33) for layout demand
1106 modify LED11 and LED12(page38) for fixing issue
thermal function
1128 Add H43,GND4,GND7,GND8(page47) for EMI demand

1128 modify LCD1(page18) for cost down
1106 modify LED power from 5V_S5 to 5V_AUX_S5(page38) for customer demand
1112 remove the signal(STDBY_LED#_FR)page38 for customer demand
1128 Add L19(page24) for vender demand

1128 add EC94,EC95 for EMI demand(page47)
1112 remove these signals( STDBY_LED#_FR and STDBY_LED#_R) and R131(page36) for customer demand
D
1112 remove the signal( STDBY_LED#_R)page36 for customer demand

1112 remove the signal( STDBY_LED#_R)and TP253(page48) for customer demand
1113 modify
C103 and C106(page24) for crystal issue
1113 modify 2nd of U19(page26)

1113 modify U48(page22)
1117 delete MDC function(R231,R237,R232,R234)(page12)
1117 delete TC19(page 47) for ME deamnd
1118 modify PCB Ver. from SA to SB(page33)
1118 delete TC12(page42) for layout demand
1118 delete TC27(page9) for layout demand
1118 delete R107 and add L18 for cost down
1119 modify R130 and R133(page 36) for LED brightness
C
1119 modify EC52 and EL3(page45) for EMI demand
1119 modify SPK1(page 28) for ME deamnd

1119 add G84
for RTC reset demand
1120 modify EC78for EMI demand((page10)

1120 modify PowerCN1 pin3 and remove EC44(page36) fro LED function
1120 remove H31 and H32(page47)for ME demand
1120 add RN61 and RN62(page3) for layout demand
1120 swap these nets(CLK_MCH_3GPLL,CLK_MCH_3GPLL#, CLK_PCIE_MINI1,CLK_PCIE_MINI1#)(page3)for CLK REQ demand
1120 add the net( SATACLKREQ#)(page3,13)for CLK REQ demand
1120 move these nets (CLK_PCIE_MINI1,CLK_PCIE_MINI1#)(page3)for CLK REQ demand
1120 modify RN61 and RN62(page3)for CLK REQ demand
1121 add EC87 for EMI demand(page18)
1121 add the part(EC89) for EMI demand(page47)
B
1121 modify R18,C43(page41) for Power demand
1121 modify R275(page42)for Power demand

1121 modify R271,R272,R286 and L16(page44) for Power demand
1124 modify U42 and delete R182,R185 (page32) for thermal function
1124 modify these names of these nets(G7922_SGND2,G7922_SGND3...) (page32) for thermal function
1124 add R302(page3) for clock gen function
1125 modify R125,R126(page18) for LCD brightness control
1125 modify RN40 and delete RN42(page32) for layout demand
1125 add EC92 and EC93 for EMI demand(page 22)
1126 add these nets (PCIE_REQ_LAN#,PCIE_REQ_MINI#)(page3)for CLK REQ demand
1126 delete R230,R233,R235,R236 and RN63(page12) for removing MDC function
1126 add C541 and modify R101(page26) for codec function
1126 modify RN61 and RN62(page3) for layout demand
A
UMA Two Phase 2

A
1126 modify EU1,EU2 and add EU3,EU4 for EMI demand(page28)
Wistron Corporation
1127 modify CRT1(page19) for customer demand

1127 swap the nets of

RN61 and RN62 for layout demand(page3)
1127 modify BAT1(page45) for ME demand
Title
1127 modify U27(page44) for power demand

Size
Change List
Document Number
Rev
SB
HM40-MV
Date:
5
Sheet
1
51
of
51

Acer Emachines d725 - Wistron Hm40-Mv

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Acer Emachines d725 - Wistron Hm40-Mv

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Project code: 91.4BW01.001

HM40-MV Block Diagram

ICS 9LPRS365BKLFT (71.09365.A03)

AGTL+ CPU I/F

LVDS, CRT I/F

12 USB 2.0/1.1 ports

High Definition Audio

UMA Two Phase 2

Active Managemnet Technology(DO)

Serial Peripheral I/F

DDR Memory I/F

ICH9M Functional Strap Definitions

ICH9M Integrated Pull-up

XOR Chain Entrance/

Allows entrance to XOR Chain testing when TP3

PCIE config1 bit0,

This signal has a weak internal pull-down.

PCIE config2 bit2,

This signal has a weak internal pull-up.

ESI Strap (Server Only)

ICH9 EDS 642879

ESI compatible mode is for server platforms only.

Boot BIOS Destination

Controllable via Boot BIOS Destination bit

Integrated TPM Enable,

Sample low: the Integrated TPM will be disabled.

If sampled high, the system is strapped to the

XOR Chain Entrance.

This signal should not be pull low unless using

Sampled low:the Flash Descriptor Security will be

PCIE Graphics Lane

0 = Reverse Lanes,15->0,14->1 ect..

PCIE Loopback enable

Signal has weak internal pull-up. Sets bit 27

The pull-up or pull-down active when configured for native

PCI Express Lane

DMI Termination Voltage, The signal is required to be low for desktop

Montevina Platform Design guide 22339

Cantiga chipset and ICH9M I/O controller

FSB Dynamic ODT

0 = Dynamic ODT Disabled

DMI Lane Reversal

Digital Display Port

0 = Only Digital Display Port

1 = SDVO Card Present

Local Flat Panel

0 = LFP Disabled (Default)

LAN Atheros AR8114A

UMA Two Phase 2

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

1126 modify RN61 and RN62

RN61 and RN62

SB 1120 modify RN61 and RN62

SB 1120 add RN61 and RN62

0915 add EC34 for EMI demand

1015 modify component size of R87

1015 modify component size of R80

1015 modify component size of R95

ICS9LPRS365BKLFT setting table

0 = Overclocking of CPU and SRC Allowed

3.3V PCI clock output

0 = Pin24 as SRC-1, Pin25 as SRC-1#, Pin20 as DOT96, Pin21 as DOT96#

1014 add ER5 for EMI deamnd