ABOUT THE INSTITUTE

REGISTRATION FEE

Maulana Azad National Institute of

Technology (MANIT) is an institute of
Is
National importance. The institute has been
named after the great scholar, educationist and
the first education Minister of India, Maulana
Abdul Kalam Azad. The Govt. of India and the
Govt. of Madhya Pradesh jointly sponsored the
institute in 1960 to attract bright young
students from across the country. The institute
is successfully meeting the objective of
producing skilled manpower with the highest
quality to cope up with challenges of ever
evolving industrial needs of the country.

Faculty from Academic and : Rs. 2000/Research Organization

ABOUT BHOPAL
Bhopal is capital of Madhya Pradesh and is
commonly known as city of lakes. It is well
connected from different parts of the country
by rail and air routes. The institute is around 9
Km away from Bhopal main railway station
and 6 Km from Habibganj railway station.
Bhopal airport is around 16 Km away from the
institutes. The weather of Bhopal is moderate
and temperature during December varies from
15-35o C.

OBJECTIVE
The objective of this program is to give
exposure, awareness and competence about
recent trends in VLSI design flow and
analysis.

ELIGIBILITY
Faculties
from
Academic
Institutions,
Research organizations and Research scholars
with background in VLSI design.

Research Scholar

Self Financed

: Rs. 1000/-

Applications in the prescribed format are

invited along with registration fee to be paid in
the form of DD drawn in favor of Director
MANIT Bhopal payable at Bhopal, or in the
form of Cash at correspondence address by 10
December 2016. It will include kit, refreshment
and lunch. No TA and DA will be paid.
Selected participants will be informed via email
by 15 December 2016.

Short Term Training Program

on
Modeling and Implementation of
Analog and Digital Systems using
EDA tools

December 26-30, 2016

Organized by

Note:- Seats are limited and participants will be

short listed on first come first serve basis and
specialization of the candidate.

PATRON
Dr N. S. Chaudhari
Director, MANIT, Bhopal

COORDINATORS
Dr. Arvind
Dr. Ajay
Dr. R K
Rajawat
Somkuwar Baghel
(Professor)
(Professor) (Professor,
HOD)

Dr. Sangeeta Nakhate

(Assistant Professor)

Department of Electronics and

Communication Engineering
Maulana Azad National Institute of
Technology,
Bhopal-462051
Madhya Pradesh, INDIA
Website : www.manit.ac.in

INTRODUCTION

COURSE CONTENT

Due to explosive integrated multimedia based

applications, CMOS process technology is
shrinking and being driven towards system on
chip. It has become important for the practicing
engineers and the students to continuously
update their knowledge and skills in VLSI
design. To achieve this goal hands-on sessions
will be conducted on Cadance and Vivado tools
in the short term training program. The
Department of Electronics and Communication
Engineering has extensive EDA tools in VLSI
lab supported by Special Manpower
Development Program Chip-to-System Design
(SMDP-C2SD), Government of India. The short
term training program will be focused towards
providing hands on training on circuit design
with design flow and analysis. The program will
provide a widespread coverage of Full custom
and Semicustom Design flow using Cadance
DesignTool.

ORGANIZING COMMITTEE
MEMBERS
Mr. Swapneel Bhandarkar
(Lab Engineer SMDP C2SD)
Mr. Rammani Kushwaha
(Guest Faculty SMDP C2SD)
Mr. Putchala Bhaskara Rao
(Project Associate SMDP C2SD)

Maulana Azad National Institute of Technology,

Bhopal-462051

Introduction to Digital and Analog Circuit

Registration Form

Design Flow.

MOSFET CMOS Device Modeling

Hands on training with schematic Design,

Pre-Layout Simulation, Corner Analysis,
DC Analysis, Transient Analysis using
Cadance Design Tool.

Hands on training with Layout Design,

Physical Verification (DRC, LVS, PEX).

Post Layout Simulation with various analysis

using Cadance Design Tool.

Short term Training Program

on

Modeling and implementation of

analog and digital systems using EDA
tools
December 26-30, 2016
Name : ---------------------------------------------------Designation :--------------------------------------------

GDSII file generation for foundry input.

Institute / Organization: ------------------------------

Hands on with RTL coding on Xilinx Vivado

Address :-------------------------------------------------

Tool and Demonstration of implementation

on Basys3 board.

Contact No. : ------------------------------------------Email :----------------------------------------------------

CORRESPONDENCE ADDRESS

Highest Qualification:--------------------------------

Dr. Sangeeta Nakhate

Assistant Professor
Deptt. of Electronics & Comm. Engg.
MANIT, Bhopal-462051
Madhya Pradesh, INDIA

Area of interest :---------------------------------------

Email ID: miads2016.ece@gmail.com

sanmanit@gmail.com

Date :

Phone No. : 0755-4051516, 7509084580

9826627223,8602270078.

Details of DD / Cash Receipt : ---------------------

Signature of Applicant

Signature & Seal of HOD / Head of Institution