3.1 Overview
A common feature of conventional control is that the control algorithm is
analytically described by equations. In general, the synthesis of such control
algorithms requires a formalized analytical description of the controlled system by
a mathematical model [1]. The main characteristic of fuzzy logic is its capability of
expressing knowledge in a linguistic way, allowing a system to be described by
simple, human friendly rules [2,3]. This alternative linguistic approach leads to a
meaningful reduction of the computational burden. Usually fuzzy logic solutions
are not aimed at achieving the computational precision of tranditional techniques,
but aim at finding acceptable solutions in a shorter time. The natural applications
of fuzzy logic control (FLC) are those systems whose mathmatical model is
unknown, very complex or time-varying, and where human experience can play an
important role.
As in other control applications, fuzzy logic implementation could be carried
out either with general-purpose systems or dedicated systems, and many solutions
have been proposed for both alternatives. The structure and relative simplicity of
fuzzy processing algorithms naturally lead to straightforward implementation in
dedicated hardware structures. However, the majority of fuzzy logic
implementations reported in the literatures use general-purpose hardware due to the
fact that such an implementation involves a low start-up cost with a well-defined
control algorithm such as FLC. An optimal solution for the full application range
of fuzzy logic does not exist. Different approaches have to be chosen based on the
features of the application: complexity, real-time constraints, development time,
quantities, and other factors that influence the choice of a design.
In general, we can classify four classes of FLC implementation alternatives:
1) Software solutions with general-purpose microprocessors.
2) Software solutions with general-purpose microprocessors with
instructions for fuzzy logic specialized computation.
3) Hardware solutions using dedicated fuzzy processors.
4) Hardware solutions using fuzzy ASICs.
Other than technical merits, the stages of development and prototyping, as well
as production volume, also contribute to the selection of different solutions for
certain performance and cost criteria. For example, if the features of an application
38
are fixed and the volume is high, an ASIC solution may be an ultimate choice.
However, for the same application, if the development time is very limited, a
choice of microprocessor could be appropriate for initial stage development.
In this chapter, a number of implementation options for fuzzy logic control
applications are presented. We start from an analysis of the computational load of
all the processing stages of an FLC application. This lays a foundation for the
following sections. The next section discusses software implementation techniques
using general-purpose microprocessors, or general-purpose microprocessors with
fuzzy logic specific instructions. It is followed by a section on hardware processing
techniques using either dedicated fuzzy processors, or fuzzy ASICs. The
conclusions are in the last section.
quantifier
interpolation
online implementation
membership
rules
operator types
inference
defuzzification
knowledge base
fuzzification
output
interface
Fuzzy Logic
input
interface
plant
39
3.2.1 Fuzzification
Fuzification is the operation that translates a crisp data input to a membership
degree (also called D level). The membership degree depends on the shape of
membership function used, which has been extensively discussed in the literature
[1][3-7]. There are two commonly-used methods to evaluate membership functions.
A. Memory oriented approach
This approach applies to the cases where the membership functions do not change
at run time, and the total numbers of input and membership functions are limited.
The alpha values for each input and output are evaluated off-line and stored in
memory as discrete values. An easy way to choose the array size (dimension) for
the membership functions is to set the array size equal to the resolution of the
analog-to-digital converter (ADC). For example, with an 8-bit ADC input, arrays
of size 256 could be used to represent input membership functions [8].
Programming the membership function is a simple matter of converting the
membership functions to data arrays and storing them in memory [9].
In this case the shape of the membership function does not influence the
computational load of the algorithm. However, the memory usage depends on a
number of factors: the number of inputs, the resolution of input value and
membership function value, and the number of membership functions. The total
memory requirement for input membership functions is given by the following
equation:
MEM
N x N mf x 2 BITS X BYTEmf
(3.1)
where Nx is the number of inputs, Nmf-x is the number of membership functions for
each input, BITS-X is the number of bits used by each input value (i.e., the
resolution of analog-to-digital converter or ADC), and BYTEmf is the number of
bytes used to represent a membership function degree. We assume that all inputs
use the same number of bits, and that all membership functions use the same
number of bytes to represent a degree; otherwise, the total memory would need to
be calculated on each individual input, which is followed by a summarization
operation.
For example, a fuzzy controller contains three input values that are obtained
through a 10-bit ADC, each input is defined upon five linguistic labels: large
positive, small positive, zero, small negative, large negative, and one byte is used
to store a membership degree. The memory requirement for the input membership
functions is 15K bytes.
B. Computation oriented approaches
The evaluation of the membership degree is made on-line. In this case, we only
need to store the parameters of membership functions. Consequently, the shape of
the membership function is a very important aspect since the burden on
computation could be significant. The linear type of membership functions such as
triangular and trapezoid shape are preferred choices since they involve less
40
Di
41
(3.2)
The result interacts with its consequence Bi to provide the output of the rule. In
FLC the most commonly used method for inferring the rule output is the so-called
Mamdani method. In the Mamdani method, the output fuzzy set Ri is obtained by
adding of the above obtained matching level:
P i ( y ) D i o Bi ( y )
(3.3)
The next step is the aggregation of the individual rule outputs to obtain the
overall system output P(y), a fuzzy set of output y. The individual rule outputs are
aggregated using an oring aggregation:
P ( y)
P i ( y)
i
(3.4)
The algorithm of FLC is based on three paradigms: the AND operation between
the antecedents of the rules; the OR operator between the individual rules; and the
fuzzy implication interpreted as an ADD operation. A common set of
interpretations for the three operators is: min for AND, max for OR, and min for
ADD. This becomes the min-max method. Another commonly used interpretation
of these operator is to use multiplicative operation for ADD and/or AND operator.
This results in the max-dot method.
For the min-max method, if each rule involves all Nx input variables (worst
case) and we have R rules, we must execute R(Nx - 1) cascaded minimum
operations. For the max-dot method where min is used for AND and multiplication
is used for ADD, there are extra multiplication operations involved in addtion to
the minimum operation. The maximum number of multiplication operation for
each output is R2BITS-Y, where BITS-Y is the number of bits used by the output.
Notice that the output P(y) is a fuzzy set. The fuzzy output can be defuzzified
into a crisp output using one of the defuzzification techniques discussed in Chapter
2 and outlined in Section 3.2.3
B. The TSK model
In general, rules in a TSK model have the form
IF x1 is Ai1, and x2 is Ai2, , and xN is AiN
THEN y=fi(x1, x2, , xN)
where
f i ( x1 , x2 ,, x N ) bi 0 bi1 x1 biN x N
(3.5)
The degree the N inputs match the ith rule is computed using the anding-type
operator (min in this case) as Equation (3.2). The output of ith rule is computed
using Equation (3.5).
42
If each rule involves all Nx input variables (worst case) and we have R rules, we
must execute R(Nx - 1) cascaded minimum (comparison) operations, followed by
Nx multiplication and summation operation.
The total output of the model is given by
D
y
f i ( x1 , x2 ,, x N )
(3.6)
i
P(y )y
P(y )
j
(3.7)
The MOM method determine the defuzzified value as a mean of all values of
the universe of discourse, having maximum membership grades:
y j T
(3.8)
where T is the set of elements which attain the maximum value of P(y), and |T| is
the cardinality of T.
The HM is based on the center of gravity of each rule, weighted by the
matching levels of each rule:
P f
P
i
(3.9)
43
The following worst-case analysis applies to each output with 2BITS-Y discrete
levels, Nmf-y as the numbers of output membership functions. The COG method
also needs 2BITS-Y multiplication-and-accumulation operations, 2BITS-Y summation
operations, and one division operation. The HM needs Nmf-y multiplication-andaccumulation operations, Nmf-y summation operations, and one division. The MOM
needs 2BITS-Y summations, one comparison, and one division.
In general, the computation loads by the three methods in a descending order
are COG, HM, and MOM. The COG is the most commonly used method for
defuzzification.
3.2.4 Static or Dynamic Fuzzy Logic Control
The control algorithms could be either static or dynamic (adaptive). In the static
case, the set of control policies does not change in time. In the dynamic case, the
set of control policies changes over time, often in response to plant state and
environmental conditions. This also applies to fuzzy logic controllers. In a static
FLC case, designs are done off-line and implemented in real time. There is no real
time adjustment of the algorithm based on the running environment, even though
configuration changes are possible. In a dynamic case, the control algorithm could
be adjusted adaptively in run time.
Adaptive control is a rich area of study, reflecting the difficulty in constructing
controllers that tolerate uncertainty. It has been pointed out in [11] that adaptive
control is concerned with two fundamental aspects of control in the face of
incomplete plant characterization. The first is identification, in which we seek to
determine the characteristics and state of the plant under control. The second aspect
is the challenge of determining control. The issues of identification and control
appear in an adaptive FLC as the two related problems: how much controller
adjustment is needed, and which controller components should be adjusted. These
include the adjustment of membership functions, rules, parameters used by the
controller, etc. [5,12]. The adaptive FLC block diagram is shown in Figure 3.2,
which illustrates the construction used by the majority of the applications.
The adaptive FLC is not the focus of this chapter. The topics of this chapter
only cover the Fuzzy Logic Controller block in Figure 3.2. It could be a static
fuzzy logic controller, or an adaptive one that is adjusted by the Adaptive
Mechanism block.
adaptive
mechanism
command +
_
fuzzy logic
controller
plant
output
_
reference
model
Figure 3.2. Direct adaptive FLC block diagram
44
45
Two examples in this category are given to offer a glimpse of some features of
the products.
The Motorola HC12 microcontroller is a high-speed 16-bit evolution of
68HC11 architecture. This 16-bit microcontroller family includes four fuzzy logic
instructions in addition to the memory and on-chip peripheral functions you would
expect in a general-purpose microcontroller. The fuzzy logic instructions use
existing CPU logic to perform computations including addition, subtraction,
multiplication, multiply-and-accumulate, and comparisons. As a result, the speed
and efficiency of fuzzy logic programs are greatly improved without increasing the
cost of the microcontroller. All of the dedicated fuzzy logic instructions are
designed to complement the need to a specific need in FLC. For example, the
MEM instruction computes one fuzzy input based on a trapezoidal membership
function; designed for fuzzy inference, the REV instruction performs unweighted
min-max rule evaluation on a complete rule list for a fuzzy logic system; the WAV
instruction computes a sum-of-products and a sum-of-weights needed for weighted
average defuzzification.
ST Microelectronics also developed a family of microcontroller products, the
ST FIVE family, that offers a traditional microcontroller architecture, characterized
by an extended instruction set and a wide range of on-chip peripherals, combined
with a dedicated architecture, the Decision Processor, that provides hardware
instructions for fuzzy algorithms [13]. A software environment called Visual FIVE
IDE is provided to develop fuzzy algorithms through a guided editor and a
graphical tool for fuzzy sets design in the form of if then fuzzy rules. The
developer could start from the high level FLC design using the development
environment; the design is then translated into a set of instructions for the Decision
Processor.
3.3.3 Software Development Tools for Fuzzy Logic System Design
There is a noticeable trend in the development of FLC algorithms. There are a
number of software products available that would allow the user to design a fuzzy
controller from a high or algorithmic level, and sometimes interactively with a
special graphic user interface (GUI). The user could start from a fuzzy logic
algorithmic level to design the controller. Consequently, these tools would usually
generate C codes, which can to be modified to fit into a target platform. This
further simplifies the implementation of FLC using a general-purpose platform.
An interesting example is a platform-independent fuzzy logic development tool
called Fuzz-C. It is a stand-alone preprocessor that integrates fuzzy logic into the C
language. Fuzz-C accepts fuzzy logic rules, membership functions, and
consequence functions, and produces standard C source code that can be compiled
by most C compilers.
Some of these products are even integrated with a certain compiler of a
microcontroller, such that a seamless integration is possible from a high-level FLC
design to a low-level microcontroller software implementation. An interesting
example is a tool called fuzzyTECH. A fuzzyTECH Precompiler Edition generates a
complete fuzzy logic system as highly optimized C code for a solution that could
be integrated with other software on different hardware platforms. Then a different
46
47
T
T
254
255
0
1
Output Values
254
255
The advantages and the disadvantages of this approach are shown below:
Pros:
x Speed: there is only access time involved
x Easy to program
Cons:
x Only work for system with limited inputs and outputs
x No runtime flexibility: nothing could be adjusted/configured in real
time
A main limitation to the lookup table method is that it only applies to systems
with a limited number of inputs and outputs. The memory requirement grows
exponentially with the increase of the number of inputs. The memory requirement
by this approach is given by the following equation:
MEM
N y (2 BITS X ) N BYTE y
x
(3.10)
48
10
12
0.0625
0.25
64
1,024
16,384
256
16,384
1,048,576
67,108,864
16,384
4,194,304
1,073,741,824
2.74878E+11
x
Cons:
x
x
x
49
WARP 2
Up to 16 input variables
Up to 8 input variables
Up to 16 output variable
Up to 4 output variable
50
The key features of the products are illustrated in the Table 3.3, where WARP 2
is a low cost implementation of WARP1.1.
3.4.2 Fuzzy ASIC
For low cost, high speed and small size, the ultimate solution for FLC applications
is to develop dedicated hardware for a single application. The most commonly used
fuzzy ASICs have appeared in washing machine controls, auto focus imaging,
speed and brake control for cars, and so on. Due to the process involved in an FLC,
it is possible to design directly a dedicated hardware for a fuzzy logic algorithm in
a way that maximizes speed and minimizes silicon area, by using high-level
synthesis techniques [2]. The resultant solution is then tailored to a single
application, and configurable parameters are reduced to a minimum that does not
compromise speed and area. The advantages and disadvantages of this approach
are shown below:
Pros:
x Speed: very fast
x Low cost (for high production volume)
x Possible as a single chip solution for the whole control system
Cons:
x No flexibility (designed for a single application)
x Possibly long overall design turnaround time (including prototyping
and testing)
x No other processing capability may need a microprocessor for other
processing
The natural choice of ASIC solution is in the areas of high speed, fixed
functionalities, and high production volume. When the speed of a dedicated fuzzy
coprocessor cannot meet the timing constraints of an application, a fuzzy ASIC
solution should be considered.
Many ASIC implementations have been developed for FLC [12, 16-18]. The
challenge is to utilize a flexible architecture that fits different applications to make
automatic synthesis feasible. Research has been conducted on the design of
architectures suitable for automatic synthesis of digital fuzzy controllers. One
proposed architecture uses the number of bits for input and output and their
membership functions as main parameters, while imposing no limitations on the
number of rules comprising the knowledge base [16].
A fuzzy system is inherently parallel in its representation: separate input
variables, rules, and elements into which the output space is generated. Regarding
hardware, this means a trade-off between high inference speed (parallel processing)
and low silicon area (sequential processing). Singleton fuzzy systems that employ
singleton values to define the consequents are usually chosen for hardware
realization since they eliminate parallelism in output space. In the literature, fully
digital approaches have been reported, reducing parallelism in rule inference by
only processing some simultaneously active rules [18].
Every ASIC implementation of each FLC is different. However, most of them
contain similar blocks due to the same type of operations involved. In the
51
fuzzification stage, the membership function could be stored in memory space for
easy access. The inputs received by the fuzzy rule base are used to address the
membership memory. The addresses of the membership values are computed by
adding the crisp input to the base address of each membership function. The next
step is fuzzy inference. From a hardware point of view, this corresponds to the
execution of a set of minimum operations for each rule. The final step,
defuzzification, performs the computation of the crisp output from their fuzzy
values, according to one of the defuzzification algorithms (COG, MOM or HM).
This operation could be the most expensive and time consuming area as it may
require a multiplication-and-accumulation operation.
The realizations are strictly based on the application requirements. For instance,
the system can use different types of adder (carry select, look ahead, etc.) and
multipliers (parallel, sequential) according to performance and area constraints.
3.5 Conclusions
This chapter is intended to provide an overview of various approaches of FLC
implementation. There are different hardware/software tradeoffs that must be
considered in the design of a fuzzy controller. The different techniques provide
different degrees of flexibility as well as supporting different ranges of applications
in terms of speed and complexity. While there is a never-ending debate regarding
the merits of hardware vs software, every design has to look into its own
constraints for a suitable solution. In one extreme, for low speed applications with
only one or two low-resolution inputs and a few outputs, a lookup table scheme
could meet the need. In the other extreme, for a very high speed application with
relative large number of inputs and output, a fuzzy ASIC solution could be the only
choice. A system designer has to make a proper choice according to the
applications and the cost/performance requirements.
References
[1]
[2]
[3]
[4]
[5]
[6]
52
[7]
C. C. Lee, Fuzzy logic in control systems: Fuzzy logic controllerPart II, IEEE
Transactions on Systems, Man and Cybernetics, Vol. 20, Issue 2, Mar./Apr. 1990, pp
404-418.
Zhimin Ding, Implementing fuzzy logic control with the XA, Philips
Semiconductors, Application note AN710, Dec. 1996.
Shane Spiteri, Embedded Fuzzy Control for Reefer Refrigeration Systems,
Proceedings of 2001 IEEE International Fuzzy Systems Conference, 2001, pp 1088
1091
Y. K. Chen, C. H. Yang, Y. C. Wu, Robust fuzzy controlled photovoltaic power
inverter with Taguchi method, IEEE Transactions on Aerospace and Electronic
Systems, Vol. 38, Issue 3, July 2002, pp 940- 954.
K. S. Narendra and A. M. Annaswamy, Stable Adaptive Systems, Prentice Hall, 1989.
J., Valente de Oliveira, J.M. Lemos, A comparison of some adaptive-predictive
fuzzy-control strategies, IEEE Transactions on, Systems, Man and Cybernetics, Part
C, Vol. 30, Issue 1, Feb. 2000, pp 138-145.
L. Fortuna, M. Lo Presti, C. Vinci, A. Cucuccio, Recent Trends in Fuzzy Control of
Electrical Drives: an Industry Point of View, Proceedings of the 2003 International
Symposium on Circuits and Systems, Vol. 3, May 2003, pp 459- 461.
D. Mihai, Optimizing the Defuzzifier Timing for the Fuzzy Control of a Servodrive,
Proceedings of 34th International Symposium on Multiple-Valued Logic, May 2004,
pp 142- 147.
B. Giacalone, M. Lo Presti, F. Di Marco, Hardware implementation versus software
emulation of fuzzy algorithms in real applications, Proceedings of The 1998 IEEE
International Conference on Fuzzy Systems, May 1998, Vol. 1, pp 7-12.
R. Dapos Amore, O. Saotome, K.H. Kienitz, A two-input, one-output bit-scalable
architecture for fuzzyprocessors, IEEE Design & Test of Computers, Vol. 18, Issue 4,
Jul/Aug 2001, pp 56-64.
D. Falchieri, A. Gabrielli, E. Gandolfi, M. Masetti, Design of very high speed CMOS
fuzzy processors for applications in high energy physics experiments, Proceedings of
the Seventh International Conference on Microelectronics for Neural, Fuzzy and BioInspired Systems, Granada, Spain, April 1999, pp 284-291.
I. Baturone, A. Barriga, S. Sanchez-Solano, J.L. Huertas, Mixed-signal design of a
fully parallel fuzzy processor, Electronics Letters, Mar 1998, Vol. 34, Issue 5, pp
437-438.
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
[16]
[17]
[18]