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B. Tech.

Degree
IN

ELECTRONICS AND COMMUNICATION ENGINEERING

LABORATORY MANUAL

Digital Signal Processing Laboratory

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

NATIONAL INSTITUTE OF TECHNOLOGY


TIRUCHIRAPPALLI 620 015
INDIA

CONTENTS
Cycle 2 DSP Processor experiments
S. No.
1.
2.
3.
4.
5.
6.

Name of the Experiment


Addressing modes and Sequence Generation
Convolution
Correlation
Waveform Generation
Discrete Fourier Transform (FFT radix-2 Algorithm)
FIR Filter Implementation

Ex. No.: 1

ADDRESSING MODES AND SEQUENCE GENERATION

Aim:
a) To learn the following addressing modes of TMS320C54X DSP.
i) immediate ii) direct addressing iii) indirect addressing : general type, indexing,
circular addressing iv) memory mapped register addressing
b) To generate and find the sum of the following arithmetic sequences.
i)
1+2+3+4+ + n
ii)
1-2+3-4+ + n
iii)
12+22+32++ n2
iv)
1+1+2+3+5+8 + n (Fibonacci series)
The value of n is defined as variable assignment in the program
Objectives:
1. To understand the data load and store operations and various addressing modes of
TMS320C54X DSP.
2. To make familiar the assembly instructions for arithmetic and logical operations.
3. To understand the branch instructions suitable to define loop functions
Algorithm:
a) Addressing modes
i) Immediate addressing mode: Write the various arithmetic, logic instructions, load and
store instructions that support short and long immediate addressing mode.
ii) Direct addressing mode: Write the various arithmetic, logic instructions, load and
store instructions that direct addressing mode with DP.
iii) Indirect addressing mode: Write the various arithmetic, logic instructions load and
store instructions that support various indirect addressing mode.
iv) Memory mapped register addressing mode: Write the assembly instructions to access
memory mapped registers using various addressing modes and memory mapped
register addressing mode. (Example use AR0, DP and BK registers)
b) Sequence generation
i) 1+2+3+4+ + n
Start
Read n
Sum = 0 i=1
for i=1: n
Begin
Store i in memory
Sum=Sum+i
2

Increment i by 1
End
Store Sum in memory
Stop
ii) 1-2+3-4+ + n
Start
Read n
Sum = 0, Sum1 = 0, Sum2 =0, i=1
for i=1: n
Begin
Store i in memory
If i is odd
Sum1=Sum1+i
Else
Sum2=Sum2+i
Increment i by 1
Sum = Sum1+negative of (Sum2)
End
Store Sum in memory
Stop
2
iii) 1 +22+32++ n2
Start
Read n
Sum = 0, i=1 to n, a=0
for i=1:n
Begin
Store i in the memory
a=i*i
Store a in memory
Sum=Sum+a
End
Store Sum in the memory
End
iv) 1+1+2+3+5+8 + n (Fibonacci series)
Start
Read n
a=0, b=1
Store a and b in the memory
for i=1: n-2
Begin
c=a
a=a+b
b=c
Store a in the memory
3

End
Stop
Ex. No.: 2

CONVOLUTION

Aim:
To perform the linear convolution and circular convolution of two sequences using
i)
overlap add technique
ii)
overlap save technique
Objectives:
1. To understand the various multiply instructions.
2. To make familiar with multiply and accumulate (MAC) operation and to know the format
of various MAC instructions in PDSPs.
3. To determine the memory size required in implementing the convolution operations using
overlap add and overlap save techniques.
4. To understand the concept involved in implementing the linear and circular convolution.
Algorithm:
Convolution:
Get the input sequence x(n) of length m and another sequence h(n) of length n each
Get the sequence x1(n) by concatenating sequence x(n) twice
for i=1 to n
Sum = 0
for j=1 to n
Sum = Sum + x1(n-j+i+i)*h(j)
g(i) = Sum
Stop
Overlap & add method
Start
Get input sequence x(n) of length m and other sequence h(n) of length n
Segment the input sequence into blocks of length m each
Append n-1 zeros to the i-th block of x(n) and m-1 zeros to the sequence h(n) and
perform circular convolution
Store the output of i-th block in the output sequence. Before storing overlap i-th output
over and (i-1) the output for n-1 samples and add them both and save it.
Repeat steps 3, 4 till input sequence is completed.
Overlap & save method
4

Get input sequence x(n) of length m and other sequence h(n) of length N
In the input sequence, take the first block of m samples and append n-1 zeros before it
Append m-1 zeros to the sequence h(n) and perform circular convolution.
Save the output of the block in the output sequence by overlapping n-1 samples and
discard the overlapped samples of previous output block.
Take the next block with n-1 last samples of previous output block of m fresh samples.
Repeat steps 3 to 5 till the end of the input sequence
Ex. No. : 3

CORRELATION

Aim:
To implement i) cross correlation & ii) auto correlation of two sequences through assembly
language programming.
Objectives:
1.
2.
3.
4.

To understand, how MAC instruction can be used to perform correlation.


To know, what are the various MAC instructions available in PDSPs to perform
correlation.
To calculate the effective memory required to perform the correlation operation.

Algorithm:
Cross correlation
x1(n) First input sequence of length m
x2(n) Second input sequence of length n
out[n] output sequence
for (i=0; i<m; i++)
{
for (j=0; j<n; j++)
{
Out[i+j]+= x1[i]* x2[n-j]
}
}
Display out[ ].
Auto correlation
x1(n) input sequence of length l
for (i=0;i<l;i++)
{
for (j=0;j<l;j++)
{
out[i+j] + = x1[i] x1[l-j]
}
}
5

Display out[ ]
Ex. No.: 4

WAVEFORM GENERATION

Aim:
To write assembly language program to generate i) saw tooth wave, ii) triangular wave,
iii) square wave, iv) trapezoidal wave and iv) sine wave
Objectives:
1. To know the method to define multiple loops
2. To understand the unconditional and conditional types of branch instructions
3. To make familiar with the display tools in the Code Composer Studio (CCS)
4. To understand the relation between machine cycle time and execution time of the
program
Algorithm:
i) Saw tooth wave
start
k=0, out[ ]
for i=0 to 16
begin
out[k]=0
increase k
for j=0 to 48
Begin
out[k]=out[k-1]+1
increase k
end
end
stop
ii) Triangular wave
out[n] output values
out[0] = 0; k=1;
for (i=0;i<16;i++)
begin
for (j=0;i<7;j++)
out[k] = out[k-1]+1;
increase k
end
for (j=0;j<7;j++)
begin
out[k]=out[k-1]-1;
increase k
end
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end
iii) Square wave
Start
k=0, out[]
for i=0 to 16
begin
for j=0 to 32
begin
out[k]=6
increase k
end
for j=0 to 32
begin
out[k]=0
increase k
end
end
stop
iv) Trapezoidal wave
Start
k=0, out[0]=0
for i=1 to 16
begin
for j=1 to 8
begin
out[k+1]=out[k]+1
increase k
end
for j=1 to 32
begin
out[k+1]=out[k]
increase k
end
for j=1 to 8
begin
out[k+1]=out[k]-1
increase
end
end
stop
v) Sine wave
Start
sine[n]- Array containing sine values
7

out[n]- output array


k=0;
for i=1 to 16
begin
for j=0 to 25
begin
out[k]=sine[k]
increment k
end
end
stop

Ex. No.: 5

DISCRETE FOURIER TRANSFORM (DFT)

Aim:
To obtain 8-point Discrete Fourier Transform (DFT) of the sequence through assembly
language programming using Fast Fourier Transform (FFT-radix2) algorithm.
Objectives:
1. To understand the Bit-reversed addressing technique
2. To write subroutines for two, four and eight point butterfly structure
3. To know the memory requirement for DFT implementation
Algorithm:
Implementation of two point butterfly diagram

a0

x0
x1

W20

a1
-1

Get first two input data values (x0 & x1) of the bit reversed 8 data values
Multiply x1 by the weighing factor W20
Add x0 and x1 to get a0
Subtract x1 W20 from x0 to get a1
Repeat the above steps for the remaining six bit reversed data values as set of two
If the weighting factor contains complex values the butterfly computations should be
done separately for real and imaginary parts.

Implementation of four point butterfly diagram

a0

b0

a1

b1

a2
a3

W40

b2

-1

b3

-1

W41

Get the first four outputs of the two point butterfly a0, a1, a2 and a3
Multiply a2 and a3 by the weighting factors W40 and W41 respectively
Add a0 and a1 with a2W40 and a3W41 respectively to get b0 and b1
Subtract a2W40 and a3W41 from a0 and a1 respectively to get b2 and b3
Repeat the above steps for the remaining four data values obtained from two
point butterfly
Implementation of eight point butterfly diagram

b0

X0

b1
b2
b3
b4

X1
X2
X3
X4
X5

b5
b6
b7

W80
W81
W82
W83

-1

-1

X6
X7

-1
-1

Get eight outputs of the four point butterfly b0, b1, b2, b3, b4, b5, b6 and b7
Multiply b4, b5, b6 and b7 by the weighting factors W80, W81, W82 and W83
respectively
Add b0, b1, b2 and b3 with b4W80, b5 W81, b6 W82 and b7W83 respectively to get
X0, X1, X2 and X3
Subtract b4W80, b5 W81, b6 W82 and b7W83 from b0, b1, b2 and b3 respectively to get
X4, X5, X6 and X7
Ex. No.: 6

FIR FILTER IMPLEMENTAION

Aim:
To write assembly language program for implementing FIR filter in PDSPs.
Objectives:
9

1. To generate FIR filter coefficients for LPF using MATLAB


2. Converting the coefficients into hexadecimal and storing in the memory of the DSPs.
3. Storing the input sample values in memory
4. To understand the response of digital filter
Algorithm:
Calculate the filter coefficients using window functions in MATLAB
Convert the filter coefficients into hexadecimal by scaling with suitable weighting factors
Store the coefficients either data or program memory of the processor
Get the input sample values, store it either data or program memory of the processor
Perform the convolution to the input samples and filter coefficients, store the result in
data memory.
The output values are displayed both in time and frequency domain.

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