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ELECTRICAL

ENGINEERING
7TH SEMESTER (2016-17)

EXPERMINET NO- 4
AIM:
To study the operational features of resistance and resistance capacitance gate triggering
circuits for Thyristor.

OBJECTIVE:
To study the operational features of resistance and resistance capacitance gate triggering
circuits for thyristor.

APPARATUS REQUIRED:
Serial no
1
2
3
4

CIRCUIT DIAGRAM:
R TRIGGERING:

Equipments used
Thyristor inbuilt kit
(PECI4M121)
DMM
CRO
Patch Cords

Specifications
R,RC triggering circuit
inbuilt
AC/DC voltage/current
measurements
Monitoring device
Connecting medium

Quanity
1
1
1
3

THEORY:
Resistance triggering circuits are most economical and simplest but the triggering angle in this circuit cant
be achieved beyond 90 and this is the main disadvantage of this circuit. Resistance triggering circuit is
shown in the fig: 1. In this circuit R2 is variable resistance and R is stabilizing resistance. In case R2 is zero,
gate current may flow from source, through load, R1, D and gate to cathode. This current should not turn
on the thyristor unnecessarily, so it should not exceed maximum permissible gate current Igm. So, R1
needs to obey the following relation,
(Vm/R1)Igm or
R1 (Vm/Igm)
Where,
Vm maximum value of source voltage.
Igm maximum permissible gate current.
Resistance R should have such a value that maximum voltage drop across it does not exceed maximum
possible gate voltage Vgm. Now, when R2=0, following relation should be maintained,
{Vm/ (R1+R)} .R} Vgm or
R ( Vgm.R1)/ (Vm-Vgm)

The value of the resistances R1 and R2 are large and so gate trigger circuit draws a small current. Diode D
allows the flow of current during positive half cycle so, gate voltage Vg is a half wave dc pulse. Magnitude of
this pulse can be controlled by varying the value of R2.
Mathematical relationship:
When the thyristor is triggered at , the following relation will exist,

-1
Vgp. Sin = Vgt or, =Sin (Vgt/Vgp)

And Vgp= (Vs().R)/(R1 + R2 +R)

; where Vs() is the value of input supply voltage at wt= .

-1
So, = Sin (Vgt.(R1+R2+R)/ Vs().R)
Now, we can say from the above equation that if we increase the value of variable resistance we will be able to
increase the value of .

Output waveform study for different triggering angle for R triggering:


1> When thyristor is not triggered: The potentiometer setting R2 determines the gate voltage amplitude.

When R2 is kept in its highest position current i is small and voltage across R, i.e. Vg=i.R is also small

as shown in the fig: 1(a), which is not sufficient to turn on the thyristor that means Vgp (peak of gate
voltage Vg) is less than Vgt(minimum gate trigger voltage), so thyristor will not turn on. Therefore load
voltage and current are zero and supply voltage Vs appears as VT across the thyristor. This is a purely
resistive circuit so Vg is always in phase with Vs.
2> When thyristor is triggered at triggering angle = 90: To trigger the thyristor at 90 angle, R2 is

adjusted such that Vgp=Vgt. This gives the firing angle 90 as shown in the fig: 1(b). The output current
and voltage waveforms will be in same phase due to the purely resistive circuit.
3> When thyristor is triggered at triggering angle < 90: To trigger the thyristor at < 90 angle Vgp should

be greater than Vgt. As soon as Vg becomes equal to Vgt for the first time thyristor is turned on and Vg
is reduced to almost zero (about 1v). The waveforms for this stage are shown in the following fig.

RC TRIGGERING:

THEORY:
In RC triggering circuit by varying the resistance R, firing angle can be controlled from 0 to 180. In the negative half
cycle, capacitor C charges through D2 with lower plate positive to the peak supply voltage Vm at wt=-90. After
wt=90, source voltage Vs decreases from - Vm at wt= - 90 to zero at wt=0. During this period, capacitor voltage Vc
may fall from Vm at wt=-90 to some lower value oa at wt=0 as shown in the fig:2. Now as SCR anode voltage
passes through zero and becomes positive, C begins to charge through variable resistance R from the initial voltage
oa. When capacitor charges to positive voltage equal to gate trigger voltage Vgt ,SCR is fired and after this, capacitor
holds to a small positive voltage, diode D1 is used to prevent the breakdown of cathode to gate junction through D2
during negative half cycle. From the fig we can examine that firing angle can never be zero and 180.
In the range of power frequencies, it may be empirically shown that RC for zero output voltage is given by,
RC (1.3T/2)=4/w (approx)
Where T=1/f= period of ac line frequency in seconds.
The SCR will trigger when Vc=Vgt+Vd, where Vd is the voltage drop across diode D1.At the instant of triggering, if Vc is
assumed constant, the current Igt must be supplied by voltage source through R, D1 and gate to cathode circuit. Hence
maximum value of R is given by,
Vs >= RIgt+Vc

Vs >= RIgt+Vgt+Vd

R <= (Vs - Vgt - Vd)/Igt


Where Vs is the source voltage at which thyristor turns on. Approximate value of R and C can be obtained from the
above equations.
When SCR triggers, voltage drop across it falls to 1 to 1.5 V. This in turn lowers the voltage across R and C to this low
value of 1 to 1.5 V. Low voltage across SCR during conduction period keeps C discharged in positive half cycle until
negative voltage cycle across C appears. This charges C to maximum negative voltage -Vm as shown in the fig.
If R is more, then time constant RC will be more and hence the time taken for C to charge from oa to Vgt is more; firing
angle is more and therefore average output voltage is low and if R is less firing angle is low, then the time constant RC is
less and therefore average output voltage is more.

Output waveform study for different triggering angle for RC triggering:


1. When thyristor is not triggered: the value of resistance R is so small that the time constant (=RC) is so
small but the capacitor plates cant be fully charged in such small or No time and hence the thyristor
is not triggered. We wont get any output load voltage waveform.
2. When thyristor is triggered at triggering angle < 180 with lower value of R: To trigger the
thyristor at < 180 angle, the adjustable resistance is adjusted such that Vgp is greater than Vgt. As
soon as Vgp becomes equal to Vgt for the first time thyristor is turned on. the value of R is not very
high and hence lower time constant with faster triggering. The output load waveforms are shown in
the second figure of the theoretical waveforms.
3. When thyristor is triggered at triggering angle < 180 with higher value of R: To trigger the
thyristor at < 180 angle, the adjustable resistance is adjusted such that Vgp is greater than Vgt. As
soon as Vgp becomes equal to Vgt for the first time thyristor is turned on. The value of R is very high
and due to large time constant, the thyristor get triggered lately as compared to the previous case. The
output load waveforms are shown in the first figure of the theoretical waveforms.

OBSERVATION TABLE:
R TRIGGERING:
Firing angle
a in degrees

Vdc measured
from the CRO in
volts

Variable resistance
( R2) R in ohms

Waveforms of output load voltage


from CRO

Remarks

=0

R1

No voltage waveforms observed

To trigger the thyristor in =0


Vgt of the thyristor must be zero.
Which is not possible.

=1<90

R2>R1

Observed
(draw)

Triggering angle is directly


proportional to R2, as R2 is
greater than R1, also increases.

=2> 1

R3>R2

Observed
(draw)

R3 is greater than R2, so is


greater than the previous .

=3> 2

R4>R3

Observed
(draw)

R4 is greater than R3, so new is


greater than previous .
And we can see that as increases
output voltage decreases as the
turn on time of the thyristor
decreases as increases.

=90

R5>R4

Observed
(draw)

R2 is adjusted in such a peak


voltage across R, Vgp= Vgt of the
thyristor.

>90

R6>R5

No waveform observed.

The thyristor should be triggered


if Vgt<=Vgp in the first quadrant
of the complete cycle. That means
before <=90. Because after
wt=90 voltage across R will
be less than Vgp, so if Vgp is not
capable to trigger the SCR the
voltage after wt=90 will never be
able to trigger the SCR.

RC TRIGGERING:

Firing angle
a in degrees

=0

Vdc measured
from the CRO in
volts

Variable
resistance R in
ohms

R1

Waveforms of output load voltage


from CRO

Remarks

No voltage waveforms observed

Here variable resistor R is at


minimum value. To trigger the
thyristor in =0 we must have to
charge the capacitor up to Vc=Vgt
in zero time. Which is not
possible.

Here R=R2 is greater than previous


value R=R1, so time constant and
therefore to charge the capacitor to
Vgt level increases and

R2>R1

Observed
(draw)

2> 1

R3>R2

Observed
(draw)

Here also R=R3 is greater than


previous value R=R2, so time
constant and therefore to charge
the capacitor to Vgt level increases
and increases.

3> 2

R4>R3

Observed
(draw)

Here also R=R4 is greater than


previous value R=R3, so time
constant and therefore to charge
the capacitor to Vgt level increases
and increases.

4> 3

R5>R4

Observed
(draw)

Here also R=R5 is greater than


previous value R=R4, so time
constant and therefore to charge
the capacitor to Vgt level increases
and increases.

increases.

And here as increasing


output voltage decreasing as
the turn on time of the
thyristor decreases when
increases.
4=180
> 3

R6>R5

No waveform observed.

At wt=180 even source voltage


becoming zero. So capacitor
cannot be charged to Vgt level on
that time. So no triggering.

RESULT & DISCUSSION:

CONCLUSION:
PRECAUTIONS:
Practical waveforms from CRO:

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