4, APRIL 2010
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I. INTRODUCTION
ECENTLY, the efficiency problem in server power supplies has become an important issue because of its electricity consumption growth and cooling cost increase [1][5].
Especially, the necessity of a high-efficient server power system
is emphasized in the medium power (600800 W) supplies since
the server infrastructure has spread to small companies these
days. For this purpose, several techniques have been proposed
to reduce the switching losses and component stresses [6][24].
Among the proposed techniques, the conventional phase-shifted
full-bridge (PSFB) converter [6][8], the active-clamp forward
converter [21], and the asymmetric control half-bridge converter [23], [24] are chosen as promising candidates for their
zero voltage switching (ZVS) operation, relatively lower current stress, and simple configuration. However, the usage of the
PSFB converter is limited to medium power supplies since it
adopts large number of main switches on the primary side. The
PSFB converter increases the cost and decreases the power density of the converter. The active clamp forward converter has
simple structure, but it is also suffered from high-voltage rating of the main switch. The voltage stress of the active clamp
forward converter is the highest among three ZVS topologies,
which increases the cost and degrades the performance of the
converter. The asymmetric half-bridge converter shown in Fig. 1
is the most attractive topology among three different techniques
mentioned earlier. It has simple structure and wide ZVS range.
Manuscript received May 8, 2009; revised July 14, 2009. Current version
published April 9, 2010. This paper was presented at the Proceedings of the 6th
IEEE International Power Electronics and Motion Control Conference, Wuhan,
China, May 17 20, 2009. Recommended for publication by Associate Editor
H. S. H. Chung.
The authors are with the Department of Electrical Engineering, Korea Advanced Institute of Science and Technology, Daejeon 305-701, Korea (e-mail:
ihnara@angel.kaist.ac.kr; philoman@angel.kaist.ac.kr; negative@angel.kaist.
ac.kr; gwmoon@ee.kaist.ac.kr).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TPEL.2009.2029549
944
Fig. 2.
However, its nominal duty ratio is still limited, and the control
scheme is difficult to realize.
In order to overcome all these drawbacks, a new high-efficient
multilevel half-bridge converter is proposed, as shown in Fig. 2.
The proposed converter employs an auxiliary circuit for the output regulation. The auxiliary circuit supplies additional voltage
to the main transformer when input voltage decreases. Thus,
the main switches can be operated at 50% duty ratio and fixed
switching frequency. Since the main switches are always operated at 50% duty ratio, their ZVS operation is easily achieved,
and the transformer is effectively utilized with no dc offset of
the magnetizing current. Moreover, the ZVS operation of the
auxiliary switches is easily realized by output inductor energy,
and the doubled switching frequency shown at the output filter
reduces the output ripple current significantly.
Fig. 2 shows a circuit diagram of the proposed dc/dc converter. It is based on the conventional half-bridge converter,
and the auxiliary circuit is employed on the primary side of
the converter. The auxiliary circuit is composed of an auxiliary
transformer (T2 ) and two auxiliary switches (S1 and S2 ). Fig. 3
represents the basic operation of the proposed converter. The
main switches are always operated at 50% duty ratio, while the
output voltage is regulated by controlling the phase differences
De between the main switches and auxiliary switches. When
the input voltage decreases, De is extended and additional voltage is increased to compensate the decreased input voltage, as
shown in Fig. 3. As the auxiliary circuit is used only for the regulation, the magnetic size of the auxiliary transformer is much
smaller than that of the main transformer, and the core loss in
the auxiliary transformer is negligible at nominal operating condition. Also, the current which flows into the auxiliary circuit
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Fig. 4.
ipri(1) (t) =
(t t0 ) + ipri(1) (t3 ) n1
(1)
VS (1) Vo . (2)
Mode 5 (t4 t5 ): The main switch M2 is turn off at the beginning of this mode. The voltage of the output capacitor CM 2 is
On the secondary side, both the rectifier diodes start to conduct and commutation of the two diodes D1 and D2 begin. This
mode ends when voltage of the switch M1 discharges to 0 V.
Mode 7 (t6 t7 ): In mode 7, the primary current flows through
the body diode of the main switch, M1 . As the main transformer
is regarded as short circuit, all voltages are applied to the leakage
inductance and the primary current is sharply decreased. The
primary current is expressed as
(1/2)vin + (1/n2 )vin
(t t6 ) + ipri(1) (t6 ).
Llkg
(5)
Mode 8 (t7 t8 ): When the main switch M1 is turned on at t7 ,
this mode begins. The primary current, that was flowing though
the body diode of M1 in the previous mode changes the path
to the channel of switch M1 . The primary current in this mode
is expressed the same as that of the previous equation (5). This
mode continues until following condition is satisfied:
ipri(1) (t) =
(6)
vin
n1
2
1
De +
n2
2
( n1 , n2 1)
(7)
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Fig. 5.
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(11)
LO =
(12)
D. Component Stress
NS
vO
=2
D(1 D).
vin
NP
(8)
ILm ,conventional
nS
= (1 2 D)
IO .
nP
(10)
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Fig. 7.
dc conversion ratios of each converter: (a) proposed converter and (b) asymmetric half-bridge converter.
(14)
V. DESIGN CONSIDERATIONS
Fig. 8. Relation of the minimum required leakage inductance and load current
(at 700 W, Vo = 12 V spec.).
the offset current, the two switches in the same leg have different
ZVS condition. The ZVS range of one switch is increased,
but the range is decreased to the other switch in the same leg.
Thus, to achieve safe ZVS condition in both switches, following
( at, Vin,m in )
(at, Vin,m ax )
(15)
Fig. 9.
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Fig. 11. Experimental waveforms: (a) proposed converter and (b) asymmetric
half-bridge converter.
Fig. 10. Effective duty ratio at nominal operating condition for the different
turn ratio of the auxiliary transformer (at 700 W, Vo = 12 V spec.).
Fig. 12. Switch voltages of the proposed converter: (a) half-load condition
and (b) full-load condition.
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Fig. 14.
Fig. 13. Voltage regulation of the proposed converter: (a) nominal operation
(Vin = 400 V) and (b) hold-up time operation (Vin = 330 V).
ume: 5477 mm3 , : 60) cores are used in the proposed converter and the asymmetric half-bridge converter, respectively.
The switch used for the main switches in proposed converter is
IPP60R299, and IPP60R600 is used for the auxiliary switches.
In order to compare both converters in the same condition, the
same switches used in the proposed converter are adopted to parallel connected switches in the main switches of the asymmetric
half-bridge converter. Synchronous switches are also adopted in
the rectifier stage to improve efficiency of the converters. For
the control of the experimental prototypes, a UCC3895 phaseshift PWM controller is used for the proposed converter and
a IRS21844 S half-bridge driver is used for the asymmetric
half-bridge converter.
Fig. 11 shows experimental waveforms for the proposed converter and for the asymmetric half-bridge converter at nominal
load condition (12 V/58 A). The experimental results are in good
agreement with the theoretical waveforms. The ZVS condition
of the main switches in the proposed converter and the main
switches in the asymmetric half-bridge converter are designed
to operate ZVS down to half-load condition. The ZVS condition
of the proposed converter is shown in Fig. 12, and voltage regulation operation of the proposed converter is shown in Fig. 13.
As discussed earlier, the effective duty increased to its maximum value when the input voltage decreased to the minimum
operation voltage.
Fig. 14 shows the efficiency of the proposed converter, the
asymmetric half-bridge converter and the modified proposed
converter, which uses the same filter inductance with that of the
asymmetric half-bridge converter. Since the balanced components stress in the proposed converter decreases the conduction
loss of the converter, the proposed converters show higher efficiencies compared to the asymmetric half-bridge converter.
Also the efficiency graphs of the proposed converter and the
modified proposed converter verify that the characteristic of reduced filter inductance in the proposed converter helps decrease
the loss of the filter inductor.
Efficiency comparisons.
VII. CONCLUSION
A new multilevel half-bridge converter was presented and analyzed. By employing one small subtransformer and two small
additional switches, the proposed converter shows better performance than the asymmetric half-bridge converter in entire load
range. The proposed converter has lower conduction loss and requires smaller filter inductance than the asymmetric half-bridge
converter. Also, it achieves good ZVS condition, and its symmetrical operation characteristic balances the voltage/current
stresses on its components and eliminates the dc offset of magnetizing current, which degrade the utilization of the transformer.
Therefore, the proposed converter can be selected as a good
candidate in middle power server system.
REFERENCES
[1] J. P. Bryant, AC-DC power supply growth variation in China and North
America, in Proc. Appl. Power Electron. Conf. Expo., 2005, pp. 159162.
[2] L. H. Mweene, C. A. Wright, and M. F. Schlecht, A 1 kW 500 kHz
front-end converter for a distributed power supply system, IEEE Trans.
Power Electron., vol. 6, no. 3, pp. 398407, Jul. 1991.
[3] C. Calwell, A. Mansoor, E. Consulting, and C. O. Durango, AC-DC
server power supplies: Making the leap to higher efficiency, in Proc.
Appl. Power Electron. Conf. Expo., 2005, pp. 155158.
[4] K. G. Brill. (2007). Data center energy efficiency and productivity.
presented at the Uptime Institute Symposium 2007 [Online]. Available:
www.energystar.gov/ia/products/downloads/WF_3_Handout_DataCenter
_efficiency.pdf
[5] F. C. Lee, P. Barbosa, P. Xu, J. Zhang, B. Yang, and F. Canales, Topologies and design considerations for distributed power system applications,
Proc. IEEE, vol. 89, no. 6, pp. 939950, Jun. 2001.
[6] J. A. Sabate, V. Vlatkovic, R. B. Ridley, F. C. Lee, and B. H. Cho, Design considerations for high-voltage high-power full-bridge zero-voltageswitched PWM converter, in Proc. Appl. Power Electron. Conf. Expo.,
1990, pp. 275284.
[7] C. Zhao, X. Wu, P. Meng, and Z. Qian, Optimum design consideration and
implementation of a novel synchronous rectified soft-switched phase-shift
full-bridge converter for low-output-voltage high-output-current applications, IEEE Trans. Power Electron., vol. 24, no. 2, pp. 388397, Feb.
2009.
[8] X. Wu, X. Xie, J. Zhang, R. Zhao, and Z. Qian, Soft switched full bridge
DC-DC converter with reduced circulating loss and filter requirement,
IEEE Trans. Power Electron., vol. 22, no. 5, pp. 19491955, Sep. 2007.
[9] J. Zhang, X. Xie, X. Wu, and Z. Qian, A novel zero-current-transition full
bridge DC/DC converter, IEEE Trans. Power Electron., vol. 21, no. 2,
pp. 354360, Mar. 2006.
[10] W. Li and X. He, A family of interleaved DC-DC converters deduced
[11]
[12]
[13]
[14]
[15]
[16]
[17]
[18]
[19]
[20]
[21]
[22]
[23]
[24]
[25]
[26]
[27]
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