Fall 2016
Electrical and Computing Fundamentals
Exam-Aid Instructors:
Joshua Jaekel
Austin Liolli
()
= () + (0 )
0
Ohms Law
1. The product of the current through and element and the resistance of that
element is the voltage difference across that element.
a. =
Kirchoffs Current Law (KCL)
1. The sum of current into or out of a node must be zero.
a. This law is another way to state the conservation of charge law
Kirchoffs Voltage Law (KVL)
1. The sum of voltages around a closed loop must be zero.
a. This law is another way to state the conservation of energy law
POWER
1. The power (measured in Watts) consumed by an element in an electric
circuit is the product of the voltage across that element and the current
through it.
a. =
2. Using Ohms Law we can rearrange this equation in the following ways.
a. = 2
b. =
3. If current flows into the positive terminal of an element, we saw the power
is absorbed by that element. In an equation, this term is positive.
4. If current exits the positive terminal of an element, power is suppled by
that element. In an equation, this is represented with a negative sign.
5. For any electric circuits, the sum of all powers (absorbed and supplied) is
equal to 0. This is the conservation of energy law.
Example:
Find the power absorbed by each element.
1. In the left branch, we have an 8A current
exiting the positive terminal of a current
source. The voltage across the current
source is 9V.
a. || = 9 8 = 72
b. = 72 The power absorbed is negative, since the current is
exiting the positive terminal.
2. In the centre branch, we have 2A of current entering the positive terminal
of an element with 9V going across it.
a. || = 9 2 = 18
b. = 18 The power absorbed is positive since current is entering
the positive terminal of the element.
3. In the left branch, we have 6A of current. This can easily be derived from a
KCL at the top of the circuit. This current is first passing into the positive
terminal of an element with a voltage of 3V across it.
a. || = 3 6 = 18
b. = 18 The power absorbed is positive since current is entering
the positive terminal of the element.
4. Finally, we have the same 6A of current entering the positive terminal of a
6V voltage source.
a. || = 6 6 = 36
b. = 36 The power absorbed in positive sine current is entering the
positive terminal of the voltage source.
5. As a sanity check, we can see that the sum of absorbed power for all
elements in the circuit is in fact equal to 0.
1
1
1
2
+ +
(1)(2)
1+2
2. Multiple resistors are in series if they share the same current passing
through them. See Figure 2.
a. To find an equivalent resistance, we simple add all the resistances
together. = 1 + 2 + +
Figure 2
Figure 1
Current Divider:
1. The current divider can be used when there is one current entering a node
that splits into two branches. The current divider allows us to quickly
calculate the current that goes down each branch.
a. The current divider is a useful trick, but its never necessary to
memorize. In a few more steps you can arrive at the same
relationship using nodal analysis.
2. In reference to Figure 1:
a. The current i1 is given by: [
b. The current i2 is given by [
2
1+2
1
1+2
Voltage divider:
1. The voltage divider can be used when there is a known voltage drop
happening over two resistors in series. The voltage divider allows us to find
the voltage in between these two resistors, and consequently the voltage
drop across each resistor.
a. Similar to the current divider, the voltage divider is never necessary
to memorize if you know how to derive it from KVL.
2. In reference to Figure 2:
a. The voltage V2 is given by: 2 = [
b. The voltage V1 is given by: 1 = [
1+2
1
1+2
Wye-Delta Transformations
Figure 3- Y or T configuration
Figure 4- Delta or Pi
configuration
1. Being able to transform between Wye and Delta configurations can make
solving circuits significantly easier.
2. Consider the follow two circuits (Figure 5 and 6), as an example to illustrate
how wye-delta transformations can help circuit analysis. They are
equivalent circuits, before and after the transformation.
Figure 5
Figure 6
4. The following equations allow you to transfer between Delta and Wye.
5.
If the load is balanced (which means all 3 resistances are equal), we can use the following
relationship:
Figure 1- Although this circuit contains 3 loops and 3 nodes, the 24V
voltage source immediately solves for one of the node voltages. This
would make nodal analysis slightly quicker.
MESH ANALYSIS
1. The first step is to draw and label the currents in your loops. Pick a
direction (usually clockwise) and draw all loop currents in that direction.
a. Dont worry about what directions current is actually flowing. If we
assign the wrong direction in this step, we will simply be left with a
negative sign in our final answer.
2. Draw an arrow beside voltage sources (dependent and independent) from
the positive terminal towards the negative
terminal.
a. When we sum the voltages across the
loop, if the arrow is in the same the
direction as our drawn current we add
Figure 2-If we were performing mesh analysis,
the voltage
the current in the right most loop could
be solved as 3A (or negative -3A,
b. If the arrow opposes the direction of immediately
depending on which direction you drew the
current).
our drawn current, we will subtract
the voltage.
3. Check for super-meshes. (See Figure 4)
a. A super mesh occurs when there is a current source (independent or
dependent), in a branch shared by two loops.
b. If the current source is in parallel with another element (usually a
resistor), it is not a super-mesh.
No super-meshes:
4. Go around the loops and create
equations using KVL.
a. Start with 0= on the left side of
the equation.
b. When you cross a resistor add
(i*R) to the right side
Figure 3
i. If the resistor is in a branch
shared between two loops make sure you are using the correct
current when you evaluate i*R
ii. Usually, if you are doing KVL around loop 1, and there is shared
branch between loop 1 and loop2 the current in that branch is:
(i1-i2). However, always quickly confirm using KCL.
c. If you pass a voltage source, add or subtract it from the right side
according to the rules specified in Step 2.
d. If there is a current source contained solely in one of the loops
(meaning it is not shared between multiple loops), we can simply set
the current of that loop equal the value of the current source. (See
Figure 2)
5. Solve your system of equations.
6. Using the currents youve just solved for, evaluate whatever parameter the
question is asking for.
7. As an example, the three equations obtained from the circuit shown in
Figure 3 are:
a. 0 = (1) 1 12 + (1) (1 2 ) + 10 12
b. 0 = (1) 2 12 + (1) (2 3 ) 10 + (1) (2 1 )
c. 0 = (1) 3 12 + (1) (3 2 )
With a super-mesh:
4. In your mind, picture the two loops being
combined together to form one, big loop.
We will be performing KVL around the
perimeter of this newly formed big loop.
5. Using the same procedure listed under
Step 4 of the No super-mesh section
we will evaluate the KVL.
Figure 4- A super mesh is formed by combining
a. Remember that the current across loop's 1 and 2.
the resistors is not the same
everywhere in the big loop. If the resistor belonged to loop 1, we will
call the voltage drop i1*R. Similarly, if it belonged to the second loop
we will call it i2*R.
b. If the newly created big loop shares any branches with other loops,
pay attention to the current in those shared branched. Always check
using KCL.
6. After youve got a KVL equation for each loop in the circuit, including we
the super-mesh, we need to come up with one other equation to solve the
values.
a. The final equation will be derived from the current in the branch
inside of the super-mesh. We will set the value of the current source
equal to the current in the branch described in terms of mesh
current. For an example see equation iii. below.
b. For Figure 4, the mesh equations will be:
i. 0 = (2) ( 3 ) + (4) (2 3 ) + (8) 2 8
ii. 0 = (2) 3 + (4) (3 2 ) + (2) (3 1 )
iii. 4 = 2
NODAL ANALYSIS
1. Identify the nodes in your circuit and label them. Usually V1, V2,etc
a. A node connects two or more branches.
b. A node can include multiple junction points, as long as there are no
elements between them. (See top node in Figure 1)
2. Select a node to be your ground. This is almost always the bottom of your
circuit. The ground node is defined as having a voltage of 0.
3. Check for super-nodes.
a. A super-node is any two nodes (not including the ground node)
separated by a voltage source (dependent or independent).
b. If there is a resistor in series with the voltage source, it is not a supernode. (See Figure 7)
No super-nodes:
4. At each node (excluding ground) we will setup a KCL equation. This means
that the sum of currents leaving a node is equal to 0.
a. Begin with the left side of your equation as 0=
b. Each branch coming out of the node will give a term in your
equation.
c. Each branch is contained between two nodes: the one youre
examining and some other one (it can be ground or another node in
your circuit). Identify these two nodes.
d. Each term of your equation (unless there is a current source in the
+
the voltage of the node you are performing KCL on, vy is the voltage
at the other end of the branch (which is 0 if the other end of the
branch is at ground), C is the sum of voltage sources in the branch
(sub-step e. will clarify the sign of this term), and R is the sum of all
the resistances in that branch. For each branch coming out of a node,
add this term to the right side of your equation.
e. If there is a voltage source between two nodes, in series with some
+
sign of C is the sign of the terminal farther from the node we are
performing KCL on. If there are no voltage sources, C is simply 0.
5. If there is a current source in one of the branches, we simply use the value
of that current as the term for that branch.
a. Keep in mind we are summing the
currents exiting a node, so any
current entering the node should be
subtracted from the right side of the
equation, and any current leaving
should be added.
6. After performing KVL at each of your
Figure 5-When performing KCL at the
nodes, solve the system of linear
highlighted node, the term we add to account
equations.
for the upper branch is simply 4.
a. Substitution/Elimination if you can
b. Gauss-Jordan matrix reduction if the system is too complicated
With super-nodes
4. Identify the super-node(s), and all the
current exiting the super-node. The
sum of these currents must be equal
to 0.
5. Identify all normal nodes, and all the
current leaving those nodes.
6. Using to same process described in
step 4 if the No super-nodes
section, we do KCL at each node.
Figure 6-Even though they aren't directly beside each other,
7. We treat the super-node as if it were nodes 1 and 3 still form a super-node The sum of the currents
exiting the super-node (shown) must be equal to 0.
any other node, and sum the currents
exiting it and set it equal to 0.
a. In Figure 6 the equation we
would get at the super-node is:
0
0
0 = 1 2 + 1 + 3 2+ 3
2
4
2
8
8. We must create an extra equation in
order to solve our system. This equation
Figure 7- Unlike Figure 5, this is NOT a supercomes from the voltage difference
node, because there is a resistor in series with
between the two nodes in our superthe voltage source.
node.
ANALYSIS BY INSPECTION
Analysis by inspection is a short-cut which can save you a few steps when solving
the circuit. If you understand the fundamentals of nodal and mesh analysis, then
analysis by inspection will come very easily to you. Analysis by inspection can
only be done if all sources are independent. For this session, we will cover nodal
analysis by inspection.
We will also use the term conductance a lot in this section. Remember that
conductance is simply the inverse of resistance. An element with a resistance of
10, has a conductance of 0.1-1.
Figure 8
Example (Figure 8)
1. The two non-reference nodes are labeled. We will first construct the first
1
1
+
2 4
2. Next we will fill in the remaining positions in the matrix. Both these
1
2 ]
1
1
+
2 4
6
]
9
To solve this system using Cramers rule, we will create three different matrices,
and take the determinant of each.
The first matrix is simply our unmodified conductance matrix. The determinant is
shown below:
1
1
1
1
( +
+
)
( )
2 | = ( 1 + 1 + 1 ) ( 1 + 1 ) ( 1 ) ( 1 )
= | 2 5 10
1
1
1
2 5 10
2 4
2
2
( )
( + )
2
2 4
= 0.35
The second matrix is the conductance matrix with the first column substituted
with the current vector.
1
6
( )
2 | = (6) ( 1 + 1 ) ( 1 ) 9
1 = |
1
1
2 4
2
9 ( + )
2 4
1 = 0
The third matrix is the conductance matrix with the current vector substituted
for second column of the matrix.
1
1
1
( +
+
)
2
5
10
2 = |
1
( )
2
6
1
1
1
1
|=( +
+
) (9) (6) ( )
2 5 10
2
9
2 = 4.2
By Crammers rule:
1 =
1
0
=
= 0
0.35
2 =
2
4.2
=
= 12
0.35
TRANSISTORS
1. For the purposes of this course, we will only consider BJT
transistors operating under DC currents.
2. Transistors are three terminal devices. BJTs have a base,
a collector and an emitter.
a. Each transistor has a specific value , known as
the common-emitter current gain. This value is
Figure 1
usually given to you if you need to solve a
question.
b. There are several important relationships that help solve BJT
transistor problems.
i. =
ii.
iii.
iv.
v.
+1
or =
=
=
= (1 + )
= = 0.7(In saturation)
3. With BJT transistors, if you can find a value for either of the 3 currents, you
can solve for all of them. This is why the first step in solving most BJT
problems is to try and find any currents you can solve for immediately.
a. For the questions shown in Figure 2,
we can immediately solve for IE, since
we know vo and the resistance
connected to the emitter.
4
=
= 8
500
After solving for IE, the rest of the
question is simple circuit analysis
Figure 2
4. Some more complex BJT circuits do not have any transistor current which
are immediately obvious. In these cases we can try and perform some sort
of nodal or mesh analysis in order to algebraically solve for them.
a. For the question shown in Figure 3, we can obtain the following
equation from a KCL at the base of the transistor:
0=
b. We also know that: =
3
+
+
2
6
400
Figure 3
Thevenins Theorem
Thevenins theorem states that any voltage sources, resistances, current sources and any other
impedance elements can be replaced by an equivalent single resistance (Rth) and single voltage
source (Vth) in series. Rth is found by taking the open circuit voltage and short circuit current of
the system with the critical element taken out of the circuit.
1. The first step to Thevenins is to create breaks or cut, the circuit around the element or
area you wish to take the equivalent circuit of.
2. Leaving all other resistances and voltage sources intact, the open circuit voltage (VOC) is
calculated across the cut terminals using nodal analysis.
10
10
VOC
10
20
20
20
10
=0
20
= 10 + 20
Voc = Vth =
400
30
3. Next, the open circuit is closed by connecting a wire between A and B making a short
circuit. The current through this wire is found, Isc.
100
Isc
Isc = 10 +
Isc = 2A
200
20
4. Rth = Voc/Isc =
Voc = Vth =
400
60
400
30
V (step 2)
I = +
and
P = I2 RL
Where RL is the resistance that the thevenins circuit was taken around. The maximum power
transferred to the load resistor RL is found when:
RL = Rth
Nortons Equivalent Circuit
In Nortons equivalent circuit, the entire circuit outside of a focus point (similar to thevenins) can
be replaced by a single resistor (RN) and a single current source (IN) in parallel.
1. Follow steps 1-3 in thevenins equivalent circuit to find Voc and Isc around a load resistor
RL.
2. Solve for RN same as Rth:
RN = Voc/Isc
Isc = IN
The equivalent circuit is represented as:
Source Transformation
A source transformation is the relationship between a voltage or current source with a resistor.
The theory is that a voltage source in series with a resistor can also be modelled by a current
source in parallel with that same resistor. It is also opposite for the current source in parallel with
a resistor to be modelled as that voltage source in series. In the below figure it shown for the
transformation between the two sources.
The direction of the voltage or current source is dependent upon the direction of the
transformation. The positive terminal of the voltage source must coincide with the arrowhead of
the current source. As shown on the left there is a 4V voltage source and a 6 resistor in series.
The value of the equivalent current source is:
I = 4V/6
I= 2/3A
And the resistance value stays the same and is placed in parallel.
The same is also true for a current and resistor in parallel as shown on the right. The
transformation back to a voltage source is:
V=2/3(6)
=4V
The resistance value stays the same and is placed in series.
Voltage and current sources can also be added together. It all depends on the direction of the
voltage terminals.
Vt = 8/3 + 8 = 32/3 V
In the above example the voltage sources are in the same direction, so the resulting source will
also have the same direction. If one of the sources is flipped then the resulting source will follow
the sign direction of the result.
Superposition
The theory of superposition is that multiple gain values can be calculated, ignoring and
acknowledging specific elements, and the sum of those gain values is the overall gain. This is
done by looking at each individual input voltage and its gain separately and summing them
together.
That is, the final Vout value can be found by cutting each individual branch off and looking at its
gain:
1
1
= 1
2
2
= 2
3
3
= 3
Vout = 1 1 + 2 2 + 3 3
This is for an inverting summing amplifier.
OP-AMPS
1. Operational amplifiers act as voltage controlled voltage source. They can
operate in two main modes:
a. Open-loop: The op-amp simply amplifies the difference between the
two inputs by the open-loop gain, A.
i. Ideal op-amps have an open-loop gain of infinity. Non-ideal opamps have a very large open loop gain. The maximum voltage that
can appear the the output of an non-ideal op-amp is +Vcc,, and the
lowest voltage is -Vcc.
b. Closed-loop: This is the more common configuration, and will be the
focus of most of our discussions. There is a feedback resistor
connected between the output and inverting terminal of the op-amp.
In this configuration we can make the following assumptions. Based
on these assumptions we can apply basic circuit analysis techniques
and solve most op-amp circuits.
i. The inverting and non-inverting nodes are at the same voltage.
ii. No current can flow into or out of the the inverting and noninverting nodes.
Consider the op-amp circuit shown in Figure 1. The non-inverting node voltage
will be indicated by v+ and the inverting node voltage indicated by v-. We will
assume the this is an ideal op-amp.
Figure 1
Performing nodal analysis at the non-inverting node gives the following equation:
+ = 4
4 6 4
+
4
10
2
4
+
) 10
4 10
= 1
Almost all op-amp problems are solved using this method. In general, to solve opamp problems use the following steps:
1.
2.
3.
4.
5.
There are a few common op-amp configurations that come up often. Being able
to recognize these configurations can save time and make analysis easier, but it is
not necessary. You can find out all necessary parameters using circuit analysis
techniques.
Inverting Configuration
Non-Inverting Configuration
Summing Amplifier
To solve the summing amplifier using circuit analysis, it is useful to use superposition and
analyze the circuit one voltage source at a time.
Capacitors/Inductors
1. Capacitors and inductors are elements in a circuit which can store
energy over time. There are several important characteristics of
capacitors make solving circuits much easier:
a. To DC power (current/voltage is constant), the steady state
Figure 1- A Capacitor
behavior of a capacitor is an open circuit. This means no
current can pass through the capacitor. Steady state behavior
simply means the behavior after it has been exposed to DC power for
a long time.
b. Current across a capacitor is given by the following equation:
Figure 3
Figure 4
b. Equivalent Capacitance
i. Finding equivalent capacitance is almost the opposite as
finding equivalent resistance. This means capacitance in
parallel, and the inverse of capacitance adds in series.
1
1
1
1
ii. In series:
= + + +
iii. In parallel: = 1 + 2 + +
c. Equivalent Inductance
i. Finding equivalent inductance is very similar to finding
equivalent resistance. This means that inductances add in
series and the inverse of inductances add in parallel.
1
1
1
1
ii. In parallel:
= + + +
iii. In series: = 1 + 2 + +
i. () = () + [ (0) ()]