Applications
Digital Offset and Gain Adjustment
Features
10-Bit DAC with Configurable Output Amplifier
+5V Single-Supply Operation
Low Supply Current
0.28mA Normal Operation
2A Shutdown Mode
Available in 8-Pin MAX
Power-On Reset Clears DAC Output to Zero
SPI/QSPI/MICROWIRE Compatible
Schmitt-Trigger Digital Inputs for Direct
Optocoupler Interface
_________________Ordering Information
PART
TEMP. RANGE
PIN-PACKAGE
MAX5304CUA
0C to +70C
8 MAX
Microprocessor-Controlled Systems
MAX5304EUA
-40C to +85C
8 MAX
Functional Diagram
VDD
GND
REF
Pin Configuration
TOP VIEW
FB
DAC
REGISTER
OUT
DAC
CONTROL
DIN
SCLK
VDD
GND
DIN 3
REF
SCLK 4
FB
CS 2
INPUT
REGISTER
CS
OUT 1
16-BIT
SHIFT
REGISTER
MAX5304
MAX5304
MAX
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
MAX5304
General Description
The MAX5304 combines a low-power, voltage-output,
10-bit digital-to-analog converter (DAC) and a precision
output amplifier in an 8-pin MAX package. It operates
from a single +5V supply, drawing less than 280A of
supply current.
The output amplifiers inverting input is available to the
user, allowing specific gain configurations, remote
sensing, and high output-current capability. This makes
the MAX5304 ideal for a wide range of applications,
including industrial process control. Other features
include a software shutdown and power-on reset.
The serial interface is SPI/QSPI/MICROWIRE
compatible. The DAC has a double-buffered input,
organized as an input register followed by a DAC register. A 16-bit serial word loads data into the input register. The DAC register can be updated independently or
simultaneously with the input register. All logic inputs
are TTL/CMOS-logic compatible and buffered with
Schmitt triggers to allow direct interfacing to optocouplers.
MAX5304
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 8, VDD = +5V 10%, VREF = +2.5V, RL = 5k, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted. Typical values
are at TA = +25C. Output buffer connected in unity-gain configuration.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
1.0
LSB
LSB
Differential Nonlinearity
DNL
Integral Nonlinearity
(Note 1)
INL
Offset Error
Offset-Error Tempco
Gain Error (Note 1)
10
VOS
0.3
TCVOS
GE
-0.3
Gain-Error Tempco
Power-Supply Rejection Ratio
Bits
Guaranteed monotonic
8
2
1
PSRR
mV
ppm/C
LSB
ppm/C
800
V/V
REFERENCE INPUT
Reference Input Range
VREF
RREF
0
Code dependent, minimum at code 1550 hex
18
VDD - 1.4
30
MULTIPLYING-MODE PERFORMANCE
Reference -3dB Bandwidth
VREF = 0.67Vp-p
650
kHz
Reference Feedthrough
-84
dB
77
dB
Signal-to-Noise Plus
Distortion Ratio
SINAD
DIGITAL INPUTS
Input High Voltage
VIH
VIL
IIN
Input Capacitance
CIN
2.4
VIN = 0 or VDD
V
0.001
8
_______________________________________________________________________________________
0.8
0.5
A
pF
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INPUTS
DYNAMIC
PERFORMANCE
Voltage Output Slew Rate
SR
Rail-to-rail (Note 2)
0.6
V/s
10
0 to VDD
Current into FB
0.001
Start-Up Time
20
nVs
Digital Feedthrough
0.1
POWER SUPPLIES
Supply Voltage
VDD
Supply Current
IDD
4.5
(Note 3)
5.5
0.4
mA
20
0.001
0.5
0.28
(Note 3)
tCP
100
ns
tCH
40
ns
tCL
40
ns
tCSS
40
ns
tCSH
ns
tDS
40
ns
tDH
ns
tCS0
40
ns
tCS1
40
ns
tCSW
100
ns
_______________________________________________________________________________________
MAX5304
-0.025
360
SUPPLY CURRENT (A)
RL =
380
-4
0.025
INL (LSB)
400
MAX5304-02
MAX5304-01
0.050
SUPPLY CURRENT
vs. TEMPERATURE
MAX5304-03
INTEGRAL NONLINEARITY
vs. REFERENCE VOLTAGE
-8
-12
-16
340
320
300
280
260
240
220
-20
0.4
1.2
2.0
2.8
3.6
4.4
500k
1M
200
-60
3M
-20
60
100
140
MAX5304-05
500
MAX5304-04
20
TEMPERATURE (C)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
10
450
-55
400
7
6
5
4
3
-60
350
300
250
200
20
60
100
-90
4.0
140
4.4
4.8
5.2
5.6
100
10
TEMPERATURE (C)
FREQUENCY (kHz)
OUTPUT VOLTAGE
vs. LOAD
REFERENCE FEEDTHROUGH
AT 1kHz
-60
-80
2.49972
2.49968
2.49964
2.7
3.8
FREQUENCY (kHz)
4.9
6.0
2.49956
0.1k
-40
-60
OUTPUT FEEDTHROUGH
-80
2.49960
-100
-40
MAX5304-09a/09b
2.49976
OUTPUT VOLTAGE (V)
-20
2.49980
MAX5304-08
VREF = +3.6Vp-p
CODE = FULL SCALE
fIN = 1kHz
1.6
6.0
0.5
-75
-80
0
-20
-70
-85
50
1
0
-60
-65
150
100
MAX5304-07
2.5M
FREQUENCY (Hz)
2M
1.5M
MAX5304-06
-0.050
MAX5304
-100
1k
10k
LOAD ()
100k
1M
0.5
1.6
2.7
3.8
FREQUENCY (kHz)
_______________________________________________________________________________________
4.9
6.0
MAX5304-10a
MAJOR-CARRY TRANSITION
CS
5V/div
SCLK
2V/div
OUT
AC-COUPLED
100mV/div
OUT
AC-COUPLED
10mV/div
CODE = 512
10s/div
2s/div
CS = 5V
MAX5304-12a
DYNAMIC RESPONSE
OUT
1V/div
GND
10s/div
GAIN = +2V/V, SWITCHING FROM CODE 0 TO 1005
_______________________________________________________________________________________
MAX5304
MAX5304
PIN
NAME
FUNCTION
OUT
CS
DIN
Serial-Data Input
SCLK
Serial-Clock Input
FB
REF
REF
GND
Ground
AGND
VDD
2R
2R
2R
OUT
2R
2R
MSB
_______________Detailed Description
The MAX5304 contains a voltage-output digital-to-analog converter (DAC) that is easily addressed using a
simple 3-wire serial interface. Each IC includes a 16-bit
shift register, and has a double-buffered input composed of an input register and a DAC register (see the
Functional Diagram). In addition to the voltage output,
the amplifiers negative input is available to the user.
The DAC is an inverted R-2R ladder network that converts a digital input (10 data bits plus 3 sub-bits) into an
equivalent analog output voltage in proportion to the
applied reference voltage. Figure 1 shows a simplified
circuit diagram of the DAC.
Reference Inputs
The reference input accepts positive DC and AC signals. The voltage at the reference input sets the fullscale output voltage for the DAC. The reference input
voltage range is 0V to (VDD - 1.4V). The output voltage
(VOUT) is represented by a digitally programmable voltage source, as expressed in the following equation:
VOUT = (VREF NB / 1024) Gain
where NB is the numeric value of the DACs binary
input code (0 to 1023), VREF is the reference voltage,
and Gain is the externally set voltage gain.
The impedance at the reference input is code dependent, ranging from a low value of 18k when the DAC
has an input code of 1550 hex, to a high value exceeding several gigohms (leakage currents) with an input
code of 0000 hex. Because the input impedance at the
reference pin is code dependent, load regulation of the
reference source is important.
6
Output Amplifier
The MAX5304s DAC output is internally buffered by a
precision amplifier with a typical slew rate of 0.6V/s.
Access to the output amplifiers inverting input provides
the user greater flexibility in output gain setting/signal
conditioning (see the Applications Information section).
With a full-scale transition at the MAX5304 output, the
typical settling time to 1/2LSB is 10s when loaded
with 5k in parallel with 100pF (loads less than 2k
degrade performance).
The amplifiers output dynamic responses and settling
performances are shown in the Typical Operating
Characteristics.
Shutdown Mode
The MAX5304 features a software-programmable shutdown that reduces supply current to a typical value of
4A. Writing 111X XXXX XXXX XXXX as the input-control word puts the device in shutdown mode (Table 1).
_______________________________________________________________________________________
MAX5304
SCLK
SK
DIN
SO
CS
I/O
MAX5304
In shutdown mode, the amplifiers output and the reference input enter a high-impedance state. The serial
interface remains active. Data in the input register is
retained in shutdown, allowing the MAX5304 to recall
the output state prior to entering shutdown. Exit shutdown mode by either recalling the previous configuration or updating the DAC with new data. When
powering up the device or bringing it out of shutdown,
allow 20s for the outputs to stabilize.
MICROWIRE
PORT
Serial-Interface Configurations
The MAX5304s 3-wire serial interface is compatible
with MICROWIRE (Figure 2) and SPI/QSPI (Figure 3).
The serial-input word consists of three control bits followed by 10+3 data bits (MSB first), as shown in Figure
4. The 3-bit control code determines the MAX5304s
response outlined in Table 1.
The MAX5304s digital inputs are double buffered.
Depending on the command issued through the serial
interface, the input register can be loaded without
affecting the DAC register, the DAC register can be
loaded directly, or the DAC register can be updated
from the input register (Table 1).
+5V
Serial-Interface Description
The MAX5304 requires 16 bits of serial data. Table 1
lists the serial-interface programming commands. For
certain commands, the 10+3 data bits are dont
cares. Data is sent MSB first and can be sent in two 8bit packets or one 16-bit word (CS must remain low
until 16 bits are transferred). The serial data is composed of three control bits (C2, C1, C0), followed by
the 10+3 data bits D9...D0, S2, S1, S0 (Figure 4). Set
the sub-bits (S2, S1, S0) to zero. The 3-bit control code
determines the register to be updated and the configuration when exiting shutdown.
Figure 5 shows the serial-interface timing requirements.
The chip-select pin (CS) must be low to enable the
DACs serial interface. When CS is high, the interface
control circuitry is disabled. CS must go low at least
tCSS before the rising serial-clock (SCLK) edge to properly clock in the first bit. When CS is low, data is
clocked into the internal shift register through the serialdata input pin (DIN) on SCLKs rising edge. The maximum guaranteed clock frequency is 10MHz. Data is
latched into the MAX5304 input/DAC register on CSs
rising edge.
SS
DIN
MAX5304
MOSI
SCLK
SCK
CS
SPI/QSPI
PORT
I/O
CPOL = 0, CPHA = 0
MSB ..................................................................................LSB
16 Bits of Serial Data
Control
Bits
C2
C1
Data Bits
MSB............................LSB Sub-Bits
C0
3 Control
Bits
_______________________________________________________________________________________
MAX5304
FUNCTION
C0
D9.......................D0
MSB
LSB
S2...S0
10 bits of data
000
10 bits of data
000
XXXXXXXXXX
XXX
Update DAC register from input register (also exit shutdown; recall
previous state).
XXXXXXXXXX
XXX
Shutdown
XXXXXXXXXX
XXX
No operation (NOP)
X = Dont care
CS
COMMAND
EXECUTED
SCLK
1
DIN
8
C1
C2
C0
D9
D8
D7
D6
D5
9
D4
16
D3
D2
D1
D0
S2
S1
S0
tCSW
CS
tCSO
tCSS
tCL
tCH
tCP
tCSH
tCS1
SCLK
tDS
tDH
DIN
_______________________________________________________________________________________
DIN
SCLK
CS1
CS2
TO OTHER
SERIAL DEVICES
CS3
CS
CS
CS
MAX5304
MAX5304
MAX5304
SCLK
SCLK
SCLK
DIN
DIN
DIN
Applications Information
DAC CONTENTS
LSB
11 1111 1111
(000)
1023
+VREF
1024
10 0000 0001
(000)
513
+VREF
1024
10 0000 0000
(000)
512
+ VREF
+VREF
=
2
1024
01 1111 1111
(000)
511
+VREF
1024
00 0000 0001
(000)
1
+VREF
1024
00 0000 0000
(000)
0V
Unipolar Output
For a unipolar output, the output voltage and the reference input have the same polarity. Figure 8 shows the
MAX5304 unipolar output circuit, which is also the typical operating circuit. Table 2 lists the unipolar output
codes.
Figure 9 illustrates a Rail-to-Rail output configuration.
This circuit shows the MAX5304 with the output amplifier configured for a closed-loop gain of +2V/V to provide
a 0 to 5V full-scale range when a 2.5V reference is used.
Bipolar Output
The MAX5304 output can be configured for bipolar
operation using Figure 10s circuit according to the following equation:
VOUT = VREF [(2NB / 1024) - 1]
where NB is the numeric value of the DACs binary
input code. Table 3 shows digital codes (offset binary)
and corresponding output voltages for Figure 10s circuit.
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
ANALOG OUTPUT
Using an AC Reference
In applications where the reference has AC signal components, the MAX5304 has multiplying capability within
the reference input range specifications. Figure 11
shows a technique for applying a sine-wave signal to
the reference input where the AC signal is offset before
being applied to REF. The reference voltage must
never be more negative than GND.
_______________________________________________________________________________________
MAX5304
DAC CONTENTS
LSB
11 1111 1111
ANALOG OUTPUT
511
+VREF
512
(000)
1
+VREF
512
10 0000 0001
(000)
10 0000 0000
(000)
01 1111 1111
(000)
1
-VREF
512
00 0000 0001
(000)
511
-VREF
512
00 0000 0000
(000)
0V
512
-VREF
= - VREF
512
+5V
+5V
REF
REF
VDD
VDD
FB
MAX5304
10k
FB
MAX5304
10k
DAC
OUT
GND
10
DAC
OUT
GND
______________________________________________________________________________________
+5V
R1
R2
REF
+5V
26k
AC
REFERENCE
INPUT
+5V
VDD
MAX495
500mVp-p
V+
FB
10k
VDD
REF
VOUT
DAC
OUT
DAC
V-
OUT
MAX5304
GND
MAX5304
GND
R1 = R2 = 10k 0.1%
Power-Supply Considerations
+5V
REF
VDD
VL
MAX5304
IOUT
DAC
OUT
2N3904
FB
GND
___________________Chip Information
TRANSISTOR COUNT: 3053
SUBSTRATE CONNECTED TO AGND
______________________________________________________________________________________
11
MAX5304
Package Information
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
1999 Maxim Integrated Products
Printed USA