- ® {7m MANIPAL INSTITUTE OF TECHNOLOGY Manipal University, Manipal Karnataka -576104 OURSE PLAN Depa epartment + Mechatronics Engineering Course Name & code; Digital Integrated Circuits and Applications & MTE 2105 a Semester & branch Ill Semester, Mechatronics Name of the faculty : ANSU MATHEW No of contact hours/week: 3[2 103) ASSESSMENT PLAN: 1. In Semester Assessments - 50% © Written tests 30%4(Two tests of 15 marks each) * Assignment/Quiz/ ——_,_20%(5.nos, of assignments/quizzes of & marks each) Seminar 2. End Semester Examination - 50% * Written examination of 3 hours duration (Max. Marks: 50 ) Portions for Assignment/Quiz/Seminar etc. SI. no. Topics/Lessons L1-Lo6 Lo7-L14 LisL22 123-130 131-136 Portions for Sessional Test Test no. Topics/Lessons wlalely|a 1 Lo1—L14 ce — Z 15-130Course Outcomes (COs) ~ | ‘At the end of this course, the student should be able to: | No. of Proran— | Contact | Outcomes (Pos) | Hours addressed CON | pescrive various binary number systems,binary codes and its application in digital og POR tsi { €O2) | Analyse and design combinational circults by using the principles of minimization of 49 |P02,Po3 1 [pomean equations I COA: | Design of basic combinational circuits using MOS circuit | ; Fi ian of basic reuits_using MOS eireults os |PO2, POS COS; |e - C06: = ' | - - Course Plan Course L. No, 0, Topics Outcome Addressed Lo é cor L1_] Review of Number Systems & codes >) neat [bt : ig ee cot L2__| Tutorial on 1's complement and 2's complement adaition/subtraction . a cot 3 | BCD addition and subtraction | eo a cot 4 | Minimization of Boolean functions vsing Kamaugh Map(with and without Don't carea) = coz | coz co2 coz MIT/GEN/F-01/R(Cou | LNo. | fe Bo Addressed References: Donald D. Givone, “Digital Principles and Design”, Tata McGraw Hi 2. | Morris Mano, “Digital design’, 3rd Edition, Prentice Hall of In 3. |David 3 Comer, “Digital Logic State Machine Design’, rd Edition Oxford Un |A. Anand Kumar, “Switching Theory and Logic Design”, 2nd | 5. | Neil H.E Weste and Kamran Eshraghian, “Principles of C 1998. _ - _ a 6. Ze | Submitted by: Ansu Mathew UL (Signature of the factlty)Topics: Dosign of decoders & encoders -ratonal on design of combinational crcuito using MUX, DEMUX, Encoders. coders, Decoders Food for sequential circuits, Binary coll, Latches and fip tops SSR, , JK fp flops ‘Discussion on fp flop & Master slave JK flip flop Sere carne cos Tutorial Conversion of tip flops eee 7 co3 ‘Design of Asynchronous counters = 4 co3 Design of synchronous counters Ring and twisted ring counters L211 - a meee | cos a + { ; _ lS cag L 24 | State Table Reduction: Determining te equivalences pairs of slates and obtaining the equivalences clas If ° pee | cos 7 _ 4. a 1.26 _ [Desion of Snctronous Sequentl Crculs; Serial aor, sequance decor using Moore models ae : co3 .27 Tutorial on Synchronous Sequential Circuits design ‘and Operation of Asynchronous Sequential Networks ‘of Asynchronous Sequential Networks |Sequential Networks: Excitaion table, Transition table, Stato Table, Flow table, Flow Drain current Vs voltage charts, Sub threshold conduction, EquivalentTY MEMBERS “AIST TEACHING THE COURSE (IF MULTIPLE SECTIONS EXIST): FACULTY SECTION |ANSU MATHEW | x FACULTY SECTION YEDUKONDALA RAO B aR