Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
Slide Set
Data Converters
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
Summary
Introduction
Test Board
Quality and Reliability Test
Data Processing
Static DAC Testing
Dynamic DAC Testing
Static ADC Testing
Dynamic ADC Testing
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
Introduction
After a data-converter is designed and manufactured, then before it is delivered to customers, a set of measurements verifies that the performance
corresponds to the expectation.
The ATE can test a large quantity of ICs very efficiently performing hundreds of tests in a few seconds.
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
The wafer level testing screens out the bad dies. They are scraped and not
packaged. Once the good dies have been packaged, final tests are carried
out to prove their functionality after the damage due to packaging process
stress.
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
Test Board
The test board houses the IC, brings the signal and supplies into the circuit
and conveys the conversion results to the processing unit.
The design is critical as it must be able to preserve the quality of the parameters being measured.
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
Warning!
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
Be Aware
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
10
Data Processing
Suitable data processing of measured data enables estimating key specifications of a data converter.
The fitting technique from an input ramp or sine wave obtains gain, offset
and harmonic coefficients by a linear, polynomial, or sinusoidal fitting.
Further processing provides the histogram of the output (for either a ramp
or sine wave input) which obtains the DNL and, consequently, the INL.
The key techniques are discussed in the following.
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
11
Best-fit-line
Consider a sequence of n digital data Yi, i = 1, , n generated by linear
input signals covering the entire dynamic range. The fitting line is
(i) = G i + Yos
Y
(1)
n
X
1
ri2 =
n
X
n
X
i)2 =
(Yi Y
[Yi (G i + Yos)]2 .
(2)
(3)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
12
S1 = 2
n
X
S
i [Yi (G i + Yos)] = 0
= 2
G
1
(4)
n
X
S
= 2
[Yi (G i + Yos)] = 0
Yos
1
(5)
n
X
i; S2 = 2
n
X
Yi ; S 3 = 2
G=
n
X
i 2 ; S2 = 2
nS4 S1S2
;
2
nS3 S1
Yos =
S2
S
G 1
n
n
n
X
iYi
(6)
(7)
n
X
1
i)2.
wi(Yi Y
(8)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
13
(9)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
14
D0 =
cos((0T )
sin(0iT )
1
cos((20T ) sin(20iT ) 1
...
...
...
cos((M 0T ) sin(M 0iT ) 1
y=
y1
y2
...
yM
A0
x0 = B0
Yos
(y D0x0)T (y D0x0)
(10)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
15
Histogram Method
The histogram method is a statistical study of a sequence of output samples obtained with an ADC input whose magnitude distribution (or probability density function), pin(x) is known.
Pi =
Z i
(i1)
pin(x)dx;
i = 1 N;
= VF S /(N 1).
(11)
With not ideal converters the integral is between the actual code transitions
limits
Pi,r =
VL,i =
i1
X
j=1
Z V
U,i
VL,i
j ;
pin(x)dx;
VU,i = VL,i + i.
(12)
(13)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
16
Mi
;
M
Pi,r =
Mi,r
.
M
(14)
With many levels pin(x) can be assumed constant within the i-th quantization interval.
Pi = pin(VL,i);
Pi,r = pin(VL,i)i
(15)
Mi
.
M pin(VL,i)
(16)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
17
With a linear ramp or a saw tooth extended over the entire analog range)
pin(x) = 1/VF S
1
M
= i= ;
VF S
M
N
Mi,r
i
=
VF S
M
(17)
Mi,r Mi
i
DN L(i) =
=
Mi
(18)
N Mi,r
1.
DN L(i) =
M
(19)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
18
Since the accumulation of the DNL obtains the INL, the use of the histogram method determines both DNL and INL.
The accuracy of the DNL depends on the discrete number of sample per
bin and the uncertainty in the measure caused by noise and non-linearities
affecting the test signal.
The noise blurs both sides of the channel causing a DNL inaccuracy that
depends on the noise variance n,in and the number Mi,r of samples
2
2
1
n,in
+
2
DN L '
2
Mi,r 2
Mi,r
(20)
An accurate DNL measurement requires the use of a low noise test signal
or/and a large data set.
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
19
Occurrence
Input
(21)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
20
1
q
A 2 x2
x = V Vos.
Occurrence
Input
(22)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
21
"
VU,i Vos
VL,i Vos
1
arcsin
P (VL,i, VU,i) =
arcsin
A
A
A
#
(23)
PXB
XA O1 (i)
M1
2 =
PXB
XA O2 (i)
M2
(24)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
DAC
TIMING
COMPUTER
DIGITAL
VOLTMETER
BUS:
IEEE-488
USB
RS-232
22
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
23
Superposition of Errors
Assume that the converter is a linear system: the response to the addition of two inputs is the addition of the outputs with the two inputs applied
separately
Y (X) = Y (X1) + Y (X2);
X = X1 + X2.
(X) Y (X) = 1 + 2
1+2 = Y
(25)
(26)
Property used in DACs whose output is the sum of individual parts such
as, for example, the binary weighted scheme.
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
24
The superposition method (also called major carrier testing) greatly speeds
up the process in the binary weighted architecture as it requires only n
measurements instead of 2n.
For example, at half scale the code switches between all but the MSB being
1 to all but the MSB being 0.
DN L(2n1) = n
n1
X
(27)
i.
n2
X
1
i,
(28)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
25
Non-linearity Errors
The transfer characteristics Y (i), i = 0 (2n 1) give rise to the nonlinearity errors specified by the INL and the DNL.
Y (i + 1) Y (i)
DN L(i) =
i = 0 (2n 2)
(29)
The INL measures the transfer curve deviation from a reference line that
can be the best-fit line, the end-point line or the ideal DAC line
IN L(i) =
LSB.
(30)
k
X
i=1
DN L(i).
(31)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
ANALOG
CONDITIONING
DUT
LOGIC &
INTERFACE
DIGITAL
SINE WAVE
DAC
DISTORTION
ANALYZER
SPECTRUM
ANALYZER
TIMING
COMPUTER
BUS:
IEEE-488, USB
RS-232
26
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
27
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
28
Spectral Features
The output of a spectrum analyzer depends on BW as it determines
the power of the input spectrum falling within BW /2 around the swept
frequency.
With noise and sine wave at fx
A2
2
Sout(fx) = vn BW + x .
2
(32)
(33)
A2
BW << k2
2vn
(34)
that is visible if
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
29
Example 9.1
A tester measures the output of a 12-bit DAC, 1 VF S , sampled at 20 MS/s.
Determine the bandwidth of the spectrum analyzer that enables the measuring of harmonic tones 115 dB below the full scale input.
The quantization noise spectrum is given by the power 2/12 spread over
the Nyquist interval. Therefore
12
16
2
= 4.97 10
V / Hz.
24
7
12 2 10
The bandwidth that reveals tones -115 dB below the full scale sine wave
(3.95 1013V 2) is therefore 795 Hz.
2=
vn
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
Amplitude at f in 0.850 V
20
Spectrum in dB
40
SFDR
NF
60
80
3
2
100
120
0.05
0.1
0.15
0.2
0.25
0.3
0.35
Normalized Frequency
0.4
10
0.45
0.5
30
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
31
T HD = A1 10 log10
10
X
10Ai/10 .
(35)
i=2
i
SN
R/10
T
HD/10
SIN AD = 10 log10 10
+ 10
.
(36)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
32
Conversion Time
Dead
Slew
Recovery
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
33
Glitch Energy
The glitch energy is the area of the glitch impulse and is estimated from
the settling response with a mid-scale transition.
A1
+
-
+ A3
A2
A4
Glitch = A1 A2 + A3 A4
(37)
Glitch = A1
(38)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
34
For measurements oscilloscopes with fast-settling and wide-bandwidth response are necessary. The bandwidth of the oscilloscope amplifier must
be 0.35/DAC ( is a suitable margin).
If the bandwidth (or settling time) of the op-amp is not sufficient it is possible to estimate the DAC transient time by recalling that the settling are
composed quadratically; therefore
r
DAC =
2
2
meas
OpAmp
(39)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
35
ADC
TIMING
LOGIC &
INTERFACE
BUS:
IEEE-488
USB
RS-232
COMPUTER
e
p(Vn) = f (Vn, ) =
2
(40)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
36
The noise adds uncertainty to the edge measurement. The code edge for
a noisy ADC or a noisy source generator must be defined differently: is the
input voltage for which the probability of generating a given code is 1/2.
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
37
DAC
ADC
DVM
1-bit
TIMING
COMPUTER
LOGIC &
INTERFACE
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
38
Use of the histogram technique for the code edge measurement. The input
signal, as already studied, can be a linear ramp or a sine wave.
With a relatively small number of samples per bin obtains good accuracy.
The absolute value of the code edge requires knowing the possible gain
error, or the average step size
Vin(2n 1) Vin(0)
av =
.
n
2 1
(41)
The INL curve is given by the running sum of the error on the actual quantization steps
k
X MC
0
i
IN L(k) = id
k
1 M
(42)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
39
Vin
ADC
fs1
DAC
sin(x)
x
LPF
fs2
Specifications determined by signal processing using the set of digital output data.
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
40
S&H
fs1
fs2
Phase
Gen
Vin
Cell
S&H2
(a)
fs
ADC
S&H
Delay
(b)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
50W
LP/
BPF
50W
+
50W
LP/
BPF
(a)
IMPED
MATCH
VCM
BPF
ATT
50W
50W
50W
(b)
50W
50W
41
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
42
ATTEN
ADC
INTERFACE
& DSP
CLOCK
(43)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
A1
VDC
F1
F' 1
CLK
CLK
(a)
(b)
VDC
F' 1
F' 1
CLK
CLK
(c)
(b)
(d)
43
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
44
The variance H of the histogram results from the dc noise n and the
effect of the aperture uncertainty A. Since the two effects are combined
quadratically
A =
2 2.
H
n
(44)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
45
Settling-time Measure
The settling time of an ADC mainly depends on the settling response of
the sample and hold.
ADC
S&H
Vin
(a)
fs
DUT
PULSE
GEN
ADC
ATTEN
Trigger
CLOCK
VAR
DELAY
(b)
INTERFACE
& DSP
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
46
BPF
Matched
Combin.
Network
ADC
BPF
MEMORY
or
LOGIC
ANALYZER
Interface
to PC
Low Jitter
CLOCK
The acquisition board must ensure the necessary quality of input signal,
references and clock.
With two or multiple tones use matching network to avoid possible reflections and cross modulation.
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
47
Measuring the SNR at low (SNR L) and high input frequency (SNR H ) estimates the SNR reduction caused by the aperture jitter.
The noise power caused by a ji jitter in sampling a sine wave with amplitude VF S /2 and frequency fin is (VF S finij )2/2.
#
2
VF S /8
SN RL = 10 log
;
Vn2
"
"
SN RH = 10 log
VF2S /8
(47)
resulting in
2 =
ij
i
1 h SN RH /10
SN
R
/10
L
10
10
2fin
(48)
F. Maloberti
DATA CONVERTERS
Springer
2007
Chapter 9
48
Wrap-up
Testing is important either for the design (characterization: debugging of
circuits and yield improvement) and for the production.
We have seen that the test boards can change the results of the testing and
characterization. Make sure that the board and the test set-up is properly
defined.
Data processing is used to improve the testing, reduce the testing time and
extract special features.
Static dynamic and statistical measurements are the various options used
for testing.
Quality of the test signals is very important and special care is required in
their generation.