Design Domains
Levels of modeling
3 2005
Design Domains
Behavioral
Structural
Physical/Geometrical
Transistor Sticks
Standard Cells
Floor Plan
Geometric Y-chart due to
Gajski & Kahn
VHDL Quick Start 1998, Peter J. Ashenden
Behavioral Structural Geometrical
Algorithm:- Processor:- Chip floor plan:-
Set of operations to be Architecture of Mapping into chip surface
performed processor depends
Behavior of target chips on target chip
behavior
HARDWARE DESCRIPTION
LANGUAGE
(HDL)
VHDL
Verilog HDL
Comparison
System C
Design Reusability