CHAPTER-1
INTRODUCTION
The embedded software is also called firm ware. The desktop/laptop computer is a general
purpose computer. You can use it for a variety of applications such as playing games, word
processing, accounting, software development and soon.
In contrast, the software in the embedded systems is always fixed listed below:
1. They are designed to do a specific task and have real time performance constraints
which must be met.
2. They allow the system hardware to be simplified so costs are reduced.
They are usually in the form of small computerized parts in larger devices which serve a
general purpose.
Chapter-2
Microcontroller
2.1 Definition of a Microcontroller:
Microcontroller, as the name suggests, are small controllers. They are like single chip
computers that are often embedded into other systems to function as processing/controlling
unit. For example, the remote control you are using probably has microcontrollers inside that
do decoding and other controlling functions. They are also used in automobiles, washing
machines, microwave ovens, toys ... etc, where automation is needed.
Microcontrollers sometimes are called single-chip computers because they have on-
chip memory and I/O circuitry and other circuitries that enable them to function as
small standalone computers without other supporting circuitry.
Microcontrollers often use EEPROM or EPROM as their storage device to allow field
programmability so they are flexible to use. Once the program is tested to be correct
then large quantities of microcontrollers can be programmed to be used in embedded
systems.
Easy to Use
Assembly language is often used in microcontrollers and since they usually follow
RISC architecture, the instruction set is small. The development package of
microcontrollers often includes an assembler, a simulator, a programmer to "burn" the
chip and a demonstration board. Some packages include a high level language compiler
such as a C compiler and more sophisticated libraries.
A Timer module to allow the microcontroller to perform tasks for certain time periods.
A serial I/O port to allow data to flow between the microcontroller and other devices
such as a PC or another microcontroller.
An ADC to allow the microcontroller to accept analogue input data for processing.
The heart of the microcontroller is the CPU core. In the past this has traditionally
been based on an 8-bit microprocessor unit. Figure 4.1 above Shows a typical microcontroller
device and its different subunits
Microcontroller differs from a microprocessor in many ways. First and the most
important is its functionality. In order for a microprocessor to be used, other components such
as memory, or components for receiving and sending data must be added to it. In short that
means that microprocessor is the very heart of the computer. On the other hand,
microcontroller is designed to be all of that in one. No other external components are needed
for its application because all necessary peripherals are already built into it. Thus, we save the
time and space needed to construct devices.
2.3 ATMEGA8:
The Atmel AVR core combines a rich instructionset with 32 general purpose working
registes. All the 32 registers are directly connected to the ArithmeticLogic
Unit(ALU),allowing independent registers to be accessed in one single instruction executed
in one clock cycle. The resulting architecture is more code efficient while achieving
throughputs upto ten times faster than conventional CISC microcontrollers.The ATmega8
provides the following features:8Kbytes of In-System Programmable Flash with Read-
While-Write capabilities, 512bytes of EEPROM, 1Kbyte of SRAM, 23 generalpurpose
I/Olines,32general purpose working registers,three flexible Timer/Counters with compare
modes, internal and external interrupts ,a serial programmable USART,a byte oriented
Two-wire Serial Interface, a 6-channel ADC (eight channels in TQFP and QFN/MLF
packages) with 10-bit accuracy, a programmable Watchdog Timer with Internal Oscillator
,an SPI serial port, and five software selectable power saving modes. The Idle mode stops
the CPU while allowing the SRAM, Timer/Counters, SPI port, and interrupt system to
continue functioning. The Power-down mode saves the register contents but freezes the
Oscillator, disabling all other chip functions until then ext Interruptor Hardware Reset. In
Power-save mode, the asynchronous timer continues to run, allowing the user to maintain a
timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the
CPU and all I/O modules except asynchronous timer and ADC, to minimize switching noise
during ADC conversions. In Standby mode, the crystal/resonator Oscillator is running
while the rest of the device is sleeping. This allows very fast start-up combined with low-
power consumption. The device is manufactured using Atmels high density non-volatile
memory technology. The Flash Program memory can be reprogrammed In-System through
an SPI serial interface, by a conventional non-volatile memory programmer, or by an On-
chip boot program running on the AVR core. The boot program can use any interface to
download the application program in the Application Flash memory .Software in the Boot
Flash Section will continue to run while the Application Flash Section is updated, providing
true Read-While-Write operation.By combining an 8-bit RISC CPU with In-System Self-
Programmable Flash on a monolithic chip, the Atmel ATmega8 is a powerful
microcontroller that provides a highly-flexible and cost-effective solution to many embedded
control applications. The ATmega8 is supported with a full suite of program and system
development tools ,including Ccompilers, macro assemblers, program debugger/simulators,
In-Circuit Emulators, and evaluation kits. The high-performance Atmel AVR ALU operates
in direct connection with all the 32 general purpose working registers. Within a single clock
cycle, arithmetic operations between general purpose registers or between a register and an
immediate are executed.The ALU operations are divided into three main categories
arithmetic, logical, and bit-functions. Some implementations of the architecture also
provide a powerful multiplier supporting both signed/unsigned multiplication and
fractional format. For a detailed description,
RealTimeCounterwith SeparateOscillator
Three PWM Channels
8-channel ADC in TQFP and QFN/MLFpackageEightChannels10-bitAccuracy.
PowerConsumptionat4Mhz, 3V,25C
The high-performance Atmel AVR ALU operates in direct connection with all the 32
general purpose working registers.With in a single clock cycle, arithmetic operations
between general purpose registers or between a register and an immediate are executed. The
ALU operations are divided into three main categoriesarithmetic, logical, and bit-functions.
Some implementations of the architecture also provide a powerful multiplier supporting
both signed/unsigned multiplication and fractional format. For a detailed description,
TheStatus Register contains information about the resultof the most recently executed
arithmetic instruction. This information can be used for altering program flow in order to
perform conditional operations. Note that the Status Register is updated after all ALU
operations,
Status Register
The Status Register is not automatically stored when entering an interrupt routine and
restored when returning from an interrupt.This must be handled by software
GlobalInterruptEnable
The Global Interrupt Enable bit must be set for the interrupts to be enabled. The individual
interrupt enable control is then performed in separate control registers. If the Global Interrupt
Enable Register is cleared, none of the interrupts are enabled independent of the individual
interrupt enable settings. The I-bit is cleared by hardware after an interrupt has occurred, an
disset by the RETI instruction to enable subsequent interrupts. The I-bit can also be set and
cleared by the application with the SEI and CLI instructions, as described in the Instruction
Set Reference.
BitCopyStorage
The Bit Copy instructions BLD(BitLoad) and BST(BitStore) use the T-bit as source or
destination for the operated bit. A bit from a register in the Register File can be copied into T
by the BST instruction, and a bit in T can be copied into a bit in a register in the Register
File by the BLD instruction.
HalfCarryFlag
TwosComplementOverflowFlag
The Twos Complement Overflow Flag V supports twos complement arithmetic. See
the Instruction Set Description for detailed information
NegativeFlag
The Negative Flag N indicates a negative result in an arithmetic or logic operation. See
the Instruction Set Description for detailed information
ZeroFlag
The Zero Flag Z indicates a zero result in an arithmetic or logic operation. See the
Instruction Set Description for detailed information.
CarryFlag
The Carry Flag C indicates a Carry in an arithmetic or logic operation. See the Instruction
Set Description for detailed information
The Register File is optimized for the AVR Enhanced RISC instruction set. In order to
achieve the required performance and flexibility, the following input/output schemes are
supported by the Register File:
One8-bitoutputoperandandone8-
bitresultinput
Two8-bitoutputoperandsandone8-
bitresultinput
Two8-bitoutputoperandsandone16-
bitresultinput
One16-bitoutputoperandandone16-
bitresultinput
Most of the instructions operating on the Register File have direct access to all registers, and
most of them are single cycle instructions As shown in Figure, each register is also assigned
a Data memory address, mapping them directly into the first 32 locations of the user Data
Space. Although not being physically implemented as SRAM locations, this memory
organization provides great flexibility in access of the registers, as the X-pointer, Y-pointer,
and Z-pointer Registers can be set to index any register in the file
MEMORY
This section describes the different memories in the Atmel AVRATmega8. The AVR
architecture has two main memory spaces, the Data memory and the Program Memory
space. In addition, the ATmega8 features an EEPROM Memory for data storage. All three
memory spaces are linear and regular.
Most of the instructions operating on the Register File have direct access to all registers, and
most of them are single cycle instructions As shown in Figure, each register is also as signed
a Data memory address, mapping them directly into the first 32 locations of the user Data
Space. Although not being physically implemented as SRAM locations, this memory
organization provides great flexibility in access of the registers, as the X-pointer, Y-pointer,
and Z-pointer Registers can be set to index any registerin the file.
In-SystemReprogrammableFlashmemory
The ATmega8 contains 8Kbytes On-chip In-System Reprogrammable Flash memory for
pro- gram storage. Since all AVR instructions are 16-bits or 32-bits wide, the Flash is
organized as
4K 16 bits. For software security, the Flash Program memory space is divided into two
sections, Boot Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATmega8
Pro- gram Counter (PC) is 12 bits wide, thus addressing the 4K Program memory
locations. The operation of Boot Program section and associated Boot Lock Bits for
software protection are described in detail in Boot Loader Support Read-While-Write
Self-Programming
The lower 1120 Data memory locations address the Register File, the I/O Memory, and the
internal data SRAM. The first 96 locations address the Register File and I/O Memory, and
the next 1024 locations address the internal data SRAM.
The five different addressing modes for the Data memory cover: Direct, Indirect with
Displacement, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In
the Register File, registers R26 to R31 feature the indirect addressing pointer registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode reaches 63 address locations from the base address
given by the Y-register or Z-register.
When using registers indirect addressing modes with automatic pre-decrement and post-
increment, the address registers X, Y and Z are decremented or incremented
Features
10-bit Resolution
0.5 LSB Integral Non- Linearity.
2 LSB Absolute
Accuracy
13s - 260s
Conversion
Up to 15 kSPS at Maximum
Resolution
6 Multiplexed Single Ended Input
Channels
Additional Multiplexed Single Ended Input Channels (TQFP and QFN/MLF
Package only)
Optional Left Adjustment for ADC Result
Readout
0 - VCC ADC Input Voltage Range
Selectable 2.56V ADC Reference
Voltage
The ATmega8 features a 10-bit successive approximation ADC. The ADC is connected to
an 8- channel Analog Multiplexer which allows eight single-ended voltage inputs
constructed from the pins of Port C. The single-ended voltage inputs refer to 0V (GND).The
ADC contains a Sample and Hold circuit which ensures that the input voltage to the ADC is
held at a constant level during conversion. A block diagram of the ADC is shown in fig. The
ADC has a separate analog supply voltage pin, AVCC. AVCC must not differ more than
0.3V from VCC. See the paragraph ADC Noise Canceller how to connect this pin.
Internal reference voltages of nominally 2.56V or AVCC are provided On-chip. The
voltage reference may be externally decoupled at the AREF pin by a capacitor for better
noise performance.
The analog input channel is selected by writing to the MUX bits in ADMUX. Any of the
ADC input pins, as well as GND and a fixed band gap voltage reference, can be selected
as single ended inputs to the ADC. The ADC is enabled by setting the ADC Enable bit,
ADEN in ADCSRA. Volt- age reference and input channel selections will not go into
effect until ADEN is set. The ADC does not consume power when ADEN is cleared, so it
is recommended to switch off the ADC before entering power saving sleep modes.
The ADC generates a 10-bit result which is presented in the ADC Data Registers, ADCH
and ADCL. By default, the result is presented right adjusted, but can optionally be
presented left adjusted by setting the ADLAR bit in ADMUX.
If the result is left adjusted and no more than 8-bit precision is required, it is sufficient to
read ADCH. Otherwise, ADCL must be read first, then ADCH, to ensure that the content of
the Data Registers belongs to the same conversion. Once ADCL is read, ADC access to
Data Registers is blocked. This means that if ADCL has been read, and a conversion
completes before ADCH is read, neither register is updated and the result from the
conversion is lost. When ADCH is read, ADC access to the ADCH and ADCL Registers is
re-enabled.
The ADC has its own interrupt which can be triggered when a conversion completes. When
ADC access to the Data Registers is prohibited between reading of ADCH and ADCL, the
interrupt will trigger even if the result is lost.
A single conversion is started by writing a logical one to the ADC Start Conversion bit,
ADSC. This bit stays high as long as the conversion is in progress and will be cleared by
hardware when the conversion is completed. If a different data channel is selected while a
conversion is in progress, the ADC will finish the current conversion before performing the
channel change.
Free In Running mode, the ADC is constantly sampling and updating the ADC Data
Register. Free Running mode is selected by writing the ADFR bit in ADCSRA to one. The
first conversion must be started by writing a logical one to the ADSC bit in ADCSRA. In
this mode the ADC will perform successive conversions independently of whether the
ADC Interrupt Flag, ADIF is cleared or not.
The ADC module contains a prescaler, which generates an acceptable ADC clock
frequency from any CPU frequency above 100kHz. The pre scaling is set by the ADPS
bits in ADCSRA. The prescaler starts counting from the moment the ADC is switched on
by setting the ADEN bit in ADCSRA. The prescaler keeps running for as long as the ADEN
bit is set, and is continuously reset when ADEN is low.
When initiating a single ended conversion by setting the ADSC bit in ADCSRA, the
conversion starts at the following rising edge of the ADC clock cycle. A normal
conversion takes 13 ADC clock cycles. The first conversion after the ADC is switched on
(ADEN in ADCSRA is set) takes 25 ADC clock cycles in order to initialize the analog
circuitry.
The actual sample-and-hold takes place 1.5 ADC clock cycles after the start of a normal
conversion and 13.5 ADC clock cycles after the start of an first conversion. When a
conversion is complete, the result is written to the ADC Data Registers, and ADIF is set.
In single conversion mode, ADSC is cleared simultaneously. The software may then set
ADSC again, and a new conversion will be initiated on the first rising ADC clock edge.
These bits select the voltage reference for the ADC, as shown in Table 74. If these bits
are changed during a conversion, the change will not go in effect until this conversion is
complete (ADIF in ADCSRA is set). The internal voltage reference options may not be
used if an external reference voltage is being applied to the AREF pin.
The ADLAR bit affects the presentation of the ADC conversion result in the ADC
Data Register. Write one to ADLAR to left adjust the result. Otherwise, the result is right
adjusted. Changing the ADLAR bit will affect the ADC Data Register immediately,
regardless of any ongoing conversions. For a complete description of this bit, see The
ADC Data Register ADCL and ADCH on page 201.
Bits
The value of these bits selects which analog inputs are connected to the ADC. See
Table 75 for details. If these bits are changed during a conversion, the change will not go in
effect until this conversion is complete (ADIF in ADCSRA is set).
Writing this bit to one enables the ADC. By writing it to zero, the ADC is turned off.
Turning the
ADC off while a conversion is in progress, will terminate this
conversion.
In Single Conversion mode, write this bit to one to start each conversion. In Free Running
mode, write this bit to one to start the first conversion. The first conversion after ADSC has
been written after the ADC has been enabled, or if ADSC is written at the same time as the
ADC is enabled, will take 25 ADC clock cycles instead of the normal 13. This first
conversion performs initializa- tion of the ADC.
ADSC will read as one as long as a conversion is in progress. When the conversion is
complete, it returns to zero. Writing zero to this bit has no effect.
When this bit is set (one) the ADC operates in Free Running mode. In this mode, the ADC
samples and updates the Data Registers continuously. Clearing this bit (zero) will
terminate Free Running mode.
This bit is set when an ADC conversion completes and the Data Registers are updated.
Dept of ECE,MISW Page 21
Supervisory control and data acquisition
The ADC Conversion Complete Interrupt is executed if the ADIE bit and the I-bit in
SREG are set. ADIF is cleared by hardware when executing the corresponding interrupt
Handling Vector. Alter- natively, ADIF is cleared by writing a logical one to the flag.
Beware that if doing a Read-Modify- Write on ADCSRA, a pending interrupt can be
disabled. This also applies if the SBI and CBI instructions are used.
When an ADC conversion is complete, the result is found in these two registers. When
ADCL is read, the ADC Data Register is not updated until ADCH is read. Consequently, if
the result is left adjusted and no more than 8-bit precision is required, it is sufficient to
read ADCH. Otherwise, ADCL must be read first, then ADCH. The ADLAR bit in
ADMUX and the MUXn bits in ADMUX affect the way the result is read from the
registers. If ADLAR is set, the result is left adjusted. If ADLAR is cleared (default), the
result is right adjusted
Chapter-3
Hardware Implementation of the project
Now, the microcontroller has the values of parameters and this will be displayed on PC as
well as LCD. The buzzer will buzz if the sensors values exceed the threshold limit. Based
upon these values we can control the corresponding appliances like turn ON or OFF using
commands from PC.
The project design and principle are explained in this chapter using the block diagram
and circuit diagram. The block diagram discusses about the required components of the
design and working condition is explained using circuit diagram and system wiring diagram.
RELAY WATERPUMP
HUMIDITY SENSOR
BUZZER
The input to the circuit is applied from the regulated power supply. The ac input i.e.,
230V from the mains supply is step down by the transformer to 12V and is fed to a rectifier.
The output obtained from the rectifier is a pulsating dc voltage. So in order to get a pure dc
voltage, the output voltage from the rectifier is fed to a filter to remove any ac components
present even after rectification. Now, this voltage is given to a voltage regulator to obtain a
pure constant dc voltage. The block diagram of regulated power supply is shown in the figure
3.2
3.3.2 Transformer:
Usually, DC voltages are required to operate various electronic equipment and these
voltages are 5V, 9V or 12V. But these voltages cannot be obtained directly. Thus the a.c input
available at the mains supply i.e., 230V is to be brought down to the required voltage level.
This is done by a transformer. Thus, a step down transformer is employed to decrease the
voltage to a required level.
3.3.3 Rectifier:
The output from the transformer is fed to the rectifier. It converts A.C. into pulsating
D.C. The rectifier may be a half wave or a full wave rectifier. In this project, a bridge rectifier
is used because of its merits like good stability and full wave rectification.
3.3.4 Filter:
Capacitive filter is used in this project. It removes the ripples from the output of
rectifier and smoothens the D.C. Output received from this filter is constant until the mains
voltage and load is maintained constant. However, if either of the two is varied, D.C. voltage
received at this point changes. Therefore a regulator is applied at the output stage.
3.4 ATMEGA8:
The Atmel AVR core combines a rich instruction set with 32 general purpose working
registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU),
allowing two independent registers to be accessed in one single instruction executed in one
clock cycle. The resulting architecture is more code efficient while achieving throughputs
up to ten times faster than conventional CISC microcontrollers. The ATmega8 provides the
following features: 8 Kbytes of In-System Programmable Flash with Read-While-Write
capabilities, 512 bytes of EEPROM, 1 Kbyte of SRAM, 23 general purpose I/O lines, 32
general purpose working registers, three flexible Timer/Counters with compare modes,
internal and external interrupts, a serial programmable USART, a byte oriented Two- wire
Serial Interface, a 6-channel ADC (eight channels in TQFP and QFN/MLF packages) with
10-bit accuracy, a programmable Watchdog Timer with Internal Oscillator, an SPI serial
port, and five software selectable power saving modes. The Idle mode stops the CPU while
allowing the SRAM; Timer/Counters, SPI port, and interrupt system to continue functioning
3.5 RELAY :
Relay is an electromagnetic device which is used to isolate two circuits electrically
and connect them magnetically. They are very useful devices and allow one circuit to switch
another one while they are completely separate. They are often used to interface an electronic
circuit (working at a low voltage) to an electrical circuit which works at very high voltage.
For example, a relay can make a 5V DC battery circuit to switch a 230V AC mains circuit.
Thus a small sensor circuit can drive, say, a fan or an electric bulb.
A relay switch can be divided into two parts: input and output. The input section has a coil
which generates magnetic field when a small voltage from an electronic circuit is applied to
it. This voltage is called the operating voltage. Commonly used relays are available in
different configuration of operating voltages like 6V, 9V, 12V, 24V etc. The output section
Dept of ECE,MISW Page 28
Supervisory control and data acquisition
consists of contactors which connect or disconnect mechanically. In a basic relay there are
three contactors: normally open (NO), normally closed (NC) and common (COM). At no
input state, the COM is connected to NC. When the operating voltage is applied the relay coil
gets energized and the COM changes contact to NO. Different relay configurations are
available like SPST, SPDT, DPDT etc, which have different number of changeover contacts.
By using proper combination of contactors, the electrical circuit can be switched on and off.
no limitation of displaying special & even custom characters (unlike in seven segments),
animations and so on.A16x2 LCD means it can display 16 characters per line and there are 2
such lines. In this LCD each character is displayed in 5x7 pixel matrix. This LCD has two
registers, namely, Command and Data. The command register stores the command
instructions given to the LCD. A command is an instruction given to LCD to do a predefined
task like initializing it, clearing its screen, setting the cursor position, controlling display etc.
The data register stores the data to be displayed on the LCD. The data is the ASCII value of
the character to be displayed on the LCD
3.7 LDR
LDR (Light dependent resistor), offers resistance in response to the ambient light. The
resistance decreases as the intensity of incident light increases, and vice versa. In the absence
of light, LDR exhibits a resistance of the order of mega-ohms which decreases to few
hundred ohms in the presence of light. It can act as a sensor, since a varying voltage drop can
be obtained in accordance with the varying light. It is made up of cadmium sulphide (CdS).
Fig:3.7 LDR
The operating temperature range is from -55C to 150C. The output voltage varies by 10mV
in response to every oC rise/fall in ambient temperature, i.e., its scale factor is 0.01V/ oC.
Humidity sensor works on the principle of relative humidity and gives the
output in the form of voltage. This analog voltage provides the information
about the percentage relative humidity present in the environment.
Example:
At 3 p.m. the air has 9 grams of water vapor per cubic meter of air. We
divide 9 by 30 and multiply by 100 to get a relative humidity of 30%
OPERATION PRINCIPLE
The surface resistance of the sensor Rs is obtained through effected voltage signal output of
the load resistance RL which series-wound. The relationship between them is described:
Rs\RL = (Vc-VRL) / VRL.
fig:3.11MAX 232
communication of
microcontrollers with
PC. The controller operates at TTL logic level (0-5V) whereas the serial communication in
PC works on RS232 standards (-25 V to + 25V). This makes it difficult to establish a direct
that includes a capacitive voltage generator to supply RS232 voltage levels from a single 5V
supply. Each receiver converts RS232 inputs to 5V TTL/CMOS levels. These receivers (R 1 &
R2) can accept 30V inputs. The drivers (T 1 & T2), also called transmitters, convert the
The transmitters take input from controllers serial transmission pin and send
the output to RS232s receiver. The receivers, on the other hand, take input from transmission
pin of RS232 serial port and give serial output to microcontrollers receiver pin. MAX232
Pin Diagram:
Dept of ECE,MISW Page 35
Supervisory control and data acquisition
3.12 BUZZAR
The piezo buzzer produces sound based on reverse of the piezoelectric effect. The
piezoelectric material is the underlying principle. These buzzers can be used alert a user of
an event corresponding to a switching action, counter signal or sensor input. They are also
Fig:3.12 buzzer
The buzzer produces a same noisy sound irrespective of the voltage variation
applied to it. It consists of piezo crystals between two conductors. When a potential is
applied across these crystals, they push on one conductor and pull on the other. This, push
and pull action, results in a sound wave. Most buzzers produce sound in the range of 2 to 4
kHz. The Red lead is connected to the Input and the Black lead is connected to Ground.
3.13 DC MOTOR
Most electric motors operate through the interaction of magnetic fields and current-
carrying conductors to generate force. The reverse process, producing electrical energy from
mechanical energy, is done by generators such as an alternator or a dynamo; some electric
motors can also be used as generators, for example, a traction motor on a vehicle may
perform both tasks. Electric motors and generators are commonly referred to as electric
machines.
Chapter 4
AVR Studio, the popular Software, combines Project Management, Source Code
Editing, Program Debugging, and Flash Programming in a single, powerful environment.
Selecting the compiler and creating the project name and click on the next button
Choose AVR simulator from the left list and controller from the right list and press finish.
Save the program by pressing ctrl + S or choosing save from the file menu
4.2 ASSEMBLING:
To convert your program to machine language press F7 or select Build from the Build menu
or click the build icon in the toolbar.
See the Build window. The window shows if your program has syntax error or not. By
looking at the window, you can see the amount of memory which is used by your program.
Step 2:
Selecting the fuse bits and click on write button.
Step 3:
Click on Erase
Step 4:
Click on load flash
Step 5:
Clink on write flash and verify flash in command mode
#include <avr/io.h>
#define F_CPU 8000000
#include <util/delay.h>
#include <avr/interrupt.h>
#include "lcd.h"
#define motor_on PORTD|=(1<<PD4)
#define fan_on PORTD|=(1<<PD2)
#define light_on PORTD|=(1<<PD3)
#define motor_of PORTD&=~(1<<PD4)
#define fan_of PORTD&=~(1<<PD2)
#define light_of PORTD&=~(1<<PD3)
void Init_USART()
{
UBRRL=0x33;
UCSRB=(1<<TXEN)|(1<<RXEN)|(1<<RXCIE);
UCSRC=(1<<URSEL)|(0<<UMSEL)|(0<<UPM1)|(0<<UPM0)|
(0<<USBS)|(3<<UCSZ0);
}
ISR(USART_RXC_vect)
{
cli();
ch=UDR;
if (ch=='1')
{
motor_on;
}
if (ch=='2')
{
motor_of;
}
if (ch=='3')
{
light_on;
}
if (ch=='4')
{
light_of;
}
if (ch=='5')
{
fan_on;
}
if (ch=='6')
{
fan_of;
}
}
int main(void)
{
unsigned char light=0,temp=0,smoke=0,hum=0;
SREG=0X80;
DDRB=0xff;
DDRD=0xfe;
Init_USART();
_delay_ms(50);
InitLCD(0);
_delay_ms(50);
LCDWriteStringXY(0,0,"INITIALISING...");
_delay_ms(2000);
LCDClear();
sei();
while(1)
{
if ((light>200)|(hum>30)|(temp>50)|(smoke>150))
{
LCDClear();
LCDWriteStringXY(0,0,"Abnormal ");
LCDWriteStringXY(0,1,"Condition...");
buz_on;
_delay_ms(5000);
buz_of;
LCDClear();
}
Init_ADC();
_delay_ms(20);
light=ReadADC(3);
LCDWriteStringXY(0,0,"LDR");
LCDWriteIntXY(0,1,light,3);
Init_ADC();
_delay_ms(20);
temp=ReadADC(2);
temp=temp/2-1;
LCDWriteStringXY(4,0,"TMP");
LCDWriteIntXY(4,1,temp,3);
Init_ADC();
_delay_ms(20);
hum=ReadADC(0);
LCDWriteStringXY(8,0,"HUM");
LCDWriteIntXY(8,1,hum,3);
Init_ADC();
_delay_ms(20);
smoke=ReadADC(1);
LCDWriteStringXY(12,0,"CO2");
LCDWriteIntXY(12,1,smoke,3);
}
}
Chapter-5
APPLICATIONS
. Turbine protection.
Chapter 6
ADVANTAGES
. It reduces the maintenance cost.
. Easy to implement.
Chapter 7
CONCLUSION
Scada is the acronym for supervisory control and data acquisition which are industrial control
systems. These systems are used to monitor various processes such as those involving the
development of infrastructure and industrial processes. These systems however do not control
processes in real time. The primary function of a SCADA system is to efficiently connect and
transfer information from a wide range of sources, and at the same time maintaining data
integrity and security. The security of SCADA networks is an important topic today due to
the vital role that SCADA systems play in our national lives in providing essential utility
services.
Chapter 8
FUTURE SCOPE
Chapter 9
REFERENCES
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tools.html
Technical white paper for NetStream, available at
http://www.huawei.com/products/datacom m/pdf
SandiaNational Laboratories, available at http://www.sandia.gov/scada/documents/p
df
An engineering approach to computernetworking: ATM networks ,the internet, and
the telephone network.
Cisco: Introduction to CiscoIc OS NetFlow at technical overview.
Shaw, T., "Energy Infrastructure Cyber Security: PipelinesA Step-by-Step Guide
for Keeping Pipeline Infrastructure Safe From All Cyber Attacks," Oil & Gas
Journal Research Center, 2009.
www .dpstele .com/training