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ELET 354 Electronics I Fall 2007

MOS Circuits at DC
Triode Region: vGS Vt (induced channel) and vDS vGS vt (continuous channel)
iD = kn (W/L) [ ( vGS Vt )vDS vDS2 ]
iD kn (W/L) ( vGS Vt ) vDS (linear)

rDS = ( vDS / i D ) for vDS small = [ kn(W/L) ( VGS Vt )] 1

Saturation Region: vGS Vt (induced channel) and vDS vGS vt ( pinched-off channel)

iD = kn (W/L) ( vGS Vt )2
Boundary between triode and saturation regions: vDS = vGS vt
Cut off Region: vGS < Vt

kn = n Cox
n is the electron mobility in Si = 1360 cm2/Vs
Cox is the capacitance per unit gate area of the oxide layer = ox / tox
tox is the thickness of the oxide layer
ox = 3.9 o = 3.9 x 8.85 x 10 12 = 3.45 x 10 11 F/m
ox is the dielectric or permittivity of the silicon dioxide
o is the vacuum permittivity (or dielectric constant)

Example 1.
Design the following NMOS circuit so that the transistor operate at ID = 0.3 mA and VD = +0.4V. Consider that
the NMOS transistor has Vt = 1.0 V, n Cox = 60 A/V2, L = 3 m, W = 120 m, and VDD = VSS = 2.5 V

Ans: Rs = 3.3 k, RD = 7 k
R. Alba-Flores
ELET 354 Electronics I Fall 2007

Example 2.
Design the following NMOS circuit so that the transistor operate at ID = 0.16 mA. Consider that the NMOS
transistor has Vt = 0.6 V, n Cox = 200 A/V2, L = 0.8 m, W = 8 m, and VDD = 3 V

Notice that VDS = VGS

Therefore: VDS >> VGS Vt is true, and

the transistor is in the saturation region


thus
2
ID = [n Cox (W/L)] ( VGS Vt )

solving for VGS Vt

( VGS Vt )2 = ( 2 ID ) / [ n Cox (W/L) ]

2 2
Substituting values, we obtain: ( VGS Vt ) = 0.16 V ; VGS Vt = 0.4 V ; VGS = 0.4 + Vt = 1 V

VGS = 1 V, VDS = VD = 1 V

RD = (VDD VD ) / ID = (3 V 1V) / 0.16 mA = 12.5 k

Example 3.
Assume that a second NMOS transistor is connected to the previous example, as shown below. Consider that
RD2 = 10 k, VDD = 3 V, and Q1 = Q2. Find ID2 and VD2

From example 2 we have:


ID1 = 0. 16 mA, RD1 = 12.5k , VD1 = 1 V
VGS2 = VGS1 =VDS1 =1 V,

Assuming that:

VDS2 > ( VGS2 Vt2 ) ( = 1V 0.6V =0.4V) (saturation)

Then we use the equation


2
ID2 = [n Cox (W/L)] ( VGS2 Vt 2 )

substituting values:
ID2 = 160 = 0.16 m

VD2 = VDD ID2 RD2 = 3 V (0.16 mA)(10k ) = 1.4 V

R. Alba-Flores
ELET 354 Electronics I Fall 2007

Example 4.
Design the following NMOS circuit so that the transistor operate at VD = 0.05 V. Consider that the NMOS
transistor has Vt = 1 V, k'n ( W / L) = 1 m/V2 , and VDD = 5 V. What is the effective resistance between drain
and source at this operating point ?

Notice that:

VDS = 0.05 V < VGS Vt = 5V 1V = 4 V

Therefore that transistor is in the Triode Region

ID = kn (W/L) [ ( VGS Vt )VDS VDS2 ]


substituting values we obtain:
ID = 0.2 mA

RD = ( VDD VD ) / ID = ( 5 V 0.05V ) / 0.2 mA = 24.75 k

The effective Drain to Source resistance is:

rDS = VDS/ ID = 0.05V/0.2mA = 250

Example 5.
For the circuit shown below, assume that the NMOS transistor has Vt = 1 V, k'n ( W / L) = 1 m/V2 , and
RG1 = R G2 = 10M, RD = RS = 6k, and VDD = 10 V.
a) Determine the voltages at all nodes and the currents through all branches
b) What is the largest value that RD can have while the transistor remains in the saturation mode

Because IG = 0, we can apply voltage divider to the gate:

VG= RG2/(RG1+RG2) VDD = 5 V

Because VG > Vt the transistor is on


Assume saturation region, solve the problem, and then verify

Notice that: VS = (ID )(RS ) = 6 ID (ID in mA)

Then: VGS = VG VS = 5 V 6 ID

ID = ( kn)(W/L)( VGS Vt )2 = ( 1/2 mA/V2)(5 V 6 ID 1V )2

18 ID2 - 25 ID + 8 = 0

Solving for ID we obtain: ID = 0.89 mA and ID = 0.5 mA

Notice that if we take ID = 0.89 mA then VS = ID RS = 0.89 mA ( 6 k) = 5.34 V,


Then VS > VG and the transistor is OFF (this does not make sense). Therefore, take the ID = 0.5 mA
VS = 0.5 mA (6 k ) = 3V ; VGS = VG VS = 5 V 3 V = 2V
VD = VDD ID RD = 10 V (0.5mA)(6 k) = 7 V
Because VD > ( VG - Vt ) the transistor is in saturation, as assumed

b) In the limit of saturation we have : VDS = VGS Vt = 2 1 = 1 V

VDS = VD VS then VD = VDS + VS = 1 V + 3 V = 4 V

RD = ( VDD VD ) / ( ID) = (10 V 4 V) / 0.5 mA = 12 k

R. Alba-Flores

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