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1 2 3 4 5 6 7 8

JW8B/C BLOCK DIAGRAM


A
1333 /1600 MT/S GPU A

DDR3L SO-DIMM N14P-GV2 (25W)


Haswell ULT PCIE X4
DDR3L (2G )
USB3.0 Port USB2.0 / USB3.0 15W
(Right) DC+GT2 / GT3
USB3.0 Port *2 USB2.0 / USB3.0 28W
(Left) DC+GT3
DDI Redriver
HDMI CONN
Lynx Point LP PS8401A
USB2.0
Fingerprint MCP 1168pins
eDP(x2 lanes) eDP to LVDS
LVDS Panel
PS8620/8623
B
USB2.0 B
Touch Panel
USB2.0
Camera
SATA
Digital Mic HDD Conn
DSP:eS305
SATA
I2S mSATA Conn
Audio Codec HDA
HP+MIC ALC290Q
Combo Jack x1 USB2.0
Bluetooth
AMP PCIE WiFi
Subwoofer Conn
APA2010
*Support AOAC
iPTT
Speaker Conn PCIE
Card Reader
C 3in1 Conn C
RTS5227E
I2C or SMBus 40 mm X 24 mm
Touch PAD
PCIE
GIGA LAN
RJ45
RTL8111GUS
PS/2 LPC
*Support S5 wake
SPI
Keyboard CONN KBC
ITE 8528 HSPI SPI ROM
24MHz 32.768KHz

64Mbit

SPI ROM
PWM FAN
D 64Mbit D

Quanta Computer Inc.


PROJECT : JW8B
Size Document Number Rev
A
Block Diagram
Date: Friday, May 10, 2013 Sheet 1 of 57
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

HSIO Port USB3.0 PCIE SATA USB2.0


USB3.0_1 USB2.0_0
1 CN6 CN4
USB3.0_2 USB2.0_1
2 CN4
PCIE CLK CN6
A A

USB3.0_3 PCIE1 CLK0 USB2.0_2


3 CN5 X X CN5
USB3.0_4 PCIE2 CLK1 USB2.0_3
4 X Card Reader Card Reader Finger Print
PCIE3 CLK2 USB2.0_4
5 GIGA LAN GIGA LAN Camera

6 PCIE4 CLK3 USB2.0_5


WIFI WIFI eTP
7 PCIE5 CLK4 USB2.0_6
GPU 4X GPU 4X Blue Tooth
8 PCIE5 CLK5 USB2.0_7
B B
GPU 4X X Touch Screen
9 PCIE5
GPU 4X
10 PCIE5
GPU 4X
11 PCIE6 SATA3
X X

12 PCIE6 SATA2
X mSATA

13 PCIE6 SATA1
X HDD
C 14 PCIE6 SATA0 C

X X

D D

Quanta Computer Inc.


PROJECT : JW8B
Size Document Number Rev
A
PORT ASSIGNMENT
Date: W ednesday, June 19, 2013 Sheet 2 of 57
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3.3V_SUS +3.3V_RUN
MB
Touchpad
2.2K 2.2K 2.2K 2.2K
+3.3V_RUN
AP2 SMBCLK SMB_PCH_SCLK
DMN66D0LDW
AH1 SMBDATA SMB_PCH_DAT SODIMM
A A
DMN66D0LDW
+3.3V_SUS
Haswell
ULT
2.2K 2.2K
AN1 SMB_CLK0

AK1 SMB_DAT0

+3.3V_SUS

B
2.2K 2.2K B

AU3 SMB_CLK_ME1

AH3 SMB_DATA_ME1
Function IC Address
Thermal IC NCT7718 1001100xb (98h)
Thermal IC G781-1P8 1001101xb (9Ah)
SMBUS Charge IC OZ8618NL 00010010 (0x12h)
+3.3V_ALW Battery Battery 00010110 (0X16h)
DMN66D0LDW

DMN66D0LDW
+3.3V_SUS

GPU N14P-GV2 10011110 (0X9Eh)

2.2K 2.2K
MB 115 SMBDAT1

116 SMBCLK1

+3.3V_ALW
330
5
C SIO 330 6 Battery
C

4.7K 4.7K
ITE8528E 110 SMBCLK0
0
10

111 SMBDAT0 0 11 Charger

V3.3_THERMAL2
8
+3.3V_RUN MOS
7 THERMAL(G781-1P8)
MOS GPU

2.2K 2.2K
V3.3_THERMAL
94 SMBCLK3 8
MOS
95 SMBDAT3 7 THERMAL(NCT7718)
MOS

D D9 D
N-MOS
D8 GPU
N-MOS

20
eDP to LVDS Quanta Computer Inc.
21 PS8623 PROJECT : JW8B
Size Document Number Rev
A
SMBUS
Date: Monday, July 08, 2013 Sheet 3 of 57
1 2 3 4 5 6 7 8
5 4 3 2 1

Adapter 65W VER : 1A

Charger
(BQ24715RGRR) +PWR_SRC
D D

Battery 3S1P SLP_S4# DDR_PG_CTRL SLP_S4# SLP_S4# IMVP_VR_ON

+3.3V_EN2 ALW_ON TI TI
TPS51362RVER TPS51206DSQR TI TI ON
TPS51362RVER TLV62130RGTR NCP81101MNTWG
TI
TPS51275RUKR
+V_VDDQ_VR +0.6V_DDR_VTT
+VCCIN
+10V_ALW
+1.05V_SUS +1.8V_SUS
+3.3V_ALW +5V_ALW

C RUN_ON C
MODPHY_EN RUN_ON

Load Switch
Load Switch TPS22965DSGR
TPS22966DPUR
RUN_ON

RichTek +1.8V_RUN
+V1.05DX_MODPHY +1.05V_RUN
SUS_ON RUN_ON SUS_ON RUN_ON
RT8068AZQW

Load Switch Load Switch


TPS22966DPUR TPS22966DPUR
+1.5V_RUN
B B

+3.3V_SUS +3.3V_RUN +5V_SUS +5V_RUN

A A

Quanta Computer Inc.


PROJECT : JW8B
Size Document Number Rev
A
Power Block Diagram
Date: Friday, May 10, 2013 Sheet 4 of 57
5 4 3 2 1
5 4 3 2 1

+PWR_SRC 1 +PWR_SRC +VCHGR


Battery Mode 2 3
2
+3.3V_RTC_LDO +3.3V_ALW 5
+VAD +12V_ALW LATCH
(POWER_SW_IN0#)
+5V_ALW 7
PWR 3V/5V
9 BTN VR CHARGER Battery
+5V_ALW SUS MOS +3.3V_SUS

EN2

EN1
SW ( IC )
D D

G
4 3.3V_ALW_ON
+PWR_SRC
6
SYS_PWR_SW#
10 (S5 start point.
+1.05V_SUS (Only available when S5 -> S0)
1.05V 8 6 ALW_ON
VR 11 SUS_ON
1.05V_PWRGD 12 RSMRST#
PG DPWROK
EN

9 EC 13 AC_PRESENT
+3.3V_SUS 29 ACPRESENT
SIO_PWRBTN#
HWPG 14 15 PWRBTN#
SIO_SLP_S5#
SLP_S5#
SIO_SLP_S4# 16
+PWR_SRC SLP_S4#
SIO_SLP_S3#
17 SLP_S3#

SIO_SLP_S3#

SIO_SLP_S4#

SIO_SLP_S5#
SYS_PWROK

VCCST_PWRGD#
DDR/VTT +V_VDDQ 19 APWROK

EC_PWROK
C C
30 EC_PWROK
VR

RUN_ON
PCH_PWROK
+DDR_VTTREF 20
30 VCCST_PWRGD#
VCCST_PWRGD
+DDR_VTT 37 PLTRST#
21 PLTRST#
36 23 30 30 17 16 15
SYS_PWROK
36 SYS_PWROK
DDR_PWRGD 22
PG EC_PWROK to SYS_PWROK delay 5-99mS
S4

S3

28 1.5V_RUN_PWRGD Haswell ULT


17
RC Delay SIO_SLP_S3#
SIO_SLP_S4#16

+VAD +PWR_SRC

+5V_RUN
24 +VCCIN
B RUN MOS IMVP 32 B
+5V_ALW 35 34
+3.3V_ALW
+1.05V_SUS
SW ( IC ) +3.3V_RUN VR SVID CPUPWRGOOD
25 MCP
+V_VDDQ IMVP_PWRGD
PG 33
EN

+1.35V_RUN 31 H_VR_ENABLE_MCP
26 VR_EN
SVID H_VR_ENABLE_MCP 31
33 IMVP_PWRGD
+1.05V_RUN VR_READY
27 35 CPU
G

GPIO17

GPIO50
G1 DGPU_PWR_EN
GPIO54
RUN_ON 23
+3.3V_ALW +3V_GFX
GFX PWR G2 +PWR_SRC
G5
+5V_ALW
MOS DGPU_PWR_EN G1 All_DGPU_PWR DGPU_PWROK
+VGACORE
IMVP G2 G6
+1.5V_RUN 25 +V_VDDQ +1.35V_GFX
A
1.5V G4 VR DGPU_HOLD_RST# A

VR +1.05V_RUN +1.05V_GFX DGPU_VC_EN


1.5V_RUN_PWRGD 28 G4 PG G3
EN

PG
EN

Quanta Computer Inc.


DGPU DGPU_PWR_EN G1
RUN_ON 23 DGPU_VC_EN G3 PROJECT : JW8B
Size Document Number Rev
A
POWER SEQUENCE
Date: Friday, May 10, 2013 Sheet 5 of 57
5 4 3 2 1
5 4 3 2 1

Power Sequence Shark Bay ULT PSS, 490828, Rev1.1

(G3 to S0)
+PWR_SRC

+5V_ALW2 and +3.3V_RTC_LDO G3 mode: > EC reset time + output ALW_ON


S5 mode: > Power button DE-BOUNCE time

POWER_ SW_IN0#

D D
LATCH
G3 mode: Asserted by HW latch of power button event
3.3V_ALW_ON S0 mode: Be keeped on high by ALW_ON
? ms (3.3_ALW_ON to +3.3V_ALW)
+3.3V_ALW
(EC on) ? ms (EC, EC reset time about 50.4ms, 1650 Tick*(1/32.768K))
ALW_ON(EC)
? ms (ALW_ON to +5V_ALW)
+5V_ALW
? ms (ALW_ON to +10V_ALW)
+10V_ALW

G3 mode: EC don't care this event.


SYS_PWR_SW# S5 mode: Upon power always exist, and this pin keeped on high. Start from this event.

? ms (EC, ALW_ON to SUS_ON, EC)


SUS_ON(EC)

? ms (SUS_ON to +3.3_SUS)
+3.3V_SUS
(PCH MCU on)(VCCDSW)
? ms (SUS_ON to +5V_SUS)
+5V_SUS

? ms (+3.3V_SUS to RSMRST#, t05=min 10ms) (For a non-DeepSx system, DPWROK and RSMRST# go high at the same time)
RSMRST#(EC) (VCCDSW (+3.3V_SUS) to DPWROK (RSMRST#), t04=min 10ms)
(DPWROK, suspend power well) For a non-DeepSx system SUS_ACK# will rise with +3.3V_SUS due to weak internal pull-up
SUSACK#(PCH IPU)
500us ? ms(EC, RSMRST# (DPWROK) to SIO_PWRBTN#)
SIO_PWRBTN#(EC) minimum duration of PWRBTN# assertion=16ms. PWRBTN# can assert before or after than RSMRST#
C C
? ms (RSMRST# to SLP_S5, t07=min 5ms)
SIO_SLP_S5#(PCH)
? us (SIO_SLP_S5# to SIO_SLP_S4#, t09=min 30us)
SIO_SLP_S4#(PCH)

+1.05V_SUS

+V_VDDQ_VR
(VDDQ)

+1.8V_SUS
(VDD1)

1.05V_PWRGD

Be keeped on low by tied to 1.5V_RUN_PWRGD during this OD period.


1.2V_SUS_PWRGD

? us (SIO_SLP_S4# to SIO_SLP_S3#, t10=min 30us)


SIO_SLP_S3#(PCH)

+0.6V_DDR_VTT

? ms (EC, SLP_S3# to RUN_ON)


RUN_ON(EC)

+1.05V_RUN ? ms (VccSUS (+3.3_SUS) to VccASW (+1.05V_PCH), t29= min 0ms)


? ms (VCCSUS to VccCorePCH (+1.05V_SUS), t31=min 0ms)
B (VccCorePCH, VCCST, VCCASW) ? ms (VDDQ (+V_VDDQ_VR) to VCCST_PWRGD, tCPU01=min 1ms) B

? ms(VCCST (+1.05V_RUN) to VCCST_PWRGD, tCPU00=min 1ms)


VCCST_PWRGD(EC) ? ms (EC, RUN_ON to VCCST_PWRGD)

+1.5V_RUN

1.5V_RUN_PWRGD

+3.3V_RUN

+5V_RUN

SIO_EXT_SCI#

SIO_EXT_SMI#

HWPG ? ms (VCCASW (+1.05V_RUN) to APWROK (HWPG), t11=min 1ms)


(APWROK, ALL_SYS_PWRGD)
? ms (VCCST_PWRGD to VR_EN (IMVP_VR_EN), tCPU05=max 100ns)
IMVP_VR_ON(EC) ? ms (EC, HWPG to IMVP_VR_ON)
(VR_EN)
valid
CPU SVID BUS(CPU)
? ms(VDDQ (+V_VDDQ_VR) ramping&stable to VCCIN ramping, tCPU03=min 100ns)
? ms(VCCST (+1.05V_RUN) ramping&stable to VCCIN ramping, tCPU04=min 100ns)
A A
+VCCIN ? ms(VR_EN (IMVP_VR_EN) asserted until VCCIN ramped to Vboot, tCPU07=max 2.5ms)
(VCCIN- CPU CORE)

IMVP_PWRGD
(VR_READY)
? ms(VccCorePCH (+1.05V_RUN) stable to PWROK (EC_PWROK), t41= min 5ms)
EC_PWROK(EC) ? ms(ALL_SYS_PWRGD (HWPG) to PWROK (EC_PWROK), t14= min 5ms)
(PCH_PWROK(PWROK)) ? ms(APWROK (HWPG) to PWROK (EC_PWROK), t30= min 0ms)
? ms (EC, IMVP_VR_ON to EC_PWROK)
? ms(ALL_SYS_PWRGD (HWPG) to SYSPWROK, t15= min 99ms)
SYS_PWROK Quanta Computer Inc.
? ms(ALL_SYS_PWRGD (HWPG) to PLTRST#, tULT14=max 99ms)
PROJECT : JW8B
PLTRST#(PCH) Size Document Number Rev
A
G3 to S0
G3 S0 Date: Friday, May 10, 2013 Sheet 6 of 57
5 4 3 2 1
5 4 3 2 1

Haswell ULT (DISPLAY)


+VCCIOA_OUT

U14A HSW_ULT_DDR3L

D EDP_COMP R22 24.9/F_4 D

C54 C45 [25]


DDI1_TXN0 EDP_TXN0 EDP_TXN0
C55 B46 [25]
DDI1_TXP0 EDP_TXP0 EDP_TXP0 +3.3V_RUN
B58 A47 [25]
DDI1_TXN1 EDP_TXN1 EDP_TXN1
C58 B47 [25]
DDI1_TXP1 EDP_TXP1 EDP_TXP1
B55
A55 DDI1_TXN2 C47 RP2 2.2KX2
A57 DDI1_TXP2 EDP_TXN2 C46 HDMI_SCL 1 2
B57 DDI1_TXN3 EDP_TXP2 A49 HDMI_SDA 3 4
DDI1_TXP3 DDI EDP EDP_TXN3 B49
INT_HDMI_TXN2 C51 EDP_TXP3
[27] INT_HDMI_TXN2 DDI2_TXN0
[27] INT_HDMI_TXP2 C50 A45 EDP_AUXN [25] PIRQ_GPIO77 R40 10K_4
INT_HDMI_TXP2 DDI2_TXP0 EDP_AUXN EDP_AUXN
[27] INT_HDMI_TXN1 C53 B45 EDP_AUXP [25]
INT_HDMI_TXN1 DDI2_TXN1 EDP_AUXP EDP_AUXP
[27] INT_HDMI_TXP1 B54 PIRQ_GPIO80 R308 10K_4
INT_HDMI_TXP1 DDI2_TXP1
[27] INT_HDMI_TXN0 C49 D20 EDP_COMP
INT_HDMI_TXN0 DDI2_TXN2 EDP_RCOMP
[27] INT_HDMI_TXP0 B50 A43 DP_UTIL R291 *0_4_NC LCD_PW M DGPU_PW R_EN R36 10K_4
INT_HDMI_TXP0 DDI2_TXP2 EDP_DISP_UTIL
[27] INT_HDMI_TXCN A53
INT_HDMI_TXCN DDI2_TXN3
[27] INT_HDMI_TXCP B53
INT_HDMI_TXCP DDI2_TXP3
R290 *0_4_NC

1 OF 19

U14I HSW_ULT_DDR3L
C C

[25] R293 *0_4_SHORT_NC B8 B9


LCD_PW M EDP_BKLCTL DDPB_CTRLCLK
TP39 A9 C9
TP55 C6 EDP_BKLEN eDP SIDEBAND DDPB_CTRLDATA D9 HDMI_SCL
EDP_VDDEN DDPC_CTRLCLK HDMI_SCL [27]
D11 HDMI_SDA [27]
DDPC_CTRLDATA HDMI_SDA
need check have VGA function
PIRQ_GPIO77 U6 +3V
P4 PIRQA/GPIO77 C5
[42]THERMAL_PW R_EN PIRQB/GPIO78 +3V DDPB_AUXN
[42] N4 +3V B6
FAN_PW R_EN PIRQC/GPIO79 DDPC_AUXN
PIRQ_GPIO80 N2 +3V DISPLAY B5
TP48 PCI_PME_N AD4 PIRQD/GPIO80 DDPB_AUXP A6
PME PCIE DDPC_AUXP
[12,40] *0_4_NC R329 U7 +3V
SMB_INT# GPIO55
L1 +3V
DGPU_PW R_EN L3 GPIO52 C8
GPIO54 +3V DDPB_HPD
R5 +3V A8 [27]
GPIO51 DDPC_HPD INT_HDMI_HP
[54,55] DGPU_PW R_EN L4 +3V D6 EDP_HP_R
GPIO53 EDP_HPD R16 1K_4
EDP_HP [25]

1
R17 R287
[42]THERMAL_STP#_CTRL 1M_4
100K_4
9 OF 19

2
B B

A A

Quanta Computer Inc.


PROJECT : JW8B
Size Document Number Rev
A
Haswell ULT 1/12
Date: Tuesday, July 16, 2013 Sheet 7 of 57
5 4 3 2 1
5 4 3 2 1

Haswell ULT (DDR3L)

U14C HSW_ULT_DDR3L U14D HSW_ULT_DDR3L


[19] M_B_DQ[63..0]

AH63 AU37
AH62 SA_DQ0 SA_CLK#0 AV37 M_B_DQ0 AY31 AM38 M_B_CLKN0
D M_B_CLKN0 [19] D
AK63 SA_DQ1 SA_CLK0 AW36 M_B_DQ1 AW31 SB_DQ0 SB_CK#0 AN38 M_B_CLKP0
SA_DQ2 SA_CLK#1 SB_DQ1 SB_CK0 M_B_CLKP0 [19]
AK62 AY36 M_B_DQ2 AY29 AK38 M_B_CLKN1 [19]
SA_DQ3 SA_CLK1 SB_DQ2 SB_CK#1 M_B_CLKN1
AH61 M_B_DQ3 AW29 AL38 M_B_CLKP1 [19]
SA_DQ4 SB_DQ3 SB_CK1 M_B_CLKP1
AH60 AU43 M_B_DQ4 AV31
AK61 SA_DQ5 SA_CKE0 AW43 M_B_DQ5 AU31 SB_DQ4 AY49 M_B_CKE0
SA_DQ6 SA_CKE1 SB_DQ5 SB_CKE0 M_B_CKE0 [19]
AK60 AY42 M_B_DQ6 AV29 AU50 M_B_CKE1 [19]
SA_DQ7 SA_CKE2 SB_DQ6 SB_CKE1 M_B_CKE1
AM63 AY43 M_B_DQ7 AU29 AW49
AM62 SA_DQ8 SA_CKE3 M_B_DQ8 AY27 SB_DQ7 SB_CKE2 AV50
AP63 SA_DQ9 AP33 M_B_DQ9 AW27 SB_DQ8 SB_CKE3
AP62 SA_DQ10 SA_CS#0 AR32 M_B_DQ10 AY25 SB_DQ9 AM32 M_B_CS#0
SA_DQ11 SA_CS#1 SB_DQ10 SB_CS#0 M_B_CS#0 [19]
AM61 M_B_DQ11AW25 AK32 M_B_CS#1 [19]
SA_DQ12 SB_DQ11 SB_CS#1 M_B_CS#1
AM60 AP32 M_B_DQ12 AV27
AP61 SA_DQ13 SA_ODT0 M_B_DQ13 AU27 SB_DQ12 AL32
AP60 SA_DQ14 AY34 M_B_DQ14 AV25 SB_DQ13 SB_ODT0
AP58 SA_DQ15 SA_RAS AW34 M_B_DQ15 AU25 SB_DQ14 AM35 M_B_RAS#
SA_DQ16 SA_WE SB_DQ15 SB_RAS M_B_RAS# [19]
AR58 AU34 M_B_DQ16 AM29 AK35 M_B_W E# [19]
SA_DQ17 SA_CAS SB_DQ16 SB_WE M_B_W E#
AM57 M_B_DQ17 AK29 AM33 M_B_CAS# [19]
SA_DQ18 SB_DQ17 SB_CAS M_B_CAS#
AK57 AU35 M_B_DQ18 AL28
SA_DQ19 SA_BA0 SB_DQ18 M_B_BS#[2..0] [19]
AL58 AV35 M_B_DQ19 AK28 AL35 M_B_BS#0
AK58 SA_DQ20 SA_BA1 AY41 M_B_DQ20 AR29 SB_DQ19 SB_BA0 AM36 M_B_BS#1
AR57 SA_DQ21 SA_BA2 M_B_DQ21 AN29 SB_DQ20 SB_BA1 AU49 M_B_BS#2
SA_DQ22 SB_DQ21 SB_BA2 M_B_A[15..0] [19]
AN57 AU36 M_B_DQ22 AR28
AP55 SA_DQ23 SA_MA0 AY37 M_B_DQ23 AP28 SB_DQ22 AP40 M_B_A0
AR55 SA_DQ24 SA_MA1 AR38 M_B_DQ24 AN26 SB_DQ23 SB_MA0 AR40 M_B_A1
AM54 SA_DQ25 SA_MA2 AP36 M_B_DQ25 AR26 SB_DQ24 SB_MA1 AP42 M_B_A2
AK54 SA_DQ26 SA_MA3 AU39 M_B_DQ26 AR25 SB_DQ25 SB_MA2 AR42 M_B_A3
AL55 SA_DQ27 SA_MA4 AR36 M_B_DQ27 AP25 SB_DQ26 SB_MA3 AR45 M_B_A4
AK55 SA_DQ28 SA_MA5 AV40 M_B_DQ28 AK26 SB_DQ27 SB_MA4 AP45 M_B_A5
C AR54 SA_DQ29 SA_MA6 AW39 M_B_DQ29 AM26 SB_DQ28 SB_MA5 AW46M_B_A6 C
AN54 SA_DQ30 DDR CHANNEL A SA_MA7 AY39 M_B_DQ30 AK25 SB_DQ29 SB_MA6 AY46 M_B_A7
AY58 SA_DQ31 SA_MA8 AU40 M_B_DQ31 AL25 SB_DQ30 SB_MA7 AY47 M_B_A8
AW58 SA_DQ32 SA_MA9 AP35 M_B_DQ32 AY23 SB_DQ31 DDR CHANNEL B SB_MA8 AU46 M_B_A9
AY56 SA_DQ33 SA_MA10 AW41 M_B_DQ33AW23 SB_DQ32 SB_MA9 AK36 M_B_A10
AW56 SA_DQ34 SA_MA11 AU41 M_B_DQ34 AY21 SB_DQ33 SB_MA10 AV47 M_B_A11
AV58 SA_DQ35 SA_MA12 AR35 M_B_DQ35AW21 SB_DQ34 SB_MA11 AU47 M_B_A12
AU58 SA_DQ36 SA_MA13 AV42 M_B_DQ36 AV23 SB_DQ35 SB_MA12 AK33 M_B_A13
AV56 SA_DQ37 SA_MA14 AU42 M_B_DQ37 AU23 SB_DQ36 SB_MA13 AR46 M_B_A14
AU56 SA_DQ38 SA_MA15 M_B_DQ38 AV21 SB_DQ37 SB_MA14 AP46 M_B_A15
AY54 SA_DQ39 AJ61 M_B_DQ39 AU21 SB_DQ38 SB_MA15 M_B_DQSN[7..0] [19]
AW54 SA_DQ40 SA_DQSN0 AN62 M_B_DQ40 AY19 SB_DQ39 AW30M_B_DQSN0
AY52 SA_DQ41 SA_DQSN1 AM58 M_B_DQ41AW19 SB_DQ40 SB_DQSN0 AV26 M_B_DQSN1
AW52 SA_DQ42 SA_DQSN2 AM55 M_B_DQ42 AY17 SB_DQ41 SB_DQSN1 AN28 M_B_DQSN2
AV54 SA_DQ43 SA_DQSN3 AV57 M_B_DQ43AW17 SB_DQ42 SB_DQSN2 AN25 M_B_DQSN3
AU54 SA_DQ44 SA_DQSN4 AV53 M_B_DQ44 AV19 SB_DQ43 SB_DQSN3 AW22M_B_DQSN4
AV52 SA_DQ45 SA_DQSN5 AL43 M_B_DQ45 AU19 SB_DQ44 SB_DQSN4 AV18 M_B_DQSN5
AU52 SA_DQ46 SA_DQSN6 AL48 M_B_DQ46 AV17 SB_DQ45 SB_DQSN5 AN21 M_B_DQSN6
AK40 SA_DQ47 SA_DQSN7 M_B_DQ47 AU17 SB_DQ46 SB_DQSN6 AN18 M_B_DQSN7
AK42 SA_DQ48 AJ62 M_B_DQ48 AR21 SB_DQ47 SB_DQSN7 M_B_DQSP[7..0] [19]
AM43 SA_DQ49 SA_DQSP0 AN61 M_B_DQ49 AR22 SB_DQ48 AV30 M_B_DQSP0
AM45 SA_DQ50 SA_DQSP1 AN58 M_B_DQ50 AL21 SB_DQ49 SB_DQSP0 AW26M_B_DQSP1
AK45 SA_DQ51 SA_DQSP2 AN55 M_B_DQ51 AM22 SB_DQ50 SB_DQSP1 AM28 M_B_DQSP2
AK43 SA_DQ52 SA_DQSP3 AW57 M_B_DQ52 AN22 SB_DQ51 SB_DQSP2 AM25 M_B_DQSP3
AM40 SA_DQ53 SA_DQSP4 AW53 M_B_DQ53 AP21 SB_DQ52 SB_DQSP3 AV22 M_B_DQSP4
AM42 SA_DQ54 SA_DQSP5 AL42 M_B_DQ54 AK21 SB_DQ53 SB_DQSP4 AW18M_B_DQSP5
AM46 SA_DQ55 SA_DQSP6 AL49 M_B_DQ55 AK22 SB_DQ54 SB_DQSP5 AM21 M_B_DQSP6
AK46 SA_DQ56 SA_DQSP7 M_B_DQ56 AN20 SB_DQ55 SB_DQSP6 AM18 M_B_DQSP7
AM49 SA_DQ57 AP49 SM_VREF_CA M_B_DQ57 AR20 SB_DQ56 SB_DQSP7
B SA_DQ58 SM_VREF_CA SM_VREF_CA [19] SB_DQ57 B
AK49 AR51 M_B_DQ58 AK18
AM48 SA_DQ59 SM_VREF_DQ0 AP51 M_B_DQ59 AL18 SB_DQ58
SA_DQ60 SM_VREF_DQ1 SM_VREF_DQ1 [19] SB_DQ59
AK48 M_B_DQ60 AK20
AM51 SA_DQ61 M_B_DQ61 AM20 SB_DQ60
AK51 SA_DQ62
SA_DQ63
Check if not used. NC ? M_B_DQ62 AR18 SB_DQ61
SB_DQ62
12/25 Del SM_VREF_DQ0 M_B_DQ63 AP18
SB_DQ63

3 OF 19 4 OF 19

A A

Quanta Computer Inc.


PROJECT : JW8B
Size Document Number Rev
A
Haswell ULT 2/12
Date: Friday, May 10, 2013 Sheet 8 of 57
5 4 3 2 1
5 4 3 2 1

GPIO Pull-up/Pull-down(CLG)

+3.3V_SUS

Hasswell ULT(GPIO,LPIO,MISC) SIO_W AKE_SCI# R124 10K_4

+3.3V_SUS

D D
LCD_DBC R337 10K_4
USB_LEFT_EN R344 10K_4
+V1.05S_VCCST SIO_EXT_SCI# R352 10K_4
GPIO15 R65 10K_4
U14J HSW_ULT_DDR3L
R12
1K_4
not use function pin net +3.3V_RUN

AUDIO_PW R_EN P1 D60 PCH_THRMTRIP# PCIE_MCARD1_DET# R323 10K_4


GPIO8 AU2 BMBUSY/GPIO76 +3V THRMTRIP V4 SIO_RCIN#
GPIO8 +3V_S5 +3V RCIN/GPIO82 SIO_RCIN# [38]
AM7 DSW T4 IRQ_SERIRQ [38] DEVSLP1 R307 *10K_4_NC
GPIO15 AD6 LAN_PHY_PWR_CTRL/GPIO12 CPU/ SERIRQ AW15 PCH_OPIRCOMP IRQ_SERIRQ DEVSLP2 R34 *10K_4_NC
KB_DET# Y1 GPIO15 +3V_S5 MISC PCH_OPI_RCOMP AF20 SIO_RCIN# R53 10K_4
1 2 GPIO17 T3 GPIO16 +3V RSVD AB21
GPIO24
[20,22] DGPU_PW ROK
D8 SDMK0340L-7-F AD5 GPIO17 +3V RSVD AUDIO_PW R_EN R314 10K_4
SIO_W AKE_SCI# AN5 GPIO24 +3V_S5 USB_MCARD1_DET# R48 10K_4
GPIO28 AD7 GPIO27 DSW GSPI_CS R42 10K_4
NFC_IRQ_R AN3 GPIO28 +3V_S5 IRQ_SERIRQ R38 10K_4
GPIO26 +3V_S5 R6 GSPI_CS
+3V GSPI0_CS/GPIO83
LPT_CR_RST# AG6 L6 DSP_RST# GPIO91 RP16 2 1 10KX2
USB3.0_RD_EN AP1 GPIO56 +3V_S5 +3V GSPI0_CLK/GPIO84 N6 HDMI_PD#_LPT GPIO92 4 3
SLATE_MODE_HALL_IN AL4 GPIO57 +3V_S5 +3V GSPI0_MISO/GPIO85 L8 BBS
HDMI_PD#_LPT [27]
W LAN_ON/OFF# AT5 GPIO58 +3V_S5 +3V GSPI0_MOSI/GPIO86 R7 GPIO93 4 3
SNSR_HUB_RST_ACCEL_DRDY_N
[37] W LAN_ON/OFF#
AK4 GPIO59 +3V_S5 GPIO
+3V GSPI1_CS/GPIO87 L5
BT_RADIO_DIS# [37]
GPIO94 2 1
LCD_DBC AB6 GPIO44 +3V_S5 +3V GSPI1_CLK/GPIO88 N7 TOUCHPANEL_EN
EC_CS_EXT [38] RP15 10KX2
[26] LCD_DBC
USB_MCARD1_DET# U4 GPIO47 +3V_S5 +3V GSPI1_MISO/GPIO89 K2 TOUCH_PANEL_INTR# HDMI_PD#_LPT R32 10K_4
C
[37]
USB_MCARD1_DET#
PCIE_MCARD1_DET# Y3 GPIO48 +3V +3V GSPI_MOSI/GPIO90 J1 GPIO91 C
[37]
PCIE_MCARD1_DET#
DGPU_HOLD_RST# P3 GPIO49 +3V +3V UART0_RXD/GPIO91 K3 GPIO92 DSP_RST# R28 *10K_4_NC
[20]DGPU_HOLD_RST#
MODPHY_EN Y2 GPIO50 +3V +3V UART0_TXD/GPIO92 J2 GPIO93 TOUCH_PANEL_INTR# R305 10K_4
[17] MODPHY_EN
USB_LEFT_EN AT3 HSIOPC/GPIO71 +3V +3V
SERIAL IO UART0_RTS/GPIO93 G1 GPIO94 TOUCHPANEL_EN R39 10K_4
SENSOR_HUB_INT
[35] USB_LEFT_EN
AH4 GPIO13 +3V_S5 +3V UART0_CTS/GPIO94 K4 URAT1_RX
USB2_CAM1_PW R_EN AM4 GPIO14 +3V_S5 +3V UART1_RXD/GPIO0 G2 URAT1_TX
LPT_LAN_RST# AG5 GPIO25 DSW +3V UART1_TXD/GPIO1 J3 URAT1_RST PCH_OPIRCOMP R397 49.9/F_4
SNR_HUB_EN AG3 GPIO45 +3V_S5 +3V UART1_RST/GPIO2 J4 URAT1_CTS
GPIO46 +3V_S5 +3V UART1_CTS/GPIO3 F2 I2C_DA0
+3V I2C0_SDA/GPIO4 I2C_DA0 [31]
BT_W AKE# AM3 +3V_S5 +3V F3 I2C_CK0 [31]
GPIO9 I2C0_SCL/GPIO5 I2C_CK0
SIO_EXT_SCI# AM2 G4 I2C_DA1
GPIO33
[38] SIO_EXT_SCI#
P2 GPIO10 +3V_S5 +3V I2C1_SDA/GPIO6 F1 I2C_CK1
I2C_DA1 [40] +3.3V_RUN
SENSOR_STANDBY_N C4 DEVSLP0/GPIO33 +3V +3V I2C1_SCL/GPIO7 E3 SDIO_CK
I2C_CK1 [40]
SDIO_POWER_EN/GPIO70 +3V +3V SDIO_CLK/GPIO64 50K
DEVSLP1 L2 F4 SDIO_CMD
[36] DEVSLP1
DEVSLP2 N5 DEVSLP1/GPIO38 +3V +3V SDIO_CMD/GPIO65 D3 SDIO_D0 I2C_DA0 RP4 4 3 10KX2
[36] DEVSLP2
V2 DEVSLP2/GPIO39 +3V +3V SDIO_D0/GPIO66 E4 SDIO_D1 I2C_CK0 2 1
[30] ACZ_SPKR SPKR/GPIO81 +3V +3V SDIO_D1/GPIO67
+3V C3 SDIO_D2
SDIO_D2/GPIO68 E2 SDIO_D3 I2C_DA1 RP14 4 3 10KX2
+3V SDIO_D3/GPIO69
10 OF 19 I2C_CK1 2 1

URAT1_RST RP6 4 3 10KX2


URAT1_RX 2 1

URAT1_CTS RP5 4 3 10KX2


URAT1_TX 2 1
GPIO86:Boot BIOS Strap Bit SDIO_CK RP3 4 3 10KX2
No Reboot Strap(GPIO81) SDIO_CMD 2 1
PU LPC
B SDIO_D1 RP1 4 3 10KX2 B
NC Default PD SPI (Default IPD) SDIO_D2 2 1

SDIO_D3 R298 10K_4


PU EN
R25 R24
BBS +3.3V_SUS
+3.3V_RUN
GPIO8 R358 10K_4
*1K_4_NC *1K_4_NC GPIO24 R69 10K_4
GPIO28 R66 10K_4
NFC_IRQ_R R345 10K_4
TLS CONFIDENTIALITY STRAP(GPIO15) SENSOR_HUB_INT R84 10K_4
GPIO66 : Top-Block Swap LPT_CR_RST# R74 10K_4
USB3.0_RD_EN R338 10K_4
NC Default R1547 ENABLE SLATE_MODE_HALL_IN R125 10K_4
SNSR_HUB_RST_ACCEL_DRDY_N
R336 10K_4
R1547_NC DISABLE(Default) LPT_LAN_RST# R77 10K_4
PU EN SNR_HUB_EN R81 10K_4
BT_W AKE# R123 10K_4
R299 R300
USB2_CAM1_PW R_EN R365 10K_4
+V3.3S_1.8S_LPSS_SDIO SDIO_D0

+3.3V_RUN
*1K_4_NC *1K_4_NC

KB_DET# R322 10K_4


GPIO17 R45 10K_4
A
GPIO33 R310 10K_4 A
SENSOR_STANDBY_N R297 10K_4

Quanta Computer Inc.


PROJECT : JW8B
Size Document Number Rev
A
Haswell ULT 3/12
Date: Thursday, June 13, 2013 Sheet 9 of 57
5 4 3 2 1
5 4 3 2 1

D Haswell ULT (PCIE,USB) D

U14K HSW_ULT_DDR3L

[20] F10 AN8 [34]


PEG_RXN0 PERN5_L0 USB2N0 USBP0-
[20] E10 DSW AM8 [34] USB3.0 Port (Power Share)
PEG_RXP0 PERP5_L0 USB2P0 USBP0+

[20] C23 AR7 [34]


PEG_TXN0 PETN5_L0 USB2N1 USBP1-
[20] C22 DSW AT7 [34] USB3.0 Port (Right)
PEG_TXP0 PETP5_L0 USB2P1 USBP1+

[20] F8 AR8 [35]


PEG_RXN1 PERN5_L1 USB2N2 USBP2-
[20] E8 DSW AP8 [35] USB3.0 Port (Left)
PEG_RXP1 PERP5_L1 USB2P2 USBP2+

[20] B23 AR10 [28]


PEG_TXN1 PETN5_L1 USB2N3 USBP3-
GPU [20] A23 DSW AT10 [28] Finger Print
PEG_TXP1 PETP5_L1 USB2P3 USBP3+

[20] H10 AM15 [28]


PEG_RXN2 PERN5_L2 USB2N4 USBP4-
[20] G10 DSW AL15 [28] Camara
PEG_RXP2 PERP5_L2 USB2P4 USBP4+

[20] B21 AM13 [26]


PEG_TXN2 PETN5_L2 USB2N5 USBP5-
[20] C21 DSW AN13 [26] eTP Touch Panel
PEG_TXP2 PETP5_L2 USB2P5 USBP5+

[20] E6 AP11 [37]


PEG_RXN3 PERN5_L3 USB2N6 USBP6-
[20] F6 DSW AN11 [37] Bluetooth
PEG_RXP3 PERP5_L3 USB2P6 USBP6+
C
[20] B22 AR13 [28]
C
PEG_TXN3 PETN5_L3 USB2N7 USBP7-
[20] A21 DSW AP13 [28] Touch Panel ( JW8 )
PEG_TXP3 PETP5_L3 USB2P7 USBP7+

[32] G11
PCIE_RXN3 PERN3
[32] F11 G20 [34]
PCIE_RXP3 PERP3 USB3RN1 USB3.0_RX1-
GIGA LAN H20 [34]
USB3RP1 USB3.0_RX1+
[32] C29 USB3.0 Port
PCIE_TXN3 PETN3
[32] B30 PCIE USB C33 [34]
PCIE_TXP3 PETP3 USB3TN1 B34
USB3.0_TX1- (Power Share)
USB3TP1 USB3.0_TX1+ [34]
[37] F13
PCIE_RXN4 PERN4
[37] G13 E18 [34]
PCIE_RXP4 PERP4 USB3RN2 USB3.0_RX2-
WIFI F18 [34]
USB3RP2 USB3.0_RX2+
[37] B29 USB3.0 Port (Right)
PCIE_TXN4 PETN4
[37] A29 B33 [34]
PCIE_TXP4 PETP4 USB3TN2 USB3.0_TX2-
A33 [34]
USB3TP2 USB3.0_TX2+
[35] G17
USB3.0_RX3- PERN1/USB3RN3
[35] F17
USB3.0_RX3+ PERP1/USB3RP3
USB3.0 Port (Left) C30
[35] USB3.0_TX3- PETN1/USB3TN3
[35] C31 AJ10 USB_BIAS R105 22.6/F_4
USB3.0_TX3+ PETP1/USB3TP3 USBRBIAS AJ11
F15 USBRBIAS AN10 USBPLLMON_N R108 49.9/F_4
[33] PCIE_RXN2 PERN2/USB3RN4 RSVD
[33] G15 AM10 USBPLLMON_P R107 49.9/F_4
PCIE_RXP2 PERP2/USB3RP4 RSVD
Cardreader B31
[33] PCIE_TXN2 PETN2/USB3TN4
[33] A31
PCIE_TXP2 PETP2/USB3TP4
+3V_S5 AL3 USB_OC0# USB_OC0# [35]
OC0/GPIO40 AT1 USB_OC1#
+V1.05S_AUSB3PLL
+3V_S5 OC1/GPIO41 USB_OC1# [34]
+3V_S5 AH2 USB_OC2#
B E15 OC2/GPIO42 AV3 USB_RIGHT_EN B
RSVD +3V_S5 OC3/GPIO43 USB_RIGHT_EN[34]
E13
R20 1 2 3K/F_4 PCIE_RCOMP A27 RSVD
R19 1 2 *0_4_SHORT_NC PCIE_IREF B27 PCIE_RCOMP
PCIE_IREF

11 OF 19
HARRIS_BEACH_CS REV 3.0 +3.3V_SUS

USB_OC0# R88 1 2 10K_4


USB_OC1# R350 1 2 10K_4
USB_OC2# R332 1 2 10K_4

USB_RIGHT_EN R388 1 2 *100K_4_NC

A A

Quanta Computer Inc.


PROJECT : JW8B
Size Document Number Rev
A
Haswell ULT 4/12
Date: Monday, July 08, 2013 Sheet 10 of 57
5 4 3 2 1
5 4 3 2 1

C457 15P/50V/_4 RTC_X1

1
Y3
32.768KHZ R385
10M_4

2
C458 15P/50V/_4 RTC_X2

D
Haswell ULT (RTC, HDA, JTAG, SATA) D

+RTC_CELL
U14E HSW_ULT_DDR3L
R119 20K/F_4 RTC_RST#

R405 20K/F_4 SRTC_RST# RTC_X1 AW5


RTC_X2 AY5 RTCX1
R120 1M_4 SM_INTRUDER# AU6 RTCX2 J5
+RTC_CELL INTRUDER SATA_RN0/PERN6_L3
C190 C450 PCH_INTVRMEN AV7 H5
SRTC_RST# AV6 INTVRMEN RTC
SATA_RP0/PERP6_L3 B15
1U/6.3V_4 1U/6.3V_4 C460 2 1 *33P/50V/NPO_4_NC RTC_RST# AU7 SRTCRST SATA_TN0/PETN6_L3 A15
RTCRST SATA_TP0/PETP6_L3

[30] R411 33_4 HDA_BITCLK_L J8 SATA_RXN1 [36]


HDA_BITCLK SATA_RN1/PERN6_L2 H8 SATA_RXP1 [36] HDD
SATA_RP1/PERP6_L2 A17
SATA_TN1/PETN6_L2 SATA_TXN1 [36]
B17 [36]
SATA_TP1/PETP6_L2 SATA_TXP1
+3.3V_SUS R394 *0_4_SHORT_NCHDA_BITCLK_R AW8 J6
HDA_BCLK/I2S0_SCLK SATA_RN2/PERN6_L1 SATA_RXN2 [36]
HDA_SYNC_R AV11 H6 SATA_RXP2 [36]
HDA_RST#_R AU8 HDA_SYNC/I2S0_SFRM SATA_RP2/PERP6_L1 B14
AY10 HDA_RST/I2S_MCLK AUDIO SATA SATA_TN2/PETN6_L1 C15
SATA_TXN2 [36] mSATA
[30] HDA_SDIN0 HDA_SDI0/I2S0_RXD SATA_TP2/PETP6_L1 SATA_TXP2 [36]
[38] R395 1K_4 AU12
PCH_MELOCK HDA_SDI1/I2S1_RXD
R396 [30] R408 33_4 HDA_SDOUT_R AU11 F5
HDA_SDOUT HDA_SDO/I2S0_TXD SATA_RN3/PERN6_L0
*1K_4_NC AW10 E5 R318 1 2 10K +3.3V_RUN
C AV10 HDA_DOCK_EN/I2S1_TXD SATA_RP3/PERP6_L0 C17 C
AY8 HDA_DOCK_RST/I2S1_SFRM SATA_TN3/PETN6_L0 D17
I2S1_SCLK SATA_TP3/PETP6_L0
SMC_EXTSMI_N [38]
[30] R409 33_4 HDA_SYNC_R
HDA_SYNC
+3V V1
R393 33_4 HDA_RST#_R SATA0GP/GPIO34 U1 GPIO35 R319 1 2 10K_4
[30] HDA_RST# +3V SATA1GP/GPIO35
+3V V6 GPIO36 R46 1 2 10K_4
SATA2GP/GPIO36 AC1 GPIO37 R328 1 2 10K_4
+3V SATA3GP/GPIO37
[18] XDP_TRST_CPU_N AU62
XDP_TCK1 AE62 PCH_TRST A12 SATA_IREF R288 *0_4_SHORT_NC
PCH_TCK SATA_IREF +V1.05S_ASATA3PLL
XDP_TDI AD61 L11
PCH_JTAG_TDO AE61 PCH_TDI RSVD K10
XDP_TMS AD62 PCH_TDO JTAG
RSVD C12 SATA_RCOMP R294 1 2 3K/F_4
RSVD_PGDMON AL11 PCH_TMS SATA_RCOMP U3 PCH_SATA_LED# R51 1 2 10K_4
RSVD SATALED +3.3V_RUN
TP49 PM_TEST_RST_N AC4
R347 0_4 PCH_JTAGX AE63 RSVD
PCH JTAG Debug (CLG) [18] XDP_TCK0
PCH_EDM AV2 JTAGX
RSVD
PCH_SATA_LED# [44]
MP remove(Intel) R387
*0_4_SHORT_NC
+1.05V_SUS
5 OF 19
XDP_TMS R340 51_4
XDP_TDI R63 51_4
HARRIS_BEACH_CS REV 3.0
PCH_JTAG_TDO R67 51_4
PCH_JTAGX R346 *1K_4_NC

XDP_TCK1 R351 *51_4_NC


B B

RSVD_PGDMON R106 *1K_4_NC


DFXTESTMODE
HIGH - DFXTESTMODE DISABLED(DEFAULT)
LOW - DFXTESTMODE ENABLED
HARRIS_BEACH_CS REV 3.0

PCH Strap Table


Pin Name Strap description Sampled Configuration note
0 = Default (weak pull-down 20K)
SPKR No reboot mode setting PWROK 1 = Setting to No-Reboot mode

HDA_SDO Flash Descriptor Security PWROK 0 = Security Effect (Int PD)


Override / Intel ME Debug Mode 1 = Can be Override

INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up +RTC_CELL R407 *330K_4_NC PCH_INTVRMEN R392 330K_4

A A

Quanta Computer Inc.


PROJECT : JW8B
Size Document Number Rev
A
Haswell ULT 5/12
Date: Monday, July 08, 2013 Sheet 11 of 57
5 4 3 2 1
5 4 3 2 1

Haswell ULT (CLK)


C422 12P/50V/_4

U14F

3
4
HSW_ULT_DDR3L
Y1 +3.3V_RUN
R292 24MHz
1M_4
D RN1 10KX4 D

1
2
C43 A25 XTAL24_IN PCIE_CLK_REQ0# 1 2
C42 CLKOUT_PCIE_N0 XTAL24_IN B25 XTAL24_OUT C423 12P/50V/_4 PCIE_CLK_REQ1# 3 4
PCIE_CLK_REQ0# U2 CLKOUT_PCIE_P0 XTAL24_OUT PCIE_CLK_REQ2# 5 6
PCIECLKRQ0/GPIO18 +3V
K21 PCIE_CLK_REQ3# 7 8
CLK_PCIE_CR_N B41 RSVD M21 RP17 10KX2
[33] CLK_PCIE_CR_N CLKOUT_PCIE_N1 RSVD
[33] CLK_PCIE_CR_P CLK_PCIE_CR_P A41 C26 R21 1 2 3K/F_4 +V1.05S_AXCK_LCPLL PCIE_CLK_REQ4# 3 4
PCIE_CLK_REQ1# Y5 CLKOUT_PCIE_P1 DIFFCLK_BIASREF PCIE_CLK_REQ5# 1 2
[33] PCIE_CLK_REQ1# PCIECLKRQ1/GPIO19 +3V
C35 TESTLOW _0 RP13 3 4 10KX2
CLK_PCIE_LANN C41 CLOCK TESTLOW_C35 C34 TESTLOW _1 1 2
[32] CLK_PCIE_LANN CLKOUT_PCIE_N2 TESTLOW_C34
[32] CLK_PCIE_LANP CLK_PCIE_LANP B42 AK8 TESTLOW _2 3 4
PCIE_CLK_REQ2# AD1 CLKOUT_PCIE_P2 SIGNALS TESTLOW_AK8 AL8 TESTLOW _3 1 2
[32] PCIE_CLK_REQ2# PCIECLKRQ2/GPIO20 +3V TESTLOW_AL8 RP7 10KX2
[37] CLK_PCIE_W LANN CLK_PCIE_W LANN B38 AN15 LPC_CLK_0 R410 1 2 22_4
CLKOUT_PCIE_N3 CLKOUT_LPC_0 LPC_CLK_EC [38]
[37] CLK_PCIE_W LANP CLK_PCIE_W LANP C37 AP15 LPC_CLK_1 R116 1 2 22_4 [37]
CLKOUT_PCIE_P3 CLKOUT_LPC_1 LPC_CLK_DEBUG
[37] PCIE_CLK_REQ3# PCIE_CLK_REQ3# N1 +3V
PCIECLKRQ3/GPIO21 B35 R117 1 2 22_4 +3.3V_SUS
CLKOUT_ITPXDP AP_24M [31]
[20] CLK_PCIE_VGAN CLK_PCIE_VGAN A39 A35
CLK_PCIE_VGAP B39 CLKOUT_PCIE_N4 CLKOUT_ITPXDP_P
[20] CLK_PCIE_VGAP CLKOUT_PCIE_P4
[20] PCIE_CLK_REQ4# PCIE_CLK_REQ4# U5 +3V RP21 2.2KX2
PCIECLKRQ4/GPIO22 SMB_CLK0 3 4
B37 EC5 *10P/50V_4_NC SMB_DAT0 1 2
A37 CLKOUT_PCIE_N5 2 1 LPC_CLK_EC
PCIE_CLK_REQ5# T2 CLKOUT_PCIE_P5 RP19 10KX2
PCIECLKRQ5/GPIO23 +3V
1 2
6 OF 19 PCH_SMB_ALERT# 3 4

RP20 2.2KX2
SMBCLK 3 4
C SMBDATA 1 2 C

CARD_+3.3V_EN R354 10K_4


Haswell ULT (LPC/SPI/SMB/CLINK) RP23 2.2KX2
SMB_DATA_ME1 1 2
SMB_CLK_ME1 3 4
U14G HSW_ULT_DDR3L

[37,38] AU14 +3V_S5 AN2 PCH_SMB_ALERT# R333 *0_4_NC [7,40]


LPC_LAD0 LAD0 SMBALERT/GPIO11 SMB_INT#
[37,38] AW12 AP2 SMBCLK
LPC_LAD1 LAD1 SMBCLK
[37,38] AY12 LPC AH1 SMBDATA
LPC_LAD2 LAD2 SMBDATA
[37,38] AW11 SMBUS
+3V_S5 SML0ALERT/GPIO60 AL2 CARD_+3.3V_EN
LPC_LAD3 LAD3
AV12 AN1 SMB_CLK0
[37,38] LPC_LFRAME# LFRAME SML0CLK AK1 SMB_DAT0 SMBus/Pull-up(CLG)
EC13 *10P/50V_4_NC SML0DATA AU4
+3V_S5 SML1ALERT/PCHHOT/GPIO73
2 1 +3V_S5 AU3 SMB_CLK_ME1
SML1CLK/GPIO75 AH3 SMB_DATA_ME1 +3.3V_RUN
+3V_S5 SML1DATA/GPIO74
[39] AA3
PCH_SPI_CLK SPI_CLK
[39] Y7 AF2
PCH_SPI_CS0# SPI_CS0 CL_CLK
[39] Y4 AD2
PCH_SPI_CS1# SPI_CS1 CL_DATA

2
4
AC2 SPI C-LINK AF4
AA2 SPI_CS2 CL_RST RP22
[39] PCH_SPI_SI SPI_MOSI
[39] AA4 2.2KX2
PCH_SPI_SO SPI_MISO
Y6
SPI_IO2

5
AF1 Q34A
SPI_IO3 DMN66D0LDW -7

1
3
SMBCLK 3 4 [19,40]
SMB_PCH_CLK
B 7 OF 19 B

2
Q34B
DMN66D0LDW -7
SMBDATA 6 1 [19,40]
SMB_PCH_DAT

+3.3V_SUS

5
SMB_CLK_ME1 4 3 [38]
SMBCLK1
Q37A
DMN66D0LDW -7

2
Q37B
DMN66D0LDW -7
SMB_DATA_ME1 1 6 [38]
A SMBDAT1 A

Quanta Computer Inc.


PROJECT : JW8B
Size Document Number Rev
A
Haswell ULT 6/12
Date: Thursday, June 13, 2013 Sheet 12 of 57
5 4 3 2 1
5 4 3 2 1

PCH Pull-high/low(CLG)
Haswell ULT (SYSTEM POWER MANAGEMENT)
+3.3V_SUS

ME_SUS_PW R_ACK_R R102 10K_4

D D

+3.3V_SUS

PCIE_W AKE#_R R131 10K_4

AC_PRESENT R78 *10K_4_NC

PM_BATLOW # R122 10K_4


U14H HSW_ULT_DDR3L

SYSTEM POWER MANAGEMENT


SIO_PW RBTN# R121 *10K_4_NC
ME_SUS_PW R_ACK_R R109 1 2 *0_4_SHORT_NC SUSACK#_R AK2 AW7 DSW VRMEN R403 1 2 *0_4_NC [38]
SUSACK DSWVRMEN DPW ROK
SYS_RESET# AC3 AV5 DPW ROK_R R390 1 2 *_0_4_SHORT_NCRSMRST#
R324 1 2 *0_4_SHORT_NCSYS_PW ROK_R AG2 SYS_RESET DPWROK AJ5 PCIE_W AKE#_R R134 1 2 *_0_4_SHORT_NC
[38] SYS_PW ROK SYS_PWROK DSW WAKE EC_W AKE# [38]
[38,42] EC_PW ROK R391 1 2 *0_4_SHORT_NCEC_PW ROK_R AY7
R62 1 2 *0_4_SHORT_NCAPW ROK_R AB5 PCH_PWROK
[38] APW ROK APWROK
[20,32,33,37] PLTRST# AG7 +3V CLKRUN/GPIO32 V5 CLKRUN# [38]
PLTRST# PLTRST CLKRUN#
+3V_S5SUS_STAT/GPIO61 AG4 TPM_LPC_PD TP50
+3V_S5 SUSCLK/GPIO62 AE6 +3.3V_RUN
DSW SLP_S5/GPIO63 AP5 [38]
SIO_SLP_S5#
[38] RSMRST# AW6 DSW CLKRUN# R43 8.2K/J_4
RSMRST# RSMRST
[38]ME_SUS_PW R_ACK R103 1 2 *0_4_SHORT_NCME_SUS_PW R_ACK_R AV4 +3V_S5 SYS_RESET# R331 10K_4
SIO_PW RBTN# AL7 SUSWARN/SUSPWRDNACK/GPIO30 AJ6
[38] SIO_PW RBTN# PWRBTN DSW DSW SLP_S4 SIO_SLP_S4# [19,38,49]
AC_PRESENT AJ8 AT4
[38] AC_PRESENT
PM_BATLOW # AN4 ACPRESENT/GPIO31 DSW DSW SLP_S3
AL5
SIO_SLP_S3# [14,19,38,49]
BATLOW/GPIO72 DSW DSW SLP_A
[38] AF3 DSW SLP_SUS AP4 TP53 RSMRST# R404 10K_4
SLP_S0# SLP_S0
TP51 PCH_SLP_W LAN# AM5 AJ7
C SLP_WLAN/GPIO29 DSW DSW SLP_LAN
SYS_PW ROK_R R327 1 2 *47K_4_NC C

DPW ROK_R R389 1 2 *100K_4_NC


8 OF 19
APW ROK_R R60 1 2 *47K_4_NC

+RTC_CELL

R406
330K_4

R135 1 2 *0_4_SHORT_NC
DSW VRMEN

On Die DSW VR Enable


B +3.3V_RUN B
High = Enable (Default)
Low = Disable
C193
*0.1U/16V_4_NC
5

U15
2 PLTRST#
[38] 4
BUF_PLT_RST#
1
2

R114 *TC7SH08FU_NC
3

100K_4
1

A A

Quanta Computer Inc.


PROJECT : JW8B
Size Document Number Rev
A
Haswell ULT 7/12
Date: Monday, July 08, 2013 Sheet 13 of 57
5 4 3 2 1
5 4 3 2 1

Haswell ULT MCP(POWER)


CPU VDDQ CPU VCC 1/21: 22Ux23 --> 10Ux23
+VCCIN
+V_VDDQ_CPU Haswell ULT 15W : 4.2A Haswell ULT 15W : 32A
U14L HSW_ULT_DDR3L

D +V_VDDQ_CPU D
C455 10U/6.3V_6 L59 C36 C106 10U/6.3V_6
C456 10U/6.3V_6 J58 RSVD VCC C40 C83 10U/6.3V_6 23 X 22UF(0805 MLCC)
6X10UF MLCC C451 10U/6.3V_6 RSVD VCC C44 C94 10U/6.3V_6
VCC
4X2.2UF MLCC C452
C453
10U/6.3V_6
10U/6.3V_6
AH26
AJ31 VDDQ VCC
C48
C52
C107
C123
10U/6.3V_6
10U/6.3V_6
C454 10U/6.3V_6 AJ33 VDDQ VCC C56 C132 10U/6.3V_6
AJ37 VDDQ VCC E23 C148 10U/6.3V_6
AN33 VDDQ VCC E25 C72 10U/6.3V_6
AP43 VDDQ 1.4A 32A VCC E27 C77 10U/6.3V_6
C143 1U/6.3V_4 AR48 VDDQ VCC E29 C76 10U/6.3V_6
C144 1U/6.3V_4 AY35 VDDQ VCC E31 C119 10U/6.3V_6
C145 1 20.1U/16V_4 AY40 VDDQ VCC E33 C158 10U/6.3V_6
C146 1 20.1U/16V_4 AY44 VDDQ VCC E35 C70 10U/6.3V_6
AY50 VDDQ VCC E37 C75 10U/6.3V_6
+V1.05S_VCCST VDDQ VCC E39 C62 10U/6.3V_6
F59 VCC E41 C82 10U/6.3V_6
+VCCIN VCC VCC
N58 E43 C97 10U/6.3V_6
+VCCIOA_OUT +VCCIO_OUT AC58 RSVD VCC E45 C71 10U/6.3V_6
RSVD VCC E47 C79 10U/6.3V_6
R14 VCCSENSE E63 VCC E49 C69 10U/6.3V_6
AB23 VCC_SENSE VCC E51 C78 10U/6.3V_6
10K_4
A59 RSVD VCC E53 C63 10U/6.3V_6
E20 VCCIO_OUT VCC E55 C74 10U/6.3V_6
AD23 VCCIOA_OUT VCC E57 C73 10U/6.3V_6
VCCST_PWRGD_L AA23 RSVD VCC F24
AE59 RSVD VCC F28
RSVD VCC
3

F32
2 Q6 H_CPU_SVIDALRT# L62 VCC F36
[38] VCCST_PWRGD# VIDALERT VCC
2N7002W [52] VR_SVID_CLK N63 HSW ULT POWER F40
VR_SVID_CLK VIDSCLK VCC
VR_SVID_DATA L63 F44 C49 1 2 100P/50V_4
1

B59 VIDSOUT VCC F48


H_VR_ENABLE_MCP F60 VCCST_PWRGD VCC F52 C51 1 2 100P/50V_4
[52] H_VR_ENABLE_MCP VR_EN VCC
R18 1 2 10K_4 VR_READY C59 F56
VR_READY VCC G23 C50 1 2 100P/50V_4
C
D1 2 1 SDMK0340L-7-F D63 VCC G25 C
[52] IMVP_PWRGD VSS VCC
FIVR_EN_BUF H59 G27 C52 1 2 100P/50V_4
P62 PWR_DEBUG VCC G29
VSS VCC
1

R491 1K_4 TP45 MCP_RSVD_69 P60 G31 R304 100/F_4 +VCCIN


C197 TP47 MCP_RSVD_70 P61 RSVD_TP VCC G33
N59 RSVD_TP VCC G35
0.1U/16V_4 TP40 MCP_RSVD_71
2

TP43 MCP_RSVD_72 N61 RSVD_TP VCC G37 VCCSENSE


RSVD_TP VCC VCCSENSE [52]
T59 G39
R15 *10K_4_NC VR_READY AD60 RSVD VCC G41
+V1.05S_VCCST RSVD VCC
AD59 G43
R9 *10K_4_NC H_VR_ENABLE_MCP AA59 RSVD VCC G45
+3.3V_RUN RSVD VCC
AE60 G47 FIVR_EN_BUF R37 150_6 +V1.05S_VCCST
AC59 RSVD VCC G49
AG58 RSVD VCC G51
U59 RSVD VCC G53
+V1.05S_VCCST V59 RSVD VCC G55
RSVD VCC G57
AC22 VCC H23
AE22 VCCST VCC J23
+VCCIN AE23 VCCST VCC K23
+V1.05S_VCCST AB57
VCCST

VCC
VCC
VCC
VCC
K57
L22
AD57 M23
AG57 VCC VCC M57
+1.05V_RUN +V1.05S_VCCST C24 VCC VCC P57
C28 VCC VCC U57
C32 VCC VCC W57
VCC 12 OF 19 VCC
R54 1 2 *0_8_SHORT_NC

B B
+V1.05S_VCCST +VCCIO_OUT
SVID ALERT

R313 R321
75_4 *75_4_NC
+V_VDDQ +V_VDDQ_CPU
H_CPU_SVIDALRT# R312 43_4
S3 Power reduce VR_SVID_ALERT#[52]
R440
*ShortPAD_NC
+V1.05S_VCCST +VCCIO_OUT

1 2 SVID DATA

1
R320 R316
130_4 *130_4_NC

2
VR_SVID_DATA [52]
VR_SVID_DATA

A A

Quanta Computer Inc.


PROJECT : JW8B
Size Document Number Rev
A
Haswell ULT 8/12
Date: Monday, July 08, 2013 Sheet 14 of 57
5 4 3 2 1
5 4 3 2 1

Haswell ULT (GND)

U14N HSW_ULT_DDR3L U14O HSW_ULT_DDR3L U14P HSW_ULT_DDR3L


U14R HSW_ULT_DDR3L
D H17 D
A11 AJ35 AP22 AV59 D33 VSS H57
A14 VSS VSS AJ39 AP23 VSS VSS AV8 D34 VSS VSS J10
A18 VSS VSS AJ41 AP26 VSS VSS AW16 D35 VSS VSS J22 N23
A24 VSS VSS AJ43 AP29 VSS VSS AW24 D37 VSS VSS J59 RSVD R23
A28 VSS VSS AJ45 AP3 VSS VSS AW33 D38 VSS VSS J63 RSVD T23
VSS VSS VSS VSS VSS VSS AT2 RSVD
A32 AJ47 AP31 AW35 D39 K1 RSVD U10
VSS VSS VSS VSS VSS VSS AU44 RSVD
A36 AJ50 AP38 AW37 D41 K12 RSVD
VSS VSS VSS VSS VSS VSS AV44
A40 AJ52 AP39 AW4 D42 L13 RSVD
VSS VSS VSS VSS VSS VSS D15
A44 AJ54 AP48 AW40 D43 L15 RSVD AL1
A48 VSS VSS AJ56 AP52 VSS VSS AW42 D45 VSS VSS L17 RSVD AM11
A52 VSS VSS AJ58 AP54 VSS VSS AW44 D46 VSS VSS L18 RSVD AP7
VSS VSS VSS VSS VSS VSS F22 RSVD
A56 AJ60 AP57 AW47 D47 L20 RSVD AU10
VSS VSS VSS VSS VSS VSS H22 RSVD
AA1 AJ63 AR11 AW50 D49 L58 RSVD AU15
VSS VSS VSS VSS VSS VSS J21 RSVD
AA58 AK23 AR15 AW51 D5 L61 RSVD AW14
AB10 VSS VSS AK3 AR17 VSS VSS AW59 D50 VSS VSS L7 RSVD AY14
AB20 VSS VSS AK52 AR23 VSS VSS AW60 D51 VSS VSS M22 RSVD
AB22 VSS VSS AL10 AR31 VSS VSS AY11 D53 VSS VSS N10 18 OF 19
AB7 VSS VSS AL13 AR33 VSS VSS AY16 D54 VSS VSS N3
AC61 VSS VSS AL17 AR39 VSS VSS AY18 D55 VSS VSS P59
AD21 VSS VSS AL20 AR43 VSS VSS AY22 D57 VSS VSS P63
AD3 VSS VSS AL22 AR49 VSS VSS AY24 D59 VSS VSS R10
AD63 VSS VSS AL23 AR5 VSS VSS AY26 D62 VSS VSS R22
AE10 VSS VSS AL26 AR52 VSS VSS AY30 D8 VSS VSS R8
AE5 VSS VSS AL29 AT13 VSS VSS AY33 E11 VSS VSS T1
AE58 VSS VSS AL31 AT35 VSS VSS AY4 E17 VSS VSS T58
AF11 VSS VSS AL33 AT37 VSS VSS AY51 F20 VSS VSS U20
AF12 VSS VSS AL36 AT40 VSS VSS AY53 F26 VSS VSS U22
AF14 VSS VSS AL39 AT42 VSS VSS AY57 F30 VSS VSS U61
C AF15 VSS VSS AL40 AT43 VSS VSS AY59 F34 VSS VSS U9 C
AF17 VSS VSS AL45 AT46 VSS VSS AY6 F38 VSS VSS V10
AF18 VSS VSS AL46 AT49 VSS VSS B20 F42 VSS VSS V3
AG1 VSS VSS AL51 AT61 VSS VSS B24 F46 VSS VSS V7
AG11 VSS VSS AL52 AT62 VSS VSS B26 F50 VSS VSS W20
AG21 VSS VSS AL54 AT63 VSS VSS B28 F54 VSS VSS W22
AG23 VSS VSS AL57 AU1 VSS VSS B32 F58 VSS VSS Y10
AG60 VSS VSS AL60 AU16 VSS VSS B36 F61 VSS VSS Y59
AG61 VSS VSS AL61 AU18 VSS VSS B4 G18 VSS VSS Y63
AG62 VSS VSS AM1 AU20 VSS VSS B40 G22 VSS VSS
AG63 VSS VSS AM17 AU22 VSS VSS B44 G3 VSS
AH17 VSS VSS AM23 AU24 VSS VSS B48 G5 VSS V58
AH19 VSS VSS AM31 AU26 VSS VSS B52 G6 VSS VSS AH46
AH20 VSS VSS AM52 AU28 VSS VSS B56 G8 VSS VSS V23
AH22 VSS VSS AN17 AU30 VSS VSS B60 H13 VSS VSS E62
VSS VSS VSS VSS VSS VSS_SENSE VSSSENSE [52]
AH24 AN23 AU33 C11 16 OF 19 AH16
AH28 VSS VSS AN31 AU51 VSS VSS C14 VSS
AH30 VSS VSS AN32 AU53 VSS VSS C18
AH32 VSS VSS AN35 AU55 VSS VSS C20
AH34 VSS VSS AN36 AU57 VSS VSS C25 100/F_4
AH36 VSS VSS AN39 AU59 VSS VSS C27 R306
AH38 VSS VSS AN40 AV14 VSS VSS C38
AH40 VSS VSS AN42 AV16 VSS VSS C39
AH42 VSS VSS AN43 AV20 VSS VSS C57
AH44 VSS VSS AN45 AV24 VSS VSS D12
AH49 VSS VSS AN46 AV28 VSS VSS D14
AH51 VSS VSS AN48 AV33 VSS VSS D18
AH53 VSS VSS AN49 AV34 VSS VSS D2
AH55 VSS VSS AN51 AV36 VSS VSS D21
B AH57 VSS VSS AN52 AV39 VSS VSS D23 B
AJ13 VSS VSS AN60 AV41 VSS VSS D25
AJ14 VSS VSS AN63 AV43 VSS VSS D26
AJ23 VSS VSS AN7 AV46 VSS VSS D27
AJ25 VSS VSS AP10 AV49 VSS VSS D29
AJ27 VSS VSS AP17 AV51 VSS VSS D30
AJ29 VSS VSS AP20 AV55 VSS 15 OF 19 VSS D31
VSS VSS VSS VSS

14 OF 19

U14Q HSW_ULT_DDR3L

DC_TEST_AY2_AW 2 AY2 A3 DC_TEST_A3_B3


DC_TEST_AY3_AW 3 AY3 DAISY_CHAIN_NCTF_AY2 DAISY_CHAIN_NCTF_A3 A4 TP_DC_TEST_A4
DAISY_CHAIN_NCTF_AY3 DAISY_CHAIN_NCTF_A4 TP56
TP65 TP_DC_TEST_AY60 AY60
DC_TEST_AY61_AW 61 AY61 DAISY_CHAIN_NCTF_AY60 A60 TP_DC_TEST_A60
DAISY_CHAIN_NCTF_AY61 DAISY_CHAIN_NCTF_A60 TP42
DC_TEST_AY62_AW 62 AY62 A61 DC_TEST_A61_B61
TP57 TP_DC_TEST_B2 B2 DAISY_CHAIN_NCTF_AY62 DAISY_CHAIN_NCTF_A61 A62 TP_DC_TEST_A62
DAISY_CHAIN_NCTF_B2 DAISY_CHAIN_NCTF_A62 TP41
DC_TEST_A3_B3 B3 AV1 TP_DC_TEST_AV1 TP54
DC_TEST_A61_B61 B61 DAISY_CHAIN_NCTF_B3 DAISY_CHAIN_NCTF_AV1 AW1 TP_DC_TEST_AW 1
A DAISY_CHAIN_NCTF_B61 DAISY_CHAIN_NCTF_AW1 TP52 A
B62 AW2 DC_TEST_AY2_AW 2
DC_TEST_B62_B63 B63 DAISY_CHAIN_NCTF_B62 DAISY_CHAIN_NCTF_AW2 AW3 DC_TEST_AY3_AW 3
C1 DAISY_CHAIN_NCTF_B63 DAISY_CHAIN_NCTF_AW3 AW61 DC_TEST_AY61_AW 61
DC_TEST_C1_C2 C2 DAISY_CHAIN_NCTF_C1 DAISY_CHAIN_NCTF_AW61 AW62 DC_TEST_AY62_AW 62
DAISY_CHAIN_NCTF_C2 17 OF 19 DAISY_CHAIN_NCTF_AW62 AW63 TP_DC_TEST_AW 63
DAISY_CHAIN_NCTF_AW63 TP64
Quanta Computer Inc.
PROJECT : JW8B
Size Document Number Rev
A
Haswell ULT 9/12
Date: W ednesday, July 17, 2013 Sheet 15 of 57
5 4 3 2 1
5 4 3 2 1

U14S HSW_ULT_DDR3L

CFG0 AC60 AV63 MCP_RSVD_19 TP35


CFG1 AC62 CFG0 RSVD_TP AU63 MCP_RSVD_20 TP29
AC63 CFG1 RSVD_TP
CFG3 AA63 CFG2
TP25 CFG3
D CFG4 AA60 C63 MCP_RSVD_21 TP1 D
CFG5 Y62 CFG4 RSVD_TP C62 MCP_RSVD_22 TP2
TP26 CFG5 RSVD_TP
CFG6 Y61 B43
TP8 CFG6 RSVD
CFG7 Y60
TP7 CFG7
CFG8 V62 A51 MCP_RSVD_24 TP17
CFG9 V61 CFG8 RSVD_TP B51 MCP_RSVD_25 TP3
CFG10 V60 CFG9 RSVD_TP
CFG11 U60 CFG10 L60 MCP_RSVD_26 TP4
TP24 CFG11 RSVD_TP
CFG12 T63
TP20 CFG12
CFG13 T62 RESERVED N60
TP22 CFG13 RSVD
CFG14 T61
TP5 CFG14
CFG15 T60 W23
TP6 CFG15 RSVD Y22
NOA_STBN_0 AA62 RSVD AY15 PROC_OPI_COMP R402 49.9/F_4
TP28 CFG16 PROC_OPI_RCOMP
NOA_STBN_1 U63
TP23 CFG18
NOA_STBP_0 AA61 AV62
TP27 CFG17 RSVD
NOA_STBP_1 U62 D58
TP21 CFG19 RSVD
R325 49.9/F_4 NOA_RCOMP V63 P22
CFG_RCOMP VSS N21
A5 VSS
RSVD P20
E1 RSVD R20
D1 RSVD RSVD
J20 RSVD
H18 RSVD
TD_IREF B12 RSVD
TD_IREF 19 OF 19

C R289 C
8.2K/F_4

Processor Strapping
1 0
CFG0
(DEFAULT) NORMAL OPERATION; NO STALL STALL CFG0 R339 *1K_4_NC
EAR-STALL/NOT STALL RESET SEQUENCE
AFTER PCU PLL IS LOCKED
CFG1 CFG1 R334 *1K_4_NC
PCH/ PCH LESS MODE SELECTION (DEFAULT) NORMAL OPERATION PCH-LESS MODE

CFG3 DISABLED ENABLED


CFG3 R330 *1K_4_NC
PHYSICAL_DEBUG_ENABLED (DFX PRIVACY) NO PHYSICAL DISPLAY PORT ATTACHED TO AN EXTERNAL DISPLAY PORT DEVICE IS CONNECTED
EMBEDDED DISPLAY PORT TO THE EMBEDDED DISPLAY PORT

B CFG4 DISABLED ENABLED B


CFG4 R61 1K_4
DISPLAY PORT PRESENCE STRAP NO PHYSICAL DISPLAY PORT ATTACHED TO AN EXTERNAL DISPLAY PORT DEVICE IS CONNECTED
EMBEDDED DISPLAY PORT TO THE EMBEDDED DISPLAY PORT

DISABLED(DEFAULT); IN THIS CASE,


CFG 8 ENABLED; NOA WILL BE AVAILABLE CFG8 R326 *1K_4_NC
NOA WILL BE DISABLED IN LOCKED
ALLOW THE USE OF NOA ON LOCKED UNITS UNITS AND ENABLED IN UN-LOCKED REGARDLESS OF THE LOCKING OF THE UNIT
UNITS

CFG9 VRS SUPPORTING SVID PROTOCOL ARE NO VR SUPPORTING SVID IS PRESENT. THE
CFG9 R58 *1K_4_NC
NO SVID PROTOCOL CAPABLE VR CONNECTED PRESENT CHIP WILL NOT GENERATE (OR RESPOND TO)
SVID ACTIVITY

CFG10 POWER FEATURES ACTIVATED POWER FEATURES (ESPECIALLY CLOCK


SAFE MODE BOOT DURING RESET GATINE ARE NOT ACTIVATED CFG10 R57 *1K_4_NC

A A

Quanta Computer Inc.


PROJECT : JW8B
Size Document Number Rev
A
Haswell ULT 10/12
Date: Friday, May 10, 2013 Sheet 16 of 57
5 4 3 2 1
5 4 3 2 1

Haswell ULT PCH(POWER)


3.3 SUS: 205mA
1.05 SUS: 2066mA
1.05 RUN: 2578mA
C11 10U/6.3V_6 3.3 RUN: 58mA C196 1U/6.3V_4
C18 *1U/6.3V_4_NC
C84 1U/6.3V_4 C195 2 1 0.1U/16V_4
U14M HSW_ULT_DDR3L
C95 1U/6.3V_4
C155 2 1 0.1U/16V_4
VCCHSIO K9
D +V1.05DX_MODPHY VCCHSIO D
C88 1U/6.3V_4 L10 1.838A C108 1U/6.3V_4
1.84A M9 VCCHSIO
N8 VCCHSIO HSIO RTC AH11
+1.05V_RUN
P9 VCC1_05 VCCSUS3_3 AG10
+3.3V_SUS VCCSUS3
VCC1_05 1mA VCCRTC +RTC_CELL 129mA
+V1.05S_AUSB3PLL B18 AE7 +VCCRTCEXTC1312 1 0.1U/16V_4
+V1.05S_ASATA3PLL B11 VCCUSB3PLL 41mA DCPRTC
VCCSATA3PLL 42mA

Y20 SPI
18mA VCCSPI Y8 R56 2 1 *0_4_SHORT_NC
RSVD +3.3V_SUS
+V1.05S_APLLOPI AA21 OPI C116 2 1 0.1U/16V_4
W21 VCCAPLL
VCCAPLL
57mA
AG14
+3.3V_SUS +V3.3DX_1.5DX_1.8DX_AUDIO VCCASW +1.05V_RUN
AG13
VCCASW
*C80-->4.7U J13 USB3
R118 2 1 *0_4_SHORT_NC
+1.05V_SUS
C92 10U/6.3V_6 DCPSUS3 10mA J11
VCC1_05 H11
+1.05V_RUN VCC1_05
C66 1U/6.3V_4 C118 10U/6.3V_6
AH14 11mA HDA
1.632A VCC1_05 H15 C149 1U/6.3V_4 2.6A
+V3.3DX_1.5DX_1.8DX_AUDIO VCCHDA VCC1_05 AE8 C152 1U/6.3V_4
C153 1U/6.3V_4 VCC1_05 AF22 C156 2 11U/6.3V_4
AH13 VRM VCC1_05 AG19
+1.05V_SUS DCPSUS2
25mA DCPSUSBYP
CORE AG20 +DCPSUSBYPC150 1U/6.3V_4
C130 1U/6.3V_4 DCPSUSBYP AE9
VCCASW
1/21: 22U --> 10U +1.05V_RUN VCCASW
1/21: 22U --> 10U 658mA VCCASW AF9
AC9 AG8 C105 10U/6.3V_6 473mA
+3.3V_SUS VCCSUS3_3 VCCASW
C128 10U/6.3V_6 AA9 AD10
VCCSUS3_3 62mA
GPIO/LPC
114mA +3.3V_SUS
AH10
VCCDSW3_3114mA 109mA DCPSUS1
DCPSUS1
AD8
+1.05V_SUS
C168 1U/6.3V_4 V8 C64 1U/6.3V_4
W9 VCC3_3 C154 1U/6.3V_4
+3.3V_RUN VCC3_3
3mA J15
THERMAL SENSOR VCCTS1_5 +1.5V_RUN
C115 1U/6.3V_4 K14
+3.3V_RUN
41mA VCC3_3
VCC3_3
K16
+3.3V_SUS +DCPSUSBYP C91 2 1 0.1U/16V_4
+V3.3S_1.8S_LPSS_SDIO +3.3V_RUN
+V1.05S_AXCK_DCB J18 R315 *0_6_SHORT_NC
K19 VCCCLK SERIAL IO U8 2 1
VCCCLK
200mA VCCSDIO
C525 *0.47U/6.3V_4_NC +V1.05S_AXCK_LCPLL A20 T9
J17 VCCACLKPLL 31mA 17mA VCCSDIO C102 1U/6.3V_4
+1.05V_RUN VCCCLK
R21
+1.05V_RUN VCCCLK LPT LP POWER
C C53 1U/6.3V_4 T21 C
1U/6.3V_4 C67 K18 VCCCLK SUS OSCILLATOR AB8
RSVD
1mADCPSUS4 +V1.05A_AOSCSUS
M20
V21 RSVD C121 1U/6.3V_4
AE20 RSVD AC20
+3.3V_SUS VCCSUS3_3 RSVD
AE21 AG16
VCCSUS3_3 USB2 VCC1_05 +1.05V_RUN
AG17
VCC1_05 C151 1U/6.3V_4

13 OF 19

1mA
+1.05V_RUN +V1.05S_AXCK_LCPLL +1.05V_SUS +V1.05A_AOSCSUS

L20 2.2uH_8 L8 2.2uH_8

1
C411 C117
C425 C418 C120 C122
10U/6.3V_6 0.1U/16V_4 1U/6.3V_4 10U/6.3V_6 0.1U/16V_4 1U/6.3V_4

2
41mA
+1.05V_RUN +V1.05S_AXCK_DCB
+V1.05DX_MODPHY +V1.05S_AUSB3PLL

L2 2.2uH_8
L21 2.2uH_8
+12V_ALW

1
C12

1
+V1.05DX_MODPHY C421 C19 C55
C417 C424 10U/6.3V_6 0.1U/16V_4 1U/6.3V_4

2
+1.05V_SUS 10U/6.3V_6 0.1U/16V_4 1U/6.3V_4

2
B +1.05V_RUN B
*-->4.7U
PQ1
FDMC7678
2

42mA
R11 3 R283 1 2 *0_12_NC +1.05V_RUN +V1.05S_APLLOPI
10K_4 5 2 +V1.05DX_MODPHY +V1.05S_ASATA3PLL
1
1
1

+3.3V_RUN PC12 L19 2.2uH_8


1U/6.3V_4 L11 2.2uH_8
2

4
1

1
2 Q4 C415

1
AP2319GN-HF C419 C426 C129
2

10U/6.3V_6 0.1U/16V_4 1U/6.3V_4 C126 C127


3

2
R7 *-->4.7U 10U/6.3V_6 0.1U/16V_4 1U/6.3V_4

2
2

100K_4
R4 1 2 330_4 PR12
100_4
1

R5 1 2 330_4
1

PR14
3

*0_4_SHORT_NC
DMN66D0LDW-7
3

1 2 5
[9] MODPHY_EN Q3A 2 Q5
PMF780SN PC8
4
2

0.01U/16V_4
1

R6
*10K_4_NC
1

2 DMN66D0LDW-7
Q3B
1

A A

Quanta Computer Inc.


PROJECT : JW8B
Size Document Number Rev
Haswell ULT 11/12 A

Date: Monday, July 08, 2013 Sheet 17 of 57


5 4 3 2 1
5 4 3 2 1

D D

U14B HSW_ULT_DDR3L

PROC_DETECT# D61
TP38 CATERR# K61 PROC_DETECT MISC
TP44 N62 CATERR J62 TP60
[38] PECI_EC_R PECI PRDY K62 TP61
R317 2 1 *62_4_NC PREQ E60 XDP_TCK0
+VCCIO_OUT PROC_TCK XDP_TCK0 [11]
E61 TP58
R309 56_4 H_PROCHOT# K63 JTAG PROC_TMS E59 XDP_TRST_CPU_N
[38,47,52] IMVP7_PROCHOT# PROCHOT PROC_TRST XDP_TRST_CPU_N[11]
THERMAL F63 TP59
R311 2 1 62_4 PROC_TDI F62 XDP_TDO_CPU
+V1.05S_VCCST PROC_TDO
R13 10K_4 H_CPUPW RGD C61
PROCPWRGD PWR +V1.05S_VCCST
J60
BPM#0 H60
BPM#1 H61 XDP_TDO_CPU R33 51_4
BPM#2 H62
C R112 200/F_4 SM_RCOMP_0 AU60 BPM#3 K59 C
R111 120/F_4 SM_RCOMP_1 AV60 SM_RCOMP0 DDR3L BPM#4 H63 XDP_TCK0 R10 51_4
R110 100/F_4 SM_RCOMP_2 AU61 SM_RCOMP1 BPM#5 K60
R140 2 1 470_4 DDR3_DRAMRST# AV15 SM_RCOMP2 BPM#6 J61 XDP_TRST_CPU_N R353 *51_4_NC
+V_VDDQ
LPT_DDR_PG_CTRL AV61 SM_DRAMRST DSW BPM#7
[14,19] LPT_DDR_PG_CTRL SM_PG_CNTL1
2 OF 19

[19] DDR3_DRAMRST# DDR3_DRAMRST#

B B

A A

Quanta Computer Inc.


PROJECT : JW8B
Size Document Number Rev
A
Haswell ULT 12/12
Date: Friday, May 10, 2013 Sheet 18 of 57
5 4 3 2 1
5 4 3 2 1

+V_VDDQ
JDIM1B
75 44
76 VDD1 VSS16 48
M_B_DQ[63..0] [8] VDD2 VSS17
JDIM1A 81 49
[8] M_B_A[15..0] VDD3 VSS18
M_B_A0 98 5 M_B_DQ5 82 54
M_B_A1 97 A0 DQ0 7 M_B_DQ4 87 VDD4 VSS19 55
M_B_A2 96 A1 DQ1 15 M_B_DQ3 88 VDD5 VSS20 60

18
M_B_A3 95 A2 DQ2 17 M_B_DQ2 93 VDD6 VSS21 61
M_B_A4 92 A3 DQ3 4 M_B_DQ0 94 VDD7 VSS22 65
M_B_A5 91 A4 DQ4 6 M_B_DQ1 99 VDD8 VSS23 66
M_B_A6 90 A5 DQ5 16 M_B_DQ6
2.48A 100 VDD9 VSS24 71
M_B_A7 86 A6 DQ6 18 M_B_DQ7 105 VDD10 VSS25 72
M_B_A8 89 A7 DQ7 21 M_B_DQ9 106 VDD11 VSS26 127

PC2100 DDR3 SDRAM SO-DIMM


M_B_A9 85 A8 DQ8 23 M_B_DQ13 111 VDD12 VSS27 128
D M_B_A10 107 A9 DQ9 33 M_B_DQ14 112 VDD13 VSS28 133 D
M_B_A11 84 A10/AP DQ10 35 M_B_DQ10 117 VDD14 VSS29 134
M_B_A12 83 A11 DQ11 22 M_B_DQ8 118 VDD15 VSS30 138
M_B_A13 119 A12/BC# DQ12 24 M_B_DQ12 123 VDD16 VSS31 139
M_B_A14 80 A13 DQ13 34 M_B_DQ11 124 VDD17 VSS32 144
M_B_A15 78 A14 DQ14 36 M_B_DQ15 VDD18 VSS33 145
A15 DQ15 39 M_B_DQ20 199 VSS34 150
[8] M_B_BS#[2..0] DQ16 +3.3V_RUN VDDSPD VSS35

PC2100 DDR3 SDRAM SO-DIMM


M_B_BS#0 109 41 M_B_DQ21 151
M_B_BS#1 108 BA0 DQ17 51 M_B_DQ18 77 VSS36 155
M_B_BS#2 79 BA1 DQ18 53 M_B_DQ22 122 NC1 VSS37 156
114 BA2 DQ19 40 M_B_DQ17 125 NC2 VSS38 161
[8] M_B_CS#0 S0# DQ20 NCTEST VSS39
121 42 M_B_DQ16 162
[8] M_B_CS#1 S1# DQ21 VSS40
101 50 M_B_DQ19 R203 *10K/F_4_NC 198 167
[8] M_B_CLKP0 CK0 DQ22 +3.3V_RUN EVENT# VSS41
103 52 M_B_DQ23 30 168
[8] M_B_CLKN0 CK0# DQ23 [18] DDR3_DRAMRST# RESET# VSS42
102 57 M_B_DQ25 172
[8] M_B_CLKP1 CK1 DQ24 VSS43
104 59 M_B_DQ29 173
[8] M_B_CLKN1 CK1# DQ25 VSS44
73 67 M_B_DQ27 1 178
[8] M_B_CKE0 CKE0 DQ26 +SMDDR_VREF_DQA VREF_DQ VSS45
74 69 M_B_DQ26 126 179
[8] M_B_CKE1 CKE1 DQ27 +SMDDR_VREF_CA VREF_CA VSS46
115 56 M_B_DQ28 184
[8] M_B_CAS# CAS# DQ28 VSS47
110 58 M_B_DQ24 185
[8] M_B_RAS# RAS# DQ29 VSS48
113 68 M_B_DQ31 2 189
[8] M_B_WE# WE# DQ30 VSS1 VSS49
R164 10K/F_4 DIMM1_SA0 197 70 M_B_DQ30 3 190
R165 10K/F_4 DIMM1_SA1 201 SA0 DQ31 129 M_B_DQ36 8 VSS2 VSS50 195
+3.3V_RUN 202 SA1 DQ32 131 M_B_DQ37 9 VSS3 VSS51 196

(204P)
[12,40] SMB_PCH_CLK SCL DQ33 VSS4 VSS52
200 141 M_B_DQ35 C296 C233 13
[12,40] SMB_PCH_DAT SDA DQ34 VSS5
143 M_B_DQ34 0.01U/16V_4 0.01U/16V_4 14
M_B_ODT0 116 DQ35 130 M_B_DQ33 19 VSS6
M_B_ODT1 120 ODT0 DQ36 132 M_B_DQ32 20 VSS7 203
ODT1 DQ37 VSS8 VTT1 +DDR_VTT
140 M_B_DQ39 25 204
11 DQ38 142 M_B_DQ38 26 VSS9 VTT2
28 DM0 DQ39 147 M_B_DQ44 31 VSS10 205
46 DM1 DQ40 149 M_B_DQ40 32 VSS11 HOLE1 206
C 63 DM2 DQ41 157 M_B_DQ42 37 VSS12 HOLE2 C

(204P)
136 DM3 DQ42 159 M_B_DQ43 38 VSS13 207
153 DM4 DQ43 146 M_B_DQ45 43 VSS14 PAD1 208
170 DM5 DQ44 148 M_B_DQ41 VSS15 PAD2
187 DM6 DQ45 158 M_B_DQ46
DM7 DQ46 160 M_B_DQ47 DDR3-DIMM1_H=4.0_RVS
[8] M_B_DQSP[7..0] DQ47
M_B_DQSP0 12 163 M_B_DQ49 ddr-ddrrk-20401-tp4b-204p-ruv
M_B_DQSP1 29 DQS0 DQ48 165 M_B_DQ48 DGMK4000005
M_B_DQSP2 47 DQS1 DQ49 175 M_B_DQ54
M_B_DQSP3 64 DQS2 DQ50 177 M_B_DQ55
M_B_DQSP4 137 DQS3 DQ51 164 M_B_DQ52
M_B_DQSP5 154 DQS4 DQ52 166 M_B_DQ53
M_B_DQSP6 171 DQS5 DQ53 174 M_B_DQ50
M_B_DQSP7 188 DQS6 DQ54 176 M_B_DQ51
[8] M_B_DQSN[7..0] M_B_DQSN0 10 DQS7
DQS#0
DQ55
DQ56
181 M_B_DQ61 M3 VREF + M1 VREF
M_B_DQSN1 27 183 M_B_DQ56
M_B_DQSN2 45 DQS#1 DQ57 191 M_B_DQ63 +V_VDDQ
M_B_DQSN3 62 DQS#2 DQ58 193 M_B_DQ62 +V_VREF_VD1 R152 *0_4_SHORT_NCSM_VREF_DQ1 [8]
M_B_DQSN4 135 DQS#3 DQ59 180 M_B_DQ57
M_B_DQSN5 152 DQS#4 DQ60 182 M_B_DQ60
M_B_DQSN6 169 DQS#5 DQ61 192 M_B_DQ58 R166
M_B_DQSN7 186 DQS#6 DQ62 194 M_B_DQ59 +SMDDR_VREF_DQA 1.8K/F_4
DQS#7 DQ63

DDR3-DIMM1_H=4.0_RVS R158 2.2/F_4


ddr-ddrrk-20401-tp4b-204p-ruv
DGMK4000005

2
C215
DDR3L SODIMM ODT GENERATION 0.022U/16V_4

1
Q44
B 5 R153 C221 R161 B
Place these Caps near So-Dimm1. 24.9/F_4 0.01U/16V_4 1.8K/F_4
4 3 R481 22_4 +DDR_VTT

+5V_ALW 2 DDR_PG_CTRL +V_VDDQ +SMDDR_VREF_CA

1 6 C231 1U/6.3V_4 C295 0.1U/16V_4


1

R155 DDR_PG_CTRL R4821 2 100K_4


+5V_ALW C232 1U/6.3V_4 C292 2.2U/6.3V_6
100K_4 DMN66D0LDW-7 C294 1U/6.3V_4 M3 VREF + M1 VREF
3
2

5 Q19A C293 1U/6.3V_4 +SMDDR_VREF_DQA +V_VDDQ


*DMN66D0LDW-7_NC VREFF_CA_A R198 *0_4_SHORT_NC SM_VREF_CA [8]
C302 4.7U/6.3VS_6 C243 0.1U/16V_4
4
6

+3.3V_SUS +V_VDDQ C303 4.7U/6.3VS_6 C252 2.2U/6.3V_6 R200


2 Q19B +SMDDR_VREF_CA 1.8K/F_4
[13,38,49] SIO_SLP_S4#
*DMN66D0LDW-7_NC C301 4.7U/6.3VS_6
1

C300 4.7U/6.3VS_6 R202 2.2/F_4


R146 R148
*0_4_NC *0_4_SHORT_NC C226 4.7U/6.3VS_6 +DDR_VTT

2
C227 4.7U/6.3VS_6 C287 1U/6.3V_4 C298
2

[13,14,38,49] R142 *0_4_NC 0.022U/16V_4

1
SIO_SLP_S3# +5V_ALW +V_VDDQ C230 *10U/6.3V_6_NC C277 1U/6.3V_4
U5
[14,18] R143 *0_4_SHORT_NC C229 10U/6.3V_6 C248 1U/6.3V_4 R207 C297 R201
LPT_DDR_PG_CTRL
1

1 5 24.9/F_4 0.01U/16V_4 1.8K/F_4


NC VCC R154 C228 10U/6.3V_6 C241 1U/6.3V_4
1

A R151 A
*0_4_SHORT_NC
R141 *0_4_NC 2 C212 220K/F_4 C305 4.7U/6.3VS_6
A 0.1U/16V_4
2

C317 *10U/6.3V_6_NC
3 4
GND Y
3

+3.3V_RUN
74AUP1G07GW DDR_PG_CTRL 2 Q18
1 2 PMF780SN C217 0.1U/16V_4 Quanta Computer Inc.
1

R150 2M_4 C218 2.2U/6.3V_6


[49] DDR_PG_CTRL PROJECT : JW8B
Size Document Number Rev
M_B_ODT0 R168 66.5/F_4 M_B_ODT A
M_B_ODT1 R167 66.5/F_4
System Memory (4.0H)
Date: Monday, July 08, 2013 Sheet 19 of 57
5 4 3 2 1
1 2 3 4 5 6 7 8

+1.05V_GFX U13A
1/14 PCI_EXPRESS
Near GPU GK208/GF117/GF119
C2 Dis@10U/6.3VS_6
C3 Dis@10U/6.3VS_6 PEX_WAKE AB6 NVDD = 32.22 ~ 26.66 A +VGACORE
NC
C406 Dis@4.7U/6.3V_6 C30 *Dis@0.1U/16V_4_NC
C409 Dis@4.7U/6.3V_6 AA22 Under GPU U13E
C412 Dis@4.7U/6.3V_6 AB23
PEX_IOVDD
PEX_IOVDD PEX_RST AC7 VGA_RST# R30 Dis@100/F_4 [23] 11/14 NVVDD U13D VDD33 = 56mA
AC24 PEGX_RST# K10
PEX_IOVDD C48 Dis@0.1U/16V_4 VDD 14/14 XVDD/VDD33
AD25 PEX_IOVDD PEX_CLKREQ AC6 PEX_CLKREQ# R35 Dis@10K/F_4 C59 Dis@0.1U/16V_4 K12 VDD
+3V_GFX
C17 Dis@1U/6.3V_4 AE26 PEX_IOVDD C58 Dis@0.1U/16V_4 K14 VDD AD10 NC VDD33 G10
+3V_GFX
A C44 Dis@1U/6.3V_4 AE27 PEX_IOVDD PEX_REFCLK AE8 C41 Dis@0.1U/16V_4 K16 VDD AD7 NC VDD33 G12 A
CLK_PCIE_VGAP [12]
PEX_REFCLK AD8 C65 Dis@0.1U/16V_4 K18 VDD B19 NC VDD33 G8
CLK_PCIE_VGAN[12] L11 G9
Under GPU C86 Dis@4.7U/6.3V_6 VDD VDD33
PEX_TX0 AC9 PEG_RXP0_C C27 1 2 Dis@0.1U/16V_4
PEG_RXP0 C85 Dis@4.7U/6.3V_6 L13 VDD
PEG_RXP0 [10]
AB9 PEG_RXN0_C C28 1 2 Dis@0.1U/16V_4
PEG_RXN0 C101 Dis@4.7U/6.3V_6 L15 F11 3V3AUX_NC Near GPU
PEX_IOVDD + PEX_IOVDDQ = 1.042A PEX_TX0 PEG_RXN0 [10]
C186 Dis@4.7U/6.3V_6 L17
VDD
VDD C163 Dis@4.7U/6.3V_6
PEX_RX0 AG6 PEG_TXP0_C C416 1 2 Dis@0.1U/16V_4 C192 Dis@4.7U/6.3V_6 M10 VDD V5 FERMI_RSVD1_NC C1651 2 Dis@2.2U/6.3V_6
PEG_TXP0 [10]
AA10 PEX_IOVDDQ PEX_RX0 AG7 PEG_TXN0_C C413 1 2 Dis@0.1U/16V_4 C189 Dis@4.7U/6.3V_6 M12 VDD V6 FERMI_RSVD2_NC
+1.05V_GFX PEG_TXN0 [10]
C8 Dis@10U/6.3VS_6 AA12 PEX_IOVDDQ C112 Dis@4.7U/6.3V_6 M14 VDD
C16 Dis@10U/6.3VS_6 AA13 PEX_IOVDDQ PEX_TX1 AB10 PEG_RXP1_C C25 1 2 Dis@0.1U/16V_4
PEG_RXP1 [10] C93 Dis@4.7U/6.3V_6 M16 VDD C136 Dis@0.1U/16V_4
PEG_RXP1
C6 Dis@4.7U/6.3V_6 AA16 PEX_IOVDDQ PEX_TX1 AC10 PEG_RXN1_C C24 1 2 Dis@0.1U/16V_4
PEG_RXN1 [10] C113 Dis@4.7U/6.3V_6 M18 VDD C135 Dis@0.1U/16V_4
PEG_RXN1
C15 Dis@4.7U/6.3V_6 AA18 PEX_IOVDDQ C68 Dis@4.7U/6.3V_6 N11 VDD C46 Dis@0.1U/16V_4
C38 Dis@4.7U/6.3V_6 AA19 PEX_IOVDDQ PEX_RX1 AF7 PEG_TXP1_C C410 1 2 Dis@0.1U/16V_4
[10]
N13 VDD CONFIGURABLE C125 Dis@0.1U/16V_4
AA20 AE7 PEG_TXP1
PEX_IOVDDQ PEX_RX1 PEG_TXN1_C C408 1 2 Dis@0.1U/16V_4
[10] C100 Dis@0.1U/16V_4 N15 VDD POWER CHANNELS
PEG_TXN1
Near GPU AA21 PEX_IOVDDQ C99 Dis@0.1U/16V_4 N17 VDD * nc on substrate Under GPU
AB22 PEX_IOVDDQ PEX_TX2 AD11 PEG_RXP2_C C20 1 2 Dis@0.1U/16V_4
PEG_RXP2 C89 Dis@0.1U/16V_4 P10 VDD
PEG_RXP2 [10]
AC23 PEX_IOVDDQ PEX_TX2 AC11 PEG_RXN2_C C14 1 2 Dis@0.1U/16V_4
PEG_RXN2 C80 Dis@0.1U/16V_4 P12 VDD G1 XPWR_G1
PEG_RXN2 [10]
AD24 PEX_IOVDDQ P14 VDD G2 XPWR_G2
Under GPU AE25 PEX_IOVDDQ PEX_RX2 AE9 PEG_TXP2_C C405 1 2 Dis@0.1U/16V_4 P16 VDD G3 XPWR_G3
PEG_TXP2 [10]
C42 Dis@1U/6.3V_4 AF26 PEX_IOVDDQ PEX_RX2 AF9 PEG_TXN2_C C404 1 2 Dis@0.1U/16V_4 P18 VDD G4 XPWR_G4
PEG_TXN2 [10]
C36 Dis@1U/6.3V_4 AF27 PEX_IOVDDQ R11 VDD G5 XPWR_G5
PEX_TX3 AC12 PEG_RXP3_C C10 1 2 Dis@0.1U/16V_4
PEG_RXP3 C169 Dis@10U/6.3VS_6 R13 VDD G6 XPWR_G6
PEG_RXP3 [10]
PEX_TX3 AB12 PEG_RXN3_C C7 1 2 Dis@0.1U/16V_4
PEG_RXN3 C463 Dis@10U/6.3V_8 R15 VDD G7 XPWR_G7
PEG_RXN3 [10]
R17 VDD
PEX_RX3 AG9 PEG_TXP3_C C403 1 2 Dis@0.1U/16V_4 C172 Dis@4.7U/6.3V_6 T10 VDD
PEG_TXP3 [10]
PEX_RX3 AG10 PEG_TXN3_C C402 1 2 Dis@0.1U/16V_4 C464 Dis@4.7U/6.3V_6 T12 VDD V1 XPWR_V1
PEG_TXN3 [10]
C175 Dis@4.7U/6.3V_6 T14 VDD V2 XPWR_V2
PEX_TX4 AB13 C61 Dis@4.7U/6.3V_6 T16 VDD
PEX_TX4 AC13 C187 Dis@4.7U/6.3V_6 T18 VDD
U11
B PEX_PLL_HVDD + PEX_RX4 AF10 Near GPU U13
VDD
VDD B

PEX_SVDD_3V3 = 143mA PEX_RX4 AE10 U15


U17
VDD W1
W2
XPWR_W1
VDD XPWR_W2
PEX_TX5 AD14 V10 VDD W3 XPWR_W3
AA8 PEX_PLL_HVDD PEX_TX5 AC14 V12 VDD W4 XPWR_W4
+3V_GFX
AA9 PEX_PLL_HVDD V14 VDD
C40 Dis@0.1U/16V_4 PEX_RX5 AE12 V16 VDD
C39 Dis@4.7U/6.3V_6 PEX_RX5 AF12 V18 VDD
C54 Dis@4.7U/6.3V_6 AB8 PEX_SVDD_3V3
Near GPU PEX_TX6 AC15
PEX_TX6 AB15

PEX_RX6 AG12
PEX_RX6 AG13

PEX_TX7 AB16
PEX_TX7 AC16

PEX_RX7 AF13
PEX_RX7 AE13

AD17
VDD33
PEX_TX8
NC
PEX_TX8 AC17 +3.3V_GFX
NC
AE15 +3.3V_RUN t>=0
NC PEX_RX8
AF15
IFP(AB)_IOVDD
NC PEX_RX8
+1.8V_GFX
F2 AC18
[54] VGPU_CORE_SENSE VDD_SENSE NC
NC
PEX_TX9
PEX_TX9 AB18 Power up NVVDD t>0
C
[54] VSS_GPU_SENSE
F1 GND_SENSE NC PEX_RX9 AG15 C60 sequence +VCC_DGFX_CORE C
PEX_RX9 AG16 U1 *Dis@0.1U/16V_4_NC t>0
NC
*Dis@MC74VHC1G08DFT2G_NC FBVDDQ

5
PEX_TX10 AB19
NC
PEX_TX10 AC19 2 +1.5V_GFX
NC [13,32,33,37] PLTRST#
4 PEGX_RST#
PEX_RX10 AF16 1 PEX_VDD t>0
NC [9] DGPU_HOLD_RST#
PEX_RX10 AE16
NC +1.05V_GFX

3
AD20 R49
NC PEX_TX11
AC20 Dis@100K/F_4
t>=0
NC PEX_TX11 IFP(CDEF)_IOVDD
PEX_RX11 AE18 +1.05V_GFX
NC
NC PEX_RX11 AF18
R50 *Dis@0_4_SHORT_NC
PEX_TX12 AC21
NC
PEX_TX12 AB21
NC

*Dis@200/F_4_NC
R286 PEX_TSTCLK AF22 AG18
PEX_TSTCLK# AE22
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT
NC
NC
PEX_RX12
PEX_RX12 AG19
+3V_GFX
Power down
PEX_PLLVDD = 130mA NC PEX_TX13 AD23 sequence
L1 Dis@PBY160808T-300Y-N NC PEX_TX13 AE23
+1.05V_GFX
Near GPU PEX_PLLVDD AA14 PEX_PLLVDD PEX_RX13 AF19 R104
NC PCIE_CLK_REQ4#[12]
Dis@4.7U/6.3V_6 C4 AA15 PEX_PLLVDD NC PEX_RX13 AE19 Dis@4.7K_4

3
Dis@1U/6.3V_4 C43
PEX_TX14 AF24
NC
Dis@0.1U/16V_4 C22 PEX_TX14 AE24 R113 *Dis@0_4_NC CLKREQ_C1 2 Q9
NC [9,22] DGPU_PWROK
Under GPU Dis@DTC144EUA
3

D
PEX_RX14 AE21 D
NC
PEX_RX14 AF21
NC
Dis@10K/F_4 R284 TESTMODE AD9 TESTMODE PEX_CLKREQ# 2 1
NC PEX_TX15 AG24
NC PEX_TX15 AG25 Q8
Dis@DTC144EUA
1

AG21
NC
NC
PEX_RX15
PEX_RX15 AG22 Quanta Computer Inc.
Dis@2.49K/F_4 R285 PEX_TERMP AF25 PEX_TERMP
GF117
GK208
GF119
PROJECT : JW8B
Size Document Number Rev
A
DGPU 1/5 (PEG)
Date: Monday, July 08, 2013 Sheet 20 of 57
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U13B
2/14 FBA
R335 Dis@10K/F_4 PS_FB_CLAMP F3 FB_CLAMP NC FBA_D0 E18 VMA_DQ0
FBA_D1 F18 VMA_DQ1
FBA_D2 E16 VMA_DQ2
GF117/GK208 GF119
F17 VMA_DQ3
PS_FB_CLAMP [23,38,55] FBA_D3
FBA_D4 D20 VMA_DQ4 FBVDDQ + FBVDD = 3.116A U13F
FBA_D5 D21 VMA_DQ5 13/14 GND
FBA_D6 F20 VMA_DQ6 +1.35V_GFX U13C A2 GND GND M13
FBA_D7 E21 VMA_DQ7 12/14 FBVDDQ AB17 GND GND M15
FBA_D8 E15 VMA_DQ8 AB20 GND GND M17
FBA_D9 D15 VMA_DQ9 C57 Dis@0.1U/16V_4 B26 FBVDDQ AB24 GND GND N10
FBA_ODT_L VMA_CMD2 R86 Dis@10K/F_4 FBA_D10 F15 VMA_DQ10 C81 Dis@0.1U/16V_4 C25 FBVDDQ AC2 GND GND N12
FBA_D11 F13 VMA_DQ11 C140 Dis@0.1U/16V_4 E23 FBVDDQ AC22 GND GND N14
A FBA_ODT_H VMA_CMD18 R303 Dis@10K/F_4 FBA_D12 C13 VMA_DQ12 C56 Dis@0.1U/16V_4 E26 FBVDDQ AC26 GND GND N16 A
FBA_D13 B13 VMA_DQ13 C1091 2Dis@2.2U/6.3V_6 F14 FBVDDQ AC5 GND GND N18
FBA_RST# VMA_CMD5 R341 Dis@10K/F_4 FBA_D14 E13 VMA_DQ14 C1411 2Dis@1U/6.3V_4 F21 FBVDDQ AC8 GND GND P11
FBA_D15 D13 VMA_DQ15 C124 Dis@4.7U/6.3V_6 G13 FBVDDQ AD12 GND GND P13
FBA_CKE_L VMA_CMD3 R369 Dis@10K/F_4 FBA_D16 B15 VMA_DQ16 C133 Dis@10U/6.3V_6 G14 FBVDDQ AD13 GND GND P15
FBA_D17 C16 VMA_DQ17 C134 Dis@10U/6.3V_6 G15 FBVDDQ A26 GND GND P17
FBA_CKE_H VMA_CMD19 R27 Dis@10K/F_4 FBA_D18 A13 VMA_DQ18 G16 FBVDDQ AD15 GND GND P2
FBA_D19 A15 VMA_DQ19 G18 FBVDDQ AD16 GND GND P23
FBA_D20 B18 VMA_DQ20 G19 FBVDDQ AD18 GND GND P26
FBA_D21 A18 VMA_DQ21 G20 FBVDDQ AD19 GND GND P5
FBA_D22 A19 VMA_DQ22 G21 FBVDDQ AD21 GND GND R10
FBA_D23 C19 VMA_DQ23 H24 FBVDDQ AD22 GND GND R12
FBA_D24 B24 VMA_DQ24 H26 FBVDDQ AE11 GND GND R14
FBA_D25 C23 VMA_DQ25 J21 FBVDDQ AE14 GND GND R16
FBA_D26 A25 VMA_DQ26 K21 FBVDDQ AE17 GND GND R18
FBA_D27 A24 VMA_DQ27 L22 FBVDDQ AE20 GND GND T11
FBA_D28 A21 VMA_DQ28 L24 FBVDDQ AB11 GND GND T13
FBA_D29 B21 VMA_DQ29 L26 FBVDDQ AF1 GND GND T15
FBA_D30 C20 VMA_DQ30 M21 FBVDDQ AF11 GND GND T17
FBA_D31 C21 VMA_DQ31 N21 FBVDDQ AF14 GND GND U10
FBA_D32 R22 VMA_DQ32 R21 FBVDDQ AF17 GND GND U12
[24] VMA_DQ[63..0]
C27 FBA_CMD0 FBA_D33 R24 VMA_DQ33 T21 FBVDDQ AF20 GND GND U14
[24] VMA_CMD0 [24] VMA_DM[7..0]
VMA_CMD1 C26 FBA_CMD1 FBA_D34 T22 VMA_DQ34 V21 FBVDDQ AF23 GND GND U16
TP63 [24] VMA_WDQS[7..0]
E24 FBA_CMD2 FBA_D35 R23 VMA_DQ35 W 21 FBVDDQ AF5 GND GND U18
[24] VMA_CMD2 [24] VMA_RDQS[7..0]
F24 FBA_CMD3 FBA_D36 N25 VMA_DQ36 AF8 GND GND U2
[24] VMA_CMD3 D27 FBA_CMD4 FBA_D37 N26 VMA_DQ37 AG2 GND GND U23
[24] VMA_CMD4 D26 FBA_CMD5 FBA_D38 N23 VMA_DQ38 AG26 GND GND U26
[24] VMA_CMD5 F25 FBA_CMD6 FBA_D39 N24 VMA_DQ39 AB14 GND GND U5
[24] VMA_CMD6
F26 FBA_CMD7 FBA_D40 V23 VMA_DQ40 B1 GND GND V11
[24] VMA_CMD7 F23 FBA_CMD8 FBA_D41 V22 VMA_DQ41 B11 GND GND V13
[24] VMA_CMD8
B G22 FBA_CMD9 FBA_D42 T23 VMA_DQ42 B14 GND GND V15 B
[24] VMA_CMD9
G23 FBA_CMD10 FBA_D43 U22 VMA_DQ43 B17 GND GND V17
[24] VMA_CMD10 G24 FBA_CMD11 FBA_D44 Y24 VMA_DQ44 B20 GND GND Y2
[24] VMA_CMD11
F27 FBA_CMD12 FBA_D45 AA24 VMA_DQ45 B23 GND GND Y23
[24] VMA_CMD12
G25 FBA_CMD13 FBA_D46 Y22 VMA_DQ46 B27 GND GND Y26
[24] VMA_CMD13 G27 FBA_CMD14 FBA_D47 AA23 VMA_DQ47 B5 GND GND Y5
[24] VMA_CMD14 G26 FBA_CMD15 FBA_D48 AD27 VMA_DQ48 B8 GND
[24] VMA_CMD15 M24 FBA_CMD16 FBA_D49 AB25 VMA_DQ49 E11 GND
[24] VMA_CMD16
VMA_CMD17 M23 FBA_CMD17 FBA_D50 AD26 VMA_DQ50 E14 GND
TP46 K24 AC25 VMA_DQ51 E17
[24] VMA_CMD18 FBA_CMD18 FBA_D51 GND
K23 FBA_CMD19 FBA_D52 AA27 VMA_DQ52 E2 GND
[24] VMA_CMD19
M27 FBA_CMD20 FBA_D53 AA26 VMA_DQ53 E20 GND
[24] VMA_CMD20 M26 FBA_CMD21 FBA_D54 W 26 VMA_DQ54 E22 GND
[24] VMA_CMD21 M25 FBA_CMD22 FBA_D55 Y25 VMA_DQ55 E25 GND
[24] VMA_CMD22
K26 FBA_CMD23 FBA_D56 R26 VMA_DQ56 E5 GND
[24] VMA_CMD23 K22 FBA_CMD24 FBA_D57 T25 VMA_DQ57 E8 GND
[24] VMA_CMD24 J23 FBA_CMD25 FBA_D58 N27 VMA_DQ58 H2 GND
[24] VMA_CMD25 J25 FBA_CMD26 FBA_D59 R27 VMA_DQ59 H23 GND
[24] VMA_CMD26
J24 FBA_CMD27 FBA_D60 V26 VMA_DQ60 H25 GND
[24] VMA_CMD27
K27 FBA_CMD28 FBA_D61 V27 VMA_DQ61 FB_CAL_PD_VDDQ D22 FB_CAL_PD_VDDQ R80 Dis@40.2/F_4 +1.35V_GFX H5 GND
[24] VMA_CMD28 K25 FBA_CMD29 FBA_D62 W 27 VMA_DQ62 K11 GND
[24] VMA_CMD29
J27 FBA_CMD30 FBA_D63 W 25 VMA_DQ63 K13 GND
[24] VMA_CMD30 VMA_CMD31 J26 FBA_CMD31 FB_CAL_PU_GND C24 FB_CAL_PU_GND R73 Dis@42.2/F_4 K15 GND
TP62 K17 GND
FBA_DQM0 D19 VMA_DM0 L10 GND
FBA_DQM1 D14 VMA_DM1 FB_CALTERM_GND B25 FB_CAL_TERM_GND R359 Dis@51.1/F_4 L12 GND
FBA_DQM2 C17 VMA_DM2 L14 GND
FBA_DQM3 C22 VMA_DM3 L16 GND
R68 *Dis@60.4/F_4_NC FBA_DQM4 P24 VMA_DM4 L18 GND
+1.35V_GFX
R64 *Dis@60.4/F_4_NC FBA_DQM5 W 24 VMA_DM5 L2 GND
C
FBA_DQM6 AA25 VMA_DM6 L23 GND C
FBA_DEBUG F22 FBA_DEBUG0 FBA_DQM7 U25 VMA_DM7 L25 GND
FBA_DEBUG1 J22 FBA_DEBUG1 L5 GND GND AA7
M11 GND GND AB7
FBA_DQS_WP0 E19 VMA_WDQS0
FBA_DQS_WP1 C15 VMA_WDQS1
VMA_CLKP0 D24 FBA_CLK0 FBA_DQS_WP2 B16 VMA_WDQS2
[24] VMA_CLKP0
VMA_CLKN0D25 FBA_CLK0 FBA_DQS_WP3 B22 VMA_WDQS3
[24] VMA_CLKN0
VMA_CLKP1N22 FBA_CLK1 FBA_DQS_WP4 R25 VMA_WDQS4
[24] VMA_CLKP1
VMA_CLKN1M22 FBA_CLK1 FBA_DQS_WP5 W 23 VMA_WDQS5
[24] VMA_CLKN1
FBA_DQS_WP6 AB26 VMA_WDQS6
FBA_DQS_WP7 T26 VMA_WDQS7

D18 FBA_WCK01 FBA_DQS_RN0 F19 VMA_RDQS0


C18 FBA_WCK01 FBA_DQS_RN1 C14 VMA_RDQS1
D17 FBA_WCK23 FBA_DQS_RN2 A16 VMA_RDQS2
D16 FBA_WCK23 FBA_DQS_RN3 A22 VMA_RDQS3
T24 FBA_WCK45 FBA_DQS_RN4 P25 VMA_RDQS4
U24 FBA_WCK45 FBA_DQS_RN5 W 22 VMA_RDQS5
V24 FBA_WCK67 FBA_DQS_RN6 AB27 VMA_RDQS6
V25 FBA_WCK67 FBA_DQS_RN7 T27 VMA_RDQS7
FB_PLLAVDD = 55mA

L3 Dis@PBY160808T-300Y-N+FB_PLLAVDD F16 FB_PLLAVDD


+1.05V_GFX
P22 FB_PLLAVDD
C96 Dis@1U/6.3V_4
C142 Dis@0.1U/16V_4 H22 FB_DLLAVDD FB_PLLAVDD
D C138 Dis@0.1U/16V_4 D

GF119/GK208 GF117

FB_DLLAVDD = 15mA

D23 FB_VREF_PROBE
Quanta Computer Inc.
FB_VREF_PROBE TP9
PROJECT : JW8B
Size Document Number Rev
A
DGPU 2/5 (Memory)
Date: Thursday, June 13, 2013 Sheet 21 of 57
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U13G U13J
4/14 IFPAB
7/14 IFPEF
GF117 GF119/GK208 GF119/GK208
AC4 GF117
NC IFPA_TXC DVI-DL DVI-SL/HDMI DP
IFPA_TXC AC3
GF119/GK208 GF117 NC GF117
NC I2CY_SDA I2CY_SDA IFPE_AUX J3
AA6 GF119 GK208 J2
IFPAB_RSET NC NC I2CY_SCL I2CY_SCL IFPE_AUX
IFPA_TXD0 Y3 NC_J7 J7 IFPEF_PLLVDD
NC NC
IFPA_TXD0 Y4
NC
IFPE_L3 J1
NC TXC TXC
NC_V7 V7 IFPAB_PLLVDD IFPE_L3 K1
NC NC TXC TXC
NC IFPA_TXD1 AA2 NC_K7 K7 IFPEF_PLLVDD NC
NC_W7 W 7 IFPAB_PLLVDD NC NC IFPA_TXD1 AA3 IFPE_L2 K3
A NC TXD0 TXD0 K2 A
IFPE_L2 U13K
NC TXD0 TXD0 +3V_GFX
3/14 DACA
IFPA_TXD2 AA1 K6 IFPEF_RSET IFPE_L1 M3
NC NC NC TXD1 TXD1
AB1 M2 GF119/GK208 GF117 GF117 GF119/GK208
NC IFPA_TXD2 NC TXD1 TXD1 IFPE_L1
NC_W5 W 5 DACA_VDD NC NC I2CA_SCL B7 I2CA_SCL R375 Dis@2.2K_4
IFPE_L0 M1 I2CA_SDA A7 I2CA_SDA R376 Dis@2.2K_4
NC TXD2 TXD2 NC
IFPA_TXD3 AA5 IFPE_L0 N1 AE2 DACA_VREF
NC NC TXD2 TXD2 TSEN_VREF
IFPA_TXD3 AA4
NC
AF2 DACA_RSET NC NC DACA_HSYNC AE3
NC FOR GK208
IFPE NC DACA_VSYNC AE4
IFPB_TXC AB4
NC
IFPB_TXC AB5
NC
NC GPIO18 C2 DACA_RED AG3
GF119/GK208 HPD_E HPD_E NC
GF117
NC_W6 W 6 IFPA_IOVDD NC NC IFPB_TXD4 AB2 DACA_GREEN AF4
GF117 NC
IFPB_TXD4 AB3
NC GF119 GK208
NC_Y6 Y6 IFPB_IOVDD DACA_BLUE AF3
NC NC
NC_H6 H6 IFPE_IOVDD NC
NC IFPB_TXD5 AD2 GF119/GK208
AD3 NC_J6 J6 GF117
NC IFPB_TXD5 IFPF_IOVDD NC DVI-DL DVI-SL/HDMI DP

NC IFPF_AUX H4
I2CZ_SDA
IFPB_TXD6 AD1 NC I2CZ_SCL IFPF_AUX H3
NC
NC IFPB_TXD6 AE1

NC TXC IFPF_L3 J5
IFPB_TXD7 AD5 NC TXC IFPF_L3 J4
NC
IFPB_TXD7 AD4
NC
NC TXD3 TXD0 IFPF_L2 K5
NC IFPF_L2 K4
TXD3 TXD0
B B
NC TXD4 TXD1 IFPF_L1 L4
IFPF NC TXD4 TXD1 IFPF_L1 L3
NC GPIO14 B3
IFPAB NC
NC
TXD5
TXD5
TXD2
TXD2
IFPF_L0
IFPF_L0
M5
M4

NC FOR GK208
U13H
5/14 IFPC
IFPC NC HPD_F GPIO19 F7
GF119/GK208 GF117
T6 IFPC_RSET GF117 GF119/GK208
NC

DVI/HDMI DP

NC_M7 M7 IFPC_PLLVDD NC NC I2CW_SDA IFPC_AUX N5


NC_N7 N7 IFPC_PLLVDD NC NC I2CW_SCL IFPC_AUX N4

IFPC_L3 N3 PLLVDD = 38mA


NC TXC
NC IFPC_L3 N2
TXC
+1.05V_GFX L10 Dis@PBY160808T-300Y-N NV_PLLVDD
IFPC_L2 R3 C137 Dis@0.1U/16V_4
NC TXD0
IFPC_L2 R2 C139 Dis@10U/6.3VS_6
NC TXD0

TXD1 IFPC_L1 R1
NC
NC TXD1 IFPC_L1 T1
SP_PLLVDD = 17mA U13M C445
IFPC_L0 T3 9/14 XTAL_PLL
NC TXD2
C
IFPC_L0 T2 L9 Dis@HCB1608KF-181T15 SP_PLLVDD C
NC TXD2 +1.05V_GFX

4
3
C104 Dis@0.1U/16V_4 L6 PLLVDD Dis@10P/50V_4
C103 Dis@0.1U/16V_4 M6 SP_PLLVDD CLK_27M_XTAL_IN Y2
C110 Dis@4.7U/6.3V_6 CLK_27M_XTAL_OUT Dis@27MHZ +-10PPM
NC_P6 P6 IFPC_IOVDD NC GPIO15 C3 C111 Dis@10U/6.3VS_6 N6 VID_PLLVDD
NC NC
C446

1
2
GF119/GK208 GF117
VID_PLLVDD = 41mA
Dis@10P/50V_4
U13I
6/14 IFPD R381 XTAL_SSIN A10
Dis@10K/F_4 XTALSSIN XTALOUTBUFF C10 BXTALOUT R382 Dis@10K/F_4
GF119/GK208 GF117
U6 GF117 GF119/GK208 CLK_27M_XTAL_IN C11 B10 CLK_27M_XTAL_OUT
IFPD_RSET NC XTALIN XTALOUT
DVI/HDMI DP

NC_T7 T7 IFPD_PLLVDD I2CX_SDA IFPD_AUX P4


NC NC
NC I2CX_SCL IFPD_AUX P3
NC_R7 R7 IFPD_PLLVDD 0102: Power sequence
NC
+3V_GFX
IFPD_L3 R5
NC TXC
IFPD_L3 R4
NC TXC
DGPU_PGOK-1
IFPD_L2 T5 +3.3V_RUN R371
NC TXD0
IFPD_L2 T4 *Dis@4.7K_4_NC
NC TXD0
3

TXD1 IFPD_L1 U4 R386 DGPU_POK4 2


Dis@4.7K_4 Q35
NC +1.05V_GFX
IFPD NC TXD1 IFPD_L1 U3 Dis@MMST3904-7-F R399
DGPU_PWROK [9,20]
Dis@4.7K_4
1

D
IFPD_L0 V4 C448 D
NC TXD2

3
IFPD_L0 V3 *Dis@1000P/50V_4_NC
NC TXD2
2 Q36 R377
3

Dis@DTC144EUADis@100K/F_4
NC_R6 R6 IFPD_IOVDD GPIO17 D4 R398 DGPU_POK2 2
Dis@4.7K_4 Q38
NC NC +1.35V_GFX
Dis@MMST3904-7-F
Quanta Computer Inc.
1
C461
1

GF119/GK208 GF117
C462 Dis@1000P/50V_4
*Dis@1000P/50V_4_NC
PROJECT : JW8B
Size Document Number Rev
A
DGPU 3/5 (Display)
Date: Friday, June 21, 2013 Sheet 22 of 57
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

22
+3V_GFX +3V_GFX
U13L Default: HYNIX
10/14 MISC2

GF117/GF119/GK208
*Dis@10K/F_4_NC
R413 R412 R100 Dis@45.3K/F_4 R343
E10 VMON_IN0 NC
R356
F10 VMON_IN1 ROM_CS D12 ROM_CS TP12 R362 R349
NC

Dis@4.99K/F_4

Dis@4.99K/F_4

Dis@4.99K/F_4
*Dis@10K/F_4_NC *Dis@10K/F_4_NC
ROM_SI B12 ROM_SI
ROM_SO A12 ROM_SO ROM_SI STRAP0
STRAP0 D1 STRAP0 ROM_SCLK C12 ROM_SCLK ROM_SO STRAP1
STRAP1 D2 STRAP1 ROM_SCLK STRAP2
A STRAP2 E4 STRAP2 STRAP3 A
STRAP3 E3 STRAP3 STRAP4
STRAP4 D3 STRAP4

GF117
GF119
GK208 R401 R400 R101 R355 R361 R342 R348 R364
C1 STRAP5_NC *Dis@10K/F_4_NC
*Dis@10K/F_4_NC
*Dis@10K/F_4_NC *Dis@10K/F_4_NC
NC

Dis@45.3K/F_4

Dis@15K/F_4

Dis@4.99K/F_4

Dis@45.3K/F_4
BUFRST D11

R70 Dis@40.2K/F_4F6 MULTISTRAP_REF0_GND NC PGOOD D10 NV_PWG R99 Dis@10K/F_4

GF117 GF117
GF119 GF119
GK208 GK208
F4 MULTISTRAP_REF1_GND NC 4.99K: CS24992FB00 RES CHIP 4.99K 1/16W +-1% (0402)
CEC E9 45K: CS34502FB00 RES CHIP 45K 1/16W +-1%(0402)
NC
F5 MULTISTRAP_REF2_GND NC GF117 15K: CS31502FB24 RES CHIP 15K 1/16W +-1% (0402)
GK208
GF119 Binary Strap Mode Mapping 30.1K: CS33012FB18 RES CHIP 30.1K 1/16W +-1%(0402)
34.8K : CS33482FB22 RES CHIP 34.8K 1/16W +-1% (0402)

Strap Pin name Strap Mapping Resistance Note


PCI_DEVID[4]
SUB_VENOOR 1000 , SUB: no Video BIOS
U13N ROM_SCLK PCI_DEVID[5] 5Kohm , H
8/14 MISC1 PEX_PLL_EN
I2CS_SCL D9 GFx_SCL VGA_PWR_LEVEL
I2CS_SDA D8 GFx_SDA
RAM_CFG[2] 4.99K 1000 --> Micron MT41K128M16JT-107G:K (Default)
I2CC_SCL A9 DGPU_EDIDCLK R373 Dis@2.2K_4 ROM_SI RAM_CFG[1] 5Kohm , H 30.1K 1101 --> Micron MT41K256M16HA-107G:E
+3V_GFX
B
I2CC_SDA B9 DGPU_EDIDDATA R374 Dis@2.2K_4 RAM_CFG[0] 34.8K 1110 --> Hynix H5TC4G63AFR-11C B

3
GF119 2
[38] VGA_PWR_LEVEL_EC Q16 FB[1]
E12 GF117 GK208
[43] VGA_THERMDN THERMDN Dis@2N7002W FB[0] 1000 , FB: 256 MB (Default)
I2CB_SCL C9 N12E_SCL R97 Dis@2.2K_4 ROM_SO SMB_ALT_ADDR 5Kohm , H SMB:0x9E
NC +3V_GFX

1
F12 THERMDP I2CB_SDA C8 N12E_SDA R96 Dis@2.2K_4 VGA_DEVICE
[43] VGA_THERMDP NC

TP18 JTAG_TCK AE5 JTAG_TCK STRAP0 User strap [3:0] 45Kohm , H 1111 , EDID is used
TP19 JTAG_TMS AD6 JTAG_TMS
TP16 JTAG_TDI AE6 JTAG_TDI
TP15 JTAG_TDO AF6 JTAG_TDO STRAP1 3GIO_CFG[3:0] 45Kohm , D 1111 , USER defined
JTAG_TRST# AG4 JTAG_TRST GPIO0 C6 FB_CLAMP_MON R71 *Dis@0_4_SHORT_NC
B2 PS_FB_CLAMP [21,38,55]
GPIO1 MEM_VDD_CTL TP31
GPIO2 D6 LCD_BL_PWM TP33 STRAP2 PCI_DEVID[3:0] 15Kohm , D 010010 , N14P-GV2
GPIO3 C7 LCD_VCC TP10
GPIO4 F9 LCD_BLEN TP11
GPIO5 A3 STRAP3 SOR[3:0]_EXPOSED 5Kohm , D 0000 , IFPx port not use
GPIO6 A4 FB_CLAMP_TGL_REQ#
FB_CLAMP_TGL_REQ# [38]
GPIO7 B6 3DVISION RESERVED
GK208 TP34
GPIO8 A6 VGA_OVT# PCIE_SPEED_GEN3
OVERT
GPIO9 F8 ALERT STRAP4 PCIE_MAX_SPEED 45Kohm , D 0111 , PCIE GEN3 setting
GPIO10 C5 MEM_VREF_CTL DP_PLL_VDD33V
E7 TP32
GPIO11 DGPU_PWM_VID
DGPU_PWM_VID [54]
GPIO12 D7 VGA_PWR_LEVEL
B4 DGPU_PSI VGA_PWR_LEVEL [54]

GPIO ASSIGNMENTS ( GB2-64 )


GPIO13 DGPU_PSI [54]
VRAM Configuration Table
GK208 GF117 GF119
RAMCFG
D5 GPU_GPIO16 TP30 DESCRIPTION Vendor DELL P/N QCI P/N
C
GPIO16 NC GPIO16
GPIO20 E6 GPIO I/O PIN USAGE [3:0] C
GPIO20 NC
GPIO21 C4 0000
GPIO8 NC
0 IN FB_CLAMP_MON FB Clamp monitor 1000 MT41K128M16JT-107G:K Micron NA AKD5DGSTL00
1 OUT MEM_VDD_CTL MEMORY VDD ID 0x8 (FCBGA)(96P)

2 OUT LCD_BL_PWM LCD BACKLIGHT PWM


3 OUT LCD_VCC PANEL POWER ENABLE
+3.3V_RUN 1101 MT41K256M16HA-107G:E Micron NA AKD5PGSTL00
4 OUT LCD_BLEN PANEL BACKLIGHT ENABLE 0xD
R127 Dis@4.7K_4
+3V_GFX 5 RESERVE
5

1110 H5TC4G63AFR-11C Hynix NA AKD5PGWTW05


FB_CLAMP_TGL_REQ#R8 Dis@10K/F_4 0xE
GFx_SCL 4 3 6 OUT FB_CLAMP_TGL_REQ# # --> FB Clamp toggle request
SMBCLK3 [25,31,38,42,43]
Q14A +3V_GFX 7 OUT 3DVision 3D VISION LEFT/RIGHT VISION
Dis@DMN66D0LDW-7
8 I/O OVERT ACTIVE LOW THERMAL OVER TEMP
+3V_GFX
VGA_PWR_LEVEL R372 Dis@10K/F_4
9 I/O ALERT ACTIVE LOW THERMAL ALERT
2

Q14B VGA_OVT# R94 Dis@10K/F_4


Dis@DMN66D0LDW-7
10 OUT MEM_VREF_CTL MEMMORY VREF CONTROL
GFx_SDA 1 6
SMBDAT3 [25,31,38,42,43] ALERT R98 Dis@10K/F_4
11 OUT PWM_VID GPU Core VDD PWM control
R126 Dis@4.7K_4 JTAG_TRST# R295 Dis@10K/F_4
+3V_GFX 12 IN PWR_LEVEL Power Detect ,HIGH=AC, LOW=DC
13 OUT PSI Phase Shedding
D D
[20] PEGX_RST# 14 IN HPD_A HOT PLUG DETECT FOR IFPAB
for meet Power down sequence for +3V_GFX 15 IN HPD_C HOT PLUG DETECT FOR IFPC
2

16 OUT FRM_LCK MEMMORY VDD CONTROL


VGA_OVT# 1 3 D3 *Dis@SDM10K45-7-F_NC
DGPU_OVT# [38,45] +VGACORE 17 IN HPD_D HOT PLUG DETECT FOR IFPD Quanta Computer Inc.
+3V_GFX 18 IN HPD_E HOT PLUG DETECT FOR IFPE
Q39 D2 *Dis@SDM10K45-7-F_NC PROJECT : JW8B
*Dis@2N7002W_NC +1.35V_GFX 19 IN HPD_F or HPD_B HOT PLUG DETECT FOR IFPF Size Document Number Rev
A
20/21 RESERVE DGPU 4/5 (MIO/GPIO)
Date: Monday, July 08, 2013 Sheet 23 of 57
1 2 3 4 5 6 7 8
5 4 3 2 1

[21]
[21]
[21]
[21]
VMA_DQ[63..0]
VMA_DM[7..0]
VMA_WDQS[7..0]
VMA_RDQS[7..0] CHANNEL A: 256MB/512MB DDR3
23
VRAM2 VRAM4 VRAM1 VRAM3

VREFC_VMA1 M8 E3 VMA_DQ13 VREFC_VMA1 M8 E3 VMA_DQ25 VREFC_VMA3 M8 E3 VMA_DQ40 VREFC_VMA3 M8 E3 VMA_DQ62


VREFD_VMA1 H1 VREFCA DQL0 F7 VMA_DQ9 VREFD_VMA1 H1 VREFCA DQL0 F7 VMA_DQ28 VREFD_VMA3 H1 VREFCA DQL0 F7 VMA_DQ45 VREFD_VMA3 H1 VREFCA DQL0 F7 VMA_DQ58
VREFDQ DQL1 F2 VMA_DQ15 VREFDQ DQL1 F2 VMA_DQ27 VREFDQ DQL1 F2 VMA_DQ42 VREFDQ DQL1 F2 VMA_DQ60
N3 DQL2 F8 VMA_DQ8 VMA_CMD9 N3 DQL2 F8 VMA_DQ29 VMA_CMD9 N3 DQL2 F8 VMA_DQ46 VMA_CMD9 N3 DQL2 F8 VMA_DQ57
[21] VMA_CMD9 A0 DQL3 A0 DQL3 A0 DQL3 A0 DQL3
D P7 H3 VMA_DQ14 VMA_CMD11 P7 H3 VMA_DQ26 VMA_CMD11 P7 H3 VMA_DQ43 VMA_CMD11 P7 H3 VMA_DQ61 D
[21] VMA_CMD11 A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
P3 H8 VMA_DQ10 VMA_CMD8 P3 H8 VMA_DQ31 VMA_CMD8 P3 H8 VMA_DQ47 VMA_CMD8 P3 H8 VMA_DQ59
[21] VMA_CMD8 A2 DQL5 A2 DQL5 A2 DQL5 A2 DQL5
N2 G2 VMA_DQ12 VMA_CMD25 N2 G2 VMA_DQ24 VMA_CMD25 N2 G2 VMA_DQ41 VMA_CMD25 N2 G2 VMA_DQ63
[21] VMA_CMD25 A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6
P8 H7 VMA_DQ11 VMA_CMD10 P8 H7 VMA_DQ30 VMA_CMD10 P8 H7 VMA_DQ44 VMA_CMD10 P8 H7 VMA_DQ56
[21] VMA_CMD10 A4 DQL7 A4 DQL7 A4 DQL7 A4 DQL7
P2 VMA_CMD24 P2 VMA_CMD24 P2 VMA_CMD24 P2
[21] VMA_CMD24 A5 A5 A5 A5
R8 VMA_CMD22 R8 VMA_CMD22 R8 VMA_CMD22 R8
[21] VMA_CMD22 A6 A6 A6 A6
R2 D7 VMA_DQ5 VMA_CMD7 R2 D7 VMA_DQ16 VMA_CMD7 R2 D7 VMA_DQ32 VMA_CMD7 R2 D7 VMA_DQ54
[21] VMA_CMD7 A7 DQU0 A7 DQU0 A7 DQU0 A7 DQU0
T8 C3 VMA_DQ1 VMA_CMD21 T8 C3 VMA_DQ23 VMA_CMD21 T8 C3 VMA_DQ36 VMA_CMD21 T8 C3 VMA_DQ48
[21] VMA_CMD21 A8 DQU1 A8 DQU1 A8 DQU1 A8 DQU1
R3 C8 VMA_DQ6 VMA_CMD6 R3 C8 VMA_DQ18 VMA_CMD6 R3 C8 VMA_DQ34 VMA_CMD6 R3 C8 VMA_DQ55
[21] VMA_CMD6 A9 DQU2 A9 DQU2 A9 DQU2 A9 DQU2
L7 C2 VMA_DQ3 VMA_CMD29 L7 C2 VMA_DQ21 VMA_CMD29 L7 C2 VMA_DQ38 VMA_CMD29 L7 C2 VMA_DQ51
[21] VMA_CMD29 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
R7 A7 VMA_DQ4 VMA_CMD23 R7 A7 VMA_DQ17 VMA_CMD23 R7 A7 VMA_DQ33 VMA_CMD23 R7 A7 VMA_DQ53
[21] VMA_CMD23 A11 DQU4 A11 DQU4 A11 DQU4 A11 DQU4
N7 A2 VMA_DQ2 VMA_CMD28 N7 A2 VMA_DQ20 VMA_CMD28 N7 A2 VMA_DQ37 VMA_CMD28 N7 A2 VMA_DQ50
[21] VMA_CMD28 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5
T3 B8 VMA_DQ7 VMA_CMD20 T3 B8 VMA_DQ19 VMA_CMD20 T3 B8 VMA_DQ35 VMA_CMD20 T3 B8 VMA_DQ52
[21] VMA_CMD20 A13 DQU6 A13 DQU6 A13 DQU6 A13 DQU6
T7 A3 VMA_DQ0 VMA_CMD4 T7 A3 VMA_DQ22 VMA_CMD4 T7 A3 VMA_DQ39 VMA_CMD4 T7 A3 VMA_DQ49
[21] VMA_CMD4 A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 VMA_CMD14 M7 VMA_CMD14 M7 VMA_CMD14 M7
[21] VMA_CMD14 A15 A15 A15 A15

M2 B2 VMA_CMD12 M2 B2 VMA_CMD12 M2 B2 VMA_CMD12 M2 B2


[21] VMA_CMD12 BA0 VDD#B2 +1.35V_GFX BA0 VDD#B2 BA0 VDD#B2 +1.35V_GFX BA0 VDD#B2
N8 D9 VMA_CMD27 N8 D9 VMA_CMD27 N8 D9 VMA_CMD27 N8 D9
[21] VMA_CMD27 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
M3 G7 VMA_CMD26 M3 G7 VMA_CMD26 M3 G7 VMA_CMD26 M3 G7
[21] VMA_CMD26 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
K2 K2 K2 K2
VDD#K2 K8 VDD#K2 K8 VDD#K2 K8 VDD#K2 K8
VDD#K8 N1 VDD#K8 N1 VDD#K8 N1 VDD#K8 N1
J7 VDD#N1 N9 VMA_CLKP0 J7 VDD#N1 N9 J7 VDD#N1 N9 VMA_CLKP1 J7 VDD#N1 N9
[21] VMA_CLKP0 CK VDD#N9 CK VDD#N9 [21] VMA_CLKP1 CK VDD#N9 CK VDD#N9
K7 R1 VMA_CLKN0 K7 R1 K7 R1 VMA_CLKN1 K7 R1
[21] VMA_CLKN0 CK VDD#R1 CK VDD#R1 [21] VMA_CLKN1 CK VDD#R1 CK VDD#R1 +1.35V_GFX
K9 R9 VMA_CMD3 K9 R9 K9 R9 VMA_CMD19 K9 R9
[21] VMA_CMD3 CKE VDD#R9 CKE VDD#R9 [21]
+1.35V_GFX VMA_CMD19 CKE VDD#R9 CKE VDD#R9

K1 A1 VMA_CMD2 K1 A1 K1 A1 VMA_CMD18 K1 A1
[21] VMA_CMD2 ODT VDDQ#A1 ODT VDDQ#A1 [21] VMA_CMD18 ODT VDDQ#A1 ODT VDDQ#A1
L2 A8 VMA_CMD0 L2 A8 L2 A8 VMA_CMD16 L2 A8
[21] VMA_CMD0 CS VDDQ#A8 CS VDDQ#A8 [21] VMA_CMD16 CS VDDQ#A8 CS VDDQ#A8
C J3 C1 VMA_CMD30 J3 C1 VMA_CMD30 J3 C1 VMA_CMD30 J3 C1 C
[21] VMA_CMD30 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1
K3 C9 VMA_CMD15 K3 C9 VMA_CMD15 K3 C9 VMA_CMD15 K3 C9
[21] VMA_CMD15 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9
L3 D2 VMA_CMD13 L3 D2 VMA_CMD13 L3 D2 VMA_CMD13 L3 D2
[21] VMA_CMD13 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
E9 E9 E9 E9
VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1
VMA_WDQS1 F3 VDDQ#F1 H2 VMA_WDQS3 F3 VDDQ#F1 H2 VMA_WDQS5 F3 VDDQ#F1 H2 VMA_WDQS7 F3 VDDQ#F1 H2
VMA_RDQS1 G3 DQSL VDDQ#H2 H9 VMA_RDQS3 G3 DQSL VDDQ#H2 H9 VMA_RDQS5 G3 DQSL VDDQ#H2 H9 VMA_RDQS7 G3 DQSL VDDQ#H2 H9
DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9

VMA_DM1 E7 A9 VMA_DM3 E7 A9 VMA_DM5 E7 A9 VMA_DM7 E7 A9


VMA_DM0 D3 DML VSS#A9 B3 VMA_DM2 D3 DML VSS#A9 B3 VMA_DM4 D3 DML VSS#A9 B3 VMA_DM6 D3 DML VSS#A9 B3
DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1
VSS#E1 G8 VSS#E1 G8 VSS#E1 G8 VSS#E1 G8
VMA_WDQS0 C7 VSS#G8 J2 VMA_WDQS2 C7 VSS#G8 J2 VMA_WDQS4 C7 VSS#G8 J2 VMA_WDQS6 C7 VSS#G8 J2
VMA_RDQS0 B7 DQSU VSS#J2 J8 VMA_RDQS2 B7 DQSU VSS#J2 J8 VMA_RDQS4 B7 DQSU VSS#J2 J8 VMA_RDQS6 B7 DQSU VSS#J2 J8
DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1
VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
T2 VSS#P1 P9 VMA_CMD5 T2 VSS#P1 P9 VMA_CMD5 T2 VSS#P1 P9 VMA_CMD5 T2 VSS#P1 P9
[21] VMA_CMD5 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
T1 T1 T1 T1
VMA_ZQ1 L8 VSS#T1 T9 VMA_ZQ2 L8 VSS#T1 T9 VMA_ZQ3 L8 VSS#T1 T9 VMA_ZQ4 L8 VSS#T1 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9

B1 B1 B1 B1
VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9
R85 VSSQ#B9 D1 R368 VSSQ#B9 D1 R31 VSSQ#B9 D1 R302 VSSQ#B9 D1
Should be 240 VSSQ#D1 Should be 240 VSSQ#D1 Should be 240 VSSQ#D1 Should be 240 VSSQ#D1
Ohms +-1% Dis@243/F_4 D8 Ohms +-1% Dis@243/F_4 D8 Ohms +-1% Dis@243/F_4 D8 Ohms +-1% Dis@243/F_4 D8
VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2
J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
B J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 B
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
96-BALL 96-BALL 96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
Dis@VRAM _DDR3L_Micron_128MX16 Dis@VRAM _DDR3L_Micron_128MX16 Dis@VRAM _DDR3L_Micron_128MX16 Dis@VRAM _DDR3L_Micron_128MX16

+1.35V_GFX +1.35V_GFX +1.35V_GFX +1.35V_GFX

VMA_CLKP0
R360 R89 R47 R301
Dis@1.33K/F_4 Dis@1.33K/F_4 VMA_CLKP1 Dis@1.33K/F_4 Dis@1.33K/F_4

R378
Dis@162/F_4 VREFC_VMA1 VREFD_VMA1 VREFC_VMA3 VREFD_VMA3
R23
VMA_CLKN0 Dis@162/F_4
R366 C440 R93 C170 R41 C37 R296 C420
Dis@1.33K/F_4 Dis@0.1U/16V_4 Dis@1.33K/F_4 Dis@0.1U/16V_4 Dis@1.33K/F_4 Dis@0.1U/16V_4 Dis@1.33K/F_4 Dis@0.1U/16V_4
VMA_CLKN1

+1.35V_GFX
+1.35V_GFX
+1.35V_GFX
A C407 Dis@10U/6.3V_6 C459 Dis@10U/6.3V_6 +1.35V_GFX A

C449 Dis@220U/2.5V_3528 +1.35V_GFX C429 Dis@1U/6.3V_4 C26 Dis@10U/6.3V_6 C161 Dis@10U/6.3V_6


1 2 C431 Dis@1U/6.3V_4
+

C164 Dis@10U/6.3V_6 C432 Dis@1U/6.3V_4 C188 Dis@0.1U/16V_4 C9 Dis@10U/6.3V_6


C162 Dis@1U/6.3V_4 C160 Dis@0.1U/16V_4
C5 Dis@1U/6.3V_4 C159 Dis@1U/6.3V_4 C434 Dis@1U/6.3V_4 C433 Dis@0.1U/16V_4
C98 Dis@1U/6.3V_4 C173 Dis@1U/6.3V_4 C157 Dis@1U/6.3V_4 C447 Dis@0.1U/16V_4 Quanta Computer Inc.
C33 Dis@1U/6.3V_4 C176 Dis@1U/6.3V_4 C430 Dis@1U/6.3V_4 C29 Dis@0.1U/16V_4 C428 Dis@0.1U/16V_4
C47 Dis@1U/6.3V_4 C177 Dis@1U/6.3V_4 C21 Dis@1U/6.3V_4 C414 Dis@0.1U/16V_4 C427 Dis@0.1U/16V_4
PROJECT : JW8B
Size Document Number Rev
A
DGPU Memory 1/2 (DDR3)
Date: Thursday, June 13, 2013 Sheet 24 of 57
5 4 3 2 1
5 4 3 2 1

+3.3V_RUN DP_VDDIO +1.35V_RUN DP_VDD12 DP_VDDRX

R252 2 1 *0_6_SHORT_NC R212 2 1 *0_6_SHORT_NC R213 2 1 *0_6_SHORT_NC

1
C366 C367 C310 C311 C267 C275 C286

1U/6.3V_4

0.1U/16V_4

0.1U/16V_4

1U/6.3V_4

1U/6.3V_4

0.1U/16V_4

*0.01U/16V_4_NC
D D

2
Near IC pin 32
Near IC pin 5

TXO0N_LA [26]
TXO0P_LA [26]

TXO1N_LA [26]
TXO1P_LA [26]

TXO2N_LA [26]
TXO2P_LA [26]

TXOCN_LA [26]
TXOCP_LA [26]

[7] C320 2 1 0.1U/16V_4 EDP_AUXN_C


EDP_AUXN
C LCD_PWM [7] C
[7] C309 2 1 0.1U/16V_4
EDP_AUXP

48
47
46
45
44
43
42
41
40
39
38
37
U11

NC
NC

PWMI
DAUXn

TA0n
TA0p
TB0n
TB0p
TC0n
TC0p
TCK0n
TCK0p
EDP_AUXP_C 1 36 [26]
2 DAUXp TA1n 35 TXO0N_LB
GND TA1p TXO0P_LB [26]
[7] C283 2 1 0.1U/16V_4 EDP_TXP0_R 3 34 [26]
EDP_TXP0 DRX0p TB1n TXO1N_LB
[7] C282 2 1 0.1U/16V_4 EDP_TXN0_R 4 33
[26]
EDP_TXN0 5 DRX0n TB1p 32 TXO1P_LB
DP_VDDRX DP_VDDIO
[7] EDP_TXP1
C281 2 1 *0.1U/16V_4_NC EDP_TXP1_R 6 VDDRX
DRX1p
PS8620/23 VDDIO
TC1n
31
TXO2N_LB [26]
[7] C280 2 1 *0.1U/16V_4_NC EDP_TXN1_R 7 30
[26]
EDP_TXN1 DRX1n TC1p TXO2P_LB
DP_RST# 8 29 [26]
9 RST# TCK1n 28 TXOCN_LB
DP_PD# [26]
10 PD# TCK1p 27 TXOCP_LB
[7] DP_ENVDD [26]
EDP_HP HPD ENPVCC/I2C_ADDR DP_ENVDD
11 26

RLV_LNK/GPIO0
GND DDC_SDA EDID_SDA [26]
12 25
[26] eDP_PWM_OUT PWMO TESTMODE DDC_SCL EDID_SCL [26]

RESERVED
49 53

RLV_AMP
50 Epad RLV_CFG G 54 R470 1 2 4.7K_4
+3.3V_RUN
ENBLT
VDD12

G G

CSDA

REXT
CSCL
51 55 R474 1 2 4.7K_4
GND

GND
B G G B
52 56
G G

G
G
13
14
15
16
17
18
19
20
21
22
DP_RVL_AMP 23
24

58
57
DP_REXT
DP_RVL_LINK
DP_RVL_CFG

DP_VDDIO R184 10K_4 C271 2 12.2U/6.3V/X5R_6


DP_VDD12

R222 2 1*4.7K_4_NC
4.99K/F_4
4.99K/F_4

R237 2 14.7K_4
1
1

R271 2 1*4.7K_4_NC

R187 10K_4 C288 1U/6.3V_4


R251
R265

TP14
2
2
1

1
DP_RVL_LINK
DP_RVL_CFG

C313 C312 *4.7K_4_NC 2 1 R247


+3.3V_RUN
DP_ENVDD

*4.7K_4_NC 2 1 R242
DP_RST#

0.1U/16V_4

0.01U/16V_4
DP_PD#

SMBCLK3 [23,31,38,42,43] Link TO EC SMBus


SMBDAT3 [23,31,38,42,43]
eDP_BL_EN [38]

A DP_ENVDD: I2C Slave address selection, internal pull-down ~80K A


L: 0x10h~0x1Fh
H: 0x90h~0x9Fh

DP_RVL_LINK: LVDS single link or dual link selection, internal pull-down ~80K
L: Single link LVDS
H: Dual link LVDS
Quanta Computer Inc.
PROJECT : JW8B
Size Document Number Rev
A
eDP to LVDS (PS8620/23)
Date: Monday, July 08, 2013 Sheet 25 of 57
5 4 3 2 1
5 4 3 2 1

CVS5402M1RA-NH CN11 TXO0N_LA_R


DLP11SN900HL2L EL9 TXO0N_LB_R
4 3 *DLP11SN900HL2L_NC EL13

G_0
TXO0N_LA [25]
EC25 1 2 [25] 4 3 [25]
1 +LCDVCC TXO0P_LA TXO0N_LB
*1.5P/50V_4_NC EC29 1 2 [25]
2 TXO0P_LB
TXO0P_LA_R *1.5P/50V_4_NC
3 +3.3V_RUN TXO0P_LB_R
4 EDID_SCL [25]
[25] TXO1N_LA_R
5 EDID_SDA DLP11SN900HL2L EL10
TXO0N_LA_R TXO1N_LB_R
6 TXO0P_LA_R 4 3 *DLP11SN900HL2L_NC EL14
7 TXO1N_LA [25]
D EC26 1 2 [25] 4 3 [25] D
8 TXO1P_LA TXO1N_LB
TXO1N_LA_R *1.5P/50V_4_NC EC30 1 2 [25]
9 TXO1P_LB
TXO1P_LA_R TXO1P_LA_R *1.5P/50V_4_NC
G_1 10 TXO1P_LB_R
11 TXO2N_LA_R TXO2N_LA_R
12 TXO2P_LA_R DLP11SN900HL2L EL11 TXO2N_LB_R
13 4 3 *DLP11SN900HL2L_NC EL15
14 TXO2N_LA [25]
TXOCN_LA_R EC27 1 2 [25] 4 3 [25]
15 TXO2P_LA TXO2N_LB
TXOCP_LA_R *1.5P/50V_4_NC EC31 1 2 [25]
16 TXO2P_LB
TXO2P_LA_R *1.5P/50V_4_NC
17 TXO0N_LB_R TXO2P_LB_R
G_2 18 TXO0P_LB_R TXOCN_LA_R
19 DLP11SN900HL2L EL12 TXOCN_LB_R
20 TXO1N_LB_R 4 3 *DLP11SN900HL2L_NC EL16
21 TXOCN_LA [25]
TXO1P_LB_R EC28 1 2 [25] 4 3 [25]
22 TXOCP_LA TXOCN_LB
*1.5P/50V_4_NC EC32 1 2 [25]
23 TXOCP_LB
TXO2N_LB_R TXOCP_LA_R *1.5P/50V_4_NC
G_3 24 TXO2P_LB_R TXOCP_LB_R
25
26 TXOCN_LB_R
27 TXOCP_LB_R
28
29 USBP5+_TOUCHW CM2012B900GBE 4 3 L32
30 USBP5+ [10]
USBP5-_TOUCH 1 2
G_4 31 USBP5-
TPSCR_EN
[10]
[38]
TOUCH SCREEN
32
33 LCD_TST [38]
LCD_DBC_R R480 1 2 *0_4_NC [9]
34 LCD_DBC
35 LCD_PW M_IN +3.3V_RUN
C 36 LCD_BAK C
37
38
39 +LED_BL
40
G_5

+LED_BL +LCDVCC
7
C509 C496 C499
1

0.1U/25V/X7R_6 0.1U/25V/X7R_6 0.1U/16V_4


2

Brightness Control
D17
[25] 1
eDP_PW M_OUT
3 LCD_PW M_IN +VIN +LED_BL

LCD_VCC
1

[38] 2 R454
B LCD_PW M_EC B
+3.3V_RUN R256 *0_8_NC
BAT54C T/R 10K_4 +LCDVCC
U22
4 1
40mil
2

5 IN OUT
IN 40mil

1
2 1 3
3 GND C495
EN 0.1U/16V_4 Q28

2
1

1
C490 R479 AO3409
BAK_EN G5243A

2
1
C521

1
0.1U/16V_4 C515
2

D18 100K_4 0.1U/25V/X7R_6

2
0.1U/25VX7R_6

2
1 DP_ENVDD [25]
DP_ENVDD
EN_LCDVCC 3

2 LCD_TST 2 1
1

[38] LCD_BAK
LCD_BAK
R464 BAT54C T/R R239 100K_4
10K_4 R238 10K_4
1

R234 +3.3V_RUN 1 2

3
2

10K_4 2 Q26
DP_ENVDD R235 *0_4_NC 2N7002W
2

1
A A

Quanta Computer Inc.


PROJECT : JW8B
Size Document Number Rev
A
LVDS CONN
Date: W ednesday, July 17, 2013 Sheet 26 of 57
5 4 3 2 1
5 4 3 2 1

H/W --> HDMI PD +3.3V_RUN


+1.5V_RUN +3.3V_RUN +1.5V_RUN

TO LPT
[9] R75 *0_4_SHORT_NC
HDMI_PD#_LPT

2
1

1
HPD_HDMI_PD# R384

2
C437 C443 R82 *0_4_NC *100K_4_NC +5V_HDMIF1
0.1U/16V_4 0.01U/16V_4 [7] R414
2

2
HDMI_SCL *100K_4_NC
[7]

1
HDMI_SDA
D HPD_HDMI_PD# D

1
+3.3V_RUN

2
HDMI_DAT_SINK
+1.5V_RUN

HDMI_CLK_SINK

3
D10 D9
5 Q40A
*DMN66D0LDW -7_NC
SDM10K45-7-F SDM10K45-7-F
HDMI CN

1
6
ISET
C442
1

1
0.01U/16V_4 HDMI_SINK 2 Q40B

2
C436 C439 C438 *DMN66D0LDW -7_NC

+5V_HDMIF1_D
0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 +5V_HDMIF1_D35 CN3
2

1
50

40
39
38
37
36
35
34
33
32
31
TYPE A
49 INT_HDMI_TXP2_L 1

VDD33
PD#
GND

SDA_SRC
SCL_SRC

GND
VDDRX

SDA_SNK
SCL_SNK
VDDTX
ISET
GND 48 2
D2+

GND 47 INT_HDMI_TXN2_L 3
GND

GND INT_HDMI_TXP1_L 4
D2-
D1+

[7] C178 1 2 0.1U/16V_4 INT_HDMI_TXP2_C 1 30 INT_HDMI_TXP2_R 5 22


INT_HDMI_TXP2 IN_D2p OUT_D2p

1
3
GND

[7] C179 1 2 0.1U/16V_4 INT_HDMI_TXN2_C 2 29 INT_HDMI_TXN2_R INT_HDMI_TXN1_L 6


INT_HDMI_TXN2 IN_D2n OUT_D2n D1-

[7] 3 28 HDMI_SINK INT_HDMI_TXP0_L 7


INT_HDMI_HP HPD_SRC HPD_SNK D0+

[7] C180 1 2 0.1U/16V_4 INT_HDMI_TXP1_C 4 27 INT_HDMI_TXP1_R RP18 8


INT_HDMI_TXP1 IN_D1p OUT_D1p GND

[7] C181 1 2 0.1U/16V_4 INT_HDMI_TXN1_C 5 26 INT_HDMI_TXN1_R 2.2KX2 INT_HDMI_TXN0_L 9


INT_HDMI_TXN1 IN_D1n OUT_D1n D0-

[7] C182 1 2 0.1U/16V_4 INT_HDMI_TXP0_C 6 25 INT_HDMI_TXP0_R INT_HDMI_TXCP_L 10


INT_HDMI_TXP0 IN_D0p OUT_D0p CK+

[7] C183 1 2 0.1U/16V_4 INT_HDMI_TXN0_C 7 24 INT_HDMI_TXN0_R 11


INT_HDMI_TXN0

2
4
8 IN_D0n OUT_D0n 23 CFG INT_HDMI_TXCN_L 12
GND
CK-
C184 1 2 0.1U/16V_4 INT_HDMI_TXCP_C 9 I2C_CTL_EN CFG 22 INT_HDMI_TXCP_R 13
[7] INT_HDMI_TXCP IN_CKp OUT_CKp CEC

[7] C185 1 2 0.1U/16V_4 INT_HDMI_TXCN_C 10 21 INT_HDMI_TXCN_R 14


INT_HDMI_TXCN IN_CKn OUT_CKn RSVD
HDMI_CLK_SINK 15 23

DCIN_EN
DDCBUF
SCL
C 41 HDMI_DAT_SINK 16 C

VDDRX

VDDTA
VDDTX
SDA
GND

REXT
VDD3
42 PS8401A 17

GND
GND
GND
PRE
43 GND 18
GND

EQ
NC
+5V_RUN HDMIF1 1206L110THYR+5V_HDMIF1 +5V
GND HDMI_SINK 19 HPD

11
12
13
14
15
16
17
18
19
20

44
45
46
U2
GND

20 HDMI CONN_4 pin GND


+3.3V_RUN +1.5V_RUN 21

*0_4_SHORT_NC

*0_4_SHORT_NC
DCIN_EN
DDCBUF

2 4.99K/F_4
PRE
EQ
1

C444 C435
0.1U/16V_4 0.01U/16V_4
EMI
2

INT_HDMI_TXP2_R EL1 1 2 EXC24CG900U INT_HDMI_TXP2_L INT_HDMI_TXP2_L 1 2 INT_HDMI_TXN2_L

+1.5V_RUN
1
R95
4 3

R363
INT_HDMI_TXN2_R INT_HDMI_TXN2_L R44 *120/F_4_NC

R72
INT_HDMI_TXP1_L 1 2 INT_HDMI_TXN1_L
INT_HDMI_TXP1_R EL2 1 2 EXC24CG900U INT_HDMI_TXP1_L R52 *120/F_4_NC
INT_HDMI_TXN1_R 4 3 INT_HDMI_TXN1_L INT_HDMI_TXP0_L 1 2 INT_HDMI_TXN0_L
R55 *120/F_4_NC
+3.3V_RUN
+1.5V_RUN
INT_HDMI_TXP0_R EL3 1 2 EXC24CG900U INT_HDMI_TXP0_L INT_HDMI_TXCP_L 1 2 INT_HDMI_TXCN_L
INT_HDMI_TXN0_R 4 3 INT_HDMI_TXN0_L R59 *120/F_4_NC

INT_HDMI_TXCP_R EL4 1 2 EXC24CG900U INT_HDMI_TXCP_L


B INT_HDMI_TXCN_R 4 3 INT_HDMI_TXCN_L B

3 Level Input: Int pull-down 150k , 3.3V IO


L:LOW,internal pull down
1 2 CFG L:HDMI ID disable
H:HIGH, external pull up +3.3V_RUN
R357 *4.7K_4_NC
H:HDMI ID enable
M:VDD3/2, both external pill-up and pull-down

Int pull-down 150k , 3.3V IO


+3.3V_RUN 1 2 DCIN_EN L:default,AC coupling input
R91 *4.7K_4_NC L:no pre-emphasis
H:DC coupling input 1 2 PRE
+3.3V_RUN
R87 4.7K_4
H:1.6dB pre-emphasis
1 2 M:3.0dB pre-emphasis
R83 *4.7K_4_NC

L:default,passive DDC pass-through


1 2 DDCBUF L:default
+3.3V_RUN
R370 *4.7K_4_NC
H:active DDC buffer with default threshold 1 2 ISET
1 2 M:passive DDC pass-through with internal ~10Kohm pull up +3.3V_RUN
R380 *4.7K_4_NC
H:increase +13%
A A
R367 4.7K_4 1 2 M:increase -13%
R383 *4.7K_4_NC

1 2 EQ
Quanta Computer Inc.
+3.3V_RUN L:programmable EQ for channel loss up to 6.5dB @3Gbps
R79 *4.7K_4_NC
1 2 H:programmable EQ for channel loss up to 9.5dB @3Gbps PROJECT : JW8B
R76 *4.7K_4_NC M:programmable EQ for channel loss up to 3dB @3Gbps Size Document Number Rev
A
HDMI
Date: Monday, July 08, 2013 Sheet 27 of 57
5 4 3 2 1
5 4 3 2 1

CAMERA / DMIC Fingerprint


CN1
Conn P/N, Footprint OK. Luke 12/18

21
22 1 +3.3V_RUN FPC/FFC_6P_H=2
1 2 USBP7+_TSCR 4 3
D 3 USBP7-_TSCR 1 2 USBP7+ [10]
[10]
TOUCH SCREEN D
4 W CM2012B900GBE L4 USBP7- R475 1 2 *0_4_SHORT_NC USBP3+_R_FT 1
[10] USBP3+ 2
5 USBP4+_CN 4 3 R472 1 2 *0_4_SHORT_NC USBP3-_R_FT
6 USBP4-_CN 1 2 USBP4+ [10]
[10]
CAMERA [10] USBP3- 3
7 W CM2012B900GBE L5 USBP4- C486 4
8 DIGITAL_CLK_R R26 *short0603_NC DIGITAL_CLK2_R 5 7
0.1U/16V_4 6 8
9 DIGITAL_D1_R R29 *short0603_NC DIGITAL_D2_R
10 CN8
11 DIGITAL_CLK2_R L6 FCM1608KF-301T02
12 DIGITAL_D2_R L7 FCM1608KF-301T02
DIGITAL_CLK
DIGITAL_D1
[30]
[30]
DMIC
13 R08 connect
14
15
16
17 +5V_RUN_F HDMIF2 *0603L025YR_NC +5V_RUN
18
19 +3.3V_RUN_F HDMIF3 0603L025YR +3.3V_RUN
23 20 20
24

TOUCH SCREEN

+3.3V_RUN +5V_RUN

C DIGITAL_D1 C34 *10P/50V_4_NC C


DIGITAL_CLK C31 *10P/50V_4_NC C45
DIGITAL_D2_R C35 22P/50V_4 C90 C87 0.01U/16V_4
DIGITAL_CLK2_R C32 22P/50V_4 *4.7U/6.3V_6_NC 0.01U/16V_4

B B

A A

Quanta Computer Inc.


PROJECT : JW8B
Size Document Number Rev
A
Camera/Fingerprint Conn
Date: Monday, July 08, 2013 Sheet 28 of 57
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

Mini-PCIE CPU BKT


H8 H7 H10 H11 H13 H14
H15 H16 *INTEL-BKT-SHARK-ULT *H-TC394BC315D130P2 *h-tc394bc315d138p2 *h-tc394bc315d138p2 *h-tc394bc315d138p2 *h-tc276bc315d118p2
h-tc236bc130d130pt h-tc236bc130d130pt
4

1 3
1

1
1

H3 H4 H6 H12 H5 H9 H1 H2
*h-tc236bc315d98p2 *h-tc236bc315d98p2 *H-TSBC315D98P2 *h-tc236bc315d98p2 *h-tc315bc150d150pt *h-tc315i190bc150d150pt *h-c59d59n *h-c59d59n

A A
1

Title
<Title>

Size Document Number Rev


Custom<Doc> A

Date: Friday, May 10, 2013 Sheet 29 of 57


5 4 3 2 1
A B C D E

+5V_AUDIO +5V_AUDIO
ANALOG DIGITAL
L12 HCB1608KF-181T15 PVDD1 L13 HCB1608KF-181T15 PVDD2 +5V_AVDD L24 HCB1608KF-181T15 +5V_AUDIO

C260 C245 C255 C257 C244 C242 C500 C492


0.1U/16V_4 10U/6.3V_6 10U/6.3V_6 0.1U/16V_4 10U/6.3V_6 0.1U/16V_4 C263 C261 10U/6.3V_6 0.1U/16V_4 Moat
10U/6.3V_6 0.1U/16V_4
40mils
AGND

4 4

+3.3V_SUS R461 *0_4_SHORT_NC


+5V_AUDIO +5V_RUN
PVDD2 PVDD1 +5V_AVDD
C494 2.2U/6.3V_6 C501 10U/6.3V_6
C304 0.1U/16V_4 C493 0.1U/16V_4 AGND R449 *0_8_SHORT_NC

+3.3V_AUDIO +5V_AVDD
C330 2.2U/6.3V_6 C510 10U/6.3V_6
C327 0.1U/16V_4 C506 0.1U/16V_4 AGND

+3.3V_AUDIO +3.3V_RUN

45

39

38

27
9

3
U10

DVDD-IO

PVDD2

PVDD1

AVDD2

AVDD1
DVDD
36 CBP PR73 2 1 *0_6_SHORT_NC
C322 *10P/50V_4_NC CBP
5 35 CBN C274 2.2U/6.3V_6
[11] HDA_SDOUT SDATA-OUT CBN
C321 *10P/50V_4_NC
6 32 EARP_R2 R210 75_4 EARP_R
[11] HDA_BITCLK BCLK HP-OUT-R 31 EARP_L2 R217 75_4 EARP_L
R232 22_4 HD_SDIN0 8 HP-OUT-L
[11] HDA_SDIN0 SDATA-IN
C335 *10P/50V_4_NC 30
MIC1_VREFO

Digital
10 23 VREFOUT_ALR267 2.2K_4 EXT_MIC_R R270 *22K/F_4_NC
[11] HDA_SYNC SYNC LINE1-VREFO AGND
HDA_RST# 11
[11] HDA_RST# RESET#

Analog
15 C332 0.1U/16V_4
I2S_MCLK 25 VREF C338 2.2U/6.3V_6
VREF AGND
3
[31] I2S_BCLK R262 33_4 AUDIO_I2S_BCLK16 3
I2S_BCLK I2S_SCLK
C359 *10P/50V_4_NC 29 EXT_MIC_R1 C323 4.7U/6.3V_6 EXT_MIC_2 R227 1K/F_4 EXT_MIC_R
LINE1-R 28 EXT_MIC_L1 C326 4.7U/6.3V_6
R263 0_4 AUDIO_I2S_DOUT 17 LINE1-L
[31] AP_I2S_DIN I2S_DOUT
R264 0_4 AUDIO_I2S_LRCK 18
[31] I2S_LRCK_FS I2S_LRCK
R211 0_4 AUDIO_I2S_DIN 24 20
[31] AP_I2S_DOUT
L_SPK+ 40
I2S_DIN
ALC290Q-GR MIC1-R
MIC1-L
19
[31] L_SPK+ SPK-L+
L_SPK- 41
[31] L_SPK- SPK-L- 37
MONO-OUT SUB_OUT [31]
R_SPK- 43
[31] R_SPK- SPK-R-
R_SPK+ 44
[31] R_SPK+ SPK-R+
COMBOJACK 46
48 GPIO2/DMIC-DATA34
GPIO3/SPDIFO
GPIO4/I2S_Float_CTRL

R206 0_4 DMIC_D1_R 4 14


[31] DSP_GPIO GPIO1/DMIC-DATA12 Sense B
R193 0_4 DMIC_CLK_R 2 13 SENSE_A R261 39.2K/F_4 SENSE_COMBO
COMBO_JACK

[31] PORTD_FS GPIO0/DMIC-CLK LDO-CAP Sense A

47
CPVEE

[38] NB_MUTE#
PVSS1

AVSS2
AVSS1

JDREF

EAPD
PGND

AMP_BEEP 12
PCBEEP
+3.3V_RUN R444 10K_4
ALC290Q-GR
7

42
49
1

33
26

34
22
21

+3.3V_AUDIO R228 *0_4_NC


R231 1K_4
2 C273 C355 10U/6.3V_6 2
10U/6.3V_6 R266
C289
20K/F_4
2.2U/6.3V_6 Audio Combo Jack
AGND AGND
Moat AGND C284 100P/50V_4 CN12

7
3
40mils EARP_L L14 FCM1608KF-301T02 EARP_L1 1

5
SENSE_COMBO 5
[38] BEEP 1U/6.3V_4 C345 AGND C337 100P/50V_4
C276 *10P/50V_4_NC 6
EARP_R L15 FCM1608KF-301T02 EARP_R1 2
R195 *0_4_NC DMIC_CLK_R 1K_4 R258 HDA_BEEP2 R379 0_4 AMP_BEEP EXT_MIC_R L16 FBM-11-160808-601A10T EXT_MIC_1 4
[28] DIGITAL_CLK
R194 *0_4_SHORT_NC AP_DIGITAL_CLK [31]
*100P/50V_4_NC C339 AGND C353 *100P/50V_4_NC 2SJ3061-021111F
R215 *0_4_SHORT_NC AP_DIGITAL_D1 [31] [9] ACZ_SPKR 1U/6.3V_4 C354 *4.7K_4_NC R257
[28] DIGITAL_D1 R214 *0_4_NC DMIC_D1_R COMBOJACK R268 22K_4
AGND
C314 *10P/50V_4_NC C352 10U/6.3V_6
AGND Audio Jack type:
Normal Open
Combo Jack(IPHONE)
EMI
C278 1000P/50V_4 EARP_R1 SENSE_COMBO EARP_L1 EXT_MIC_1
1 R455 *_0_8_SHORT_NC 1
C520 0.1U/16V_4

R276 *_0_8_SHORT_NC C488 0.1U/16V_4


1

C341 C523 C270 C360


C259 0.1U/16V_4 *Clamp-Diode_NC *Clamp-Diode_NC *Clamp-Diode_NC *Clamp-Diode_NC
2

Quanta Computer Inc.


AGND

AGND PROJECT : JW8B


Size Document Number Rev
A
Audio Codec ALC290
Date: Wednesday, July 17, 2013 Sheet 30 of 57
A B C D E
5 4 3 2 1

Sub-Woofer 2
R277
1
100K/F_4
+3.3V_AUDIO

PVCC2
+12V_ALW +5V_RUN PVCC2

[38] SUB_PD#_EC SDMK0340L-7-F 1 2 D19

1
+3.3V_ALW R246 R253 *0_8_SHORT_NC
390K_4

2
U12
1

VDD

NC
2
1

D C343 C350 C351 D


R220 SUB_MUTE# 1 Q31 10U/6.3V_6 0.1U/16V_4
SD# 1U/6.3V_4
100K/F_4 ME2306
W OOFER_EN
[30] SUB_OUT SUB_OUT R260 4 APA2010 8 SUB_OUT-_L 3 1 SUB_OUT-_MOS
2

C358 100K/F_4 IN- VO-


3 0.015U/16V_4
5 Q24A R272 3 5 SUB_OUT+_L SUB_GND

2
IN+ VO+ Q25

PGND
DMN66D0LDW -7 100K/F_4

GND
ME2306
4

C394 3 1SUB_OUT+_MOS

9
6

C393 0.015U/16V_4
SUB_PD#_EC 2 Q24B 0.1U/16V_4 APA2010
DMN66D0LDW -7

2
1

R250 *0_6_SHORT_NC R273 *0_6_NC


SUB_GND W OOFER_EN

SUB_GND SUB_GND AGND

Audio Processor +3.3V_AUDIO

R173 R171
*10K_4_NC *10K_4_NC
C
+3.3V_AUDIO R180 *0_4_SHORT_NC+VDD_305 C

C264 1U/6.3V_4

5
C266 1 2 0.01U/16V_4 Q20A
ADSP_SIN0 DSP_I2C_DA *DMN66D0LDW -7_NC
+3.3V_AUDIO R190 10K_4 ADSP_SOUT0 DSP_I2C_CK DSP_I2C_DA 4 3 R163 *0_4_NC [9]
R169 *0_4_SHORT_NC I2C_DA0
AP_24M [12] SMBDAT3 [23,25,38,42,43]
[30] DSP_GPIO DSP_GPIO
R191 *100K/F_4_NC VDD_DPD R484 *0_4_SHORT_NC

2
Q20B
*DMN66D0LDW -7_NC
DSP_I2C_CK 1 6 R170 *0_4_NC [9]
I2C_CK0
U7 R172 *0_4_SHORT_NC
49
48
47
46
45
44
43
42
41
40
39
38
37

SMBCLK3 [23,25,38,42,43]
+3.3V_AUDIO
VDD_IO
GND

UART_SIN

CLK_IN
VDD_DPD

NC
NC
PORTA_CLK
GPIO_A

I2C_DATA
I2C_CLK

VDD_P
UART_SOUT

Near eS305BQ
R466 *0_4_SHORT_NC
+3.3V_AUDIO C307 1U/6.3V_4
C306 1U/6.3V_4
1 36 C224 1U/6.3V_4
2 PORTA_FS NC 35 C234 1U/6.3V_4
R208 100K/F_4 3 PORTA_DI NC 34
4 PORTA_DO NC 33 VDD_DPD C246 1U/6.3V_4
R209 100K/F_4 5 VDD_IO NC 32
VDD_DAL 6 PORTD_DO NC 31
7 VDD_DAL NC 30
[30] PORTD_FS
PORTD_FS 8
9
PORTD_CLK
PORTD_FS eS305BQ NC
NC
29
28
AP_I2S_DOUT 10 PORTD_DI NC 27
B [30] AP_I2S_DOUT PORTC_DO NC B
[30] I2S_BCLK 11 26
I2S_BCLK PORTC_CLK NC
[30] I2S_LRCK_FS 12 25 VDD_DAL C308 1U/6.3V_4
I2S_LRCK_FS PORTC_FS VDD_DAL C2191 2 0.01U/16V_4
PORTB_CLK

PORTB_DO

Int. Speaker
PORTB_FS
PORTC_DI

PORTB_DI

VDD_DPD
VDD_IO

VDD_IO
RESET
TEST

CN10
GND

GND

SUB_OUT+_MOS L31 PBY160808T-151Y-N SUB_OUT+


SUB_OUT-_MOS L30 PBY160808T-151Y-N SUB_OUT- 1
L_SPK+ L29 TI160808U600 L_SPK+_R 2
eS305BQ [30] L_SPK+
13
14
15
16
17
18
19
20
21
22
23
24

R185 0_4 ADSP_SIN0 L_SPK- L28 TI160808U600 L_SPK-_R 3


[30] L_SPK- 4
[30] R_SPK- R_SPK- L27 TI160808U600 R_SPK-_R
R_SPK+ L26 TI160808U600 R_SPK+_R 5
+3.3V_AUDIO +3.3V_AUDIO [30] R_SPK+ 6
[30] AP_I2S_DIN VDD_DPD C238 1U/6.3V_4
AP_I2S_DIN
[30] AP_DIGITAL_CLK AP_DIGITAL_CLK C225 1 2 0.01U/16V_4 INT SPEAKER CONN
[30] AP_DIGITAL_D1 AP_DIGITAL_D1

R178 100K/F_4
DSP_PLTRST# R450 1 2 *0_4_SHORT_NC [38] L_SPK+_R C507 680P/50V_4
EC_DSP_RST#
L_SPK-_R C505 680P/50V_4
R_SPK-_R C503 680P/50V_4
R_SPK+_R C498 680P/50V_4
SUB_OUT+ C519 1000P/50V_4
SUB_OUT- C512 1000P/50V_4

A A

Quanta Computer Inc.


PROJECT : JW8B
Size Document Number Rev
A
AudioDSP/TouchScreen/Subwoofer
Date: W ednesday, July 17, 2013 Sheet 31 of 57
5 4 3 2 1
5 4 3 2 1

JW8 have support S5 wave up

MDI0+
MDI0- +3VLANVCC +3VLANVCC
C483 0.1U/16V_4 +3.3V_RUN
VDD10
VDD10
C480 0.1U/16V_4 MDI1+ R445
MDI1-
C479 0.1U/16V_4 MDI2+ R439
MDI2- Q42 10K_4

2
C482 0.1U/16V_4 2N7002W
D VDD10 Q41 10K_4 D

2
[12] PCIE_CLK_REQ2# 1 3 LAN_CLKREQ# 2N7002W

Each CAP near IC pin 3 , 8 , 22 , 30 [33,38] PCIE_EC_WAKE# 3 1 PCIE_LAN_WAKE#


U6

33
8
7
6
5
4
3
2
1
RTL8111G(S)/ RTL8111GUS R446 1 2 *0_4_NC

AVDD10

GND
MDIN2(NC)
MDIP2(NC)
MDIN1
MDIP1
AVDD10(NC)
MDIN0
MDIP0
C249 *4.7U/6.3V_6_NC

C208 *4.7U/6.3V_6_NC C237 0.1U/16V_4


MDI3+ 9 32 +3VLANVCC
MDI3- 10 MDIP3(NC) AVDD33 31 R441 2.49K/F
MDIN3(NC) RSET
SW mode
C209 0.1U/16V_4 +3VLANVCC 11 30 VDD10
LAN_CLKREQ# 12 AVDD33(NC) AVDD10 29 LAN_XTALO
C210 0.1U/16V_4 PCIE_TXP3_C 13 CLKREQB CKXTAL2 28 LAN_XTALI
[10] PCIE_TXP3 HSIP CKXTAL1
C213 0.1U/16V_4 PCIE_TXN3_C 14 27 LAN_LED0 TP37
[10] PCIE_TXN3 HSIN LED0
15 26 LAN_LED1 TP36 L22 4.7uH_680mA_DCR=0.12 @7.96MHz

VDDREG(DVDD33)
[12] CLK_PCIE_LANP REFCLK_P LED1/GPO
16 25 LAN_LED2 TP13 REG_OUT VDD10
[12] CLK_PCIE_LANN REFCLK_N LED2(LED1)

REGOUT(NC)
DVDD10(NC)
LANWAKEB
ISOLATEB
C481 C478

PERSTB
HSON
HSOP

0.1U/16V_4

4.7U/6.3V_6
17
18
19
20
21
22
23
24
C C

REG_OUT
[10] C214 0.1U/16V_4 PCIE_RXP3_C +3VLANVCC
PCIE_RXP3
[10] C216 0.1U/16V_4 PCIE_RXN3_C VDD10
PCIE_RXN3
LAN_RST#
LAN_ISOLAT# C236 C251
PCIE_LAN_WAKE# C223 C222

0.1U/16V_4

4.7U/6.3V_6
0.1U/16V_4

1U/6.3V_4
+3VLANVCC R431 *10K_4_NC

[13,20,33,37] R433 1 2 *0_4_SHORT_NC LAN_RST#


PLTRST#
CN7
+3.3V_RUN 1K_4 R435 LAN_ISOLAT# EMI ESD5 +3.3V_ALW
MDI1+ 1 6 MDI0+
*15K_4_NC R436 2 1 6 5
MDI1- 3 2 5 4 MDI0-
near IC pin 23 3 4
near IC pin 22 LAN_MX3- 8
*SRV05-4.TCT_NC C211 LAN_MX3+ 7 RX1-
LAN_MX1- 6 RX1+
*0.1U/16V_4_NC RX0-
LAN_MX2- 5 9
LAN_XTALI C239 10P/50V_4 LAN_MX2+ 4 TX1- GND2
ESD4 +3.3V_ALW LAN_MX1+ 3 TX1+ 10
MDI3+ 1 6 MDI2+ LAN_MX0- 2 RX0+ GND1
1 6 TX0-
3
4

2 5 LAN_MX0+ 1 11
Y4 MDI3- 3 2 5 4 MDI2- TX0+ GND3
3 4 12
25MHz GND4
*SRV05-4.TCT_NC C220
B B
*0.1U/16V_4_NC
1
2

LAN_XTALO C240 10P/50V_4


RJ45_CONN
DFTJ08FR322
rj45-jm361c-hp34aa03-9h-8p

TRANSFORMER
PC38 EMI U19
1U/6.3V_4 EC22 *6.8P/50V/NPO_4_NC MDI0+ 1 24 LAN_MX0+
1 2 EC21 *6.8P/50V/NPO_4_NC MDI0- 2 TD1+ MX1+ 23 LAN_MX0-
+3.3V_ALW TD1- MX1-
EC20 *6.8P/50V/NPO_4_NC MDI1+ 5 20 LAN_MX1+
+3VLANVCC +3.3V_RUN EC19 *6.8P/50V/NPO_4_NC MDI1- 6 TD2+ MX2+ 19 LAN_MX1-
PU2 EC18 *6.8P/50V/NPO_4_NC MDI2+ 7 TD2- MX2- 18 LAN_MX2+
TPS22965DSGR EC17 *6.8P/50V/NPO_4_NC MDI2- 8 TD3+ MX3+ 17 LAN_MX2-
EC16 *6.8P/50V/NPO_4_NC MDI3+ 11 TD3- MX3- 14 LAN_MX3+
1 8 R174 2 1 *0_6_SHORT_NC R453 2 1 *0_6_NC EC15 *6.8P/50V/NPO_4_NC MDI3- 12 TD4+ MX4+ 13 LAN_MX3-
VIN_01 VOUT_02 TD4- MX4-
PR61 2 7 TRA_V_DAC 3 22 LAN_MCTG3 R159 75_4
VIN_02 VOUT_01 TCT1 MCT1
1

*0_4_SHORT_NC TRA_V_DAC 4 21 LAN_MCTG2 R156 75_4


1 2 LAN_PWR_EN_EC_R 3 6 PC167 TRA_V_DAC 9 TCT2 MCT2 16 LAN_MCTG1 R147 75_4
[38] LAN_PWR_EN_EC ON CT TCT3 MCT3
0.1U/25V_4 TRA_V_DAC 10 15 LAN_MCTG0 R145 75_4 LAN_MCTG C469 10P/3KV_1808
2

4 5 TCT4 MCT4
+5V_ALW
PAD

VBIAS GND
1

PC42 NS692417
A
FCE: NS692417, DB0KL3LAN02 A
1

1000P/50V_4 C207
9

PC43
0.1U/25V_4
PC39
0.01U/16V_4
0.1U/16V_4 BOT: NA0069R LF, DB0KL3LAN01
2

Quanta Computer Inc.


PROJECT : JW8B
Size Document Number Rev
A
LAN(RTL8111GUS)/RJ45
Date: Monday, July 08, 2013 Sheet 32 of 57
5 4 3 2 1
5 4 3 2 1

+V3.3DX_CR
+V3.3DX_CR
+V3.3DX_CR

R199
R188
10K_4
Q30 10K_4 3V3AUX R177 *0_4_SHORT_NC

2
*2N7002W _NC CR_RST# R229 1 2 *0_4_SHORT_NC [13,20,32,37]
PLTRST#

1
SD_CD#
SD_WP
D [32,38] PCIE_EC_W AKE# 3 1 PCIE_CR_W AKE# C258 C268 D
4.7U/6.3V_6 0.1U/16V_4

2
32
31
30
29
28
27
26
25
U9
SD / MMC

WAKE#
MS_INS#
SD_CD#
SP7

3V3aux
GPIO

NC
NC
CR_RST# 1 24
CARD READER
CR_CLKREQ# 2 PERST# NC 23 CN9
C324 2 1 0.1U/16V_4 PCIE_TXP2_C 3 CLKREQ# NC 22 SD_D2 1
[10] PCIE_TXP2 HSIP NC +CARD_3V3 DAT2
C325 2 1 0.1U/16V_4 PCIE_TXN2_C 4 21 SD_D2 SD_D3 2
[10]
[12]
PCIE_TXN2
5 HSIN RTS5227E SP6 20 SD_D3 SD_CMD 3 DAT3
CLK_PCIE_CR_P REFCLKP SP5 CMD
[12] 6 19 SD_CMD SD_CD# 4
CLK_PCIE_CR_N REFCLKN SP4 C/D
[10] C328 2 1 0.1U/16V_4 PCIE_RXP2_C 7 18 DV33_18 5
PCIE_RXP2 HSOP DV33_18 VSS1
[10] C329 2 1 0.1U/16V_4 PCIE_RXN2_C 8 17 SD_CLK 6
PCIE_RXN2

CARD_3V3
HSON SP3 SD_CLK 7 VDD
C253 8 CLK

3V3_IN

DV12S
VSS2

RREF
SD_D0 9

AV12

SP1
SP2
10 DAT0

NC
1U/6.3V_4 SD_D1
33 GND SD_W P 11 DAT1
12 W/P

9
10
11
12
13
14
15
16
GND

1
C524 13
33P/50V_4 14 GND
SD_D0 15 GND

2
R219 RREF SD_D1 GND
C 6.2K/F_4 AV12 AV12 CARDREADER CONN C
DFHS11FR106

1
sdcard-cs1m-098-h-n-11p
C315 C299 C262 C254
*4.7U/6.3V_6_NC 0.1U/16V_4 0.1U/16V_4 4.7U/6.3V_6