2017/2/17

CH5-1

The DCM typically occurs with large inductor current ripple in a converter
operating at light load and containing current-unidirectional switches

CH5-2

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(V=DVg)

Inductor dc current I = load average current V/R CH5-3

V
dc component I
R
Vg V Vg D ' DTs
current ripple iL DTs
2L 2L
The inductor current ripple magnitude varies with
the applied voltages rather than the applied
currents
R I but iL unchanged
R is increased continuously, eventually reached I
= iL Boundary mode
iL(t) & iD(t) are both zero at the end of switching
period
Yet load current V/R is positive & nonzero CH5-4

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CH5-5

iL
iD R 1 ( t ) I R 1 iL
iD R 2 ( t ) I R 2 iL
iD R 2 ( t ) iD R 1 ( t ) iD ( t ) I R 2 I R 1
if R2 R1 I R 2 I R1 iD (t ) 0
Diode conducts + on-sate current, blocks
off-state voltage
Because iD cannot be negative, therefore, D1
must become reverse-biased before the end of
switching period CH5-6

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Further increase R and iD cannot be

negative, then diode must become reverse-
biased before the end of Ts
There are three subintervals during each Ts
D1Ts (Q on, D off), D2Ts (Q off, D on), D3Ts (Q
off, D off)

CH5-7

I = V/R=DVg/R

For buck

Kcrit D '1 D Kcrit max 1 as D 0 CH5-8

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Buck Converter
Heavier load (low R),
K=Kcrit BCM CCM operation for all duty cycles

Low D High D

K is a measure of tendency of a converter to operate in DCM

Large K leads to CCM operation, small values of K result in
DCM for some duty cycle values
Critical value of K, Kcrit(D), is a function of D, Kcrit(D)=D for
buck converter CH5-9

I, K>Kcrit
I, K<Kcrit

For boundary mode: K K crit and R Rcrit

2L 2L 1
K crit D ' Rcrit K crit
RcritTs D 'Ts Rcrit
CH5-10

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For boundary mode:

2L 2L
K K crit D ' Rcrit
RcritTs D ' Ts

Converter enters DCM when R > Rcrit

Rcrit dependents on L, Ts, and D
Since D1, minimum value (when D=1) of Rcrit =
2L/Ts
If R< Rcrit,min(= 2L/Ts), CCM operation for all duty
cycles
That is, K>1 or R< Rcrit,min, converter will operate
in CCM for all duty cycles
CH5-11

K K crit or R Rcrit for BCM

CH5-12

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These principles are true for

any circuit that operates in
steady state, regardless of
operating mode
Neglecting iL leads
to inaccurate results

CH5-13

Q1 on, D1 off

Q1 off,
D1 on

Q1 off, D1 off

CH5-14

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(0<t<D1Ts)

CH5-15

D1Ts<t<(D1+D2)Ts

CH5-16

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(D1+D2)Ts <t<Ts

iL=0

iL=0, therefore vL=0

In practice, parasitic ringing is observed, this ringing occurs
due to the resonance of L & semiconductor device
capacitances, has little influence on steady-state properties
CH5-17

D1=D can be considered known, D2 is unknown, hence

another equation is needed to solve for V CH5-18

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CH5-19

CH5-20

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For DCM

CH5-21

D1 D D2
V Vg Vg V 1
D1 D 2 D1
Vg V VD 2Ts
i pk D1Ts
L L
V 1 1 1 VD 2Ts
I i pk ( D1 D 2 )Ts ( D1 D 2 )
R Ts 2 2 L
8L
D1 D12
2L RTs
D 22 D1 D 2 0 D2
RTs 2


V Vg
D1 2 D1
D2 V Vg
D1 D 2 8L
D1 D1
2

RTs
V 2 2L
M ( D1 D , K ) K
Vg 4K R Ts
1 1 2
D1 CH5-22

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DCM

V DCM
Vg
Mode boundary M=D

DCM

CCM

Effect of DCM cause output voltage increase (R, Io, Po fixed, Vo )

K0, R (unload case), M 1 for all nonzero D CH5-23

Vg
V
V V V V Vg 1 Vg D'
( ) D ( I ) D ' 0 D ' I 0, I
R R R D ' R D ' D ' R D '2 R CH5-24

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Boost for CCM Operation

1
V Vg
D'
V Vg
I 2
D'R D' R
V
iL g DTs
2L
CH5-25

I > iL

K crit ( D) DD '2 D(1 D) 2 D 3 2 D 2 D

d 1
Let K crit ( D) 0 D or 1 (unsuited )
dD 3
4
( K crit ( D 1/ 3)) max
27 CH5-26

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Kcrit(D) 4
27

K>Kcrit
K>Kcrit
K crit ( D ) DD '2 D (1 D ) 2 D 3 2 D 2 D

Kcrit(D)=0 at D=0 & D=1,

max value=4/27 at D=1/3
0.33
K>4/27 CCM for all D
K<4/27 DCM for some intermediate range of D near
D=1/3, but in CCM near D=0 & D=1
CH5-27

Q1 on, D1 off

Q1 off,
D1 on

Q1 off, D1 off

CH5-28

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(0<t<D1Ts)

CH5-29

D1Ts<t<(D1+D2)Ts

CH5-30

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(D1+D2)Ts <t<Ts

CH5-31

CH5-32

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CH5-33

CH5-34

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CH5-35

CH5-36

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2
V V D12
V
2
0
g V V K
g g

CH5-37

Derivation of M(D,K) for Boost in DCM

D1 D2
V Vg (5.41)
D2
V D1 D2Ts V 2L
iD Vg D2
V
R 2L g RD1Ts
2
V V D 2 RT
D2 (5.41) 1 s 0
V V 2L
g g
V 1 2 D 2 RT
1 1 1 s
V 2 L
g
4 D12
V 1 1 K 1 RTs
M ( D1 D, K ) where
V 2 K 2L
g
CH5-38

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4
( K crit ) max 0.15
27

DCM CCM

CCM
CCM
4D2
if 1
K
Effect of DCM cause V to increase, DCM portions nearly linear
Near D=0, I>iL=0must be in CCM; D1, I, iL=VgD/2L CCM
CH5-39

CH5-40

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Homework #8: Deriving the characteristics

of buck, boost and buck-boost converters
shown in Table 5.1 & 5.2

CH5-41

D

K
M=1

1

K CH5-42

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CH5-43

CH5-44

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