Schematic Diagrams System Block Diagram

Schematic Diagrams
System Block Diagram

VDD3,VDD5
W150HRM/W170HR Huron River System Block Diagram W150HRM 7IN1 6-7P-W15R7-002
W150HRM MAIN BOARD
GPU NVDIDA N12x NVVDD 6-71-W15H0-D02
PCIE*8 AUDIO BOARD

5V,3V,5VS,3VS,1.5VS, PHONE JACK x3, USB x1
1.8VS,+1.5S_CPU Sandy Bridge RJ-11 6-71-W150A-D02
Nvidia 800/1067/1333 MHz SECOND HDD/ODD BOARD

1.8V, PEX_VDD,0.85VS PROCESSOR DDR3 / 1.5V 6-71-W150N-D01
Fermi N12E-GE-A1 DDRIII
rPGA988B SO-DIMM2 FINGER PRINTER BOARD
RAM SIZE:2GB SHEET 10 6-71-B510F-D02
1.5V,0.75VS(VTT_MEM)
FBVDDQ (128MX16) SYSTEM SMBUS DDRIII
1005 Balls 0.1"~13 CLICK BOARD
SO-DIMM1
B.Schematic Diagrams
FDI DMI*4 6-71-B5102-D04

SHEET 9
1.05VS_VTT 0.5"~5.5" <=8" AUDIO BOARD POWER SWITCH BOARD
6-71-B510S-D03
<8" W150HNM
LCD
CRT CONNECTOR
CONNECTOR <15" INT SPKER-R
VGFX_CORE SPDIF MIC HP LED & VGA S/W BOARD
OUT IN OUT 6-71-B5134-D01
Sheet 1 of 49 HDMI Connector CougarPoint USB PORT (USB8) W170HR 8IN1 6-7P-W1708-001
W150HNM (INT SPK R)
System Block SENTELIC
6-49-C4102-010
TOUCH PAD
Controller W150HN MAIN BOARD
6-71-W1500-D01
CLICK BOARD SPI Hub (PCH)
Diagram TPM 1.2 W150HNM AUDIO BOARD
Optional PHONE JACK x3, USB x1
INT SPKER-L
32.768 KHz Azalia Codec RJ-11 6-71-W170A-D01
EC LPC 27x27mm REALTAK
ITE 8518E 33 MHz 989 Ball FCBGA ALC269 SECOND HDD/ODD BOARD
0.5"~11" 6-71-W170N-D01
128pins LQFP
14 *1 4*1 .6m m INT MIC K/B TRANSFER BOARD
BIOS 6-71-B7117-D01
SPI 24 MHz AZALIA LINK
INT. K/B
EC SMBUS CLICK BOARD
25 6-71-B7112-D02
PCIE 100 MHz <12" MHz
THERMAL SMART SMART POWER SWITCH BOARD
SENSOR FAN BATTERY 6-71-B711S-D02
W83L771AWG AC-IN 32.768KHz
Mini PCIE Mini PCIE JMICRO LED & VGA S/W BOARD
SOCKET SOCKET JMC251_C 6-71-B7134-D01
SATA I/II 3.0Gb/s USB2.0 3G MSATA CARD WLAN CARD
<12" (USB2/SATA3) (USB2) DEBUG BOARD
USB3.0 LAN READER 6-71-W840TD-D03
480 Mbps VLI8012 (Optional)
1"~16" *NEC uPD720200
B5100 RJ-45 7IN1

SATA HDD SATA ODD eSATA SOCKET
(B4100M) USB PORT1 CCD FINGER PRINTER BOARD
(USB0) (USB5)
(USB4)
FingerPrint USB PORT2 USB PORT3
W150HNM (Optional) 12 MHz

SECOND HDD BOARD
USB3.0
B - 2 System Block Diagram
http://hobi-elektronika.net
Schematic Diagrams
Sandy Bridge Processor 1/7

Sandy Bridge Processor 1/7 ( DMI,PEG,FDI )
1 . 05 V S _ V T T
CPU U4 9 A
J22 20 mil P E G_ I R C O M P _ R R1 3 3 2 4 . 9 _ 1% _ 0 4
P E G _ I C O MP I J21
B2 7 P E G_ I C OM P O H 22
20 DM I_ T X N0 B2 5 DM I_ RX # [0 ] P E G _ R C OM P O
H1 6 H 15 H 8
H 8 _ 0 D 4 _ 4 H 8 _0 D 4 _4 H 8 _ 0D 4 _ 4 20 DM I_ T X N1 A2 5 DM I_ RX # [1 ]
20 DM I_ T X N2 B2 4 DM I_ RX # [2 ] K3 3
20 DM I_ T X N3 DM I_ RX # [3 ] PE G _ RX# [0 ] PE G_ R X# 0 12
M 35
PE G _ RX# [1 ] PE G_ R X# 1 12
B2 8 L34
20 DM I_ T X P 0 B2 6 DM I_ RX [0 ] PE G _ RX# [2 ] J35 PE G_ R X# 2 12
20 DM I_ T X P 1 DM I_ RX [1 ] PE G _ RX# [3 ] PE G_ R X# 3 12
A2 4 J32
20 DM I_ T X P 2 DM I_ RX [2 ] PE G _ RX# [4 ] PE G_ R X# 4 12
B2 3 H 34
DMI
20 DM I_ T X P 3 DM I_ RX [3 ] PE G _ RX# [5 ] H 31 PE G_ R X# 5 12
PE G _ RX# [6 ] PE G_ R X# 6 12
G 21 G 33
20 DM I_ RX N 0 DM I _ T X# [ 0 ] PE G _ RX# [7 ] PE G_ R X# 7 12
E2 2 G 30
20 DM I_ RX N 1 F21 DM I _ T X# [ 1 ] PE G _ RX# [8 ] F35
20 DM I_ RX N 2 D 21 DM I _ T X# [ 2 ] PE G _ RX# [9 ] E3 4
20 DM I_ RX N 3 DM I _ T X# [ 3 ] P E G _ RX # [1 0 ] E3 2
G 22 P E G _ RX # [1 1 ] D 33
20 DM I_ RX P 0 D 22 DM I _ T X[ 0] P E G _ RX # [1 2 ] D 31
20 DM I_ RX P 1
F20 DM I _ T X[ 1] P E G _ RX # [1 3 ] B3 3
PEG Compensation Signal
20 DM I_ RX P 2 C 21 DM I _ T X[ 2] P E G _ RX # [1 4 ] C 32
20 DM I_ RX P 3 DM I _ T X[ 3] P E G _ RX # [1 5 ]
PCI EXPRESS* - GRAPHICS

J33
CAD NOTE: PEG_ICOMPI and RCOMPO signals
P E G _R X [ 0 ] L35 PE G_ R X0 12 should be shorted and routed with
P E G _R X [ 1 ] PE G_ R X1 12
K3 4
A2 1 P E G _R X [ 2 ] H 35
PE G_ R X2 12 - max length = 500 mils
20 F DI_ T X N0 H 19 FD I 0_ T X # [ 0 ] P E G _R X [ 3 ] H 32 PE G_ R X3 12
20 F DI_ T X N1 FD I 0_ T X # [ 1 ] P E G _R X [ 4 ] PE G_ R X4 12 - typical impedance = 43 mohms
E1 9 G 34
20 F DI_ T X N2 FD I 0_ T X # [ 2 ] P E G _R X [ 5 ] PE G_ R X5 12 PEG_ICOMPO signals should be routed with
F18 G 31
20 F DI_ T X N3 B2 1 FD I 0_ T X # [ 3 ] P E G _R X [ 6 ] F33 PE G_ R X6 12
PE G_ R X7 12 - max length = 500 mils
Intel(R ) FDI
20 F DI_ T X N4 C 20 FD I 1_ T X # [ 0 ] P E G _R X [ 7 ] F30
20 F DI_ T X N5 FD I 1_ T X # [ 1 ] P E G _R X [ 8 ]
20 F DI_ T X N6
D 18
FD I 1_ T X # [ 2 ] P E G _R X [ 9 ]
E3 5 - typical impedance = 14.5 mohms
E1 7 E3 3
20 F DI_ T X N7 FD I 1_ T X # [ 3 ] PE G _ RX[1 0 ] F32
20
20
F DI_ T X P 0
F DI_ T X P 1
A2 2
G 19 FD I 0_ T X [ 0 ]
PE G _ RX[1 1 ]
PE G _ RX[1 2 ]
PE G _ RX[1 3 ]
D 34
E3 1
C 33
Sheet 2 of 49
E2 0 FD I 0_ T X [ 1 ] PE G _ RX[1 4 ] B3 2
CAD NOTE: DP_COMPIO and ICOMPO signals
should be shorted near balls and routed with
20
20
20
F DI_ T X P 2
F DI_ T X P 3
F DI_ T X P 4
G 18
B2 0
C 19
FD
FD
FD
I 0_ T X [ 2 ]
I 0_ T X [ 3 ]
I 1_ T X [ 0 ]
PE G _ RX[1 5 ]
P E G_ T X # [ 0 ]
M 29
M 32
PE
PE
G_ T X # _0
G_ T X # _1
C
C
591
589
0.
0.
22 u _ 1 0 V _ X5 R
22 u _ 1 0 V _ X5 R
_ 04
_ 04
PE G_ T X #0 12
Sandy Bridge
- typical impedance < 25 mohms 20 F DI_ T X P 5 D 19 FD I 1_ T X [ 1 ] P E G_ T X # [ 1 ] M 31 PE G_ T X #1 12
1. 05 V S _V TT 1 .0 5 V S_ VT T
20
20
F DI_ T X P 6
F DI_ T X P 7
F17
J18
FD
FD
I 1_ T X [ 2 ]
I 1_ T X [ 3 ]
P E G_ T X # [ 2 ]
P E G_ T X # [ 3 ]
P E G_ T X # [ 4 ]
L32
L29
K3 1
PE
PE
PE
PE
G_ T X # _2
G_ T X # _3
G_ T X # _4
G_ T X # _5
C
C
C
C
594
596
598
601
0.
0.
0.
0.
22 u _ 1 0 V _ X5 R
22 u _ 1 0 V _ X5 R
22 u _ 1 0 V _ X5 R
22 u _ 1 0 V _ X5 R
_ 04
_ 04
_ 04
_ 04
PE
PE
PE
G_ T X #2
G_ T X #3
G_ T X #4
12
12
12
Processor 1/7
20 F D I_ F S Y N C 0 J17 F D I 0_ F S Y N C P E G_ T X # [ 5 ] K2 8 PE G_ T X # _6 PE G_ T X #5 12
C 606 0. 22 u _ 1 0 V _ X5 R _ 04 PE G_ T X #6 12
20 F D I_ F S Y N C 1 F D I 1_ F S Y N C P E G_ T X # [ 6 ] J30 PE G_ T X # _7 C 608 0. 22 u _ 1 0 V _ X5 R _ 04
H 20 P E G_ T X # [ 7 ] J28 PE G_ T X #7 12
20 F D I_ INT F D I _I N T P E G_ T X # [ 8 ] H 29
J19 P E G_ T X # [ 9 ] G 27
20 F D I _ LS Y N C 0 H 17 F D I 0_ L S Y N C P E G _T X # [ 1 0 ] E2 9
R 521 R5 1 9
20 F D I _ LS Y N C 1 F D I 1_ L S Y N C P E G _T X # [ 1 1 ] F27
1 K_ 1 % _ 0 4 2 4 . 9_ 1 % _ 0 4
P E G _T X # [ 1 2 ] D 28
ED P H P D Fu nc ti o n D is ab l e P E G _T X # [ 1 3 ] F26
ED P_ HP D : Pu ll -u p 10 K- D IS A BL ED H PD P E G _T X # [ 1 4 ] E2 5
E D P _ C OM P I O A1 8 P E G _T X # [ 1 5 ]
A1 7 e D P _ C OM P I O M 28
DP Compensation Signal PE G_ T X _ 0 C 587 0. 22 u _ 1 0 V _ X5 R _ 04
EDP _ H PD B1 6 e D P _ I C OM P O P E G_ T X [ 0 ] M 33 PE G_ T X _ 1 PE G_ T X 0 12
C 588 0. 22 u _ 1 0 V _ X5 R _ 04 PE G_ T X 1 12
e DP_ H P D P E G_ T X [ 1 ] M 30 PE G_ T X _ 2 C 593 0. 22 u _ 1 0 V _ X5 R _ 04
P E G_ T X [ 2 ] L31 PE G_ T X 2 12
PE G_ T X _ 3 C 595 0. 22 u _ 1 0 V _ X5 R _ 04
C 15 P E G_ T X [ 3 ] L28 PE G_ T X _ 4 PE G_ T X 3 12
11 DP _ A U X _ P C 597 0. 22 u _ 1 0 V _ X5 R _ 04 PE G_ T X 4 12
D 15 e DP_ AU X P E G_ T X [ 4 ] K3 0 PE G_ T X _ 5 C 602 0. 22 u _ 1 0 V _ X5 R _ 04
11 DP _ A U X _ N e DP_ AU X# P E G_ T X [ 5 ] K2 7 PE G_ T X 5 12
PE G_ T X _ 6 C 604 0. 22 u _ 1 0 V _ X5 R _ 04
P E G_ T X [ 6 ] J29 PE G_ T X _ 7 PE G_ T X 6 12
C 607 0. 22 u _ 1 0 V _ X5 R _ 04
eDP
P E G_ T X [ 7 ] PE G_ T X 7 12
C 17 J27
11 DP _ T XP _ 0 F16 e DP_ T X [0 ] P E G_ T X [ 8 ] H 28
11 DP _ T XP _ 1 C 16 e DP_ T X [1 ] P E G_ T X [ 9 ] G 28
11 DP _ T XP _ 2 e DP_ T X [2 ] P E G_ T X [ 1 0 ]
G 15 E2 8
e DP_ T X [3 ] P E G_ T X [ 1 1 ] F28
C 18 P E G_ T X [ 1 2 ] D 27 Q 26
11
11
DP _ T XN_ 0
DP _ T XN_ 1
E1 6 e DP_ T X # [0 ]
e DP_ T X # [1 ]
P E G_ T X [ 1 3 ]
P E G_ T X [ 1 4 ]
E2 6 5
G ND N C
1 SC70-5 & SC70-3
D 16 D 25 2
11 DP _ T XN_ 2 F15 e DP_ T X # [2 ] P E G_ T X [ 1 5 ] GN D Co-lay
e DP_ T X # [3 ] 4 3
VC C VO
3 .3 V
P Z 9 8 8 2 7- 36 4 B -0 1 F * T MP 2 0
Q 27
2 1
VC C O UT 1:2 (4mils:8mils) T H E R M _V OL T 3 4
C6 7 3 8/30
3 C6 7 2
G ND
0 . 1u _ 1 0 V _ X 7R _ 0 4 0 . 1 u_ 1 0 V _ X 7R _ 0 4
G 71 1 S T 9 U
1
3
2
PLACE NEAR U3
3 , 5 , 2 3 , 2 4, 25 , 3 5 , 3 9 1 . 0 5V S _ V T T
3 , 8, 11 , 1 2 , 1 6 , 1 8, 19 , 2 0 , 2 2 , 2 3, 24 , 2 5 , 2 7 , 2 8, 29 , 3 0 , 3 3 , 3 5, 37 , 3 8 , 3 9 3 . 3 V
Sandy Bridge Processor 1/7 B - 3
Schematic Diagrams

Sandy Bridge Processor 2/7 ( CLK,MISC,JTAG ) Processor Pullups/Pull downs
PU/PD for JTAG signals 1 .0 5 V S_ V T T
1. 0 5 V S _ V T T
H _ P R O C H OT # R1 1 0 62 _ 0 4
5 1_ 0 4 R5 1 0 XD P _ TM S
5 1_ 0 4 R5 0 6 XD P _ TD I _ R
* 5 1_ 0 4 R5 0 8 XD P _ P RE Q # U 49 B H _ C P U P W R GD _ R R 4 9 9 10 K _ 0 4
5 1_ 0 4 R5 1 1 XD P _ TD O_ R
5 1_ 0 4 R5 1 3 XD P _ TC L K
5 1_ 0 4 R5 0 5 XD P _ TR S T # TRACE WIDTH 10MIL, LENGTH <500MILS
A2 8
H _S N B _ I V B # C2 6 B C LK A2 7 CL K _ E X P _ P 1 9
2 3 H _ SNB _ IVB # P R OC _S E LE C T # BC L K# CL K _ E X P _ N 1 9
MISC
CLOCKS
3 . 3V S AN3 4
S K T OC C # A1 6
D P L L _R E F _ S S C LK CL K _ DP _ P 1 9
A1 5
R 4 94 1 K _0 4 X D P _D B R _R
DP L L _ RE F _ S SC L K# C L K _ D P _ N 19 DDR3 Compensation Signals
H _C A T E R R # AL 3 3 S M_ R C OM P _ 0 R5 3 1 14 0 _ 1 %_ 0 4
C A TE R R #
I f PR OC HO T# is n ot u se d, S M_ R C OM P _ 1 R5 2 8 25 . 5 _ 1 %_ 0 4
t he n it m us t b e te rm in at ed AN3 3 R8
THERMAL
C P UD RA M RS T # S M_ R C OM P _ 2 R5 2 9 20 0 _ 1 %_ 0 4
w it h a 56 -O +- 5% p ul l- up 2 3, 3 4 H_ P E CI PEC I S M_ D R A MR S T #
r es is to r to 1. 05 VS _V TT .
DDR3
MISC
H _ P R OC H O T# R1 0 9 56 _ 1 % _0 4 H _ P R O C H OT # _ D AL 3 2 AK1 S M _ R C O MP _0
3 9 H _ P R O C H OT # P R OC H OT # S M _ R C OM P [ 0] A5 S M _ R C O MP _1
S M _ R C OM P [ 1] A4 S M _ R C O MP _2
S M _ R C OM P [ 2]
AN3 2
2 3 H _ TH R M T R I P #
Sheet 3 of 49 T H E R MT R I P #
S3 circuit:- DRAM PWR GOOD logic

3 . 3V 3 .3 V
Sandy Bridge P R DY #
PREQ #
AP2 9
AP2 7
X D P _P R D Y #
X D P _P R E Q#
C 2 78
A R2 6 X D P _T C LK
Processor 2/7 T CK
*0 . 1 u_ 1 6 V _ Y 5V _0 4
A R2 7 X D P _T M S R 1 87 R1 8 8
A M3 4 T MS AP3 0 X D P _T R S T# 1 .5 V S _ CP U
PWR MANAGEMENT
2 0 H _ P M_ S Y N C
JTAG & BPM

P M _S Y N C TR S T #
* 2 00 _ 0 4
* 10 0 K _ 04
A R2 8 X D P _T D I _R
T DI AP2 6 X D P _T D O_ R
R4 9 8 *1 0 mi l _ sh o rt H _ C P U P W R GD _R AP3 3 T DO R 17 5
2 3 H _ C P U P W R GD U N C O R E P W R G OO D
2 0 0 _1 % _ 04
5
A L 35 X D P _D B R _ R 1
V8 DBR # 2 0 P M _D R A M_ P W R GD 4
P M S Y S _P W R G D _ B U F R1 7 4 13 0 _ 1% _ 0 4 V D D P W R G OO D _ R P MS Y S _ P W R G D _ B U F
S M _D R A M P W R OK 2
A T 28 2 0, 3 7 1 . 8 V S _ P W R G D
X DP _B P M0 _ R
1 . 05 V S _ V T T BPM # [ 0] A R2 9 X DP _B P M1 _ R U1 4
Buffered reset to CPU BPM # [ 1]
3
A R3 0 X DP _B P M2 _ R * MC 7 4V H C 1 G 08 D F T 1G R 16 8
B UF _ C P U_ RS T # AR3 3 BPM # [ 2] A T 30 X DP _B P M3 _ R * 39 _ 0 4
RE S ET # BPM # [ 3] AP3 2 X DP _B P M4 _ R
3 .3 VS BPM # [ 4] A R3 1 X DP _B P M5 _ R
R5 1 2
BPM # [ 5] A T 31 X DP _B P M6 _ R R1 8 6 0_04
D
7 5_ 0 4 BPM # [ 6] A R3 2 X DP _B P M7 _ R Q 13
BPM # [ 7]
R 6 58 G
3 5 , 3 7, 38 S U S B
R5 1 5 4 3 . 2_ 1 % _0 4 B U F _ C P U _ R S T# * MT N 7 0 0 2Z H S 3
S
3
1 0K _0 4 D P Z 9 8 8 2 7-3 6 4 B -0 1F
Q 3 7B
5G M T DN7 0 0 2 Z HS 6 R
S H _ P R O C H OT #
4
6
D
Q1 6
2G Q 37 A
1 2 , 22 , 2 8 P L T _R S T # S M TD N 7 0 0 2Z H S 6 R G C6 2 2
3 4 H _ P R OC H OT # _ E C
1
MT N 7 0 0 2 Z H S 3
S3 circuit:- DRAM_RST# to memory
S
R 20 3 47 p _ 50 V _ N P O_ 0 4
R 52 4 C 6 21
R5 1 8 *1 . 5 K _ 1% _ 0 4
1 0 0K _ 0 4
should be high during S3
R 51 7 1 .5 V
10 0 K _ 0 4 6 8 p _5 0 V _ N P O _ 04
* 75 0 _ 1% _ 0 4
CAD Note: Capacitor need to be placed R 2 30
close to buffer output pin R2 3 1 * 0 _0 4 1 K_ 0 4
Q1 7
MT N 7 0 0 2 Z H S 3
C P U D R A MR S T # S D R2 3 5 1 K _ 04
D D R 3 _ D R A MR S T # 9 , 1 0
D RA M RS T _ CN T RL 8 ,1 9
G
R 22 5 C3 1 5
4 . 9 9 K _1 % _ 0 4 0 . 0 47 u _ 10 V _ X 7 R _ 0 4
6 , 8 , 9 , 1 0, 2 5 , 2 9 , 35 , 3 7 , 3 8 1 . 5 V
6 ,3 5 ,3 8 1 .5 V S_ C PU
2 , 5 , 2 3 , 24 , 2 5 , 3 5, 3 9 1 . 0 5V S _V TT
2 , 8 , 1 1 , 12 , 1 6 , 1 8, 1 9 , 2 0 , 22 , 2 3 , 2 4, 2 5 , 2 7 , 28 , 2 9 , 3 0, 3 3 , 3 5, 37 , 3 8 , 3 9 3 . 3 V
9 , 1 0, 1 1 , 1 2, 18 , 1 9 , 20 , 2 1 , 2 2, 23 , 2 4 , 25 , 2 7 , 2 8, 2 9 , 3 0 , 31 , 3 2 , 3 3, 3 4 , 3 5 , 39 3 . 3 V S
B - 4 Sandy Bridge Processor 2/7
Schematic Diagrams

Sandy Bridge Processor 3/7 ( DDR3 )
U49
C U49D
AB6 AE2
9 M_A_DQ[63:0] SA_CLK[ 0] AA6 M_A_CLK_DDR0 9 10 M_B_DQ[ 63: 0] SB_CLK[0] AD2 M_B_CLK_DDR2 10
SA_CLK#[ 0] M_A_CLK_DDR#0 9 SB_CLK#[0] M_B_CLK_DDR#2 10
M_A_DQ0 C5 V9 M_B_DQ0 C9 R9
SA_DQ[0] SA_CKE[ 0] M_A_CKE0 9 SB_DQ[0] SB_CKE[0] M_B_CKE2 10
M_A_DQ1 D5 M_B_DQ1 A7
M_A_DQ2 D3 SA_DQ[1] M_B_DQ2 D10 SB_DQ[1]
M_A_DQ3 D2 SA_DQ[2] M_B_DQ3 C8 SB_DQ[2]
M_A_DQ4 D6 SA_DQ[3] AA5 M_B_DQ4 A9 SB_DQ[3] AE1
C6 SA_DQ[4] SA_CLK[ 1] AB5 M_A_CLK_DDR1 9 A8 SB_DQ[4] SB_CLK[1] AD1 M_B_CLK_DDR3 10
M_A_DQ5 M_B_DQ5
C2 SA_DQ[5] SA_CLK#[ 1] V10 M_A_CLK_DDR#1 9 D9 SB_DQ[5] SB_CLK#[1] R10 M_B_CLK_DDR#3 10
M_A_DQ6 M_A_CKE1 9 M_B_DQ6 M_B_CKE3 10
M_A_DQ7 C3 SA_DQ[6] SA_CKE[ 1] M_B_DQ7 D8 SB_DQ[6] SB_CKE[1]
M_A_DQ8 F10 SA_DQ[7] M_B_DQ8 G4 SB_DQ[7]
M_A_DQ9 F8 SA_DQ[8] M_B_DQ9 F4 SB_DQ[8]
M_A_DQ10 G10 SA_DQ[9] AB4 M_B_DQ10 F1 SB_DQ[9] AB2
M_A_DQ11 G9 SA_DQ[10] SA_CLK[ 2] AA4 M_B_DQ11 G1 SB_DQ[10] SB_CLK[2] AA2
M_A_DQ12 F9 SA_DQ[11] SA_CLK#[ 2] W9 M_B_DQ12 G5 SB_DQ[11] SB_CLK#[2] T9
F7 SA_DQ[12] SA_CKE[ 2] F5 SB_DQ[12] SB_CKE[2]
M_A_DQ13 M_B_DQ13
M_A_DQ14 G8 SA_DQ[13] M_B_DQ14 F2 SB_DQ[13]
M_A_DQ15 G7 SA_DQ[14] M_B_DQ15 G2 SB_DQ[14]
M_A_DQ16 K4 SA_DQ[15] AB3 M_B_DQ16 J7 SB_DQ[15] AA1
M_A_DQ17 K5 SA_DQ[16] SA_CLK[ 3] AA3 M_B_DQ17 J8 SB_DQ[16] SB_CLK[3] AB1
M_A_DQ18 K1 SA_DQ[17] SA_CLK#[ 3] W10 M_B_DQ18 K10 SB_DQ[17] SB_CLK#[3] T10
M_A_DQ19 J1 SA_DQ[18] SA_CKE[ 3] M_B_DQ19 K9 SB_DQ[18] SB_CKE[3]
J5 SA_DQ[19] J9 SB_DQ[19]
M_A_DQ20 M_B_DQ20
M_A_DQ21 J4 SA_DQ[20] M_B_DQ21 J10 SB_DQ[20]
M_A_DQ22 J2 SA_DQ[21] AK3 M_B_DQ22 K8 SB_DQ[21] AD3
SA_DQ[22] SA_CS#
[ 0] M_A_CS#0 9 SB_DQ[22] SB_CS#[0] M_B_CS#2 10
M_A_DQ23 K2 AL3 M_B_DQ23 K7 AE3
M_A_CS#1 9 M_B_CS#3 10
Sheet 4 of 49
M_A_DQ24 M8 SA_DQ[23] SA_CS#
[ 1] AG1 M_B_DQ24 M5 SB_DQ[23] SB_CS#[1] AD6
M_A_DQ25 N10 SA_DQ[24] SA_CS#
[ 2] AH1 M_B_DQ25 N4 SB_DQ[24] SB_CS#[2] AE6
M_A_DQ26 N8 SA_DQ[25] SA_CS#
[ 3] M_B_DQ26 N2 SB_DQ[25] SB_CS#[3]
M_A_DQ27 N7 SA_DQ[26] M_B_DQ27 N1 SB_DQ[26]
M_A_DQ
M_A_DQ
M_A_DQ
28
29
30
M10
M9
N9
SA_DQ[27]
SA_DQ[28]
SA_DQ[29] SA_ODT
[ 0]
AH3
AG3
M_A_ODT0 9
M
M
M
_B_DQ28
_B_DQ29
_B_DQ30
M4
N5
M2
SB_DQ[27]
SB_DQ[28]
SB_DQ[29] SB_ODT[0]
AE4
AD4
M_B_ODT2 10
Sandy Bridge
M_A_ODT1 9 M_B_ODT3 10
M_A_DQ
M_A_DQ
31
32
M
AG
7
6
SA_DQ[30]
SA_DQ[31]
SA_ODT
[ 1]
SA_ODT
[ 2]
AG2
AH2
M
M
_B_DQ31
_B_DQ32
M1
AM5
SB_DQ[30]
SB_DQ[31]
SB_ODT[1]
SB_ODT[2]
AD5
AE5 Processor 3/7
DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY A
M_A_DQ33 AG5 SA_DQ[32] SA_ODT

[ 3] M_B_DQ33 AM6 SB_DQ[32] SB_ODT[3]
M_A_DQ34 AK6 SA_DQ[33] M_B_DQ34 AR3 SB_DQ[33]
AK5 SA_DQ[34] AP3 SB_DQ[34]
M_A_DQ35 M_B_DQ35
M_A_DQ36 AH5 SA_DQ[35] M_B_DQ36 AN3 SB_DQ[35]
M_A_DQ37 AH6 SA_DQ[36] C4 M_A_DQS#0 M_A_DQS#[ 7:0] 9 M_B_DQ37 AN2 SB_DQ[36] D7 M_B_DQS#0 M_B_DQS#[7:0] 10
M_A_DQ38 AJ5 SA_DQ[37] SA_DQS#[ 0] G6 M_A_DQS#1 M_B_DQ38 AN1 SB_DQ[37] SB_DQS#[0] F3 M_B_DQS#1
M_A_DQ39 AJ6 SA_DQ[38] SA_DQS#[ 1] J3 M_A_DQS#2 M_B_DQ39 AP2 SB_DQ[38] SB_DQS#[1] K6 M_B_DQS#2
M_A_DQ40 AJ8 SA_DQ[39] SA_DQS#[ 2] M6 M_A_DQS#3 M_B_DQ40 AP5 SB_DQ[39] SB_DQS#[2] N3 M_B_DQS#3
M_A_DQ41 AK8 SA_DQ[40] SA_DQS#[ 3] AL6 M_A_DQS#4 M_B_DQ41 AN9 SB_DQ[40] SB_DQS#[3] AN5 M_B_DQS#4
M_A_DQ42 AJ9 SA_DQ[41] SA_DQS#[ 4] AM 8 M_A_DQS#5 M_B_DQ42 AT5 SB_DQ[41] SB_DQS#[4] AP9 M_B_DQS#5
AK9 SA_DQ[42] SA_DQS#[ 5] AR12 AT6 SB_DQ[42] SB_DQS#[5] AK12
M_A_DQ43 M_A_DQS#6 M_B_DQ43 M_B_DQS#6
M_A_DQ44 AH8 SA_DQ[43] SA_DQS#[ 6] AM 15 M_A_DQS#7 M_B_DQ44 AP6 SB_DQ[43] SB_DQS#[6] AP15 M_B_DQS#7
M_A_DQ45 AH9 SA_DQ[44] SA_DQS#[ 7] M_B_DQ45 AN8 SB_DQ[44] SB_DQS#[7]
M_A_DQ46 AL9 SA_DQ[45] M_B_DQ46 AR6 SB_DQ[45]
M_A_DQ47 AL8 SA_DQ[46] M_B_DQ47 AR5 SB_DQ[46]
M_A_DQ48 AP11 SA_DQ[47] M_B_DQ48 AR9 SB_DQ[47]
AN11 SA_DQ[48] D4 M_A_DQS[ 7:0] 9 AJ11 SB_DQ[48] C7 M_B_DQS[7: 0] 10
M_A_DQ49 M_A_DQS0 M_B_DQ49 M_B_DQS0
AL12 SA_DQ[49] SA_DQS[ 0] F6 AT8 SB_DQ[49] SB_DQS[0] G3
M_A_DQ50 M_A_DQS1 M_B_DQ50 M_B_DQS1
M_A_DQ51 AM12 SA_DQ[50] SA_DQS[ 1] K3 M_A_DQS2 M_B_DQ51 AT9 SB_DQ[50] SB_DQS[1] J6 M_B_DQS2
M_A_DQ52 AM11 SA_DQ[51] SA_DQS[ 2] N6 M_A_DQS3 M_B_DQ52 AH11 SB_DQ[51] SB_DQS[2] M3 M_B_DQS3
M_A_DQ53 AL11 SA_DQ[52] SA_DQS[ 3] AL5 M_A_DQS4 M_B_DQ53 AR8 SB_DQ[52] SB_DQS[3] AN6 M_B_DQS4
M_A_DQ54 AP12 SA_DQ[53] SA_DQS[ 4] AM9 M_A_DQS5 M_B_DQ54 AJ12 SB_DQ[53] SB_DQS[4] AP8 M_B_DQS5
M_A_DQ55 AN12 SA_DQ[54] SA_DQS[ 5] AR11 M_A_DQS6 M_B_DQ55 AH12 SB_DQ[54] SB_DQS[5] AK11 M_B_DQS6
M_A_DQ56 AJ14 SA_DQ[55] SA_DQS[ 6] AM14 M_A_DQS7 M_B_DQ56 AT11 SB_DQ[55] SB_DQS[6] AP14 M_B_DQS7
AH14 SA_DQ[56] SA_DQS[ 7] AN14 SB_DQ[56] SB_DQS[7]
M_A_DQ57 M_B_DQ57
AL15 SA_DQ[57] AR14 SB_DQ[57]
M_A_DQ58 M_B_DQ58
M_A_DQ59 AK15 SA_DQ[58] M_B_DQ59 AT14 SB_DQ[58]
M_A_DQ60 AL14 SA_DQ[59] M_B_DQ60 AT12 SB_DQ[59]
SA_DQ[60] M_A_A[15:0] 9 SB_DQ[60] M_B_A[15:0] 10
M_A_DQ61 AK14 AD10 M_A_A0 M_B_DQ61 AN15 AA8 M_B_A0
M_A_DQ62 AJ15 SA_DQ[61] SA_MA[ 0] W1 M_A_A1 M_B_DQ62 AR15 SB_DQ[61] SB_MA[0] T7 M_B_A1
M_A_DQ63 AH15 SA_DQ[62] SA_MA[ 1] W2 M_A_A2 M_B_DQ63 AT15 SB_DQ[62] SB_MA[1] R7 M_B_A2
SA_DQ[63] SA_MA[ 2] W7 M_A_A3 SB_DQ[63] SB_MA[2] T6 M_B_A3
SA_MA[ 3] V3 SB_MA[3] T2
M_A_A4 M_B_A4
SA_MA[ 4] V2 M_A_A5 SB_MA[4] T4 M_B_A5
SA_MA[ 5] W3 M_A_A6 SB_MA[5] T3 M_B_A6
AE10 SA_MA[ 6] W6 M_A_A7 AA9 SB_MA[6] R2 M_B_A7
9 M_A_BS0 SA_BS[0] SA_MA[ 7] 10 M_B_BS0 SB_BS[0] SB_MA[7]
AF10 V1 M_A_A8 AA7 T5 M_B_A8
9 M_A_BS1 SA_BS[1] SA_MA[ 8] 10 M_B_BS1 SB_BS[1] SB_MA[8]
V6 W5 M_A_A9 R6 R3 M_B_A9
9 M_A_BS2 SA_BS[2] SA_MA[ 9] AD8 10 M_B_BS2 SB_BS[2] SB_MA[9] AB7
M_A_A10 M_B_A10
SA_MA[10] V4 SB_MA[ 10] R1
M_A_A11 M_B_A11
SA_MA[11] W4 SB_MA[ 11] T1
M_A_A12 M_B_A12
AE8 SA_MA[12] AF8 M_A_A13 AA10 SB_MA[ 12] AB10 M_B_A13
9 M_A_CAS# SA_CAS# SA_MA[13] 10 M_B_CAS# SB_CAS# SB_MA[ 13]
AD9 V5 M_A_A14 AB8 R5 M_B_A14
9 M_A_RAS# SA_RAS# SA_MA[14] 10 M_B_RAS# SB_RAS# SB_MA[ 14]
AF9 V7 M_A_A15 AB9 R4 M_B_A15
9 M_A_WE# SA_WE# SA_MA[15] 10 M_B_WE# SB_WE# SB_MA[ 15]
PZ9
8827-364B- 01
F PZ98827-364B-01F
Schematic Diagrams

Sandy Bridge Processor 4/7 ( POWER )
U49F POWER
PRO CESSOR CORE POWER PRO CESSO R UNCO RE PO WER
VCORE
4 8A 1.05VS_VTT 8 .5A 1.05VS_VT
T
AG35
ICCMAX Maximum Processor SV 48 AG34 VCC1 AH13
AG33 VCC2 VCCIO1 AH10
AG32 VCC3 VCCIO2 AG10 C223 C222 C236 C230 C237 +C668
VCORE AG31 VCC4 VCCIO3 AC10
AG30 VCC5 VCCIO4 Y10 22u_6.3V_X5R_0
8 22u_6.3V_X5R_08 22u_6.3V_X5R_0
8 22u_6.3V_X5R_08 22u_6.3V_X5R_0
8 220u_6.3V_6.3*6. 3
*4.2
AG29 VCC6 VCCIO5 U10
AG28 VCC7 VCCIO6 P10
C61
5 C616 C165 C617 C618
AG27 VCC8 VCCIO7 L10
22u_6.3V_X5R_08
08
V_X5R_08
R_08
22u_6.3V_X5R_08
AG26 VCC9 VCCIO8 J14
. 3V_X5R_
AF35 VCC10 VCCIO9 J13 C231 C654 C650 C247 C652 +C639
VCC11 VCCIO10
22u_6.3V_X5
AF34 J12
AF33 VCC12 VCCIO11 J11 22u_6.3V_X5R_0
8 22u_6.3V_X5R_08 22u_6.3V_X5R_0
8 22u_6.3V_X5R_08 22u_6.3V_X5R_0
8 220u_6.3V_6.3*6. 3
*4.2
VCC13 VCCIO12
.3
AF32 H14
22u_6
*22u_6
AF31 VCC14 VCCIO13 H12
AF30 VCC15 VCCIO14 H11
AF29 VCC16 VCCIO15 G14
AF28 VCC17 VCCIO16 G13 C659 C647 C646 C645 C644
AF27 VCC18 VCCIO17 G12
PEG AND DD R
AF26 VCC19 VCCIO18 F14 22u_6.3V_X5R_0

8 22u_6.3V_X5R_08 22u_6.3V_X5R_0
8 22u_6.3V_X5R_08 22u_6.3V_X5R_0
8
AD35 VCC20 VCCIO19 F13
C16
6 C619 C125 C161 C613
22u_6.3V_X5R_08
2u_6.3V_X5R_08
V_X5R_08
2u_6.3V_X5R_08
X5R_08
AD32 VCC23 VCCIO22 E14
AD31 VCC24 VCCIO23 E12 C643 C642 C641 C640 C629
AD30 VCC25 VCCIO24
VCC26
22u_6.3V_
AD29 E11 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 *22u_6. 3V_X5R_08
VCC27 VCCIO25
.3
AD28 D14
Sheet 5 of 49
*22u_6
AD27 VCC28 VCCIO26 D13
AD26 VCC29 VCCIO27 D12
*2
2
AC35 VCC30 VCCIO28 D11
AC34 VCC31 VCCIO29 C14 C216 C194 C195 C226 C225
Sandy Bridge AC33 VCC32 VCCIO30 C13

AC32 VCC33 VCCIO31 C12 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 *22u_6. 3V_X5R_08
AC31 VCC34 VCCIO32 C11
C62
0 C627 C169 C162 C628 AC30 VCC35 VCCIO33 B14
Processor 4/7 V_X5R_08

AC29 VCC36 VCCIO34 B12
22u_6.3V_X5R_08
VCC37 VCCIO35
08
22u_6.3V_X5R_08
AC28 A14
*22u_6.3V_X5R_0
. 3V_X5R_
AC27 VCC38 VCCIO36 A13 C224 C227 C228 C229

AC26 VCC39 VCCIO37 A12
AA35 VCC40 VCCIO38 A11 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08
VCC41 VCCIO39
*22u_6. 3
AA34
VCC42
22u_6
AA33 J23 1. 05VS_VCCP_F R129 *15

mil_short_06
VCC43 VCCIO40 1.05VS_VTT
AA32
AA31 VCC44
AA30 VCC45
AA29 VCC46
AA28 VCC47
AA27 VCC48
AA26 VCC49
Y35 VCC50
CAD Note: H_CPU_SVIDALRT# _R,H_CPU_SVIDDAT_R
CO RE SUP PLY
Y34 VCC51
Y33 VCC52 Place the PU resistors cl ose to CPU
VCORE Y32 VCC53
Y31 VCC54 SVID Signals
Y30 VCC55
C19
0 C191 C170 C172 C173 Y29 VCC56 1.05VS_VT
T
Y28 VCC57
0u_6.3V_X5R_06
*10u_6.3V_X5R_06
10u_6.3V_X5R_06
VCC58
R_06
_6.3V_X5R_06
Y27
Y26 VCC59 H_CPU_SVIDALRT# R118 75_04
V35 VCC60
10u_6.3V_X5
H_CPU_SVIDCLK R117 *54.9_1%_04

V34 VCC61 AJ29 H_CPU_SVIDALRT#_R R116 43.2_1%_04 H_CPU_SVIDDAT_R R122 130_1%_04
SV ID
V33 VCC62 VIDALERT# AJ30 H_CPU_SVIDCLK_R H_CPU_SVIDALRT
# 39
R114 0_04 H_CPU_SVIDCLK 39
V32 VCC63 VIDSCLK AJ28 H_CPU_SVIDDAT_R R120 0_04 H_CPU_SVIDDAT 39
VCC64 VIDSOUT
10u
V31
*1
V30 VCC65
V29 VCC66
V28 VCC67 CAD Note: H_CPU_SVIDCLK_R
V27 VCC68 Place the PU
V26 VCC69 VCORE
C17
4 C192 C193 C171 C175 U35 VCC70 resistors close to VR
U34 VCC71
X5R_06
V_X5R_06
VCC72
06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
U33
. 3V_X5R_
U32 VCC73
R87
U31 VCC74
100_04
*10u_6.3V_
U30 VCC75
*10u_6. 3
U29 VCC76
VCC77
10u_6
U28
U27 VCC78
VCC79 VCORE_VCC_SENSE 39
U26
VCC80 VCORE_VSS_SENSE 39
R35
R34 VCC81 R94
R33 VCC82
VCC83 100_04
R32
R31 VCC84 1.05VS_VTT
R30 VCC85
R29 VCC86
R28 VCC87
SE NSE LIN ES
R27 VCC88 AJ35 R523

R26 VCC89 VCC_SENSE AJ34 1
0_04
P35 VCC90 VSS_SENSE
P34 VCC91
P33 VCC92
P32 VCC93 B10
VCC94 VCCIO_SENSE VCCP_SENSE 38
P31 A10
VCC95 VSSIO_SENSE VSSP_SENSE 38
P30
P29 VCC96
P28 VCC97
P27 VCC98
P26 VCC99
R526
VCC100 10_04
40 VCORE
2,3,23, 24
,25,35,39 1
.05VS_VTT
PZ98827-364B-01F
Schematic Diagrams
Sandy Bridge Processor 5/7 ( GRAPHICS POWER )

1 .5 V
U 4 9G
POWER R 2 63
V G F X _ CO RE
33A Q1 8 1 K _ 1 % _0 4
AT2 4 A K 35 *A O 3 40 2 L
SENSE
LINES
AT2 3 VAXG 1 V A X G_ S E N S E A K 34 V C C _ G T_ S E N S E 3 9 S D
V _ S M_ V R E F V _ S M _V R E F _ C N T
AT2 1 VAXG 2 V S S A X G_ S E N S E V S S _G T _S E N S E 39
C 1 98 C 19 9 C2 2 1 C1 8 3 C1 6 8
AT2 0 VAXG 3 R 2 66
AT1 8 VAXG 4 10/22
2 2 u _ 6. 3 V _ X 5 R _ 0 8 2 2 u_ 6 . 3 V _ X 5R _ 08 2 2u _ 6 . 3 V _ X5 R _0 8 22 u _ 6 . 3V _X 5 R _ 0 8 2 2u _ 6 . 3 V _X 5 R _0 8 R 2 65 C3 5 5
VAXG 5
G
AT1 7 * 1 00 K _ 1 % _0 4
A R2 4 VAXG 6
0 . 1u _ 1 0 V _ X 5R _ 0 4
1 K _ 1 % _0 4
A R2 3 VAXG 7
A R2 1 VAXG 8 S US B # 2 0, 2 9 , 3 4 , 3 5
A R2 0 VAXG 9
C 6 56 C 21 1 C6 5 5 C1 8 5 C1 8 4 A R1 8 VAXG 10
VREF
A R1 7 VAXG 11
2 2 u _ 6. 3 V _ X 5 R _ 0 8 2 2 u_ 6 . 3 V _ X 5R _ 08 2 2u _ 6 . 3 V _ X5 R _0 8 22 u _ 6 . 3V _X 5 R _ 0 8 2 2u _ 6 . 3 V _X 5 R _0 8 AP2 4 VAXG 12 AL 1 V_ SM_ VR EF 0_04 R5 3 0 V _ SM _ V RE F _ C NT
AP2 3 VAXG 13 S M_ V R E F
AP2 1 VAXG 14
AP2 0 VAXG 15
AP1 8 VAXG 16
AP1 7 VAXG 17 CAD Note: +V_SM_VREF should
C 22 0 C2 1 2 C6 3 2 C6 2 4 A N2 4 VAXG 18 have 10 mil trace width
A N2 3 VAXG 19
2 2 u_ 6 . 3 V _ X 5R _ 08 2 2u _ 6 . 3 V _ X5 R _0 8 22 u _ 6 . 3V _X 5 R _ 0 8 2 2u _ 6 . 3 V _X 5 R _0 8 A N2 1 VAXG 20
A N2 0 VAXG 21 1. 5 V S _C P U
A N1 8 VAXG 22
12A
DDR3 -1.5V RAILS

A N1 7 VAXG 23
A M2 4 VAXG 24 AF 7
GRAPHICS
A M2 3 VAXG 25 V D D Q1 AF 4
A M2 1 VAXG 26 V D D Q2 AF 1
C1 8 9 C 6 78 C 679 C6 7 7 +C 6 83
+
22 0 u _ 6. 3 V _ 6 . 3 *6 . 3 *4 . 2
A M2 0
A M1 8
A M1 7
VAXG
VAXG
VAXG
VAXG
27
28
29
30
V D D Q3
V D D Q4
V D D Q5
V D D Q6
AC 7
AC 4
AC 1
1 0 u _6 . 3 V _ X 5 R _ 0 6 1 0 u _ 6. 3 V _ X 5 R _ 0 6 10 u _ 6 . 3V _X 5 R _ 0 6 5 6 0 u _2 . 5 V _ 6 . 6 *6 . 6 *5 . 9 Sheet 6 of 49
AL 2 4 Y 7
AL 2 3
AL 2 1
AL 2 0
VAXG
VAXG
VAXG
31
32
33
V D D Q7
V D D Q8
V D D Q9
Y 4
Y 1
U 7 C 6 80 C 681 C6 8 2
Sandy Bridge
AL 1 8 VAXG 34 V D D Q1 0 U 4
AL 1 7
AK2 4
AK2 3
VAXG
VAXG
VAXG
35
36
37
V D D Q1 1
V D D Q1 2
V D D Q1 3
U 1
P7
P4
1 0 u _6 . 3 V _ X 5 R _ 0 6 1 0 u _ 6. 3 V _ X 5 R _ 0 6 10 u _ 6 . 3V _X 5 R _ 0 6
Processor 5/7
AK2 1 VAXG 38 V D D Q1 4 P1
AK2 0 VAXG 39 V D D Q1 5
AK1 8 VAXG 40
AK1 7 VAXG 41
AJ 2 4 VAXG 42
AJ 2 3 VAXG 43
AJ 2 1 VAXG 44
AJ 2 0 VAXG 45
AJ 1 8 VAXG 46
AJ 1 7 VAXG 47
A H2 4 VAXG 48 0 . 85 V S
A H2 3 VAXG 49 6A
SA RAIL
A H2 1 VAXG 50 M 27
A H2 0 VAXG 51 V CC SA1 M 26
A H1 8 VAXG 52 V CC SA2 L26
A H1 7 VAXG 53 V CC SA3 J26 C 163 C1 6 4 C1 5 1 C 126
VAXG 54 V CC SA4 J25 +
V CC SA5 J24 1 0 u _ 6. 3 V _ X 5 R _ 0 8 10 u _ 6 . 3V _X 5 R _ 0 8 1 0u _ 6 . 3 V _X 5 R _0 6 * 3 30 U _ 2. 5 V _ D 2_ D
V CC SA6 H 26
V CC SA7 H 25
V CC SA8
1.8V RAIL
1 .0 5 V S
1 .8 V S 1.2A
B6 H 23 V CC S A _ S E N S E
V C CP L L 1 V CC SA _ S E N S E V C CS A _ S E NS E 37
A6 R 12 6 1 .5 V
MISC
+C 6 69 C 2 51 C 67 0 C 66 3 A2 V C CP L L 2
V C CP L L 3
R5 0 9 1 0 K _ 04 1 0 K _ 04
5 6 0 u _2 . 5 V _ 6 . 6 *6 . 6 *5 . 9 1 0 u _6 . 3 V _ X 5 R _ 0 6 1 u _6 . 3 V _ Y 5 V _ 0 4 1 u _ 6. 3 V _ X 5 R _ 0 4 C 2 2 R6 4 8 *0 _ 0 4
F C_ C2 2 C 24 V C CS A_ V ID 0 3 7
V C CS A _ V ID1 V CC S A _ V ID1 3 7
C3 0 8 C3 1 0
P Z 98 8 2 7 -36 4 B -0 1 F R 12 3
0 . 1 u_ 1 0 V _ X 5 R _ 0 4
0 . 1u _ 1 0 V _ X 5R _ 0 4
*1 0 K _ 0 4
1 .5 V S _ CP U
18 , 1 9 , 2 0, 24 , 2 5 , 2 9, 3 5 , 3 7 , 3 8, 3 9 1 . 0 5 V S
24 , 3 5 1 .5 V S
37 0 . 8 5V S
4 0 V GF X _ C O R E
3, 3 5 , 3 8 1 . 5V S _C P U
23 , 2 4 , 3 7 1. 8V S
3 , 8 , 9 , 1 0, 25 , 2 9 , 3 5, 3 7 , 3 8 1 . 5V
3, 9 , 1 0 , 1 1, 12 , 1 8 , 1 9, 2 0 , 2 1 , 2 2, 2 3 , 2 4 , 2 5, 2 7 , 2 8 , 29 , 3 0 , 3 1 , 32 , 3 3 , 3 4, 35 , 3 9 3 . 3 V S
Schematic Diagrams
Sandy Bridge Processor 6/7 ( GND )

U4 9H U49I
AT35 AJ22
AT32 VSS1 VSS81 AJ19
AT29 VSS2 VSS82 AJ16 T35 F22
AT27 VSS3 VSS83 AJ13 T34 VSS161 VSS234 F19
AT25 VSS4 VSS84 AJ10 T33 VSS162 VSS235 E30
CAD Note: 0 ohm resistor AT10 VSS9 VSS89 AJ1 T28 VSS167 VSS240 E15
should be placed close AT7 VSS1 0 VSS90 AH35 T27 VSS168 VSS241 E13
AT4 VSS1 1 VSS91 AH34 T26 VSS169 VSS242 E10
to CPU AT3 VSS1 2 VSS92 AH32 P9 VSS170 VSS243 E9

AR25 VSS1 3 VSS93 AH30 P8 VSS171 VSS244 E8
AR10 VSS1 8 VSS98 AH22 N 35 VSS176 VSS249 E3
AR2 VSS2 1 VSS101 AH7 N 32 VSS179 VSS252 D3 5
VSS2 2 VSS102 VSS180 VSS253
Sheet 7 of 49 AP34
AP31
AP28
VSS2 3
VSS2 4
VSS103
VSS104
AH4
AG9
AG8
N 31
N 30
N 29
VSS181
VSS182
VSS254
VSS255
D3 2
D2 9
D2 6
AP25 VSS2 5 VSS105 AG4 N 28 VSS183 VSS256 D2 0
Sandy Bridge AP22
AP19
VSS2 6
VSS2 7
VSS2 8
VSS106
VSS107
VSS108
AF6
AF5
N 27
N 26
VSS184
VSS185
VSS186
VSS257
VSS258
VSS259
D1 7
C3 4
AP16 AF3 M34 C3 1
Processor 6/7 AP13
AP10
AP7
VSS2 9
VSS3 0
VSS3 1
VSS109
VSS110
VSS111
AF2
AE35
AE34
L 33
L 30
L 27
VSS187
VSS188
VSS189
VSS260
VSS261
VSS262
C2 8
C2 7
C2 5
AP4 VSS3 2 VSS112 AE33 L9 VSS190 VSS263 C2 3
AP1 VSS3 3 VSS113 AE32 L8 VSS191 VSS264 C1 0
AN30 VSS3 4 VSS114 AE31 L6 VSS192 VSS265 C1
AN27 VSS3 5 VSS115 AE30 L5 VSS193 VSS266 B22
AN25 VSS3 6 VSS116 AE29 L4 VSS194 VSS267 B19
AN22
AN19
AN16
VSS3 7
VSS3 8
VSS3 9
VSS VSS117
VSS118
VSS119
AE28
AE27
AE26
L3
L2
L1
VSS195
VSS196
VSS197
VSS VSS268
VSS269
VSS270
B17
B15
B13
AN13 VSS4 0 VSS120 AE9 K35 VSS198 VSS271 B11
AN10 VSS4 1 VSS121 AD7 K32 VSS199 VSS272 B9
AN7 VSS4 2 VSS122 AC9 K29 VSS200 VSS273 B8
AN4 VSS4 3 VSS123 AC8 K26 VSS201 VSS274 B7
AM29 VSS4 4 VSS124 AC6 J 34 VSS202 VSS275 B5
AM25 VSS4 5 VSS125 AC5 J 31 VSS203 VSS276 B3
AM22 VSS4 6 VSS126 AC3 H 33 VSS204 VSS277 B2
AM19 VSS4 7 VSS127 AC2 H 30 VSS205 VSS278 A35
AM16 VSS4 8 VSS128 AB35 H 27 VSS206 VSS279 A32
AM2 VSS5 4 VSS134 AB29 H 10 VSS212 VSS285
AM1 VSS5 5 VSS135 AB28 H9 VSS213
AL34 VSS5 6 VSS136 AB27 H8 VSS214
AL31 VSS5 7 VSS137 AB26 H7 VSS215
AL28 VSS5 8 VSS138 Y9 H6 VSS216
AL10 VSS6 4 VSS144 W35 G 35 VSS222
AL7 VSS6 5 VSS145 W34 G 32 VSS223
AL4 VSS6 6 VSS146 W33 G 29 VSS224
AL2 VSS6 7 VSS147 W32 G 26 VSS225
AK33 VSS6 8 VSS148 W31 G 23 VSS226
AK30 VSS6 9 VSS149 W30 G 20 VSS227
AK27 VSS7 0 VSS150 W29 G 17 VSS228
AK25 VSS7 1 VSS151 W28 G 11 VSS229
AK22 VSS7 2 VSS152 W27 F34 VSS230
AK19 VSS7 3 VSS153 W26 F31 VSS231
AK16 VSS7 4 VSS154 U9 F29 VSS232
AK13 VSS7 5 VSS155 U8 VSS233
AK10 VSS7 6 VSS156 U6
AJ25 VSS7 9 VSS159 U2
VSS8 0 VSS160
PZ98827 -364B-0 1F PZ98 827-3 64B-01F
Schematic Diagrams
Sandy Bridge Processor 7/7 ( RESERVED )

C FG S tr ap s fo r Pr oc ess or ? DIMM? ? ? & TRACE? ?
PEG Static Lane Reversal - CFG2 is for the 16x
1 .5 V
CF G2 1:(Default) Normal Operation; Lane # R6 4 2 *0 _ 0 4

definition matches socket pin map definition
U 4 9E R1 5 5
0:Lane Reversed
Q9 1K _ 1 % _0 4
L7 *A O 3 40 2 L
R S VD2 8 A G7 V R E F _ C H _A _D I MM S D M V R E F _D Q_ D I M 0
CF G 2 C F G0 AK2 8 R S VD2 9 AE7 M V R E F _D Q_ D I M MA 9
R5 0 3 * 1K _ 0 4
AK2 9 C F G[ 0 ] R S VD3 0 AK2
C F G2 A L2 6 C F G[ 1 ] R S VD3 1 W8 R 1 49 R1 5 0 C 3 57
A L2 7 C F G[ 2 ] R S VD3 2
G
*1 K _0 4
C F G4 AK2 6 C F G[ 3 ]
1K _ 1 % _0 4 0 . 1 u _1 0 V _ X 5R _0 4
C F G5 A L2 9 C F G[ 4 ] A T 26
C F G6 A L3 0 C F G[ 5 ] R S VD3 3 A M3 3
C F G7 A M3 1 C F G[ 6 ] R S VD3 4 A J 27
A M3 2 C F G[ 7 ] R S VD3 5
Display Port Presence Strap A M3 0 C F G[ 8 ]
C F G[ 9 ] D R A M R S T _ C N TR L 3, 1 9
A M2 8
1:(Default) Disabled; No Physical Display Port A M2 6 C F G[ 1 0 ]
CF G4 attached to Embedded Display Port A N2 8
A N3 1
C
C
F G[ 1 1 ]
F G[ 1 2 ] T8
1. 5 V
0:Enabled; An external Display Port device is A N2 6 C F G[ 1 3 ] R S VD3 7 J 16 R6 4 3 *0 _ 0 4

connected to the Embedded Display Port A M2 7 C F G[ 1 4 ] R S VD3 8 H1 6
AK3 1
A N2 9
C
C
C
F G[ 1 5 ]
F G[ 1 6 ]
F G[ 1 7 ]
R S VD3 9
R S VD4 0
G1 6
Q1 0
R 15 9 Sheet 8 of 49
*A O 3 40 2 L 1 K _ 1% _ 0 4
CF G 4 R4 9 3 * 1K _ 0 4
H_ C P U_ RS V D 1 A J3 1
V A X G_ V A L _ S E N S E
R
R
S VD4 1
S VD4 2
A R3 5
A T 34
V R E F _ C H _B _D I MM S D M V R E F _ D Q _ D I M1
M V R E F _D Q_ D I M MB 1 0
Sandy Bridge
H_ C P U_ RS V D 2 A H3 1 A T 33 R 1 53 R 16 0 C3 6 7
V S S A X G _V A L_ S E N S E R S VD4 3
Processor 7/7
G
H_ C P U_ RS V D 3 A J3 3 AP3 5 *1 K _0 4
H_ C P U_ RS V D 4 A H3 3 V C C _ V A L _S E N S E R S VD4 4 A R3 4 1 K _ 1% _ 0 4 0 . 1 u_ 1 0V _X 5 R _ 0 4
V SS _ VA L _ S ENSE R S VD4 5
A J2 6
R S V D5
RESERVED
B3 4
R S VD4 6 D R A MR S T_ C N T R L 3 , 1 9
V R E F _C H _ A _ D I M M B4 A3 3
V R E F _C H _ B _ D I M M D1 R S V D6 R S VD4 7 A3 4
R S V D7 R S VD4 8 B3 5
R S VD4 9 C3 5
R S VD5 0
PCIE Port Bifurcation Straps F25
F24 R S V D8
F23 R S V D9
11: (Default) x16 - Device 1 functions 1 and 2 disabled D2 4 R S V D1 0 A J 32
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled G2 5 R S V D1 1 R S VD5 1 AK3 2
G2 4 R S V D1 2 R S VD5 2
C FG [ 6: 5] 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) E2 3
D2 3
R
R
S V D1 3
S V D1 4
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled R S V D1 5
C3 0 A H2 7
A3 1 R S V D1 6 V CC _ DIE _ S E NS E
B3 0 R S V D1 7
C F G5 R 49 2 *1 K _ 04 B2 9 R S V D1 8
D3 0 R S V D1 9 A N3 5
B3 1 R S V D2 0 R S VD5 4 A M3 5
C F G6 R 50 0 *1 K _ 04 A3 0 R S V D2 1 R S VD5 5
C2 9 R S V D2 2
R S V D2 3
R5 1 4 10 K _ 1 %_ 0 4 J2 0
3. 3 V B1 8 R S V D2 4 AT2
H _ S N B _I V B #_ P W R C T R L R5 1 6 *1 0 mi l _ sh o rt H _ S N B _ I V B # _ P W R C TR L _R A1 9 R S V D2 5 R S VD5 6 AT1
V C C I O _S E L R S VD5 7 A R1
R S VD5 8
J1 5
R S V D2 7
On CRB
H_SNB_IVB#_PWRCTRL = low, 1.0V KEY
B1
H_SNB_IVB#_PWRCTRL = high/NC, 1.05V
PEG DEFER TRAINING P Z 98 8 2 7-3 6 4 B -01 F
1: (Default) PEG Train immediately following xxRESETB de assertion

CF G 7 0: PEG Wait for BIOS for training
CF G 7 R4 9 1 * 1K _ 0 4
3, 6 , 9 , 1 0, 25 , 2 9 , 35 , 3 7 , 38 1 . 5 V
2, 3 , 1 1 , 12 , 1 6 , 1 8, 1 9 , 2 0, 2 2 , 2 3, 2 4 , 2 5, 2 7 , 2 8, 2 9 , 3 0, 33 , 3 5 , 37 , 3 8 , 39 3 . 3 V
Schematic Diagrams
DDR3 SO-DIMM_0
SO-DIMM A
CHANGE TO STANDARD
C 35 4 *1 0 p_ 5 0 V _N P O_ 0 4
M_ A _ C L K _ D D R 0 M _ A _C L K _D D R # 0
JD I MM 1A
4 M_ A _ A [ 1 5 : 0 ] M _A _A 0 98 5 M _A _D Q0 M_ A _ D Q [ 63 : 0 ] 4
C 34 8 *1 0 p_ 5 0 V _N P O_ 0 4 J D I MM 1B
M_ A _ C L K _ D D R 1 M _ A _C L K _D D R # 1 M _A _A 1 97 A0 DQ 0 7 M _A _D Q1
M _A _A 2 96 A1 DQ 1 15 M _A _D Q2
M _A _A 3 95 A2 DQ 2 17 M _A _D Q3 1 .5 V
M _A _A 4 92 A3 DQ 3 4 M _A _D Q4
M _A _A 5 91 A4 DQ 4 6 M _A _D Q5 75 44
M _A _A 6 90 A5 DQ 5 16 M _A _D Q6 76 VD D1 VS S 16 48
La yout Note : M _A _A 9 85 A8 DQ 8 23 M _A _D Q9 87 VD D4 VS S 19 55
M _A _A 1 0 1 07 A9 DQ 9 33 M _A _D Q1 0 88 VD D5 VS S 20 60
si gna l/ spa ce /si gna l: M _A _A 1 1 84 A 1 0 /AP DQ 1 0 35 M _A _D Q1 1 93 VD D6 VS S 21 61
M _A _A 1 2 83 A1 1 DQ 1 1 22 M _A _D Q1 2 94 VD D7 VS S 22 65
8 / 4 /8 M _A _A 1 3 1 19 A 1 2 /BC # DQ 1 2 24 M _A _D Q1 3 3 .3 V S 99 VD D8 VS S 23 66
M _A _A 1 4 80 A1 3 DQ 1 3 34 M _A _D Q1 4 1 00 VD D9 VS S 24 71
M _A _A 1 5 78 A1 4 DQ 1 4 36 M _A _D Q1 5 2 0 mi ls 1 05 VD D1 0 VS S 25 72
A1 5 DQ 1 5 39 M _A _D Q1 6 1 06 VD D1 1 VS S 26 127
1 09 DQ 1 6 41 M _A _D Q1 7 C 3 59 C3 6 0 1 11 VD D1 2 VS S 27 128
4 M _ A _B S 0 1 08 BA 0 DQ 1 7 51 M _A _D Q1 8 1 12 VD D1 3 VS S 28 133
4 M _ A _B S 1 79 BA 1 DQ 1 8 53 1 17 VD D1 4 VS S 29 134
M _A _D Q1 9 1 u _ 6. 3V _ X 5 R _ 0 4 0 . 1 u_ 1 6 V _Y 5 V _0 4
4 M _ A _B S 2 1 14 BA 2 DQ 1 9 40 M _A _D Q2 0 1 18 VD D1 5 VS S 30 138
4 M _ A _C S # 0 1 21 S0 # DQ 2 0 42 1 23 VD D1 6 VS S 31 139
M _A _D Q2 1
4 M _ A _C S # 1 1 01 S1 # DQ 2 1 50 M _A _D Q2 2 1 24 VD D1 7 VS S 32 144
Sheet 9 of 49 4
4
4
4
M
M
M
M
_ A _C L K _D D R 0
_ A _C L K _D D R # 0
_ A _C L K _D D R 1
_ A _C L K _D D R # 1
1 03
1 02
1 04
C K0
C K0 #
C K1
C K1 #
DQ 2 2
DQ 2 3
DQ 2 4
DQ 2 5
52
57
59
M
M
M
_A
_A
_A
_D
_D
_D
Q2 3
Q2 4
Q2 5
1 99
VD D1 8
V D DS P D
VS
VS
VS
VS
S 33
S 34
S 35
S 36
145
150
151
73 67 M _A _D Q2 6 3 .3 V S 77 155
DDR3 SO-DIMM_0 4
4
4
M _ A _C K E 0
M _ A _C K E 1
M_ A _ C A S #
74
1 15
1 10
C KE0
C KE1
C AS#
DQ 2 6
DQ 2 7
DQ 2 8
69
56
58
M
M
M
_A
_A
_A
_D
_D
_D
Q2 7
Q2 8
Q2 9
R 2 51 1 0K _0 4
1 22
1 25
N C1
N C2
N CT E S T
VS
VS
VS
S 37
S 38
S 39
156
161
162
4 M_ A _ R A S # 1 13 R AS# DQ 2 9 68 M _A _D Q3 0 1 98 VS S 40 167
4 M_ A _ W E # SA 0 _ DIM 0 1 97 WE # DQ 3 0 70 M _A _D Q3 1 10 T S # _ D I MM 0 _1 30 EVEN T # VS S 41 168
SA 1 _ DIM 0 2 01 SA 0 DQ 3 1 12 9 M _A _D Q3 2 3 , 10 D D R 3_ D R A MR S T # R ESET # VS S 42 172
2 02 SA 1 DQ 3 2 13 1 M _A _D Q3 3 C 3 75 1 u_ 6 . 3 V _ X5 R _0 4 VS S 43 173
1 0, 1 9 S M B _C L K 2 00 SC L DQ 3 3 14 1 M _A _D Q3 4 M V R E F _ D Q_ D I M MA 1 VS S 44 178
C 3 74 0 . 1 u_ 1 6 V _Y 5 V _0 4
1 0, 1 9 S M B _D A T A SD A DQ 3 4 14 3 M _A _D Q3 5 1 26 V R E F _ DQ VS S 45 179
1 16 DQ 3 5 13 0 M _A _D Q3 6 V R E F _ CA VS S 46 184
4 M _ A _O D T 0 1 20 O DT 0 DQ 3 6 13 2 M _A _D Q3 7 8 M V R E F _ D Q_ D I M MA VS S 47 185
4 M _ A _O D T 1 O DT 1 DQ 3 7 14 0 M _A _D Q3 8 2 VS S 48 189
11 DQ 3 8 14 2 M _A _D Q3 9 M V R E F _ D I M0 3 VSS1 VS S 49 190
28 D M0 DQ 3 9 14 7 M _A _D Q4 0 8 VSS2 VS S 50 195
C 3 28 1 u_ 6 . 3 V _ X5 R _0 4
46 D M1 DQ 4 0 14 9 M _A _D Q4 1 C 3 25 0 . 1 u_ 1 6 V _Y 5 V _0 4 9 VSS3 VS S 51 196
63 D M2 DQ 4 1 15 7 M _A _D Q4 2 13 VSS4 VS S 52
1 36 D M3 DQ 4 2 15 9 M _A _D Q4 3 14 VSS5
1 53 D M4 DQ 4 3 14 6 M _A _D Q4 4 19 VSS6
1 70 D M5 DQ 4 4 14 8 M _A _D Q4 5 20 VSS7 V T T_ M E M
1 87 D M6 DQ 4 5 15 8 M _A _D Q4 6 25 VSS8
D M7 DQ 4 6 16 0 M _A _D Q4 7 CLOS E TO S O- DIM M _0 26 VSS9 203
4 M _A _D QS [ 7 : 0 ] 12 DQ 4 7 16 3 31 VSS1 0 V T T1 204
M _A _D QS 0 M _A _D Q4 8
M _A _D QS 1 29 D QS 0 DQ 4 8 16 5 M _A _D Q4 9 32 VSS1 1 V T T2
47 D QS 1 DQ 4 9 17 5 37 VSS1 2 G ND 1
M _A _D QS 2 M _A _D Q5 0
M _A _D QS 3 64 D QS 2 DQ 5 0 17 7 M _A _D Q5 1 R2 2 9 1 K _ 1 % _0 4 MV R E F _ D I M 0 38 VSS1 3 G1 G ND 2
1 37 D QS 3 DQ 5 1 16 4 1 . 5V 43 VSS1 4 G2
M _A _D QS 4 M _A _D Q5 2
M _A _D QS 5 1 54 D QS 4 DQ 5 2 16 6 M _A _D Q5 3 VSS1 5
1 71 D QS 5 DQ 5 3 17 4
M _A _D QS 6 M _A _D Q5 4 R 2 39 C 3 16 7 8 1 21 -0 0 11
3 .3 V S M _A _D QS 7 1 88 D QS 6 DQ 5 4 17 6 M _A _D Q5 5
D QS 7 DQ 5 5 18 1 M _A _D Q5 6 1 K _ 1 % _0 4 0 . 1 u _ 10 V _ X 5R _ 04
4 M _ A _ D QS #[ 7 : 0 ] M _A _D QS # 0 10 DQ 5 6 18 3 M _A _D Q5 7
RN 3 M _A _D QS # 1 27 D QS 0 # DQ 5 7 19 1 M _A _D Q5 8
10 K _ 8 P 4 R _ 0 4 M _A _D QS # 2 45 D QS 1 # DQ 5 8 19 3 M _A _D Q5 9
1 8 S A 1 _ D I M1 M _A _D QS # 3 62 D QS 2 # DQ 5 9 18 0 M _A _D Q6 0
2 7 S A 0 _ D I M1 S A 1 _ DIM 1 1 0 M _A _D QS # 4 1 35 D QS 3 # DQ 6 0 18 2 M _A _D Q6 1
3 6 S A 1 _ D I M0 S A 0 _ DIM 1 1 0 1 52 D QS 4 # DQ 6 1 19 2
M _A _D QS # 5 M _A _D Q6 2
4 5 S A 0 _ D I M0 M _A _D QS # 6 1 69 D QS 5 # DQ 6 2 19 4 M _A _D Q6 3
M _A _D QS # 7 1 86 D QS 6 # DQ 6 3
D QS 7 #
78 1 2 1-0 0 1 1
V T T _M E M
C3 3 4 C 37 6 C3 6 6 C 34 1 C3 4 0
10 u _ 10 V _ Y 5 V _ 0 8 1 u _6 . 3 V _ X 5R _0 4 1u _ 6 . 3V _X 5 R _ 0 4 1 u _6 . 3 V _ X5 R _0 4 1u _ 6 . 3V _ X 5 R _ 0 4
1. 5 V
C3 6 4 C 37 0 C3 3 3 C 33 7 C3 3 8 C 33 0 C3 7 1 C3 3 6 C 3 32 C3 3 9
0. 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 04 0. 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _Y 5 V _ 04 0. 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _Y 5 V _ 04 0. 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _Y 5 V _0 4 0. 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _Y 5 V _0 4
2 4, 3 5 1 .5 V S
1 0, 3 8 V T T _M E M
1 . 5V 3 , 6 , 8 , 1 0, 2 5 , 2 9, 3 5 , 3 7, 38 1 .5 V
3 , 10 , 1 1 , 12 , 1 8 , 1 9, 2 0 , 2 1, 2 2 , 2 3, 2 4 , 2 5 , 27 , 2 8 , 29 , 3 0 , 3 1, 3 2 , 3 3, 3 4 , 3 5, 39 3 .3 V S
+ C3 9 4 + C3 8 2 C3 3 5 C 36 1 C3 2 4 C 36 8 C3 6 9 C3 3 1 C 3 65 C3 6 3
22 0 u _6 . 3 V _ 6 . 3* 6. 3* 4. 2 *2 2 0u _ 6 . 3V _ 6 . 3 *6 . 3 *4 . 2 10 u _ 10 V _ Y 5 V _ 0 8 1 0 u_ 1 0 V _Y 5 V _0 8 10 u _ 6. 3 V _ X 5R _ 06 1 u _6 . 3 V _ X5 R _0 4 1u _ 6 . 3V _ X 5 R _ 0 4 1 u _6 . 3 V _ X5 R _0 4 1u _ 6 . 3V _ X 5 R _ 0 4 1 u _6 . 3 V _ X5 R _0 4
B - 10 DDR3 SO-DIMM_0
Schematic Diagrams
DDR3 SO-DIMM_1
SO-DIMM B CHANGE TO STANDARD
J D I M M2 B
C4 0 5 *1 0 p_ 5 0 V _ N P O _ 04
M _ B _C L K _ D D R 2 M _B _ C LK _D D R # 2
J D I M M2 A 1 . 5V
C4 0 1 *1 0 p_ 5 0 V _ N P O _ 04 4 M _ B _ A [ 1 5: 0] M _B _ A 0 98 5 M_ B _ D Q 0 M_ B _ D Q[ 6 3 : 0 ] 4
97 A0 DQ 0 7 75 44
M _ B _C L K _ D D R 3 M _B _ C LK _D D R # 3 M _B _ A 1 M_ B _ D Q 1
M _B _ A 2 96 A1 DQ 1 15 M_ B _ D Q 2 76 VD D1 VSS1 6 48
89 A7 DQ 7 21 94 VD D7 VSS2 2 65
M _B _ A 8 M_ B _ D Q 8
La y out N ot e : M _B _ A 9 85 A8 DQ 8 23 M_ B _ D Q 9 99 VD D8 VSS2 3 66
M _B _ A 1 0 107 A9 DQ 9 33 M_ B _ D Q 10 100 VD D9 VSS2 4 71
signa l/ spac e /si gna l : M _B _ A 1 1 84 A 1 0/ A P DQ 1 0 35 M_ B _ D Q 11 105 VD D1 0 VSS2 5 72
M _B _ A 1 2 83 A1 1 DQ 1 1 22 M_ B _ D Q 12 106 VD D1 1 VSS2 6 1 27
8/ 4 / 8 M _B _ A 1 3 119 A 1 2/ B C # DQ 1 2 24 M_ B _ D Q 13 111 VD D1 2 VSS2 7 1 28
A1 5 DQ 1 5 39 M_ B _ D Q 16 118 VD D1 5 VSS3 0 1 38
109 DQ 1 6 41 M_ B _ D Q 17 123 VD D1 6 VSS3 1 1 39
4 M _B _B S 0 108 BA0 DQ 1 7 51 M_ B _ D Q 18 124 VD D1 7 VSS3 2 1 44
4 M _B _B S 1 3. 3 V S
79 BA1 DQ 1 8 53 M_ B _ D Q 19 VD D1 8 VSS3 3 1 45
20 m ils
4 M _B _B S 2 114 BA2 DQ 1 9 40 M_ B _ D Q 20 199 VSS3 4 1 50
4 M _B _C S # 2 S0 # DQ 2 0 V D DS P D VSS3 5
121 42 M_ B _ D Q 21 1 51
4 M _B _C S # 3 101 S1 # DQ 2 1 50 M_ B _ D Q 22 77 VSS3 6 1 55
C4 1 8 C4 1 0
4 M_ B _ C L K _ D D R 2 103 CK 0 DQ 2 2 52 M_ B _ D Q 23 122 NC 1 VSS3 7 1 56
4 M_ B _ C L K _ D D R # 2 102 CK 0 # DQ 2 3 57 125 NC 2 VSS3 8 1 61
M_ B _ D Q 24 1u _ 6 . 3 V _ X5 R _0 4 0 . 1u _ 1 6V _Y 5 V _ 04
4 M_ B _ C L K _ D D R 3 104 CK 1 DQ 2 4 59 M_ B _ D Q 25 NC T ES T VSS3 9 1 62
4 M_ B _ C L K _ D D R # 3 73 CK 1 # DQ 2 5 67 198 VSS4 0 1 67
M_ B _ D Q 26
4 M_ B _ C K E 2 74 CK E 0 DQ 2 6 69 M_ B _ D Q 27 9 T S # _ D I M M0 _ 1 30 EVEN T # VSS4 1 1 68
4 M_ B _ C K E 3
4
4
4
M _ B _ CA S #
M _ B _ RA S #
M _ B_ W E#
115
110
113
CK E 1
CA S #
RA S #
W E#
DQ 2 7
DQ 2 8
DQ 2 9
DQ 3 0
56
58
68
M_ B _ D Q
M_ B _ D Q
M_ B _ D Q
28
29
30
C 416
C 415
3, 9 D D R 3 _D R A MR S T #
1 u _ 6. 3 V _ X 5 R _ 0 4
0 . 1 u _1 6 V _ Y 5 V _ 0 4 MV R E F _ D Q _ D I M MB 1
RE SET #
V R E F _ DQ
VSS4 2
VSS4 3
VSS4 4
VSS4 5
1 72
1 73
1 78
Sheet 10 of 49
197 70 126 1 79
DDR3 SO-DIMM_1
M_ B _ D Q 31
9 S A 0 _ D I M1 201 SA0 DQ 3 1 12 9 M_ B _ D Q 32 V R E F _ CA VSS4 6 1 84
9 S A 1 _ D I M1 202 SA1 DQ 3 2 13 1 8 MV R E F _ D Q _ D I M MB VSS4 7 1 85
M_ B _ D Q 33
9 , 1 9 S MB _C L K 200 S CL DQ 3 3 14 1 M_ B _ D Q 34 2 VSS4 8 1 89
9 , 1 9 S MB _D A T A S DA DQ 3 4 14 3 3 VSS1 VSS4 9 1 90
M_ B _ D Q 35 MV R E F _ D I M1
116 DQ 3 5 13 0 M_ B _ D Q 36 8 VSS2 VSS5 0 1 95
C 397 1 u _ 6. 3 V _ X 5 R _ 0 4
4 M _B _O D T 2 120 OD T 0 DQ 3 6 13 2 M_ B _ D Q 37 C 402 0 . 1 u _1 6 V _ Y 5 V _ 0 4 9 VSS3 VSS5 1 1 96
4 M _B _O D T 3 OD T 1 DQ 3 7 14 0 13 VSS4 VSS5 2
M_ B _ D Q 38
11 DQ 3 8 14 2 M_ B _ D Q 39 14 VSS5
28 DM 0 DQ 3 9 14 7 M_ B _ D Q 40 19 VSS6
46 DM 1 DQ 4 0 14 9 M_ B _ D Q 41 20 VSS7 V T T_ M E M
63 DM 2 DQ 4 1 15 7 M_ B _ D Q 42 25 VSS8
136 DM 3 DQ 4 2 15 9 M_ B _ D Q 43 CLO SE TO SO -DI MM 1 26 VSS9 2 03
153 DM 4 DQ 4 3 14 6 M_ B _ D Q 44 31 VSS1 0 VTT1 2 04
170 DM 5 DQ 4 4 14 8 M_ B _ D Q 45 32 VSS1 1 VTT2
187 DM 6 DQ 4 5 15 8 M_ B _ D Q 46 37 VSS1 2 GN D 1
DM 7 DQ 4 6 16 0 M_ B _ D Q 47 R2 7 0 1 K _1 % _ 0 4 M V R E F _ DIM 1 38 VSS1 3 G 1 GN D 2
4 M _B _ D QS [ 7 : 0 ] M _B _ D QS 0 12 DQ 4 7 16 3 M_ B _ D Q 48 1 .5 V 43 VSS1 4 G 2
M _B _ D QS 1 29 DQ S0 DQ 4 8 16 5 M_ B _ D Q 49 VSS1 5
M _B _ D QS 2 47 DQ S1 DQ 4 9 17 5 M_ B _ D Q 50 R 2 74 C3 8 4 7 8 19 2 -0 0 11
M _B _ D QS 3 64 DQ S2 DQ 5 0 17 7 M_ B _ D Q 51
M _B _ D QS 4 137 DQ S3 DQ 5 1 16 4 M_ B _ D Q 52 1 K _ 1 % _0 4 0 . 1u _ 1 0V _X 5 R _ 0 4
M _B _ D QS 5 154 DQ S4 DQ 5 2 16 6 M_ B _ D Q 53
171 DQ S5 DQ 5 3 17 4
M _B _ D QS 6 M_ B _ D Q 54
M _B _ D QS 7 188 DQ S6 DQ 5 4 17 6 M_ B _ D Q 55
DQ S7 DQ 5 5 18 1 M_ B _ D Q 56
4 M _ B _D QS #[ 7 : 0 ] M _B _ D QS # 0 10 DQ 5 6 18 3 M_ B _ D Q 57
M _B _ D QS # 1 27 DQ S0 # DQ 5 7 19 1 M_ B _ D Q 58
M _B _ D QS # 2 45 DQ S1 # DQ 5 8 19 3 M_ B _ D Q 59
M _B _ D QS # 3 62 DQ S2 # DQ 5 9 18 0 M_ B _ D Q 60
135 DQ S3 # DQ 6 0 18 2
M _B _ D QS # 4 M_ B _ D Q 61
M _B _ D QS # 5 152 DQ S4 # DQ 6 1 19 2 M_ B _ D Q 62
M _B _ D QS # 6 169 DQ S5 # DQ 6 2 19 4 M_ B _ D Q 63
M _B _ D QS # 7 186 DQ S6 # DQ 6 3
DQ S7 #
7 8 19 2 -0 0 11
V T T_ M E M
C 398 C4 1 7 C3 8 0 C3 8 5 C3 8 1
1 0 u _ 10 V _ Y 5V _0 8 1u _ 6 . 3 V _X 5 R _0 4 1u _ 6 . 3 V _ X5 R _0 4 1u _ 6 . 3 V _ X5 R _0 4 1 u_ 6 . 3 V _ X5 R _0 4
1. 5V
C 372 C4 0 3 C4 0 6 C3 9 0 C3 9 1 C4 0 8 C3 8 6 C3 8 8
1 0 u _ 10 V _ Y 5V _0 8 10 u _ 10 V _ Y 5V _0 8 10 u _ 1 0V _ Y 5 V _0 8 1u _ 6 . 3 V _ X5 R _0 4 1 u_ 6 . 3 V _ X5 R _0 4 1 u_ 6 . 3 V _ X5 R _ 04 1 u_ 6 . 3 V _ X 5R _ 04 1 u_ 6 . 3 V _ X 5R _ 04
9, 3 8 V T T _M E M
3 , 6 , 8 , 9 , 2 5, 2 9 , 3 5 , 37 , 3 8 1 .5 V
3, 9 , 1 1 , 1 2, 18 , 1 9 , 2 0, 2 1 , 2 2 , 23 , 2 4 , 2 5, 27 , 2 8 , 2 9, 3 0 , 3 1 , 3 2, 3 3 , 3 4 , 35 , 3 9 3 .3 V S
La yout Note : 24 , 3 5 1 .5 V S
1 .5 V
SO -D IM M_1 i s pl ac e d fa rthe r f rom t he GMCH tha n S O- DIMM _ 0
C 407 C3 8 7 C4 0 9 C4 0 0 C3 8 9 C4 0 4 C4 1 4 C4 1 3 C4 1 2 C 41 1
0 . 1 u _ 16 V _ Y 5V _0 4 0. 1 u _ 1 6V _ Y 5 V _0 4 0. 1 u _ 1 6V _Y 5 V _0 4 0. 1u _ 1 6V _Y 5 V _ 04 0 . 1u _ 1 6 V _Y 5 V _ 04 0 . 1u _ 1 6 V _Y 5 V _ 04 0 . 1u _ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4
DDR3 SO-DIMM_1 B - 11
Schematic Diagrams
Panel, Inverter, CRT
PANEL CONNECTOR (LED+EDP) 3. 3 V S

PANEL POWER
P LV DD
R2 8 R2 7 L VD S: 3. 3V 2 A
2 . 2K _0 4
2 . 2K _ 0 4
8 1
2 1 L V D S -U C L K N
R N8
7 2
0 _ 8P 4 R _0 4 L V D S -
L V DS -
U C L K N _C OM B O
U C L K P _ C OMB O 5V S
e DP 3 D: 5V 3 A Q3 0 P LV D D
2 1 L V D S -U C L K P 6 3 L V DS - U 1 N _ C O MB O J _L C D 1 PJ 2 0 A O 34 1 5
G1
G2
21 L V D S -U 1 N 5 4 L V DS - U 1 P _ C OM B O
>100 mil1 2
>100 mil S D
>100mil
21 L V D S -U1 P
R N1 0 8 1 0 _ 8P 4 R _0 4 L V D S - LC LK N _ C O MB O
Gn d 1
G nd 2
2 1 L V D S -LC L K N 7 2 L V DS - LC LK P _C OM B O L V D S -U C L K N _C OM B O 1 2 P _ DDC _ DA T A 2 1 O P E N_ 2 A C1 2 8 C2 4 8 C4 8 8
21 LV D S -L C L K P 6 3 3 4 P _ DDC _ CL K 2 1
L V DS - L1 N _ C OM B O L V D S -U C L K P _ C OMB O 3 .3 V S
21 LV D S - L 1 N 5 6
G
5 4 L V DS - L1 P _ C O MB O >100 mil1 PJ 3 3 C1 4 4 1 u_ 6 . 3 V _X 5 R _ 0 4
21 L V DS -L 1 P 7 8 LV D S -U 2N 2 1 2
L V D S -U 1 N _ C O MB O
0 . 1 u_ 1 6 V _Y 5 V _ 0 4
0 . 1u _ 1 6V _Y 5 V _ 0 4
1 0u _ 1 0V _ Y 5 V _ 0 8
L V D S -U 1 P _ C OM B O 9 10 LV D S -U 2P 2 1 R 22 3 R1 9 7 R 22 6
11 12
C 19 7 *0 . 1u _ 1 0V _X 7 R _ 0 4 L V D S - LC LK P _C OM B O O P E N_ 2 A
2 DP _ A UX _ P C 21 4 *0 . 1u _ 1 0V _X 7 R _ 0 4 L V D S - LC LK N _ C O MB O L V D S -LC LK N _ C O MB O 13 14 LV D S -U 0N 2 1 1 0 K _0 4 * 10 0 K _ 0 4 2 0 0_ 1 % _0 4
2 D P _ A UX _ N 15 16 LV D S -U 0P 2 1
C 17 8 *0 . 1u _ 1 0V _X 7 R _ 0 4 L V D S - U C L K P _ C OMB O L V D S -LC LK P _C OM B O R8 6 1 0 0 K _0 4
2 D P _ T XP _ 0 C 19 6 *0 . 1u _ 1 0V _X 7 R _ 0 4 L V D S - U 1 P _ C OM B O 17 18
2 D P _ T XP _ 1 19 20 LV D S -L 2 N 2 1
_X 7 R _ 0 4 L V D S - L1 P _ C O MB O L V D S -L1 N _ C OM B O
6
C 18 2 *0 . 1u _ 1 0V D
2 D P _ T XP _ 2 C 16 7 *0 . 1u _ 1 0V _X 7 R _ 0 4 L V D S - U C L K N _C OM B O L V D S -L1 P _ C O MB O 21 22 LV D S -L 2 P 2 1
2 D P _ TX N _ 0 23 24
C 18 6 *0 . 1u _ 1 0V _X 7 R _ 0 4 L V D S - U 1 N _ C O MB O
3 .3 V S
2G
2 D P _ TX N _ 1 25 26 2 1 , 34 N B _E N A V D D
C 17 9 *0 . 1u _ 1 0V _X 7 R _ 0 4 L V D S - L1 N _ C OM B O S
2 D P _ TX N _ 2 21 L V D S -L 0N 27 28 2A PL VD D
3
R 65 4 Q 22 A D
21 L V D S -L 0 P 29 30 I N V _ B L ON M TD N 7 0 02 Z H S 6R
10/29
31 32
P L V DD R4 6 0 *1 0K _0 4 B R I GH TN E S S _ R 1 0 0 K _0 4 Q2 2 B 5G
33 34 3 . 3V M T D N 7 0 0 2Z H S 6 R S
AC
35 36 L E D P L_ V I N
4
3 4 B R I GH T N E S S D2 4
37 38 3 .3 V
39 40
R 30 0 _ 04 *B A V 99 R E C T I F I E R
8 7 2 16 -4 0 06 C1 9 C1 6 R4 8 9 *1 00 K _ 0 4 U 4 5A
14
Sheet 11 of 49
A
D6 *C D B U 0 0 3 40 3 .3 V 7 4 L V C0 8 P W U4 5 B
14
V IN V IN L1 L E DP L _ V IN C A BKL _ EN 1 74 L V C 0 8 P W
C 21 34 B K L_ E N 3 B L ON 1 4 3 .3 V
* 0_ 0 6 0 . 1 u_ 1 6 V _Y 5 V _ 04 0 . 1u _ 1 6V _Y 5V _0 4
2 6 B L ON 2
. BL O N
Panel, Inverter,
21 BL O N
3
8
7 3 . 3V
P _G N D . 5
Q4 6 *0 . 1 u _1 6 V _ Y 5 V _ 04 L2 R4 9 0 10 0 K _ 04
3A
7
2 6 H C B 1 6 08 K F -1 2 1 T2 5 U 4 5C
14
1 5
7
R 5 78 P 2 00 3 E V G 7 4 L VC0 8 PW
CRT 1 M _0 4 4
R2 3 4
R2 2 8
C1 7 C 8 00 R4 8 8 *1 0 0 K _0 4 3 .3 V
10
9
8 I N V _B L O N
4 . 7 u _2 5 V _ X 5 R _ 0 8
*1 0 K _ 04 S B _B LO N 1 U4 5 D
0 . 1 u_ 5 0 V _Y 5 V _ 0 6
23 S B _ B L ON
14
*2 0 0_ 1 % _0 4 74 L V C 0 8 P W
12
7
C 15 1108 R 4 86 C5 8 4
28 , 3 4 L ID_ S W #
D
1 1 L I D _S W #1
3
D D
* 0. 1u _ 50 V _ Y 5 V _ 0 6 13 * 1M _ 04 0 . 1u _ 1 0V _ X 5 R _ 0 4
G NB _ E N A V DD 2G 5G 20 , 3 4 , 39 A L L _ S Y S _ P W R GD
Q4 5 Q 4 9A S Q4 9 B S
7
S
MT N 7 0 0 2Z H S 3 *M T D N 7 0 0 2Z H S 6 R *M TD N 7 0 02 Z H S 6 R
M1 M6 M3 M8 6-20-14X30-015
M-M A R K M-M A R K M- M A R K M-M A R K H4 H 21 H2 0 H 25
C 1 4 6 D 1 1 0 C 1 46 D 11 0 C 1 5 8 D 1 58 C 14 6 D 1 1 0 CRT J_ C R T 1
1 0 8A H 1 5F S T0 4 A 1 C C
D A C _R E D L45 . F C M1 00 5 MF - 60 0 T0 1 L43 . F C M1 0 05 MF - 60 0 T 01 FR ED 1
21 D A C _R E D 9
M1 0 M1 5 M7 M1 4 D A C _G R E E N L53 F C M1 00 5 MF - 60 0 T0 1 L42 F C M1 0 05 MF - 60 0 T 01 F G RN 2
M-M A R K M-M A R K M- M A R K M-M A R K H2 H 23 H1 H 22 21 D A C _ GR E E N
. . 10
24 mil
C 1 5 8 D 1 5 8 C 1 58 D 15 8 C 1 5 8 D 1 58 C 15 8 D 1 5 8 D A C _B L U E L56 . F C M1 00 5 MF - 60 0 T0 1 L41 . F C M1 0 05 MF - 60 0 T 01 F B L UE 3
21 D A C _B L U E 11
C6 9 7 C6 9 8 C6 6 1 C 56 3 C 56 0 C 55 8 C5 6 2 C5 6 1 C5 5 9 4
12 DD CD A T A
5
2 2p _ 5 0V _ N P O_ 0 4
2 2 p_ 5 0 V _ N P O_ 0 4
2 2 p_ 5 0 V _N P O_ 0 4
1 0p _ 5 0V _ N P O_ 0 4
1 0p _ 5 0V _ N P O_ 0 4
1 0p _ 5 0V _ N P O_ 0 4
R 4 34 R4 3 3 R4 3 2
10 p _ 50 V _ N P O_ 04
10 p _ 50 V _ N P O _ 04
10 p _ 50 V _ N P O _ 04
M2 M9 M4 M5 13 HS Y NC
M-M A R K M-M A R K M- M A R K M-M A R K 6
1 50 _ 1 %_ 0 4
1 50 _ 1 %_ 0 4
1 50 _ 1% _ 0 4
H1 9 H5 14 V S Y NC
H6 _ 0 D3 _ 7 MT H 7_ 0 D 2 _ 8_ O 7
15 DD CL K
8
1 00 0 p _5 0 V _ X 7 R _ 04
10 0 0 p_ 5 0 V _ X 7R _ 04
2 20 p _ 50 V _ N P O _ 04
2 20 p _ 50 V _ N P O _ 04
M1 1 M1 6 M1 2 M1 3
G ND 2
GN D 1
M-M A R K M-M A R K M- M A R K M-M A R K
3. 3 V S 5V S
8
7
6
5
RN 1
C4
C 3
C5
C1
2 . 2 K _8 P 4 R _ 0 4
1
2
3
4
H 27 H1 2 H1 8 H 26
2 9 2 9 2 9 2 9 U4 0
3 8 3 8 3 8 3 8 10 9 DDC DA T A
4 7 4 7 4 7 4 7 2 1 DA C _ DDC A DA T A DDC _ IN1 D D C _ OU T 1
1 1 1 1
5 6 5 6 5 6 5 6 11 12 D DCL K
2 1 DA C _ DDC A CL K DDC _ IN2 D D C _ OU T 2
M TH 7 _0 D 2_ 8 MT H 7 _ 0D 2 _8 MT H 7_ 0 D 2 _ 8 M T H 7 _0 D 2_ 8 13 14 H S Y N C _C R 1 3 3 3_ 0 4 H SYN C
2 1 D A C _H S Y N C S Y N C_ IN1 S Y N C _ OU T 1
G ND
H 17 GN D H6 G ND H2 8 G ND H 14 GN D 15 16 V S Y N C_ C R 1 3 3_ 0 4 VSYN C
2 9 2 9 2 9 2 9 2 1 D A C _V S Y N C S Y N C_ IN2 S Y N C _ OU T 2
3 8 3 8 3 8 3 8 R 4 1_ 0 4 1 3 FR ED
4 1 7 4 1 7 4 1 7 4 1 7 5 VS V C C _S Y N C V IDE O _ 1
5 6 5 6 5 6 5 6 2 4 F G RN 35 , 3 6 , 3 7, 3 8 , 3 9, 4 0 , 4 1, 4 2 V I N
3 .3 V S V C C _V I D E O V IDE O _ 2 1 8 , 2 4, 2 5 , 2 7, 2 8 , 3 1, 3 2 , 3 3, 3 5 , 3 9, 40 , 4 1 5V S
7 5 F B L UE 2 , 3 , 8, 1 2 , 1 6, 1 8 , 1 9, 20 , 2 2 , 23 , 2 4 , 25 , 2 7 , 28 , 2 9 , 30 , 3 3 , 3 5, 3 7 , 3 8, 3 9 3 . 3V
M TH 7 _0 D 2_ 8 MT H 7 _ 0D 2 _8 MT H 7_ 0 D 2 _ 8 M T H 7 _0 D 2_ 8 C2 C 6 3, 9 , 1 0 , 1 2, 1 8 , 1 9, 2 0 , 2 1, 2 2 , 2 3, 2 4 , 2 5, 27 , 2 8 , 29 , 3 0 , 31 , 3 2 , 33 , 3 4 , 35 , 3 9 3 . 3V S
V C C _D D C V IDE O _ 3
BY P 8 6
0 . 2 2u _ 1 0V _ Y 5 V _ 0 4
0 . 2 2 u_ 1 0 V _ Y 5V _ 0 4
G ND H 3 GN D H2 4 G ND H7 G ND GN D
2 9 2 9 2 9 BYP GN D
3 8 3 8 3 8 I P 4 77 2 C Z 1 6
4 1 7 4 1 7 4 1 7 C 5 57
5 6 5 6 5 6
0 . 2 2 u_ 1 0 V _Y 5 V _0 4
M TH 7 _0 D 2_ 8 MT H 7 _ 0D 2 _8 MT H 7_ 0 D 2 _ 8 CM2009-02QR PN:6-02-20090-B60
G ND GN D G ND G ND IP4772CZ16 PN:6-02-47721-B60
B - 12 Panel, Inverter, CRT
Schematic Diagrams
VGA PCI-E Interface

GP U
H9 H11 H 13
H 8_0D 4_4 H8_0 D4_ 4 H 8_0D 4_4
U46A
BGA_1
005_
P080
_29
0X29
0
3.3 V 3 V3_R U N
COMMON
P EX_ VD D Q4
1/ 16PC I_EXPR ESS AO 3415
AK1 6 S D
PEX_I OVD D AK1 7
PEX_I OVD D
AK2 1 C1 17 C1 06 C9 4 C 123 C4 0 C36 C 33
PEX_I OVD D AK2 4 C 46 C 34 R 769
PEX_I OVD D
G
AK2 7
PEX_I OVD D 0. 1u_16V _Y 5V_04 0. 1u_16V _Y 5V_04 1 u_6. 3V_X 5R_ 04 1u_6. 3V _X5R _04 4.7 u_6. 3V_ X5R_ 06 10u_6. 3V _X5R _06 2 2u_6. 3V_ X5R_ 08 d GP U_P WR_ EN _#2
3V 3_R UN 10 u_6. 3V_X 5R_0 6 47
. u _6. 3V_X5 R_06 10_0 4
C 39
3V3_ RU N PLA CE N EA R BA LLS PL AC E NE AR B GA 0. 022 u_16V _X7R _04 R37
AG 11
P EX_IO VDD Q AG 12 10K_0 4
P EX_IO VDD Q AG 13
P EX_IO VDD Q AG 15
dG PU _PWR _EN _#
C 69 R 45 R 48 100 K_04
P EX_IO VDD Q AG 16 D02 CHA NGE
D
P EX_IO VDD Q AG 17
U5 1u_6 .3V _X5R _04 100K _04 P EX_IO VDD Q AG 18 2 20 0 m A Q 50
MC74 VH C1G 08D FT2 G P EX_IO VDD Q MTN7 002ZH S3
5
AG 22 3.3 VS G
1 P EX_IO VDD Q AG 23
34 d GP U_R ST# 4 AM16 P EX_IO VDD Q AG 24
S
P ER STB # PE X_RST P EX_IO VDD Q P EX_ VD D
3, 22, 28 PLT_ RS T# 2
R 67 P EX_C LKR EQ # AR 13 AG 25
PE X_CLKRE Q P EX_IO VDD Q AG 26
3V 3_R UN P EX_IO VDD Q
3
100K _04 P EX_IO VDD Q

AJ14 C8 5 C7 8 C9 8 C 65 C1 38 C32 C 58
AJ15
P EX_IO VDD Q AJ19
R63 *0_ 04 P EX_IO VDD Q 0. 1u_16V _Y 5V_04 0. 1u_16V _Y 5V_04 1u _6. 3V_X5 R_04 1 u_6. 3V_X 5R_ 04 4. 7u_6. 3V _X5R _06 10u_6. 3V _X5R _06 2 2u_6. 3V_ X5R_ 08 R 49
G
AJ21
P EX_IO VDD Q
3
Q 39 AJ22 10 K_04 D
P EX_IO VDD Q
2
D S AJ24
1 9 PE G_ CLK RE Q# *MTN 7002Z HS 3 P EX_IO VDD Q PL AC E NE AR B ALLS P LAC E NE AR B GA Q 5B
AJ25 dGP U_P WR _EN _#0 5G PJ44
PEX_ TSTC LK _OU T A J17 P EX_IO VDD Q AJ27 S MTDN 7002 ZH S6R
PE X_TSTCLK O
_ UT P EX_IO VDD Q *6mil
4
R 68 *220 _1%_04 PEX_ TSTC LK _OU T# A J18 AK1 8
PE X_TSTCLK O
_ UT P EX_IO VDD Q
1
AK2 0
6
D
P EX_IO VDD Q
19 VG A_PE XC LK VG A_P EXC LK AR 16 AK2 3 Q5A R 58
VG A_P EXC LK # AR 17 PE X_REFC LK P EX_IO VDD Q AK2 6 2G
19 VG A_PE XC LK# PE X_REFC LK P EX_IO VDD Q AL16 2 2,3 4,3 7 dG PU _PWR _E N# S MTD N 7002Z HS 6R 1M_04
P EX_IO VDD Q
1
2 PEG _R X0 PE G_R X0 C71 0. 22u_ 10V_X 5R_ 04 P EX_ RX0 A L17
PE G_R X#0 PE X_TX0
2 PEG _R X#0 C75 0. 22u_ 10V_X 5R_ 04 P EX_ RX0# AM17
PE X_TX0
2 P EG _TX0 PE G_T X0 AP 17 AG 20 PE X_CA L_P U_G N D_N C 3V3 _RU N

PE G_T X#0 AN 17 PE X_RX0 G F10x PEX_PLL_HVD D_N C
2 P EG _TX#0 PE X_RX0 G T21X PEX_CA L
_P U_GN D_NC 16 mi l
dG PU _P WR_E N#
2 PEG _R X1 PE G_R X1
PE G_R X#1
C74
C82
0. 22u_ 10V_X 5R_ 04 P EX_ RX1
0. 22u_ 10V_X 5R_ 04 P EX_ RX1#
AM18
AM19 PE X_TX1 PEX_SVD D_3V3
AG 19
F7
PEX _VD D_ SVD D L5 . H CB 1005K F- 121T2 0
2 PEG _R X#1 PE X_TX1 GF10x PEX_SV DD_3V3_N C
C 55 C 104
D02 CH ANGE
Sheet 12 of 49
PE G_T X1 AN 19
2 P EG _TX1 PE G_T X#1 AP 19 PE X_RX1
PE X_RX1
GT21x PE X_SVDD _3V3
0. 1u_16 V_Y 5V_0 4 4. 7u_6. 3V _X5R _06 FOR NV VDD CV TES T
2 P EG _TX#1 P EX_V DD
2 PEG _R X2 PE G_R X2 C87 0. 22u_ 10V_X 5R_ 04 P EX_ RX2 A L19 A2 L3 H C B1005 KF- 121T 20 1 6m il
PE G_R X#2 C83 0. 22u_ 10V_X 5R_ 04 P EX_ RX2# AK 19 PE X_TX2 N C_1 A7 VI D_P LLVD D
2 PEG _R X#2 PE X_TX2 N C_2 AA2 8
.
AR 19 N C_3 AA4 P LAC E N EAR BA LLS
VGA PCI-E
2 P EG _TX2 PE G_T X2 PE X_RX2 N C_4 C 49 C41 C 42 C47 C 38 U 46P
2 P EG _TX#2 PE G_T X#2 AR 20 AA8
PE X_RX2 N C_5 AB4 BG_
A100
5_P0
80_
290
X290
A L20 N C_6 AB7 *4. 7u_6 .3V _X5R _06 10u_6. 3V _X5R _06 4700 p_50V _X7R _04 0. 1u_10V _X7R _04 0 .1u _10V_ X7R _04
COMMON
2 PEG _R X3 PE G_R X3 C86 0. 22u_ 10V_X 5R_ 04 P EX_ RX3 PE X_TX3 N C_7
2 PEG _R X#3 PE G_R X#3 C95 0. 22u_ 10V_X 5R_ 04 P EX_ RX3# AM20 AC 5
PE X_TX3 N C_8 AD 28 14/ 16XTA L
_P L
N C_9 1 2m il
Interface
PE G_T X3 AP 20 AD 6 AE9
2 P EG _TX3 PE G_T X#3 AN 20 PE X_RX3 N C_10 AF6 AE8 PLLVD D
2 P EG _TX#3 PE X_RX3 N C_11 AG 6 C37 C 45 A D8 PLLVD D
AM21 N C_12 AH 12 A D9 VI D_PLLVD D
2 PEG _R X4 PE G_R X4 C97 0. 22u_ 10V_X 5R_ 04 P EX_ RX4 PE X_TX4 N C_13 VI D_PLLVD D
2 PEG _R X#4 PE G_R X#4 C10 3 0. 22u_ 10V_X 5R_ 04 P EX_ RX4# AM22 AH 24 0. 1u_10V _X7R _04 0 .1u _10V_ X7R _04 AF8
PE X_TX4 N C_14 AH 25 AF9 SP _PLLVDD
2 P EG _TX4
PE G_T X4
PE G_T X#4
AN 22
AP 22
PE X_RX4
N C_15
N C_16
AH 26
AJ5
3V3_ RU N N1 2 P- GS P LAC E NE AR BG A PLA CE N EA R BA LLS
SP _PLLVDD
2 P EG _TX#4 PE X_RX4 N C_17 AK1 5

PE G_R X5 N C_18
2 PEG _R X5 C10 8 0. 22u_ 10V_X 5R_ 04 P EX_ RX5 A L22
PE X_TX5 N C_19
AL7 R 35 *20K _1%_04 VG A_ RO M_ SI R47 2 45. 3K_ 1%_04 X _SS IN D2 XT ALSSIN XTA L
O UTB UFF D1 X_O UT BU FF
2 PEG _R X#5 PE G_R X#5 C10 9 0. 22u_ 10V_X 5R_ 04 P EX_ RX5# AK 22 B7
PE X_TX5 N C_20 C7
PE G_T X5 AR 22 N C_21 D5 VG A_ RO M_ SO B1 B2
PE X_RX5 N C_22 R 450 *4. 99K _1%_04 R44 9 10K _1%_04 XT ALIN XTALO UT
2
2
P EG _TX5
P EG _TX#5 PE G_T X#5 AR 23
PE X_RX5 N C_23
D6 D02 CHA NGE R47 7 R 476
D7 N 12E- G E- A1 G F106 -70 0-A 1
PE G_R X6 C12 1 0. 22u_ 10V_X 5R_ 04 P EX_ RX6 A L23
PE X_TX6
N C_24
N C_25
E5 R 36 *34. 8K _1%_04 VG A_ RO M_ SC LK R47 3 15K _1%_04
R47 3 34 .8K FO R W / VB IOS RO M 10K_ 04 10 K_04
2 PEG _R X6 AM23 E7
2 PEG _R X#6 PE G_R X#6 C12 2 0. 22u_ 10V_X 5R_ 04 P EX_ RX6# PE X_TX6 N C_26
F4
R47 3 15 K FOR BI OS I NCL UDE VB IOS FS X8L_25M Hz? ? ? ? ?
N C_27
2 P EG _TX6
PE G_T X6 AP 23
AN 23 PE X_RX6 N C_28
G5
H10 R 41 45. 3K _1%_04 VG A_ STR AP 0 R42 *4. 99K_1 %_ 04 (R4 73 1 5K? U42 & C 569 ? ? ? ) 1
X11
2H SX84 0GA _27MHZ
2 P EG _TX#6 PE G_T X#6 PE X_RX6 N C_29 XT AL_I N XT AL_O U T
H11
PE G_R X7 C12 4 0. 22u_ 10V_X 5R_ 04 P EX_ RX7 AM24
PE X_TX7
N C_30
N C_31
H12 R 56 *34. 8K _1%_04 VG A_ STR AP 1 R55 34. 8K_ 1%_04 D 02 CHA NGE C 566 C56 7
2 PEG _R X7 PE G_R X#7 C13 9 0. 22u_ 10V_X 5R_ 04 P EX_ RX7# AM25 H15
2 PEG _R X#7 PE X_TX7 N C_32 X12
H21 20p_5 0V_N PO _04 20p_50 V_N PO _04
N C_33 4 3
PE G_T X7 AN 25 H24 R 54 34. 8K _1%_04 VG A_ STR AP 2 R53 *34. 8K_1 %_ 04
2 P EG _TX7 PE G_T X#7 AP 25 PE X_RX7 N C_34 H25
2 P EG _TX#7 PE X_RX7 N C_35 1 2
H26
A L25 N C_36 H32 *H SX32 1S_27 MH Z
AK 25 PE X_TX8 N C_37 L8
PE X_TX8 N C_38
P6
AR 25 N C_39 R28
AR 26 PE X_RX8
PE X_RX8
N C_40
N C_41
U7
V6
Cry st a l 8 0 4 5 & 32 2 5 C o-la y
A L26 N C_42 Y4
AM26 PE X_TX9 N C_43
PE X_TX9
AP 26
AN 26 PE X_RX9
PE X_RX9 3V3_R U N
D02 CH ANGE
AM27
PE X_TX10
B IOS R OM
AM28 U 46O 3 V3_R UN
PE X_TX10
1 6 mi l 3V3 _RU N
AN 28 R451
AP 28 PE X_RX10 J10 BG A_ 1005_P 080_2 90X290 U42
PE X_RX10 VD D33_1 C OMMON
7
J11 8
VD D33_2 10K_0 4 H OLD VC C
A L28 J12 C6 4 C48 C 35 C 59 C3 1 1 3
/ 1 6 M IS C 2 3
AK 28 PE X_TX11 VD D33_3 J13 J26 C3 V GA _RO M_CS # 1 WP C 569
PE X_TX11 VD D33_4 J9 J25 BBI ASN_N C R OM_
CS CS
VD D33_5 0. 1u_16V _Y 5V_04 0.1 u_16V _Y5 V_04 0 .1u _16V_ Y5V _04 1u_ 6.3 V_X5R _04 4. 7u_6. 3V _X5R _06 BBI ASP_NC
AR 28 D3 V GA _RO M_SI 5 *0. 1u_ 16V_Y 5V _04
AR 29 PE X_RX11 RO M_S I C4 V GA _RO M_SO 2 SI
PE X_RX11 R OM_SO SO
D4 V GA _RO M_SC LK 6 4
AK 29 P LAC E N EAR BAL LS P LAC E N EAR BG A RO M_S CLK S CK GN D
PE X_TX12
A L29 *M X25 L5121E MC - 20G
PE X_TX12 P7
AP 29 VD D_SEN SE R7 R767 *0_04
PE X_RX12 GN D_SEN SE V GA _ST RA P2 V7 STR AP2 3V3_R U N 6-04-25512-B71
AN 29 V GA _ST RA P1 W7
PE X_RX12 AD 20 PS1 _VD D_ SEN SE V GA _ST RA P0 W5 STR AP1 F6 I 2C _SC L
AM29 VD D_SEN SE AD 19 PS 1_VD D _SE NS E 41 STR AP0 I 2CH _SCL R 474 2.2 K_04 6-04-25512-B70
PE X_TX13 GN D_SEN SE PS1 _GN D _SE NS E PS 1_G ND _SE NS E 41 6-04-25512-B72
AM30 N12P- GS G6 I 2C _SD A R 475 2.2 K_04
PE X_TX13 D35 I 2CH_SD A
AN 31 VD D_SEN SE E35
6-04-25010-490
PE X_RX13 GN D_SEN SE R768 *0_04
AP 31 PEX_ VD D A5
PE X_RX13 L7 SPD IF_N C
AM31
PE X_TX14 1 6m il HC B1 005KF - 121T20
AM32
PE X_TX14 PEX_PLLVD D
AG 14
AH 15
P EX_P LLV DD . A B5 CEC
BUFR ST
A4
AR 31 PEX_PLLVD D
PE X_RX14 C 72 C96 C 70
AR 32 C5
PE X_RX14 AG 21 P EX_T ER MP R 82 2. 49K _1%_04 0. 1u_16 V_Y 5V_0 4 1u_6. 3V _X5R _04 4 .7u _6. 3V_X 5R_0 6 P GOO D_OU T
AN 32 PEX _
T ERMP AH 21
AP 32 PE X_TX15 PEX _
T ERMP N9 AK 14
PE X_TX15 R 64 40 .2K _1%_04 M_STR AP _RE F0 MULTI_S TRAP_R EF0_GN D GN D
P LAC E N EAR BAL LS PL AC E NE AR B GA R8
AR 34 M8 MULTI_S TRAP_R EF0_GN D K9
AP 34 PE X_RX15 AP3 5 M9 MULTI_S TRAP_R EF1_GN D GN D K8
PE X_RX15 TESTMOD E G PU _TES TMOD E R 507 10 K_04 1u->0.1u C990525 R 66 40 .2K _1%_04 M_STR AP _RE F1 MULTI_S TRAP_R EF1_GN D GN D
N1 2E- GE A
- 1 GF 106- 700- A1
N 12E- G E- A1 G F106- 700 -A 1
16, 41 3V3 _RU N

13, 37 PE X_VD D
2, 3, 8, 11, 16, 18, 19, 20, 22, 23, 24, 25, 27, 28, 29, 30, 33, 35, 37, 38, 39 3. 3V
3,9 ,10 ,11 ,18 ,19 ,20 ,21 ,22 ,23 ,24 ,25 ,27 ,28 ,29 ,30 ,31 ,32 ,33 ,34 ,35 ,39 3. 3VS
VGA PCI-E Interface B - 13
Schematic Diagrams
VGA Frame Buffer Interface

F ram e Buffer Int er face
U46B U46C
BGA_0
105
_P080
_29
0X29
0 BGA_
100
5_P0
80_2
90X2
90
COMMON COMMON
2/ 16FBA 3/16 FBB
FB C_D [ 63: 0] FB VD DQ
2727
F BA_ D[ 63: 0] F BV DD Q 15 FB C_ D[ 63: 0]
PN
1 4 F BA _D[ 63: 0]
7 J23
FBC _D 0 B13 FBB_D 0 FBVD DQ
2727
FB A_D 0 L 32 FBC _D 1 D13
2 J24
FBA _D0 FB VDD Q FBB_D 1 FBVD DQ
TR
N 33 A13
AJ29
FB A_D 1 FBC _D 2
U 27
FB A_D 2 L 33 C 134 C13 1 C 130 C 132 FBC _D 3 A14 C1 36 C 141 C99 C 133
2A9
2729
FB A_D 3 N 34 FBC _D 4 C16
3A1
29U
N 35 B16
A
2A7
FB A_D 4 FBA _D4 FB VDD Q 0. 1u_ 10V_X 7R_ 04 0.1 u_10V _X7R _04 0. 1u_10 V_X7 R_0 4 0 .1u _10V_ X7R _04 FBC _D 5 FBB_D 5 FBVD DQ 0. 1u_10 V_X7R _04 0. 1u_ 10V_ X7R_ 04 0.1 u_10V _X7R _04 0. 1u_1 0V_X7 R_0 4
BA
VV
FB A_D 5 P 35 FBC _D 6 A17
AB2A9
V 34
FB A_D 6 P 33 FBC _D 7 D16
P 34 FBA _D6 FB VDD Q C13 FBB_D 7 FBVD DQ P LAC E U ND E R BG A
FB A_D 7 FBA _D7 FB VDD Q FBC _D 8 FBB_D 8 FBVD DQ
FB A_D 8 K 35 AC 27 PLA CE UN DE R B GA FBC _D 9 B11 W27
FB A_D 9 K 33 FBA _D8 FB VDD Q AD 27 FBC _D 10 C11 FBB_D 9 FBVD DQ Y2 7
K 34 FBA _D9 FB VDD Q AE 27 A11 FBB_D 10 FBVD DQ
FB A_D 10 FBC _D 11
FB A_D 11 H 33 FBA _D10 FB VDD Q AJ 28 FBC _D 12 C10 FBB_D 11
FB A_D 12 G 34 FBA _D11 FB VDD Q B1 8 FBC _D 13 C8 FBB_D 12
FBA _D12 FB VDD Q FBB_D 13 C1 05 C 110 C14 5 C 250
FB A_D 13 G 33 E2 1 FBC _D 14 B8
FB A_D 14 E 34 FBA _D13 FB VDD Q G 17 C 53 C79 C 119 C 84 FBC _D 15 A8 FBB_D 14 1u_6 .3V _X5R _06 4. 7u_ 6.3 V_X5 R_0 6 *1u_6. 3V_ X5R _06 *4. 7u_6. 3V _X5R _06
FBA _D14 FB VDD Q FBB_D 15
FB A_D 15 E 33 FBA _D15 FB VDD Q G 18 FBC _D 16 E8 FBB_D 16
FB A_D 16 G 31 FBA _D16 FB VDD Q G 22 1u_ 6. 3V_X5 R_0 6 4.7 u_6. 3V_ X5R _06 1u_6 .3V _X5R _06 4 .7u _6. 3V_X5 R_0 6 FBC _D 17 F8 FBB_D 17
FB A_D 17 F 30 FBA _D17 FB VDD Q G8 FBC _D 18 F10 FBB_D 18 P LAC E N EA R BG A
FB A_D 18 G 30 FBA _D18 FB VDD Q G9 FBC _D 19 F9 FBB_D 19
FB A_D 19 G 32 FBA _D19 FB VDD Q H 29 FBC _D 20 F12 FBB_D 20
FB A_D 20 K 30 FBA _D20 FB VDD Q J14 PLA CE NE AR B GA FBC _D 21 D8 FBB_D 21
FB A_D 21 K 32 J15 FBC _D 22 D11
FBA _D21 FB VDD Q FBB_D 22
FB A_D 22 H 30 FBA _D22 FB VDD Q J16 FBC _D 23 E11 FBB_D 23
FB A_D 23 K 31 J17 FBC _D 24 D12
L 31 FBA _D23 FB VDD Q J20 E13 FBB_D 24
FB A_D 24 FBA _D24 FB VDD Q FBC _D 25 FBB_D 25
FB A_D 25 L 30 J21 FBC _D 26 F13
FB A_D 26 M32 FBA _D25 FB VDD Q J22 FBC _D 27 F14 FBB_D 26

N 30 FBA _D26 FB VDD Q F15 FBB_D 27
FB A_D 27 FBA _D27 FBC _D 28 FBB_D 28
FB A_D 28 M30 FBC _D 29 E16
FB A_D 29 P 31 FBA _D28 FBC _D 30 F16 FBB_D 29
FBA _D29 FBB_D 30
FB A_D 30 R 32 FBC _D 31 F17
FB A_D 31 R 30 FBA _D30 FBC _D 32 D29 FBB_D 31
FBA _D31 FBB_D 32
FB A_D 32 AG 30 FBA _D32 FBC _D 33 F27 FBB_D 33
FB A_D 33 AG 32 FBC _D 34 F28
FBA _D33 FBB_D 34
FB A_D 34 AH 31 FBA _D34 FBC _D 35 E28 FBB_D 35
FB A_D 35 AF 31 FBC _D 36 D26
AF 30 FBA _D35 F25 FBB_D 36
FB A_D 36 FBA _D36 FBC _D 37 FBB_D 37
FB A_D 37 AE 30 FBC _D 38 D24
FB A_D 38 AC 32 FBA _D37 FBC _D 39 E25 FBB_D 38
Sheet 13 of 49 AD 30 FBA _D38 E32 FBB_D 39

FB A_D 39 FBC _D 40
FB A_D 40 AN 33 FBA _D39 FBC _D 41 F32 FBB_D 40
FB A_D 41 AL 31 FBA _D40 FBC _D 42 D33 FBB_D 41
FBA _D41 FBB_D 42
FB A_D 42 AM33 FBC _D 43 E31
FB A_D 43 AL 33 FBA _D42 FBC _D 44 C33 FBB_D 43
FBA _D43 FBB_D 44
VGA Frame Buffer

FB A_D 44 AK 30 FBA _D44 FBC _D 45 F29 FBB_D 45
FB A_D 45 AK 32 FBC _D 46 D30
FBA _D45 FBB_D 46
FB A_D 46 AJ 30 FBA _D46 FBC _D 47 E29 FBB_D 47
FB A_D 47 AH 30 FBA _D47 FBC _D 48 B29 FBB_D 48 F BC _CMD 3
[ 1:0 ]
FB C_ CMD 3
[ 1 :0] 15
FB A_D 48 AH 33 FBA _D48 FBC _D 49 C31 FBB_D 49
FB A_D 49 AH 35 FBA _C MD [ 31: 0] FBC _D 50 C29 GT21X GF10X
Interface FB A_D 50 AH 34 FBA _D49 FB A_C MD[ 31: 0] 1 4 FBC _D 51 B31 FBB_D 50
FBA _D50 G T21X GF 10X FBB_D 51
FB A_D 51 AH 32 FBA _D51 FBC _D 52 C32 FBB_D 52 FB B_CM D25 FBB_C MD 0 F18 FB C_ CMD0
FB A_D 52 AJ 33 U 30 F BA_ CMD 0 FBC _D 53 B32 E19 FB C_ CMD1
FB A_D 53 AL 35 FBA _D52 F BA_CM D25 FBA _CM D0 V3 0 F BA_ CMD 1 FBC _D 54 B35 FBB_D 53 FB B_CM D23 FBB_C MD 1 D1 8 FB C_ CMD2
FBA _D53 F BA_CM D23 FBA _CM D1 FBB_D 54 FB B_CM D2 FBB_C MD 2
FB A_D 54 AM34 U 31 F BA_ CMD 2 FBC _D 55 B34 C1 7 FB C_ CMD3
FB A_D 55 AM35 FBA _D54 F BA_CM D2 FBA _CM D2 V3 2 F BA_ CMD 3 FBC _D 56 A29 FBB_D 55 FB B_CM D0 FBB_C MD 3 F19 FB C_ CMD4
FB A_D 56 AF 33 FBA _D55 F BA_CM D0 FBA _CM D3 T35 F BA_ CMD 4 FBC _D 57 B28 FBB_D 56 FB B_CM D10 FBB_C MD 4 C1 9 FB C_ CMD5
FBA _D56 FBA _CM D4 FBB_D 57 FBB_C MD 5
FB A_D 57 AE 32 F BA_CM D10 U 33 F BA_ CMD 5 FBC _D 58 A28 FB B_CM D26 B17 FB C_ CMD6
FB A_D 58 AF 34 FBA _D57 F BA_CM D26 FBA _CM D5 W32 F BA_ CMD 6 FBC _D 59 C28 FBB_D 58 FB B_CM D14 FBB_C MD 6 E20 FB C_ CMD7
FBA _D58 FBA _CM D6 FBB_D 59 FBB_C MD 7
FB A_D 59 AE 35 FBA _D59 F BA_CM D14 FBA _CM D7 W33 F BA_ CMD 7 FBC _D 60 C26 FBB_D 60 FB B_CM D7 FBB_C MD 8 B19 FB C_ CMD8
FB A_D 60 AE 34 F BA_CM D7 W31 F BA_ CMD 8 FBC _D 61 D25 FB B_CM D1 D2 0 FB C_ CMD9
FBA _D60 F BA_CM D1 FBA _CM D8 FBB_D 61 FB B_CM D22 FBB_C MD 9
FB A_D 61 AE 33 FBA _D61 FBA _CM D9 W34 F BA_ CMD 9 FBC _D 62 B25 FBB_D 62 FBB_C MD 10 A19 FB C_ CMD1 0
FB A_D 62 AB 32 FBA _D62 F BA_CM D22 FB A_CM D10 U 34 F BA_ CMD 10 FBC _D 63 A25 FBB_D 63 FB B_CM D20 FBB_C MD 11 D1 9 FB C_ CMD1 1 FBB _O DT_ L F BC _C MD 2 R 75 1 0K_04
F BA_CM D20 FB B_CM D24
FB A_D 63 AC 35 FBA _D63 F BA_CM D24 FB A_CM D11 U 35 F BA_ CMD 11 15 FB CD QM[ 7: 0] FB CD Q M[ 7: 0] FB B_CM D18 FBB_C MD 12 C2 0 FB C_ CMD1 2 FBB _O DT_ H F BC _C MD 18 R 83 1 0K_04
14 FB AD QM[ 7:0 ] F BAD Q M[ 7: 0] FB A_CM D12 U 32 F BA_ CMD 12 FBB_C MD 13 F20 FB C_ CMD1 3 FBB _C KE_ L F BC _C MD 3 R 73 1 0K_04
F BA_CM D18 T34 A16 FB B_CM D9 B20
F BA_CM D9 FB A_CM D13 F BA_ CMD 13 FBA _O DT_ L F BA _CMD 2 R 93 1 0K_04 F BC DQ M0 FBB_D QM 0 FB B_CM D29 FBB_C MD 14 FB C_ CMD1 4 FBB _C KE_ H F BC _C MD 19 R 88 1 0K_04
FBA D QM0 P 32 FBA _DQM 0 F BA_CM D29 FB A_CM D14 T33 F BA_ CMD 14 FBA _O DT_ H F BA _CMD 18 R 98 1 0K_04 F BC DQ M1 D10 FBB_D QM 1 FB B_CM D8 FBB_C MD 15 G2 1 FB C_ CMD1 5 FBB _R ST# F BC _C MD 5 R 84 1 0K_04
FBA D QM1 H 34 W30 F BA_ CMD 15 F BA _CMD 3 F BC DQ M2 F11 F22 FB C_ CMD1 6
J 30 FBA _DQM 1 F BA_CM D8 FB A_CM D15 AB 30 FBA _C KE_ L R 112 1 0K_04 D15 FBB_D QM 2 FB B_CM D27 FBB_C MD 16 F24
FBA D QM2 FBA _DQM 2 F BA_CM D27 FB A_CM D16 F BA_ CMD 16 FBA _C KE_ H F BA _CMD 19 R 99 1 0K_04 F BC DQ M3 FBB_D QM 3 FB B_CM D15 FBB_C MD 17 FB C_ CMD1 7
FBA D QM3 P 30 AA 30 F BA_ CMD 17 FBA _R ST# F BA _CMD 5 R 527 1 0K_04 F BC DQ M4 D27 F23 FB C_ CMD1 8
FBA D QM4 AF 32 FBA _DQM 3 F BA_CM D15 FB A_CM D17 AB 31 F BA_ CMD 18 F BC DQ M5 D34 FBB_D QM 4 FB B_CM D11 FBB_C MD 18 C2 5 FB C_ CMD1 9
AL 32 FBA _DQM 4 F BA_CM D11 FB A_CM D18 AA 32 A34 FBB_D QM 5 FB B_CM D16 FBB_C MD 19 C2 3
FBA D QM5 F BA_ CMD 19 F BC DQ M6 FB C_ CMD2 0
FBA D QM6 AL 34 FBA _DQM 5 F BA_CM D16 FB A_CM D19 AB 33 F BA_ CMD 20 F BC DQ M7 D28 FBB_D QM 6 FB B_CM D28 FBB_C MD 20 F21 FB C_ CMD2 1
FBA D QM7 AF 35 FBA _DQM 6 F BA_CM D28 FB A_CM D20 Y 32 F BA_ CMD 21 FB CD Q S_WP [7 :0] FBB_D QM 7 FB B_CM D3 FBB_C MD 21 E22 FB C_ CMD2 2
FBA _DQM 7 FB A_CM D21 FBB_C MD 22
F BAD Q S_WP 7
[ :0] F BA_CM D3 Y 33 F BA_ CMD 22 15 FB C DQ S_WP [ 7:0 ] FB B_CM D17 D2 1 FB C_ CMD2 3
14 F BA DQ S_W P[ 7: 0] F BA_CM D17 FB A_CM D22 AB 34 F BA_ CMD 23 F BC DQ S_ WP0 C14 FB B_CM D5 FBB_C MD 23 A23 FB C_ CMD2 4
F BA_CM D5 FB A_CM D23 FBB_D QS_WP0 FB B_CM D4 FBB_C MD 24
FBA D QS _WP0 L 34 FBA _DQS _
W P0 FB A_CM D24 AB 35 F BA_ CMD 24 F BC DQ S_ WP1 A10 FBB_D QS_WP1 FBB_C MD 25 D2 2 FB C_ CMD2 5
FBA D QS _WP1 H 35 FBA _DQS _
W P1
F BA_CM D4
F BA_CM D21 FB A_CM D25
Y 35 F BA_ CMD 25 F BC DQ S_ WP2 E10
FBB_D QS_WP2
FB B_CM D21
FB B_CM D6 FBB_C MD 26
B23 FB C_ CMD2 6
FBA D QS _WP2 J 32 FBA _DQS _
W P2 F BA_CM D6 FB A_CM D26 W35 F BA_ CMD 26 F BC DQ S_ WP3 D14 FBB_D QS_WP3 FB B_CM D13 FBB_C MD 27 C2 2 FB C_ CMD2 7
FBA D QS _WP3 N 31 FBA _DQS _
W P3 FB A_CM D27 Y 34 F BA_ CMD 27 F BC DQ S_ WP4 E26 FBB_D QS_WP4 FBB_C MD 28 B22 FB C_ CMD2 8
F BA_CM D13 FB B_CM D19
FBA D QS _WP4 AE 31 FBA _DQS _
W P4 F BA_CM D19 FB A_CM D28 Y 31 F BA_ CMD 28 F BC DQ S_ WP5 D32 FBB_D QS_WP5 FB B_CM D12 FBB_C MD 29 A22 FB C_ CMD2 9
FBA D QS _WP5 AJ 32 FBA _DQS _
W P5 F BA_CM D12 FB A_CM D29 Y 30 F BA_ CMD 29 F BC DQ S_ WP6 A32 FBB_D QS_WP6 FB B_CM D30 FBB_C MD 30 A20 FB C_ CMD3 0
FBA D QS _WP6 AJ 34 W29 F BA_ CMD 30 F BC DQ S_ WP7 B26 G2 0 FB C_ CMD3 1
FBA _DQS _
W P6 F BA_CM D30 FB A_CM D30 FBB_D QS_WP7 N /A FBB_C MD 31
FBA D QS _WP7 AC 33 FBA _DQS _
W P7 N /A FB A_CM D31 Y 29 F BA_ CMD 31 15 FB CD Q S_R N [7: 0] FB CD Q S_R N[ 7: 0]
F BAD Q S_R N[ 7: 0]
14 F BA DQ S_R N [7 :0] F BC DQ S_ RN 0 B14
FBB_D QS_R N0
FBA D QS _RN 0 L 35 F BC DQ S_ RN 1 B10
FBA D QS _RN 1 G 35 FBA _DQS _
R N0 F BC DQ S_ RN 2 D9 FBB_D QS_R N1 E17 FB C_ CLK 0
FBA D QS _RN 2 H 31 FBA _DQS _
R N1 T32 F BA_ CLK 0 F BC DQ S_ RN 3 E14 FBB_D QS_R N2 FBB_C L
K0 D1 7 FB C_ CLK 0# FB C_C LK 0 15
FBA _DQS _
R N2 FBA _
C LK0 FBB_D QS_R N3 FBB_C L
K0
FBA D QS _RN 3 N 32 T31 F BA_ CLK 0# FBA _C LK0 14 F BC DQ S_ RN 4 F26 D2 3 FB C_ CLK 1 FB C_C LK 0# 1 5
FBA D QS _RN 4 AD 32 FBA _DQS _
R N3 FBA _
C LK0 AC 31 F BA_ CLK 1 FBA _C LK0# 14 F BC DQ S_ RN 5 D31 FBB_D QS_R N4 FBB_C L
K1 E23 FB C_ CLK 1# FB C_C LK 1 15
FBA _DQS _
R N4 FBA _
C LK1 FBA _C LK1 14 FBB_D QS_R N5 FBB_C L
K1 FB C_C LK 1# 1 5
FBA D QS _RN 5 AJ 31 FBA _DQS _
R N5 FBA _
C LK1 AC 30 F BA_ CLK 1# F BC DQ S_ RN 6 A31 FBB_D QS_R N6
FBA D QS _RN 6 AJ 35 FBA _C LK1# 14 F BC DQ S_ RN 7 A26
FBA _DQS _
R N6 FBB_D QS_R N7
FBA D QS _RN 7 AC 34 FBA _DQS _
R N7
P 29 FBA _WC K0 FBB D

_ EBU G0_CAS 2 G1 9 F BC _D EBU G 0 R8 1 *60. 4_ 04
R 29 FBA _WC K0 F BA_DEB UG0_C AS2 T30 FBA _D EBU G 0 R 97 *6 0. 4_04 G14 FBB_WCK0 FBB_D EBUG 1 G1 6 F BC _D EBU G 1 R7 6 *10K _04 FB V D D Q
L 29 T29 F B VD D Q G15
FBA _WC K1 FBA D
_ EBU G1 FBA _D EBU G 1 R 92 *1 0K_0 4 FBB_WCK0
M29 FBA _WC K1 G11 FBB_WCK1
AG 29 G12
AH 29 FBA _WC K2 G27 FBB_WCK1
AD 29 FBA _WC K2 G28 FBB_WCK2
AE 29 FBA _WC K3 G24 FBB_WCK2
FBA _WC K3 G25 FBB_WCK3
FBB_WCK3
16 mi l P EX_ VD D
FB _DLLAVD D AF 28
AE 28
FB A_D PL LAVD D L8 . HC B1 005KF - 121T20
F B_PLLAVD D
GT21x G F10x C1 35 C9 0 C 806 C 137 C 143

FB _DLLAVD D FB_C AL_PD_VD DQ FB _C AL_P D_V D DQ R9 0 40 .2_ 1%_04
RF U F B VDDQ
0. 1u_10 V_X7R _04 0. 1u_10 V_X7R _04 0. 1u_10 V_X7 R_0 4 1u_6 .3 V_X5R _06 10u _6. 3V_X5 R_0 6
K 27
RF U F B_PLLAVD D FB_C AL_PD_VD DQ
AG727
7 8K 28
FB _C AL_P U_G N D
FB _DLLAVD D FB_C AL_PU_G ND R9 6 40 .2_ 1%_04
J19AF2
GF10x GT 21
X F B_PLLAVD D P LAC E N EA R BA LLS PLA CE N EA R B GA C LO SE TO CA PS FB_C AL_PU_G ND
M27 L2L2
J18
FB _VR EF _TP J 27 FB_V REF_N C F B_CAL_TER M_G ND FB _C AL_TE RM_G N D R9 1 60 .4_ 1%_04
FB_VR EF
F B_CAL_TER M_G ND
M28
N12 E- GE -A 1 GF 106- 700- A 1
N 12E- G E- A1 G F106 -70 0-A 1
12, 37 PE X_VD D
14, 15, 37 FB VD DQ
B - 14 VGA Frame Buffer Interface
Schematic Diagrams
VGA Frame Buffer A
Frame Buffer Partition A
F B A_ C MD [ 3 1: 0] FB V D DQ
F BV D D Q 1 3 FB A _C MD [ 31: 0]
F BA _D [ 63 0
: ]
13 F BA _D [ 6 3: 0]
13 F BA D Q M[ 7: 0] F BA D Q M[7 : 0] C2 43 C 792 C 24 0 C 6 49 C 66 5 C 1 87 C 18 1 C 1 80 C 63 0
C 2 10 C 63 1 C 6 66 C 24 1 C 2 34 C 790 C 24 4 C2 15 C 65 1
F BA D Q S_ WP [ 7: 0] 0. 1u_ 16 V_ Y5 V_ 04 *0. 1u _16 V_ Y 5V _04 0. 1u _1 6V _Y 5V _0 4 0 . 1u_ 16V _Y 5 V_ 04 0. 1u _1 6V _Y 5V _0 4 0 . 1u_ 16V _Y 5 V_ 04 1u _6. 3 V_ X5R _ 04 1 u_ 6. 3V _X5 R _04 1u _6. 3 V_ X5R _ 04
13 F B AD Q S _W P[ 7: 0 ]
0 . 1u_ 16V _Y 5 V_ 04 0. 1u _1 6V _Y 5V _04 0 . 1u_ 16V _Y 5 V_ 04 0. 1u _1 6V_ Y 5V _04 0 . 1u_ 16V _Y 5 V_ 04 *0. 1u _1 6V _Y 5V _0 4 1u _6 .3 V_ X5R _ 04 1u_ 6. 3V _X 5R _0 4 1u _6 .3 V_ X5R _ 04
F BA D Q S_ R N[ 7 0
: ]
1 3 FB AD Q S _R N [ 7: 0]
F BV D D Q F BV D D Q FB V D DQ
C 6 25 C 24 5 C 2 46 C 63 4 C 6 58 C 791 C 63 8 C6 67 C 20 9 C6 48 C 23 8 C2 32 C 21 7 C6 64 C 793 C 65 3 C 6 62 C 21 3 C 2 18 C 20 0 C 1 88 C 63 7
0 . 1u_ 16V _Y 5 V_ 04 0. 1u _1 6V _Y 5V _04 0 . 1u_ 16V _Y 5 V_ 04 0. 1u _1 6V_ Y 5V _04 0 . 1u_ 16V _Y 5 V_ 04 *0. 1u _1 6V _Y 5V _0 4 1u _6 .3 V_ X5R _ 04 1u_ 6. 3V _X 5R _0 4 1u _6 .3 V_ X5R _ 04 1u_ 6. 3V _X 5R _0 4 1u _6. 3 V_ X5R _ 04 1u_ 6. 3V _X 5R _0 4 1u _6. 3 V_ X5R _ 04 0. 1u_ 16 V_ Y5 V_ 04 *0. 1u _16 V_ Y 5V _04 0. 1u _1 6V _Y 5V _0 4 0 . 1u_ 16V _Y 5 V_ 04 0. 1u _1 6V _Y 5V _0 4 0 . 1u_ 16V _Y 5 V_ 04 1u _6. 3 V_ X5R _ 04 1 u_ 6. 3V _X5 R _04 1u _6. 3 V_ X5R _ 04
U9 U 51 U 10 U5 0
FB V DD Q F BV D D Q F BV D D Q FB VD D Q SDD R3 _BG A96
G F1X X
FB A _C M D 30 J3 B2 F BA _C M D 3 0 J 3 B2 F B A_ C MD 3 0 J 3 B2 FB A _C M D 30 J3 B2 0 ..3 1 32 .. 63
Sheet 14 of 49
K3 R AS VDD D9 K3 RA S VDD D9 K3 RAS V DD D9 K3 R AS VD D D9 C MD0 C S0#
FB A _C MD 15 C AS VDD F BA _C MD 1 5 CA S VDD F B A_ C MD 1 5 CAS V DD FB A _C MD 15 C AS VD D
FB A _C MD 13 L3 G7 F BA _C MD 1 3 L3 G7 F B A_ C MD 1 3 L3 G7 FB A _C MD 13 L3 G7 C MD1
FB A _C MD 0 L2 WE VDD K2 F BA _C MD 0 L2 W E VDD K2 F B A_ C MD 1 6 L2 W E V DD K2 FB A _C MD 16 L2 WE VD D K2 C MD2 O DT
CS VDD K8 CS VDD K8 CS V DD K8 CS VD D K8 C MD3 C KE
VDD N1 VDD N1 V DD N1 VD D N1 C MD4 A 14 A1 4
VGA Frame Buffer

FB A _C MD 9 N3 VDD N9 F BA _C MD 9 N3 VDD N9 F B A_ C MD 9 N3 V DD N9 FB A _C MD 9 N3 VD D N9 C MD5 R ST RS T
FB A _C MD 11 P7 A0 VDD R1 F BA _C MD 1 1 P7 A0 VDD R1 F B A_ C MD 1 1 P7 A0 V DD R1 FB A _C MD 11 P7 A0 VD D R1 C MD6 A 9 A9
FB A _C MD 8 P3 A1 VDD R9 F BA _C MD 8 P3 A1 VDD R9 F B A_ C MD 8 P3 A1 V DD R9 FB A _C MD 8 P3 A1 VD D R9 C MD7 A 7 A7
FB A _C MD 25 N2 A2 VDD F BA _C MD 2 5 N2 A2 VDD F B A_ C MD 2 5 N2 A2 V DD FB A _C MD 25 N2 A2 VD D C MD8 A 2 A2
FB A _C MD 10 P8 A3 A1 F BA _C MD 1 0 P8 A3 A1 F B A_ C MD 1 0 P8 A3 A1 FB A _C MD 10 P8 A3 A1 C MD9 A 0 A0
FB A _C MD 24
FB A _C MD 22
FB A _C MD 7
FB A _C MD 21
P2
R8
R2
T8
R3
A4
A5
A6
A7
A8
V DDQ
V DDQ
V DDQ
V DDQ
V DDQ
A8
C1
C9
D2
E9
F BA _C MD 2 4
F BA _C MD 2 2
F BA _C MD 7
F BA _C MD 2 1
P2
R8
R2
T8
R3
A4
A5
A6
A7
A8
V DDQ
V DDQ
V DDQ
V DDQ
V DDQ
A8
C1
C9
D2
E9
F B A_ C MD 2 4
F B A_ C MD 2 2
F B A_ C MD 7
F B A_ C MD 2 1
P2
R8
R2
T8
R3
A4
A5
A6
A7
A8
VD D Q
VD D Q
VD D Q
VD D Q
VD D Q
A8
C1
C9
D2
E9
FB A _C MD 24
FB A _C MD 22
FB A _C MD 7
FB A _C MD 21
P2
R8
R2
T8
R3
A4
A5
A6
A7
A8
V DD Q
V DD Q
V DD Q
V DD Q
V DD Q
A8
C1
C9
D2
E9
C MD1 0
C MD1 1
C MD1 2
C MD1 3
A 4
A 1
B A0
W E#
A4
A1
BA 0
WE #
A
FB A _C MD 6 F BA _C MD 6 F B A_ C MD 6 FB A _C MD 6 C MD1 4 A 15 A1 5
FB A _C MD 29 L7 A9 V DDQ F1 F BA _C MD 2 9 L7 A9 V DDQ F1 F B A_ C MD 2 9 L7 A9 VD D Q F1 FB A _C MD 29 L7 A9 V DD Q F1 C MD1 5 C AS# CA S#
FB A _C MD 23 R7 A1 0 V DDQ H2 F BA _C MD 2 3 R7 A 10 V DDQ H2 F B A_ C MD 2 3 R7 A 10 VD D Q H2 FB A _C MD 23 R7 A1 0 V DD Q H2 C MD1 6 CS 0#
FB A _C MD 28 N7 A1 1 V DDQ H9 F BA _C MD 2 8 N7 A 11 V DDQ H9 F B A_ C MD 2 8 N7 A 11 VD D Q H9 FB A _C MD 28 N7 A1 1 V DD Q H9 C MD1 7
FB A _C MD 20 T3 A1 2 V DDQ F BA _C MD 2 0 T3 A 12 V DDQ F B A_ C MD 2 0 T3 A 12 VD D Q FB A _C MD 20 T3 A1 2 V DD Q C MD1 8 OD T
FB A _C MD 4 T7 A1 3 F BA _C MD 4 T7 A 13 F B A_ C MD 4 T7 A 13 FB A _C MD 4 T7 A1 3 C MD1 9 CK E
FB A _C MD 14 M7 A1 4/ N C 6 F BA _C MD 1 4 M7 A 14 /N C 6 F B A_ C MD 1 4 M7 A 14 / NC 6 FB A _C MD 14 M7 A1 4/ N C 6 C MD2 0 A 13 A1 3
A1 5/ N C 5 A 15 /N C 5 A 15 / NC 5 A1 5/ N C 5 C MD2 1 A 8 A8
A9 A9 A9 A9 C MD2 2 A 6 A6
VS S VS S V SS VSS
FB A _C MD 12 M2 B3 F BA _C MD 1 2 M2 B3 F B A_ C MD 1 2 M2 B3 FB A _C MD 12 M2 B3 C MD2 3 A 11 A1 1
FB A _C MD 27 N8 BA 0 VS S E1 F BA _C MD 2 7 N8 B A0 VS S E1 F B A_ C MD 2 7 N8 BA0 V SS E1 FB A _C MD 27 N8 BA 0 VSS E1 C MD2 4 A 5 A5
FB A _C MD 26 M3 BA 1 VS S G8 F BA _C MD 2 6 M3 B A1 VS S G8 F B A_ C MD 2 6 M3 BA1 V SS G8 FB A _C MD 26 M3 BA 1 VSS G8 C MD2 5 A 3 A3
BA 2 VS S J2 B A2 VS S J2 BA2 V SS J 2 BA 2 VSS J2 C MD2 6 B A2 BA 2
VS S VS S V SS VSS C MD2 7 B A1 BA 1
J8 J8 J 8 J8
VS S M1 FB A_ C LK 0 VS S M1 V SS M1 F BA _C L K1 VSS M1 C MD2 8 A 12 A1 2
FB A _C MD 3 K9 VS S M9 F BA _C MD 3 K9 VS S M9 F B A_ C MD 1 9 K9 V SS M9 FB A _C MD 19 K9 VSS M9 C MD2 9 A 10 A1 0
FB A _C LK 0 J7 C KE VS S P1 F BA _C L K0 J 7 CK E VS S P1 F B A_ C LK 1 J 7 CKE V SS P1 FB A _C LK 1 J7 C KE VSS P1 C MD3 0 R AS# RA S#
13 FB A _C LK 0 CK VS S CK VS S 13 F BA _C L K1 CK V SS CK VSS
FB A _C LK 0# K7 P9 R 13 6 F BA _C L K0 # K7 P9 F B A_ C LK 1# K7 P9 R1 35 FB A _C LK 1# K7 P9
13 FB A _C LK 0# CK VS S T1 CK VS S T1 13 F BA _C L K1 # CK V SS T1 CK VSS T1
J1 VS S T9 16 0_1 %_0 4 J 1 VS S T9 J 1 V SS T9 160 _1% _04 J1 VSS T9
J9 NC1 VS S J 9 NC1 VS S J 9 NC1 V SS J9 NC1 VSS
NC2 NC2 NC2 NC2
L1 B1 FB A_ C LK 0# L1 B1 L1 B1 F BA _C L K1 # L1 B1
L9 NC3 VS S Q B9 L9 NC3 V SS Q B9 L9 NC3 V SS Q B9 L9 NC3 V S SQ B9
NC4 VS S Q D1 NC4 V SS Q D1 NC4 V SS Q D1 NC4 V S SQ D1
VS S Q D8 V SS Q D8 V SS Q D8 V S SQ D8
VS S Q V SS Q V SS Q V S SQ
E2 E2 E2 E2
FB A _C MD 5 T2 VS S Q E8 F BV D D Q F BA _C MD 5 T2 V SS Q E8 F B A_ C MD 5 T2 V SS Q E8 F B VD D Q FB A _C MD 5 T2 V S SQ E8
R ES E T VS S Q F9 R E SE T V SS Q F9 R E S ET V SS Q F9 R ES E T V S SQ F9
FB A _C MD 2 K1 VS S Q G1 F BA _C MD 2 K1 V SS Q G1 F B A_ C MD 1 8 K1 V SS Q G1 FB A _C MD 18 K1 V S SQ G1
OD T VS S Q OD T V SS Q ODT V SS Q ODT V S SQ
G9 G9 G9 G9
FB A _Z Q 0 L8 VS S Q R 14 1 FB A _Z Q1 L8 V SS Q F B A_ ZQ 2 L8 V SS Q F BA _Z Q 3 L8 V S SQ
ZQ ZQ ZQ ZQ
16mil 16mil 16mil R1 44 16mil
1. 1 K_ 1%_0 4
<500mil <500mil <500mil 1. 1K _1% _04 <500mil
R 1 37 H1 F B A_ VR E F0 R 14 0 H1 F B A_ VR E F 0 R 139 H1 F BA _V R EF 1 R 522 H1 F BA _V R EF 1
VR E F D Q M8 V R EF D Q M8 V R EF D Q M8 VR E FD Q M8
2 43_ 1%_ 04 V R EF C A 24 3_ 1%_0 4 V R E FC A 24 3_1 %_0 4 VR E FC A 243 _1% _04 V RE F C A
C 233 R 13 8 C 2 42 R1 43
0. 01 u_1 6V _X 7R _0 4 1. 1 K_ 1%_0 4 0 . 01u _16 V_ X7R _ 04 1. 1K _1% _04
FB A_ D 12 E3 D7 F BA _D 2 2 F BA _D 29 E3 D7 F B A_ D3 F BA _D 3 7 E3 D7 FB A _D 56 F B A_ D 45 E3 D7 F BA _D 5 1
FB A_ D 9 F7 D Q L0 D QU 0 C3 F BA _D 1 9 F BA _D 28 F7 D Q L0 D QU 0 C3 F B A_ D6 F BA _D 3 3 F7 D QL 0 DQU 0 C3 FB A _D 59 F B A_ D 47 F7 D Q L0 DQU 0 C3 F BA _D 5 2
FB A_ D 13 H3 D Q L3 D QU 3 A7 F BA _D 2 1 F BA _D 26 H3 D Q L3 D QU 3 A7 F B A_ D2 F BA _D 3 6 H3 D QL 3 DQU 3 A7 FB A _D 61 F B A_ D 43 H3 D Q L3 DQU 3 A7 F BA _D 4 9
FB A_ D 15 G2 D Q L5 D QU 5 B8 F BA _D 2 3 F BA _D 31 G2 D Q L5 D QU 5 B8 F B A_ D0 F BA _D 3 8 G2 D QL 5 DQU 5 B8 FB A _D 60 F B A_ D 40 G2 D Q L5 DQU 5 B8 F BA _D 5 0
D Q L7 D QU 7 D Q L7 D QU 7 D QL 7 DQU 7 D Q L7 DQU 7
FB AD Q M1 E7 D3 F B AD Q M2 F BA D Q M3 E7 D3 F B AD Q M0 F BA D Q M4 E7 D3 F BA D Q M7 F B AD Q M5 E7 D3 F BA D Q M6
FB AD Q S _W P1 F3 D ML D MU C7 F B AD Q S _W P2 F BA D Q S_ WP 3 F 3 D ML D MU C7 F B AD Q S _WP 0 F BA D Q S_ WP 4 F 3 D ML D MU C7 F BA D Q S_ WP 7 F B AD Q S _W P5 F 3 D ML DMU C7 F BA D Q S_ WP 6
FB AD Q S _R N 1 G 3 D Q SL D QS U B7 F B AD Q S _R N 2 F BA D Q S_ R N3 G3 D QS L D QS U B7 F B AD Q S _R N 0 F BA D Q S_ R N 4 G 3 D QS L DQ S U B7 F BA D Q S_ R N 7 F B AD Q S _R N 5 G 3 D Q SL D Q SU B7 F BA D Q S_ R N 6
D Q SL D QS U D QS L D QS U D QS L DQ S U D Q SL D Q SU
K4W 2G 1 646 C -H C 1 1 K4 W2 G 164 6C - H C 11 K 4W2 G 164 6C - H C 11 K 4W 2G 16 46 C- H C 11
1 3, 15, 3 7 FB V DD Q
VGA Frame Buffer A B - 15
Schematic Diagrams
VGA Frame Buffer B
Frame Buffer Partition B
F BV D D Q FB V D DQ
FB C _C MD [ 31: 0]
13 F BC _ C MD [ 3 1: 0]
C5 70 C 30 C 57 8 C5 76 C 574 C 78 4 C5 4 C 568 C 58 0 C 155 C 152 C 14 7 C 5 72 C 62 C 78 8 C 1 20 C1 57 C 78 6
F BC _ D [6 3: 0]
13 FB C _D [ 63 :0 ]
0. 1u_ 16 V_Y 5 V_ 04 0. 1u _16 V_ Y 5V _04 0 .1 u_1 6V _Y 5V _0 4 0. 1u_ 16V _Y 5 V_ 04 0. 1u _16 V_ Y 5V _04 *0 .1 u_1 6V _Y 5V _0 4 1u_ 6. 3V _X5 R _04 1u _6. 3V _X 5R _0 4 *1 u_6 . 3V_ X5 R_ 04 0. 1u_ 16 V_ Y5 V_ 04 0. 1u _16 V_ Y5 V_ 04 0. 1u _1 6V _Y 5V _04 0 .1 u_ 16V _Y 5V _0 4 0. 1u_ 16 V_ Y5 V_ 04 *0. 1 u_1 6V _Y 5V _0 4 1 u_6 .3 V_ X5 R_ 04 1u_ 6. 3V _X5 R _04 *1u _6. 3 V_ X5R _ 04
1 3 FB C D Q M[ 7 0
: ] F BC D Q M[ 7: 0]
F BC D Q S _W P[ 7: 0]
13 F BC D Q S_ WP [ 7: 0]
F BV D D Q
F BC D Q S _R N [ 7: 0] FB V D DQ
13 F BC D Q S _R N [ 7: 0]
C6 05 C 58 6 C 61 0 C6 00 C 146 C 78 5 C5 92 C 156 C 36 2
C 68 C 160 C 11 6 C 5 85 C 599 C 78 9 C 5 90 C6 03 C 78 7
0. 1u_ 16 V_Y 5 V_ 04 0. 1u _16 V_ Y 5V _04 0 .1 u_1 6V _Y 5V _0 4 0. 1u_ 16V _Y 5 V_ 04 0. 1u _16 V_ Y 5V _04 *0. 1u _1 6V_ Y 5V _04 1u_ 6. 3V _X5 R _04 1u _6. 3V _X 5R _0 4 *1 u_6 . 3V_ X5 R_ 04
0. 1u_ 16 V_ Y5 V_ 04 0. 1u _16 V_ Y5 V_ 04 0. 1u _1 6V _Y 5V _04 0 .1 u_ 16V _Y 5V _0 4 0. 1u_ 16 V_ Y5 V_ 04 *0. 1u _16 V_ Y5 V_ 04 1 u_6 .3 V_ X5 R_ 04 1u_ 6. 3V _X5 R _04 *1u _6. 3 V_ X5R _ 04
U4 U4 4
U7 U4 7
F BV D D Q F B VD D Q
FB V D DQ F BV D D Q SD DR3 _BG A96
J3 B2 J3 B2 GF1 XX
Sheet 15 of 49
FB C _C M D 30 F BC _ C MD 3 0
FB C _C MD 15 K3 RA S V DD D9 F BC _ C MD 1 5 K3 RA S V DD D9 FB C _C M D 30 J 3 B2 F BC _C M D 30 J3 B2 0 ..3 1 3 2.. 63
CA S V DD CA S V DD RA S V DD R AS VD D CMD 0 C S0#
FB C _C MD 13 L3 G7 F BC _ C MD 1 3 L3 G7 FB C _C MD 15 K3 D9 F BC _C MD 15 K3 D9
FB C _C MD 0 L2 WE V DD K2 F BC _ C MD 0 L2 WE V DD K2 FB C _C MD 13 L3 CA S V DD G7 F BC _C MD 13 L3 C AS VD D G7 CMD 1
CS V DD K8 CS V DD K8 FB C _C MD 16 L2 W E V DD K2 F BC _C MD 16 L2 WE VD D K2 CMD 2 O DT
V DD V DD CS V DD CS VD D CMD 3 C KE
N1 N1 K8 K8
VGA Frame Buffer FB C _C MD 9

FB C _C MD 11
FB C _C MD 8
FB C _C MD 25
N3
P7
P3
N2
A0
A1
A2
V DD
V DD
V DD
V DD
N9
R1
R9
F BC _ C MD 9
F BC _ C MD 1 1
F BC _ C MD 8
F BC _ C MD 2 5
N3
P7
P3
N2
A0
A1
A2
V DD
V DD
V DD
V DD
N9
R1
R9
FB C _C MD 9
FB C _C MD 11
FB C _C MD 8
N3
P7
P3
A0
A1
V DD
V DD
V DD
V DD
N1
N9
R1
R9
F BC _C MD 9
F BC _C MD 11
F BC _C MD 8
N3
P7
P3
A0
A1
VD D
VD D
VD D
VD D
N1
N9
R1
R9
CMD 4
CMD 5
CMD 6
CMD 7
A 14
R ST
A 9
A 7
A 14
R ST
A 9
A 7
P8 A3 A1 P8 A3 A1 N2 A2 V DD N2 A2 VD D
B
FB C _C MD 10 F BC _ C MD 1 0 FB C _C MD 25 F BC _C MD 25 CMD 8 A 2 A 2
FB C _C MD 24 P2 A4 VD D Q A8 F BC _ C MD 2 4 P2 A4 V D DQ A8 FB C _C MD 10 P8 A3 A1 F BC _C MD 10 P8 A3 A1 CMD 9 A 0 A 0
A5 VD D Q A5 V D DQ A4 V DDQ A4 VD D Q CMD 10 A 4 A 4
FB C _C MD 22 R8 C1 F BC _ C MD 2 2 R8 C1 FB C _C MD 24 P2 A8 F BC _C MD 24 P2 A8
FB C _C MD 7 R2 A6 VD D Q C9 F BC _ C MD 7 R2 A6 V D DQ C9 FB C _C MD 22 R8 A5 V DDQ C1 F BC _C MD 22 R8 A5 VD D Q C1 CMD 11 A 1 A 1
T8 A7 VD D Q D2 T8 A7 V D DQ D2 R2 A6 V DDQ C9 R2 A6 VD D Q C9 CMD 12 B A0 B A0
FB C _C MD 21 A8 VD D Q F BC _ C MD 2 1 A8 V D DQ FB C _C MD 7 A7 V DDQ F BC _C MD 7 A7 VD D Q
FB C _C MD 6 R3 E9 F BC _ C MD 6 R3 E9 FB C _C MD 21 T8 D2 F BC _C MD 21 T8 D2 CMD 13 W E# W E#
FB C _C MD 29 L7 A9 VD D Q F1 F BC _ C MD 2 9 L7 A9 V D DQ F1 FB C _C MD 6 R3 A8 V DDQ E9 F BC _C MD 6 R3 A8 VD D Q E9 CMD 14 A 15 A 15
R7 A1 0 VD D Q H2 R7 A 10 V D DQ H2 L7 A9 V DDQ F1 L7 A9 VD D Q F1 CMD 15 C AS# C AS#
FB C _C MD 23 F BC _ C MD 2 3 FB C _C MD 29 F BC _C MD 29
FB C _C MD 28 N7 A1 1 VD D Q H9 F BC _ C MD 2 8 N7 A 11 V D DQ H9 FB C _C MD 23 R7 A 10 V DDQ H2 F BC _C MD 23 R7 A1 0 VD D Q H2 CMD 16 C S0#
FB C _C MD 20 T3 A1 2 VD D Q F BC _ C MD 2 0 T3 A 12 V D DQ FB C _C MD 28 N7 A 11 V DDQ H9 F BC _C MD 28 N7 A1 1 VD D Q H9 CMD 17
A1 3 A 13 A 12 V DDQ A1 2 VD D Q CMD 18 O DT
FB C _C MD 4 T7 F BC _ C MD 4 T7 FB C _C MD 20 T3 F BC _C MD 20 T3
FB C _C MD 14 M7 A1 4/ N C 6 F BC _ C MD 1 4 M7 A 14/ N C 6 FB C _C MD 4 T7 A 13 F BC _C MD 4 T7 A1 3 CMD 19 C KE
A1 5/ N C 5 A 15/ N C 5 FB C _C MD 14 M7 A 14 / NC 6 F BC _C MD 14 M7 A1 4/ N C 6
CMD 20 A 13 A 13
A 15 / NC 5 A1 5/ N C 5 CMD 21 A 8 A 8
A9 A9
FB C _C MD 12 M2 V SS B3 F BC _ C MD 1 2 M2 VSS B3 A9 A9 CMD 22 A 6 A 6
FB C _C MD 27 N8 BA 0 V SS E1 F BC _ C MD 2 7 N8 B A0 VSS E1 FB C _C MD 12 M2 VS S B3 F BC _C MD 12 M2 V SS B3 CMD 23 A 11 A 11
BA 1 V SS B A1 VSS BA0 VS S BA 0 V SS CMD 24 A 5 A 5
FB C _C MD 26 M3 G8 F BC _ C MD 2 6 M3 G8 FB C _C MD 27 N8 E1 F BC _C MD 27 N8 E1
BA 2 V SS B A2 VSS BA1 VS S BA 1 V SS CMD 25 A 3 A 3
J2 J2 FB C _C MD 26 M3 G8 F BC _C MD 26 M3 G8
V SS J8 VSS J8 BA2 VS S J2 BA 2 V SS J 2 CMD 26 B A2 B A2
V SS M1 VSS M1 VS S J8 V SS J 8 CMD 27 B A1 B A1
V SS VSS VS S V SS CMD 28 A 12 A 12
FB C _C MD 3 K9 M9 F BC _ C MD 3 K9 M9 M1 M1
FB C _C LK 0 J7 CK E V SS P1 FB C _C LK 0 F BC _ C LK 0 J7 CK E VSS P1 FB C _C MD 19 K9 VS S M9 FB C _C LK 1 F BC _C MD 19 K9 V SS M9 CMD 29 A 10 A 10
13 FB C _C LK 0 FB C _C LK 0# K7 CK V SS P9 F BC _ C LK 0# K7 CK VSS P9 FB C _C LK 1 J 7 CK E VS S P1 F BC _C L K1 J7 C KE V SS P1 CMD 30 R AS# R AS#
13 FB C _C LK 0# CK V SS CK VSS 13 FB C _C LK 1 CK VS S CK V SS
T1 T1 FB C _C LK 1# K7 P9 F BC _C L K1 # K7 P9
J1 V SS T9 R 43 J1 VSS T9 13 FB C _C LK 1# CK VS S T1 R 10 8 CK V SS T1
J9 NC 1 V SS J9 NC1 VSS J 1 VS S T9 J1 V SS T9
NC 2 NC2 NC1 VS S NC1 V SS
L1 B1 16 0_ 1%_0 4 L1 B1 J 9 16 0_1 %_0 4 J9
L9 NC 3 V SS Q B9 L9 NC3 VS SQ B9 L1 NC2 B1 L1 NC2 B1
NC 4 V SS Q D1 NC4 VS SQ D1 L9 NC3 VS S Q B9 L9 NC3 V S SQ B9
FB C _C LK 0# FB C _C LK 1#
V SS Q D8 VS SQ D8 NC4 VS S Q D1 NC4 V S SQ D1
V SS Q E2 VS SQ E2 VS S Q D8 V S SQ D8
T2 V SS Q E8 T2 VS SQ E8 VS S Q E2 V S SQ E2
FB C _C MD 5 F BV D D Q F BC _C MD 5
RE S ET V SS Q F9 R E SE T VS SQ F9 FB C _C MD 5 T2 VS S Q E8 FB V D DQ F BC _C MD 5 T2 V S SQ E8
FB C _C MD 2 K1 V SS Q G1 F BC _C MD 2 K1 VS SQ G1 R E S ET VS S Q F9 R ES E T V S SQ F9
OD T V SS Q OD T VS SQ VS S Q V S SQ
G9 G9 FB C _C MD 18 K1 G1 F BC _C MD 18 K1 G1
L8 V SS Q L8 VS SQ OD T VS S Q G9 OD T V S SQ G9
FB C _Z Q 0 ZQ R 60 F BC _Z Q 1 ZQ VS S Q V S SQ
FB C _Z Q 2 L8 R 50 1 FB C _Z Q 3 L8
16mil 1. 1 K_ 1%_ 04
16mil ZQ 16mil ZQ 16mil
<500mil <500mil <500mil 1. 1K _1 %_0 4 <500mil
R 69 H1 FB C _V R EF 0 R 48 4 H1 F BC _V R E F0
V R EF D Q M8 VR E F DQ M8 R 95 H1 F B C _V RE F 1 R 504 H1 FB C _V R EF 1
VR E FC A V R EF C A V R EF D Q VR E FD Q
2 43_ 1%_0 4 24 3_1 %_0 4 M8 M8
C 43 R 48 5 24 3_1 %_0 4 V R EF C A 24 3_1 %_04 VR E F CA
C 142 R 50 2
0. 0 1u_ 16V _X 7R _0 4 1. 1 K_ 1%_ 04
0. 01 u_1 6V _X7 R _04 1. 1K _1 %_0 4
F B C _D 15 E3 D7 FB C _D 20 F BC _D 2 8 E3 D7 FB C _D 3
F B C _D 9 F7 DQ L 0 D Q U0 C3 FB C _D 21 F BC _D 2 6 F7 D Q L0 D QU 0 C3 FB C _D 7 F BC _ D 37 E3 D7 F B C_ D 59 FB C _D 44 E3 D7 FB C _D 49
F2 DQ L 1 D Q U1 C8 F2 D Q L1 D QU 1 C8 F7 D QL 0 DQ U 0 C3 F7 D Q L0 D QU 0 C3
F B C _D 12 DQ L 2 D Q U2 FB C _D 23 F BC _D 2 9 D Q L2 D QU 2 FB C _D 0 F BC _ D 35 D QL 1 DQ U 1 F B C_ D 62 FB C _D 46 D Q L1 D QU 1 FB C _D 53
F B C _D 10 F8 C2 FB C _D 19 F BC _D 2 7 F8 C2 FB C _D 6 F BC _ D 36 F2 C8 F B C_ D 57 FB C _D 40 F2 C8 FB C _D 48
F B C _D 14 H3 DQ L 3 D Q U3 A7 FB C _D 18 F BC _D 3 0 H3 D Q L3 D QU 3 A7 FB C _D 1 F BC _ D 34 F8 D QL 2 DQ U 2 C2 F B C_ D 61 FB C _D 45 F8 D Q L2 D QU 2 C2 FB C _D 54
H8 DQ L 4 D Q U4 A2 H8 D Q L4 D QU 4 A2 H3 D QL 3 DQ U 3 A7 H3 D Q L3 D QU 3 A7
F B C _D 8 FB C _D 17 F BC _D 2 4 FB C _D 4 F BC _ D 39 F B C_ D 58 FB C _D 42 FB C _D 51
F B C _D 13 G2 DQ L 5 D Q U5 B8 FB C _D 22 F BC _D 3 1 G2 D Q L5 D QU 5 B8 FB C _D 2 F BC _ D 33 H8 D QL 4 DQ U 4 A2 F B C_ D 63 FB C _D 47 H8 D Q L4 D QU 4 A2 FB C _D 55
DQ L 6 D Q U6 D Q L6 D QU 6 D QL 5 DQ U 5 D Q L5 D QU 5
F B C _D 11 H7 A3 FB C _D 16 F BC _D 2 5 H7 A3 FB C _D 5 F BC _ D 38 G2 B8 F B C_ D 56 FB C _D 41 G2 B8 FB C _D 50
DQ L 7 D Q U7 D Q L7 D QU 7 F BC _ D 32 H7 D QL 6 DQ U 6 A3 F B C_ D 60 FB C _D 43 H7 D Q L6 D QU 6 A3 FB C _D 52
D QL 7 DQ U 7 D Q L7 D QU 7
F B C DQ M1 E7 D3 FB C D Q M2 F BC D Q M3 E7 D3 FB C D Q M0
F B C DQ S _W P1 F 3 DML D MU C7 FB C D Q S_ WP 2 F BC D Q S_ WP 3 F3 D ML D MU C7 FB C D Q S_ WP 0 F BC D Q M4 E7 D3 FB C D Q M7 FB C D Q M5 E7 D3 FB C D Q M6
G3 DQ S L DQ S U B7 G3 D Q SL D Q SU B7 F3 D ML D MU C7 F3 D ML D MU C7
F B C DQ S _R N 1 FB C D Q S_ R N 2 F BC D Q S_ R N 3 FB C D Q S_ RN 0 F BC D Q S _W P4 FB C D Q S_ WP 7 FB C D Q S_ WP 5 FB C D Q S_ WP 6
DQ S L DQ S U D Q SL D Q SU F BC D Q S _R N 4 G 3 D QS L D QS U B7 FB C D Q S_ RN 7 FB C D Q S_ RN 5 G 3 D Q SL D Q SU B7 FB C D Q S_ R N6
D QS L D QS U D Q SL D Q SU
K 4W 2G 16 46C - H C 11 K4 W2G 1 646 C -H C 1 1

K 4W2 G 164 6C - H C 11 K 4W 2G 16 46 C- H C 11
1 3, 14 ,3 7 FB V D DQ
B - 16 VGA Frame Buffer B
Schematic Diagrams
VGA I/O
U 46K
U 4 6I BG A_1005_P080_290X 290
U 46 J CO MMO N
B GA _1005_P080_290X290
C OMMON
BG A_1005_P 080_290X290 9/16 IFPEF
CO MMO N
8/1 6 IF PC
5/16 IFPD
DVI-SL
I F P C _ P L LV D D A J9 DVI-DL DP
4D 4
IF PC_PLLVDD HDMI
DVI/HDMI DP I F P D _P L L V D D A C 6 IFPD_ PL LVDD
AEA
AK7 IF PC_RSET DVI/ HDMI DP IFPE_AUX
AN 3 AB6 SDA SDA
SDA IFPC_ AUX IFPD_ RSET SCL SCL IFPE_AUX
AP2 A N4
SCL IFPC_ AUX SDA IFPD_AUX
IFPD_AUX AP4
SCL R N1 6
AR 2 4 5 AJ 6 TXC TXC IF PE_ L3
IFPC_L 3 I F P C _P L L V D D I F P E F _ P L LV D D IFPEF_ PL LVDD TXC TXC IF PE_ L3
TXC AP1 A R4 3 6 I F P A B _ P L LV D D
TXC IFPC_L 3 TXC I PD_L3
F
A R5 2 7 I F P D _I O V D D AL 1
AM 4 TXC IF PD_L3 1 8 IFPEF_ RSET TXD0 TXD0 IF PE_ L2
IFPC_L 2 I F P C _I O V D D TXD0 TXD0 IF PE_ L2
TXD0 AM 3 AP5
TXD0 IFPC_L 2 TXD0 I PD_L2
F
A N5
AM 5 TXD0 IF PD_L2 1 0 K _8 P 4 R _ 04 TXD1 TXD1 I PE_ L1
F
TXD1 IFPC_L 1 TXD1 TXD1 IF PE_ L1
IFPC_L 1 AL 5 I PD_L1
F A N7
I F P C _ I OV D D A J8 TXD1 TXD1 AP7
IF PC_IOVDD AM 6 AK8 TXD1 IF PD_L1 TXD2 TXD2 I PE_ L0
F
IFPC_L 0 I F P D _I O V D D IFPD_ IOVDD TXD2 TXD2 IF PE_ L0
TXD2 AM 7 A R7
TXD2 IFPC_L 0 TXD2 I PD_L0
F R N1 5
A R8
TXD2 IF PD_L0 4 5 I F P E F _ P L LV D D HPDE HPDE GPIO15
3 6 I F P A B _ I OV D D
2 7 I F P E F _ I OV D D
1 8 I F P D _P L L V D D
HPDC GPIO1 HPDD GPIO19
IF PC
K2
IFPD 1 0 K _8 P 4 R _ 04 AE7
L7
IFPE_IOVDD SDA IFPF_AUX
N 1 2 E -GE -A 1 GF 1 06 -7 00 -A 1 SCL IFPF_AUX
N 1 2E -G E -A 1 G F 10 6 -70 0 -A 1
I F P E F _ I OV D D AD 7 IFPF_IOVDD
TXC I PF_ L3
F
TXC IF PF_ L3
TXD3 TXD0 I PF_ L2

F
TXD3 TXD0 IF PF_ L2
3V 3 _ R U N
TXD4
TXD4
TXD1
TXD1
I PF_ L1
F
IF PF_ L1
Sheet 16 of 49
R6 1 U 46L U 46 M
TXD5
TXD5
TXD2
TXD2
IF PF_ L0
IF PF_ L0
VGA I/O
A LA2L 3
*0 _0 4 BG A_1005_P080_290X 290
CO MMO N
Test Point B GA _ 1 00 5 _P 0 8 0_ 2 90 X 29 0
C OMMO N HPDF GPIO21
4/16 DACA 6 /1 6DACB (G96 DACC) IF PEF
K6
D A C A _V D D A J 12 G1 S NN_ A _ S CL DA CB _ V DD A G7 G3 I2 CB _ S CL
DACA_ VDD I2CA_SCL G4 DACB_VDD I2 CB_ SCL G2
I2 CA_ SDA S NN_ A _ S DA I2CB_SDA I2 CB _ S DA N 1 2E -GE -A 1 GF 1 0 6-7 0 0-A 1
D A C A _V R E F A K 12 DACA_ VREF DA CB _ V RE F AK6 DACB_VREF 3V 3 _ R U N
R6 5 C 61 A K 13 A M1 3 S NN_ HS Y NC A H7 A M1
DACA_ RSET DACA_HSYNC DACB_RSET DACB_HSYNC
D A C A _R S E T DACA_VSYNC A L 13 S N N _V S Y N C DACB_ VSYNC A M2
8
7
6
5
10 K _ 04 R4 0 C5 8 1
*0. 1 u _1 6 V _Y 5 V _ 04
R N 13
A M1 5 S NN_ RE D 1 0K _ 0 4 0 . 1u _ 16 V _ Y 5 V _0 4 AK4 2 . 2K _ 8 P 4R _ 0 4
DACA_RED DACB_RED U 46H
1
2
3
4
A M1 4 S N N _G R E E N A L4 S N N _ A _S D A BG A_1005_P080_290X 290
DACA_GREEN DACB_GREEN CO MMO N
S NN_ A _ S CL
DACA_BLUE A L 14 S NN_ B L UE DACB_BLUE A J4 I2 CB _ SDA 7/16 IFPAB
I 2C B _S C L
C6 0 R7 0
LVDS
DVI-DL
*0 . 1 u_ 1 6V _ Y 5 V _ 04 *1 24 _ 1% _ 04 DVI-SL
A M A8L 8
N 12 E -GE -A 1 GF 1 0 6-7 0 0-A 1 N 1 2 E-G E -A 1 G F 10 6 -70 0 -A 1
IFPAB_TXD0 * I PA_ TXD0
F
IFPAB_TXD0 IF PA_ TXD0
AM 9
IFPAB_TXD1 * I PA_ TXD1
F
IFPAB_TXD1 IF PA_ TXD1
I F P A B _P L L V D D AK9
IFPAB_ PL LVDD IFPAB_TXD2 * I PA_ TXD2
F
3V 3 _ R U N 3V 3 _ R U N IF PA_ TXD2
AJ 1 1 IFPAB_TXD2
IFPAB_ RSET
I PA_ TXD3
F
IF PA_ TXD3
8
7
6
5
R N1 4
G
U 4 6N
2. 2 K _ 8P 4 R _ 0 4 Q2 4 B IFPAB_TXC* IFPA_TXC
B GA _1005_P080_290X290
4 3 MT D N 70 0 2Z H S 6R S MC _V G A _T H E R M
S M C _ V GA _ TH E R M 3 4 IFPAB_TXC IFPA_TXC
1
2
3
4
C OMMON
2
D
G
12/16 M S
I C1
V G A _T H E R M D C B4 E2 S MC _ V GA _ TH E R M1 Q2 4A
THERM DN I2CS_SCL E1 1 6 MT D N 7 0 02 Z H S 6 R
I2 CS_ SDA S MD _ V GA _ TH E R M1 S MD _V G A _T H E R M I PB_ TXD4
F
S M D _ V GA _ TH E R M 3 4 IFPAB_TXD3 *
IFPAB_TXD3 IF PB_ TXD4
E3 I 2 C C _S C L
S
C 23 I2 CC_SCL E4 I 2 C C _S D A I F P A B _I O V D D A H1 0
I2CC_ SDA IFPA_IOVDD
1 0 00 p_ 5 0V _ X 7R _0 4 D02 CHA NGE AG 9 IFPA_IOVDD I PB_ TXD5
F
IFPAB_TXD4 *
B5 A G1 0 IFPAB_TXD4 IF PB_ TXD5
V G A _T H E R M D A THERM DP DS? ? ? ? , ? ? ? 3V 3_R UN? ? IFPB_IOVDD
A H1 1 IFPB_IOVDD
R 57 10 0 K _0 4 IFPAB_TXD5 * I PB_ TXD6
F
R 46 10 0 K _0 4 3 V 3 _R U N IF PB_ TXD6
IFPAB_TXD5
K3
GPIO2 H3
GPIO3 I PB_ TXD7
F
GPIO4 H2 IF PB_ TXD7
H1
GPIO5
GPIO6
H4 N V V D D _V I D 0 4 1
N V V D D _V I D 1 4 1 VID? ? 3PIN
D02 CH ANG E
GPIO7 H5 ? ? ? ? ,CO ST DOWN IFPB_TXC
H 6 V _ GP I O8 N V V D D _V I D 2 4 1
GPIO8 J 7 V _ GP I O9 IFPB_TXC
GPIO9
AP1 4 JTAG_TCK GPIO1 0 K4
A R1 4 K5 3 V 3_ R U N R 32 * 0_ 04 V G A _T H E R M_ S H D W N _#
A N1 4 JTAG_TMS GPIO1 1 H7
JTAG_TDI GPIO1 2 A C _D E T R 51 10 K _ 04
A N1 6 J4 U3
JTAG_TDO GPIO1 3
V _ JT A G_ T R S T AP1 6 J6 5 4
JTAG_TRST GPIO1 4 D0 2 C HANG E V _G P I O8 R 26 * 0_ 04 6 GN D T H E R M# 3 V GA _T H E R MD C GPIO0
L2 S MD _ V GA _ T H E R M 7 A LE R T# D - 2 V GA _T H E R MD A HPDAB
GPIO1 6 GP IO1 3 ? ? ? GP IO1 2 SDA T A D+
K1
R 4 87 L4 S MC _ V GA _ T H E R M 8 1 V GA _V D D
GPIO1 7
GPIO1 8
M4 SCL K V DD IFPAB
1K _ 0 4 *G 78 1 -1P 8 U F
GPIO2 0 L5 3 .3 V 6 - 02 - 00 7 81 - LD 0 N 1 2E -GE -A 1 GF 1 0 6-7 0 0-A 1
L6 C2 2 * 0. 1 u _1 6 V _Y 5V _ 0 4 R2 9 *1 0m i _l s ho rt
GPIO2 2 3 . 3V
GPIO2 3 M6 5 4
M7 6 3 R N 21 V GA _ T H E R M _S H D W N # 1
GPIO2 4 7 2 2 . 2K _ 8 P 4R _0 4
8 1
N 12 E -GE -A 1 GF 1 0 6-7 0 0-A 1
1 2 , 41 3 V 3 _R U N
2 , 3 , 8, 1 1 , 12 , 1 8, 1 9 , 20 , 2 2, 2 3 , 24 , 2 5, 2 7, 2 8 , 29 , 3 0, 3 3 , 35 , 3 7, 3 8 , 39 3 . 3V
VGA I/O B - 17
Schematic Diagrams
VGA NVVDD Cecoupling

U4
6G U46F
NVVDD NVVDD
B G A_ 1005_ P08 0_290 X29 0
C O MMO N
BG A _100 5_P 080_2 90X 290
CO MMO N
NVVDD
15 /1 6 G ND 16/ 16 N VV DD
AA11 G ND GN D E15 AB11 VDD VDD P21
AA12 G ND GN D E18 AB13 VDD VDD P23
AA13 G ND GN D E24 AB15 VDD VDD P25 C100 C76 C93 C56 C89 C102
AA14 G ND GN D E27 AB17 VDD VDD R11
AA15 G ND GN D E30 AB19 VDD VDD R12 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0. 1u_16V_Y5V_04 0.1u_16V_Y5V_04
AA18 G ND GN D F2 AB25 VDD VDD R15
AA19 G ND GN D F31 AC11 VDD VDD R16
AA2 G ND GN D F34 AC12 VDD VDD R17 C107 C129 C118 C749 C750 C383
AA20 G ND GN D F5 AC13 VDD VDD R18
AA21 G ND GN D J2 AC14 VDD VDD R19 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04
AA22 G ND GN D J31 AC15 VDD VDD R20
AA25 G ND GN D L9 AC18 VDD VDD R23
AA34 G ND GN D M11 AC19 VDD VDD R24 C88 C66 C748 C794 C795 C782
AA5 G ND GN D M13 AC20 VDD VDD R25
AB12 G ND GN D M15 AC21 VDD VDD T12 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 *0. 1u_16V_Y5V_04 *0.1u_16V_Y5V_04
AB14 G ND GN D M17 AC22 VDD VDD T14
AB22 G ND GN D M23 AD12 VDD VDD T22 C424 C426 C430 C550 C92 C706
AB24 G ND GN D M25 AD14 VDD VDD T24
AC9 G ND GN D M31 AD16 VDD VDD V11 *0.1u_16V_Y5V_04 *0. 1u_16V_Y5V_04 *0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 10u_6.3V_X5R_06 *10u_6.3V_X5R_06
AD11 G ND GN D M34 AD18 VDD VDD V13
AD13 G ND GN D M5 AD22 VDD VDD V15
AD15 G ND GN D N11 AD24 VDD VDD V17
AD17 G ND GN D N12 L11 VDD VDD V19
AD2 N13 L12 V21
Sheet 17 of 49 AD21
AD23
G ND
G ND
G ND
GN D
GN D
GN D
N14
N15
L13
L14
VDD
VDD
VDD
VDD
VDD
VDD
V23
V25
C73
1u_6.3V_X5R_04
C57
1u_6.3V_X5R_04
C67
1u_6.3V_X5R_04
C101
1u_6. 3V_X5R_04
C751
*1u_6.3V_X5R_04
C728
*1u_6.3V_X5R_04
AD25 N16 L15 W11
VGA NVVDD
G ND GN D VDD VDD
AD31 G ND GN D N17 L16 VDD VDD W12
Cecoupling AE11
AE12
AE13
G ND
G ND
G ND
GN D
GN D
GN D
N20
N21
N22
L19
L20
L21
VDD
VDD
VDD
VDD
VDD
VDD
W15
W16
W17
C797
*1u_6.3V_X5R_04
C783
*1u_6. 3V_X5R_04
C52
4.7u_6.3V_X5R_06
C91
4.7u_6.3V_X5R_06 *4.7u_6.3V_X5R_06
C796 C111
22u_6.3V_X5R_08
AE14 G ND GN D N23 L22 VDD VDD W18
AE15 G ND GN D N24 L23 VDD VDD W19
AE16 G ND GN D N25 L24 VDD VDD W20 PLACEIN THE BACKPLATEAREA
AE17 G ND GN D P12 L25 VDD VDD W21
AE18 G ND GN D P14 M12 VDD VDD W22
AE20 G ND GN D P18 M16 VDD VDD W24 U46E U4
6D
AE22 G ND GN D P22 M20 VDD VDD Y12 B G A_1 005_P 080 _290X 290 B G A_ 1005_ P08 0_290 X29 0
C O MMO N C O MMO N
AE23 G ND GN D P24 M22 VDD VDD Y14
P1P4N1
AE24 R2 M24 Y16
Y3Y2Y1
G ND GN D VDD VDD 1 0/1 6 M IOA 1 1 /1 6 M IOB
AE25 G ND GN D R31 P11 VDD VDD Y18 P9 M IOA_ VDDQ _N C M IOAD 0_ NC AA9 M IOB_ VDD Q_ NC MIO BD0 _NC
AG2 G ND GN D R34 P13 VDD VDD Y20 R9 M IOA_ VDDQ _N C M IOAD 1_ NC AB9 M IOB_ VDD Q_ NC MIO BD1 _NC
AG31 G ND GN D R5 P15 VDD VDD Y22 T9 M IOA_ VDDQ _N C M IOAD 2_ NC W9 M IOB_ VDD Q_ NC MIO BD2 _NC
AG34 G ND GN D T11 P17 VDD VDD Y24 U9 M IOA_ VDDQ _N C M IOAD 3_ NC P2 Y9 M IOB_ VDD Q_ NC MIO BD3 _NC AB3
AG5 G ND GN D T13 P19 VDD M IOAD 4_ NC P3 MIO BD4 _NC AB2
AK2 G ND GN D T15 M IOAD 5_ NC T3 MIO BD5 _NC AB1
C50 *0.1u_16V_Y5V_04
C51 *0.1u_16V_Y5V_04
AK31 G ND GN D T17 N12E-GE-A1 GF106-700-A1 M IOAD 6_ NC T2 MIO BD6 _NC AC4
10K_04
10K_04
AK34 G ND GN D T19 M IOAD 7_ NC T1 MIO BD7 _NC AC1
AK5 G ND GN D T21 M IOAD 8_ NC U4 MIO BD8 _NC AC2
AL12 G ND GN D T23 M IOAD 9_ NC U1 MIO BD9 _NC AC3
AL15 G ND GN D T25 M IO AD1 0_ NC U2 M IOBD1 0 _NC AE3
AL18 G ND GN D U11 U5 M IOACAL _ PD_ VDDQ _N C M IO AD1 1_ NC U3 AA7 M IOBC AL_ PD_ VDD Q_ NC M IOBD1 1 _NC AE2
AL21 G ND GN D U12 M IO AD1 2_ NC R6 M IOBD1 2 _NC U6
AL24 G ND GN D U13 T5 M IOACAL _ PU_ GND _N C M IO AD1 3_ NC T6 AA6 M IOBC AL_ PU_ GN D_ NC M IOBD1 3 _NC W6
AL27 G ND GN D U14 M IO AD1 4_ NC N6 M IOBD1 4 _NC Y6
R198
R111
AL30 G ND GN D U15
AL6 G ND GN D U16
AL9 G ND GN D U17 N5 M IOA_ VREF_ NC AF1 M IOB_ VREF_ NC
AN2 G ND GN D U18
AN34 G ND GN D U19
AP12 G ND GN D U20
AP15 G ND GN D U21
AP18 G ND GN D U22
AP21 G ND GN D U23 M IOA_ CTL 3_ NC P5 M IOB_ CTL 3 _NC W3
AP24 G ND GN D U24 MIO A_HSYN C_ NC N3 M IO B_H SYNC _NC W1
AP27 G ND GN D U25 M IOA_ VSYN C_ NC L3 M IOB_ VSYNC _NC W2
AP3 G ND GN D V12 M IOA_ DE_ NC N2 MIO B_D E_NC Y5
AP30 G ND GN D V14
AP33 G ND GN D V16
AP6 G ND GN D V18
AP9 G ND GN D V2 M IOA_ CLKO UT_ NC R4 M IOB_ CL KOU T_NC V4
B12 G ND GN D V20 M IOA_ CLKO UT_ NC T4 R44 M IOB_ CL KOU T_NC W4 R38
B15 G ND GN D V22 MIO A_CL KIN_ NC M IO B_C LKIN _NC
B21 G ND GN D V24
N4
AE1
B24 G ND GN D V31 10K_04 10K_04
B27 G ND GN D V5 N12E-GE-A1 GF106-700-A1 N12E- GE-A1 GF106-700-A1
B3 G ND GN D V9
B30 G ND GN D Y11
B33 G ND GN D Y13
B6 G ND GN D Y15
B9 G ND GN D Y17
C2 G ND GN D Y19
C34 G ND GN D Y21
E12 G ND GN D Y23
Y25 12,16,41 3V3_RUN
GN D
41 NVVDD
N12E- GE-A1 GF106-700-A1
B - 18 VGA NVVDD Cecoupling
Schematic Diagrams
CougarPoint - M 1/9
NO REBOOT STRAP

V DD 3 1
D2 8
B A T 5 4C W GH
A
C 3
R TC V C C
C 46 3

1 u _6 . 3 V _ X 5R _ 04
CougarPoint - M (HDA,JTAG,SATA) NO R EB OO T S TR AP : HD A_ SP KR H ig h En ab le
H D A _ S P K R R 30 1 *1 K _ 0 4
3 .3 V S
R T C _ V B A T _ 12 A C 7 03
R 34 4 1 8 p _5 0 V _ N P O _ 0 4
2 0 K _ 1% _ 0 4 iTPM ENABLE/DISABLE
TP M FU NC TI ON :S PI _S I Hi gh E na bl e
R 5 92 6- 22 -3 2R 76 -0B 2 X1 4
SPI_ SI
2
1
2
1
6- 22 -3 2R 76 -0B G R5 9 8 R 31 3 *1 K _ 0 4
1 K_ 0 4 C4 5 9 JO P E N 1 X1 3
*3 2 . 76 8 K H z
J _ CB A T 2 J _ C B A T1 1u _ 6 . 3 V _X 5 R _ 0 4 *O P E N _ 1 0 mi l -1 MM MC -3 06 _ 3 2. 76 8 K H z 1 0M _ 04
U5 4 A 6- 03 - 08 26 5 -0 S 0 S E R IRQ R2 8 9 1 0 K_ 0 4
R TC _ V B A T R TC C LEA R
1 1 R T C _X 1 A2 0 C3 8
3
4
3
4
R3 5 5 C 7 02 L P C_ A D 0 28 , 3 4
20 K _ 1 % _ 04 1 8 p _5 0 V _ N P O _ 0 4 R TC X 1 FW H 0/ LA D 0 A3 8
2 2 R TC _ X 2 C2 0 FW H 1/ LA D 1 B3 7 L P C_ A D 1 28 , 3 4 W14XX R391
LPC
R TC X 2 FW H 2/ LA D 2 L P C_ A D 2 28 , 3 4
* A A A -B A T -0 2 2-K 01 B Y A A A -B A T -0 63 -P 0 1 Zo= 50O? 5% C3 7
R3 5 0 C4 6 8 R T C _ R S T# D2 0 FW H 3/ LA D 3 L P C_ A D 3 28 , 3 4 W15XX/W17XX
R TC R S T # D3 6
Co-lay 1M _ 04 1u _ 6 . 3 V _X 5 R _ 0 4 S R T C _ R TC # G2 2 F W H 4 / L F RAM E# L P C _ F R A ME # 2 8 , 3 4 R386 3. 3 V S
S R T C R S T# E3 6
S M_ I N T R U D E R # K2 2 L D R Q0 # K3 6 B oa rd I D R 39 1 *1 0 K _ 0 4
RTC
I N TR U D E R # L D R Q1 # / G P I O2 3
Gen3 R 38 6 *1 0 K _ 0 4
R 59 5 3 3 0K _ 0 4 P C H _I N T V R M E N C1 7 V5 S E RIR Q
RT C V CC I N TV R M E N S E R IRQ S E R IRQ 2 8 , 34
S A T A _ T XP 1_ C R5 7 9 *0 _ 0 4 SATA_ TXP1
S A T A _ T XN 1 _C S A T A _ T X N1 INTVRMEN- Integrated SUS 1.05V VRM Enable
R5 8 1 *0 _ 0 4
S A T A _ R X N 1_ C R5 8 8 *0 _ 0 4 S A T A _ R XN 1 High - Enable Internal VRs /Low - Enable External VRs AM 3 S A TA R X N 0
S A T A _ RX P 1 _ C S A T A _ R XP 1 N3 4 S A T A 0 RX N AM 1 S A TA R X P 0
R5 9 0 *0 _ 0 4 33 HD A _ B IT CL K H D A _ B C LK S A TA 0R X P AP7 S A TA TX N 0 E - SA TA HD D
SATA 6G
L3 4 S A T A 0 TX N AP5 S A TA TX P 0
SATA1&2 ? ? ? ? ? J_SATA1 CONN 3. 3A _ 1 . 5 A _ H D A _ I O R 61 1 1 K _ 04
H DA _ S Y NC SAT A0 TXP
B41XX? ? ? ? 0.01u_50V_X7R_04? ?
PLL ODVR VOLTAGE: HDA_SYNC
33
33
HD A _ S Y N C
HD A _ S P K R
T1 0
SPK R S A T A 1 RX N
A M 10 S A TA _R X N 1 W15XX/W17XX
AM 8 S A TA _R X P 1
S A T A _ RX P 1 _ C S A T A _ R XP 1
LOW-1.8 V (DEFAULT) HIGH-15V
33 HD A _ RS T #
K3 4
H D A _ R S T#
S A TA 1R X P
S A T A 1 TX N
AP1 1 S A TA _T X N 1 S A TA H D D
S A T A _ R X N 1_ C S A T A _ R XN 1 3 . 3 A _1 . 5 A _ H D A _ I O AP1 0 S A TA _T X P 1
S A T A _ T XN 1 _C S A T A _ T X N1 R 6 06 1 K_ 0 4 1 2 SAT A1 TXP
S A T A _ T XP 1_ C SATA_ TXP1 J OP E N 2 E3 4 AD 7 S A TA _R X N 2
J_ H D D 1 Flash Descriptor *O P E N _1 0 m li -1 MM 33 HD A _ S DI N0 H DA _ S D IN0 S A T A 2 RX N AD 5 S A TA _R X P 2
S A TA 2R X P S A TA O D D
S1
S2
S3
S4
1
2
3
1
2
J_ S A T A 1
16
17
16
17
18
SATA_ TXP2
S A T A _ T X N2
Security Overide
Low = Disabled-(Default)
High = Enabled
G3 4
C3 4
H DA _ S D IN1
H DA _ S D IN2
S A T A 2 TX N
SAT A2 TXP
AH
AH
AB8
5
4
S
S
A TA
A TA
_T X N 2
_T X P 2
Sheet 18 of 49
IHDA
S A T A _ RX N 3 2 7
S5
S6
S7
4
5
6
3
4
5
6
18
19
20
21
19
20
21
S A T A _ RX N 2
S A T A _ RX P 2
S A T A _ OD D _ P R S N T # 2 3, 3 1
34 ME _ W E
R 60 3 0 _ 04
33 HD A _ S DO UT
D2 9 C D B U 0 0 3 40
A3 4
H DA _ S D IN3
S A T A 3 RX N
S A TA 3R X P
S A T A 3 TX N
SAT A3 TXP
AB1 0
AF3
AF1
S A T A _ RX P 3 2 7
S A T A _ T XN 3 2 7
S A T A _ T XP 3 2 7
CougarPoint - M 1/9
3 .3 V S 7 22 R 60 2 *9 1 0 _ 04 A C A3 6
8 7 22 23 H DA_ SD O Y7
W14XX
SATA
P1 9 8 23 24 S A T A _ OD D _ D A # 2 2 , 3 1 S A T A 4 RX N Y5 S A T A _ R X N 4_ 1 4 31
9 24 S A TA 4R X P S A T A _ RX P 4 _ 1 4 31
P2 10 25 C3 6 AD 3
P3 11 10
11
25
26
26 5 V S _ OD D 31 L E D_ IG P U# H D A _ D O C K _E N # / GP I O3 3 S A T A 4 TX N
SAT A4 TXP
AD 1 S A T A _ T XN 4 _1 4
S A T A _ T XP 4_ 1 4
31
31
S A TA O D D
P4 12 27 N3 2
P5 13 12 27 28 2 9 U S B 3 . 0 _ S MI # H D A _ D O C K _R S T # / GP I O 1 3 Y3
P6 14 13 28 29 S A T A 5 RX N Y1
3 .3 V R 5 66 1 0 K_ 0 4
P7 15 14 29 30 S A TA 5R X P AB3
P8 15 30 P C H _J T A G _T C K _B U F J 3 S A T A 5 TX N AB1
P9 8 8 0 14 -3 0 0 01 J T A G_ T C K SAT A5 TXP 1 .0 5 V S
P1 0 5 VS P C H _J T A G _T M S H7 Y1 1 S A T A I C OM P R 30 8 3 7. 4_ 1 % _ 04
P1 1 HD D_ NC 0 J T A G_ T MS S A TA I C O MP O
JTAG
P1 2 C6 8 9 C 6 87 + C6 8 6 P C H _J T A G _T D I K5 Y1 0
P1 3 HD D_ NC 1 J T A G_ T D I S A T A I C OM P I
P1 4 HD D_ NC 2 *0 . 1 u _1 6 V _ Y 5 V _ 0 4 * 2 . 2u _ 6 . 3 V _Y 5 V _ 06 *2 2 0 u_ 6 . 3 V _ 6. 3* 6. 3* 4 . 2 P C H _J T A G _T D O H1 1 .0 5 V S
P1 5 HD D_ NC 3 J T A G_ T D O AB1 2 S A T A 3 C O MP R 30 9 4 9. 9_ 1 % _ 04
G ND 1 S A TA 3 R C O MP O
*A C E S -9 1 9 07 -0 2 20 A -H 0 1 AB1 3
G ND 2
S A T A 3 C OM P I
P IN G ND 1 ~ 2 = G ND S P I _ S C L K R 5 62 * 0 _0 4 S P I_ S CL K _ R T 3 AH 1 R B IA S _ S A T A 3 R5 7 0 7 5 0 _1 % _ 0 4
S P I _ C LK S A T A 3 RB IA S 3 .3 V S
3 .3 VS S P I _ C S 0 # R 3 15 * 0 _0 4 S P I_ CS _ 0 # Y 1 4
ES AT A R E DR IV E R SPI_ C S0 # R5 6 3 * 1 0K _ 0 4
S P I_ CS _ 1 # T1
SPI_ C S1 # P3 S A TA _L E D #
D02 CHANGE
SPI
S A TA LE D # S A T A _ L E D# 3 1
R 21 1 S P I_ S I R 3 03 * 0 _0 4 S P I_ S I_ R V4 V1 4 O D D _ D E T E C T#
DEL COLAY & ? ? REDRIVER IC U 19
S P I _ M OS I S A TA 0 G P / G P I O2 1 OD D _ D E TE C T # 23
10
16
20
6
FOR ESATA WRITE SPEED DOWN S N 7 5L V C P 4 1 2

7 ESATA_ EN 1
4 . 7 K _ 04 S P I_ S O R 3 07 * 3 3_ 0 4 S P I _ S O_ R U3
S P I_ M IS O S A TA 1 G P / G P I O1 9
P1 B B S _ B IT 0 R 5 64 *1 K _ 0 4
VD D
VD D
EN
V DD
V DD
SAT AT XP0 C3 1 3 0 . 0 1 u_ 1 6 V _ X7 R _0 4 S A T A _ TX P 0 1 15 S A T A _ T XP 0 _ R B D 8 2 H M6 5 _ MP BBS_BIT0 - BIOS BOOT STRAP BIT 0

S A T A T X N0 C3 1 1 S A T A _ TX N 0 2 RX _ 0 P TX _ 0 P 1 4 S A T A _ T XN 0 _R
0 . 0 1 u_ 1 6 V _ X7 R _0 4 Share ROM
RX _ 0 N T X _0 N
R 3 17 0_04 S P I_ S I_ R
HOST DEVICE 34 H S P I _ MS I
S A T A R XN 0 C 3 0 9 0 . 0 1 u_ 1 6 V _ X7 R _0 4 S A T A _ RX N0 4 12 S A T A _ R X N 0_ R R 2 94 0_04 S P I _ S O_ R
S A T A R XP 0 C 3 0 5 S A T A _ RX P 0 5 TX _ 1 N R X _1 N 11 SAT A_ RXP0 _ R 34 H S P I _ MS O S P I_ S CL K _ R 3. 3 V
0 . 0 1 u_ 1 6 V _ X7 R _0 4 R 3 25 0_04
TX _ 1 P RX _ 1 P 34
34
H S P I _ S C LK
HS P I_ C E #
R 2 93 0_04 S P I_ CS _ 0 # Layout Note:
T -P A D
R 3 06 * 0 _0 4 S P I_ CS _ 1 # Closed to U4
G ND
GN D
G ND
GN D
GN D
D 1
D0
3 .3 VS R5 4 9 R 28 5 R 2 84
Layout note:
8
9
21
3
13
18
R 7 71 4. 7 K _ 0 4 D 1 2 10 _ 1 % _0 6 2 1 0_ 1 % _ 06 2 1 0 _ 1% _ 0 6
17
19
3 .3 V S 3. 3 V S
R 7 72 *4 . 7 K _ 04 NEAR TO J_ESATA1
R 7 73 *4 . 7 K _ 04 B IO S R OM PC H _ J TA G _ TM S
R 7 74 4. 7 K _ 0 4 D 0 SN75LVCP412RTJ C 50 0 C 3 17 C3 1 8 PC H _ J TA G _ TD I
3 .3 V S NC 3 PC H _ J TA G _ TD O
6-02-75412-KQ0 SPI_* = 1.5"~6.5"
0 . 0 1 u_ 1 6 V _ X 7R _ 0 4
0 . 1 u _ 16 V _ Y 5 V _ 0 4
PC H _ J TA G _ TC K_ BU F
ES AT A P O RT
1u _ 6 . 3 V _Y 5V _ 0 4
S HO RT
C 4 28
C3 1 4 J _ ESATA1 * 0 . 1u _ 1 6V _Y 5 V _ 04 R5 6 8 R 29 8 R 2 97 R5 6 7
0. 0 1 u _ 16 V _ X 7 R _ 0 4 L 21 1
S A TA _T X P 0 _ R * W C M 2 0 12 F 2 S -1 6 1T 0 3 -s ho rt
GN D 1
U 32
32Mbit 1 0 0 _ 1% _ 0 4 1 0 0_ 1 % _ 04 1 0 0 _ 1% _ 0 4
5 1_ 0 4
C3 1 2 S A T A _ TX P 0 _ C 1 2 S A T A _ T X P _ 0_ C 2 S P I_ V DD 8 5 S P I_ S I
T XP VD D SI
0. 0 1 u _ 16 V _ X 7 R _ 0 4
S A TA _T X N 0 _ R S A T A _ TX N 0 _C 4 3 S A T A _ T X N _ 0 _C 3 R 3 28 2 S P I_ S O
C3 0 7 T XN * 3 . 3K _ 1 % _ 04 SO
0. 0 1 u _ 16 V _ X 7 R _ 0 4 L 20 4 S P I _W P # 3 1 S P I_ C S 0 #
S A TA _R X N 0 _ R * W C M 2 0 12 F 2 S -1 6 1T 0 3 -s ho rt GN D 2 W P# C E#
C3 0 4 S A T A _ RX N0 _ C 1 2 S A T A _ R XN _ 0_ C 5 R 3 27 6 S P I_ S C L K
0. 0 1 u _ 16 V _ X 7 R _ 0 4 RX N * 3 . 3K _ 1 % _ 04 S CK
S A TA _R X P 0_ R S A T A _ RX P 0 _ C 4 3 S A T A _ R XP _ 0 _ C 6 S P I _H OL D # 7 4
RX P H OL D # VSS 2 5 3. 3 A _ 1 . 5 A _ H D A _I O
7 2 0 ,2 5 R T CV C C
Gen3 *M X2 5 L 3 20 5 D M 2 I - 1 2G
GN D 3 6 , 1 9 , 2 0, 2 4 , 2 5 , 29 , 3 5 , 3 7, 38 , 3 9 1 . 05 V S
2 7, 28 , 3 0 , 3 4, 3 5 , 3 6 , 42 V D D 3
1 1 , 2 4 , 25 , 2 7 , 2 8, 3 1 , 3 2 , 33 , 3 5 , 3 9, 40 , 4 1 5 V S
A T 0 7J 3 6 B A A 0 9 0 2 , 3 , 8 , 11 , 1 2 , 1 6, 19 , 2 0 , 2 2, 2 3 , 2 4 , 25 , 2 7 , 2 8, 2 9 , 3 0 , 33 , 3 5 , 3 7, 38 , 3 9 3 . 3V
3 , 9, 1 0 , 1 1 , 12 , 1 9 , 2 0, 21 , 2 2 , 2 3, 2 4 , 2 5 , 27 , 2 8 , 2 9, 3 0 , 3 1 , 32 , 3 3 , 3 4, 35 , 3 9 3 . 3V S
CougarPoint - M 1/9 B - 19
Schematic Diagrams
CougarPoint - M 2/9
CougarPoint - M (PCI-E,SMBUS,CLK)
D02 CHANGE U 54 B RN 6 3 .3 V
FOR VIA USB3.0 ONLY 2 . 2 K _ 8 P 4R _04
B G3 4 S M B _ CL K 8 1
29 P C I E _ R X N 1 _ U S B 3 0_ V L I B J3 4 P E RN 1 E 12 P C H_ B T _ E N# S M B _ DA T A 7 2
29 P C IE _ RX P 1 _ USB 3 0 _ V L I AV3 2 P E RP 1 S M B A L E R T # / G P I O1 1 P CH _ B T _ E N# 2 7 6 3
C 5 64 * 0 . 1u _ 1 0 V _X 7 R _0 4 P C I E _ TX N 1_ C S M L0 _ C LK
29 P C I E _ T X N 1 _ U S B 3 0_ V L I P C I E _ TX P 1 _ C A U3 2 P E TN 1 H 14 S M B _ CL K S M L0 _ D A TA 5 4
29 P CIE _ T X P 1 _ US B3 0 _ V L I C 5 65 * 0 . 1u _ 1 0 V _X 7 R _0 4 S MB _C L K 9 , 1 0
P E TP 1 S MB C L K
BE3 4 C 9 S M B _ DA T A R N4
29 P C I E _ R X N 2 _U S B 3 0 _ N E C P E RN 2 S MB D A T A S MB _D A T A 9 , 1 0
BF3 4 1 0K _8 P 4 R _0 4
29 P C I E _ R X P 2 _ U S B 3 0_ N E C BB3 2 P E RP 2 8 1
C 5 15 0 . 1 u _ 10 V _ X 7 R _ 0 4 P C I E _ TX N 2_ C L P D _ S P I _I N T R #
2 9 P C I E _ TX N 2 _U S B 3 0 _ N E C P C I E _ TX P 2 _ C AY3 2 P E TN 2 P C H_ B T _ E N# 7 2
2 9 P C I E _ TX P 2 _ U S B 3 0_ N E C C 5 21 0 . 1 u _ 10 V _ X 7 R _ 0 4
P E TP 2 A 12 6 3
SMBUS
DR A M RS T _ CN T RL P E G _ B _ C L K R Q#
B G3 6 S ML 0 A L E R T # / G P I O6 0 D R A MR S T _ C N T R L 3 , 8 P E G _ P CIE C L KRQ 7 # 5 4
2 7 P CIE _ R X N3 _ W L A N B J3 6 P E RN 3 C 8 S M L0 _ C L K
2 7 P C I E _ R X P 3 _W LA N AV3 4 P E RP 3 S ML 0 C L K
C 5 33 0 . 1 u _ 10 V _ X 7 R _ 0 4 P C I E _ TX N 3_ C S M D_ CP U_ T HE R M R 33 2 2. 2K _ 0 4
27 P C I E _ T X N 3 _ W L A N P C I E _ TX P 3 _ C A U3 4 P E TN 3 G 12 S M L0 _ D A TA S M C_ CP U_ T HE R M
27 P C I E _ T X P 3 _W LA N C 5 26 0 . 1 u _ 10 V _ X 7 R _ 0 4 R 33 0 2. 2K _ 0 4
P E TP 3 S M L 0D A T A D RA M RS T _ CN T RL R 58 3 1K _0 4
BF3 6
30 P C I E _ R X N 4_ G LA N P E RN 4
BE3 6
30 P C I E _ R X P 4 _ GL A N AY3 4 P E RP 4 C 13 3 .3 V S 3 .3 V
C 5 34 0 . 1 u _ 10 V _ X 7 R _ 0 4 P C I E _ TX N 4_ C L P D _ S P I _I N T R # R N5
30 P C I E _T X N 4_ G LA N C 5 29 0 . 1 u _ 10 V _ X 7 R _ 0 4 P C I E _ TX P 4 _ C BB3 4 P E TN 4 S ML 1 A L E R T # / P C H H OT # / G P I O7 4 1 0K _8 P 4 R _0 4
30 P C I E _T X P 4 _ GL A N P E TP 4 E 14 8 1
S M C_ CP U_ T HE R M U S B 30 _ C L K R E Q #_ V L I
S M L 1 C L K / G P I O5 8 S M C_ C P U_ T H E RM 34
PCI-E*
B G3 7 P C I E C L K R Q6 # 7 2
B H3 7 P E RN 5 M 16 S M D_ CP U_ T HE R M P C I E C L K R Q5 # 6 3
AY3 6 P E RP 5 S M L 1D A T A / G P I O7 5 S M D_ C P U_ T H E RM 34 P C I E C L K R Q0 # 5 4
P E TN 5
BB3 6
P E TP 5 D G P U _P R S N T# R 41 8 10 K _ 0 4
PCI-E x1 Usage B J3 8 U S B 30 _ C LK R E Q #_ N E C _ 2 R 29 1 10 K _ 0 4
B G3 8 P E RN 6
A U3 6 P E RP 6 M7 C L _ C LK 1
Controller
Lane 1 USB3.0 FOR VIA AV3 6 P E TN 6 CL _ CL K 1 CL _ CL K1 2 7
Lane 2 USB3.0 P E TP 6
B G4 0 T11 C L _ D A TA 1
Link
Lane 3 WLAN B J4 0 P E RN 7 CL _ DA T A 1 C L _ D A TA 1 2 7
Sheet 19 of 49 Lane
Lane
4
5
GLAN / CARD READER
X
AY4 0
BB4 0
P E RP 7
P E TN 7
P E TP 7 C L _ R S T1 #
P 10 C L _ R S T# 1
C L _ R S T# 1 2 7
CougarPoint - M 2/9 Lane 6 X BE3 8

B C3 8 P E RN 8
Lane 7 X AW 3 8 P E RP 8
10K pull-down to
AY3 8 P E TN 8 GND
Lane 8 X P E TP 8
M 10 P E G _ C L K R E Q#
Y4 0 P E G_ A _ C L K R Q# / G P I O4 7 P E G _C L K R E Q# 1 2
RN 1 9
Y3 9 C L K OU T _P C I E 0 N
1 0 K _ 8 P 4 R_ 0 4
C L K OU T _P C I E 0 P A B 37 VG A _ PE X CL K # 10 0M Hz C LK _ P C IE _ IC H_ N 8 1
CL K O UT _ P E G _ A _ N V GA _ P E X C L K # 12
CLOCKS
P CIE C L K RQ 0 # J2 A B 38 VG A _ PE X CL K C LK _ P C IE _ IC H_ P 7 2
P C I E C L K R Q 0 # / GP I O 7 3 C L K OU T _P E G_ A _ P V GA _ P E X C L K 1 2
C LK _ B U F _ CP Y C LK _ N 6 3
C LK _ B U F _ CP Y C LK _ P 5 4
10 0MHz R3 4 6 * 10 m i _l s h o rt C L K _ P C I E _U S B _ 3 0 _# _ V L I A B 4 9 A V 22 10 0M Hz
2 9 C L K _ P C I E _U S B 3 0 # _V LI AB4 7 C L K OU T _P C I E 1 N CL K O UT _ DM I_ N A U2 2 CL K_ E X P_ N 3
R4 5 2 * 10 m i _l s h o rt C L K _ P C I E _U S B _ 3 0 _V LI RN 9
29 C L K _ P C I E _ U S B 3 0 _V LI C L K OU T _P C I E 1 P C L K O U T _ D MI _ P CL K_ E X P_ P 3
1 0 K _ 8 P 4 R_ 0 4
U S B 3 0 _ C L K R E Q# _ V L I M1 C LK _ B U F _ DO T 96 _ P 8 1
P C I E C L K R Q 1 # / GP I O 1 8 A M1 2 P C H_ CL K _ D P _ N_ R R3 0 4 * 10 m i _l s h o rt
12 0M Hz C LK _ B U F _ DO T 96 _ N 7 2
C LK OU T_ D P _ N CL K_ DP _ N 3
A M1 3 P C H_ CL K _ D P _ P _ R R3 0 5 * 10 m i _l s h o rt C LK _ B U F _ CK S SCD _ P 6 3
10 0MHz R3 4 0 * 10 m i _l s h o rt C L K _ P C I E _U S B _ 3 0 _# _ N E C A A 4 8 C L K OU T _D P _ P CL K_ DP _ P 3
C LK _ B U F _ CK S SCD _ N 5 4
2 9 C L K _ P C I E _ U S B 30 # _ N E C C L K _ P C I E _U S B _ 3 0 _N E C A A 4 7 C L K OU T _P C I E 2 N
2 9 CL K _ P C IE _ US B 3 0 _ NE C R3 5 1 * 10 m i _l s h o rt
C L K OU T _P C I E 2 P B F 18 CL K _ P C IE _ ICH _ N C LK _ B U F _ R E F 14 R3 3 5 1 0 K_ 0 4
U S B 3 0 _ C L K R E Q# _ N E C _ 2 V1 0 CL K IN _ DM I_ N B E 18 CL K _ P C IE _ ICH _ P P E G _ C L K R E Q# R4 1 0 1 0 K_ 0 4
2 9 U S B 3 0 _ C L K R E Q# _ N E C R2 9 2 * 10 m i _l s h o rt P C I E C L K R Q 2 # / GP I O 2 0 C L K I N _ D MI _ P L A N_ C L K RE Q # R3 7 1 * 10 K _ 0 4
10 0MHz R3 6 1 * 10 m i _l s h o rt C L K _ P C I E _M I N I N Y3 7 B J3 0 CL K _ B U F _ CP Y CL K _ N
2 7 C LK _P C I E _ M I N I # Y3 6 C L K OU T _P C I E 3 N C L K I N _G N D 1 _ N B G3 0
R3 6 2 * 10 m i _l s h o rt C L K _ P C I E _M I N I P CL K _ B U F _ CP Y CL K _ P
2 7 C L K _ P C I E _ MI N I C L K OU T _P C I E 3 P C L K I N _ GN D 1 _ P
A8
2 7 W L A N _ C L K R E Q# P C I E C L K R Q 3 # / GP I O 2 5 G 24 C L K _ B U F _ D O T 96 _ N
C L K I N _D OT _ 9 6 N E 24 C L K _ B U F _ D O T 96 _ P
10 0MHz
30 C L K _ P C I E _ G L A N #
R3 6 3
R3 7 3
* 10 m i _l s h o rt
* 10 m i _l s h o rt
C L K _ P C I E _G L A N N
C L K _ P C I E _G L A N P
Y4 3
Y4 5 C L K OU T _P C I E 4 N
C L K I N _ D O T _9 6 P
Crystal 8045 & 3225 Co-lay
3 0 C LK _P C I E _ G LA N C L K OU T _P C I E 4 P A K7 CL K _ B U F _ CK S S CD _ N C 73 5 1 8 p_ 5 0 V _ N P O _ 04
L1 2 CL K IN _ S A T A _ N A K5
LA N _ C L K R E Q# CL K _ B U F _ CK S S CD _ P
2 2 L A N _ C LK R E Q # P C I E C L K R Q 4 # / GP I O 2 6 C LK I N _ S A T A _ P
X 8 A 0 2 50 0 0 F G1 H _2 5 M H z
V4 5 K 45 C L K _ B U F _ R E F 14
C L K OU T _P C I E 5 N R E F C L K 1 4I N
1
V4 6
C L K OU T _P C I E 5 P
1
R6 2 0 X 15
P CIE C L K RQ 5 # L1 4 H 45 33 MHz *H S X 3 21 S _ 2 5 MH Z
P C I E C L K R Q 5 # / GP I O 4 4 C L K I N _P C I L OO P B A C K C LK _ P C I _ F B 2 2 X1 6
1 M_ 0 4
2
2
AB4 2 V 47 X T A L2 5 _ I N
AB4 0 C L K OU T _P E G_ B _ N XT A L 2 5 _I N V 49 X T A L2 5 _ OU T
C L K OU T _P E G_ B _ P X T A L 2 5_ O U T C 73 6 1 8 p_ 5 0 V _ N P O _ 04
P E G_ B _ C LK R Q # E6
P E G_ B _ C L K R Q# / G P I O 56
FSX8L_25MHz? ? ? ? ?
Y 47 X C L K _ R C OM P R6 2 1 9 0. 9 _ 1 % _0 4
V4 0 X C L K _ R C OM P 1 .0 5 VS
V4 2 C L K OU T _P C I E 6 N
C L K OU T _P C I E 6 P
90.9-O ? % pullup to +VccIO
P CIE C L K RQ 6 # T1 3
P C I E C L K R Q 6 # / GP I O 4 5 (1.05V, S0 rail)close to
V3 8 K 43 P C H _ X TA L_ I N PCH
C L K OU T _P C I E 7 N C LK OU TF L E X 0 / G P I O6 4
FLEX CLOCKS
V3 7
C L K OU T _P C I E 7 P F 47 P C H _ GP I O6 5
P E G_ P C I E C LK R Q7 # K1 2 C LK OU TF L E X 1 / G P I O6 5 D02 CHANGE
P C I E C L K R Q 7 # / GP I O 4 6 H 47
CL K _ XDP _ N AK1 4 C LK OU TF L E X 2 / G P I O6 6
P C H _ GP I O6 6 DEL
CL K _ XDP _ P AK1 3 C L K OU T _I T P X D P _ N K 49 D G P U _P R S N T #
C L K OU T _I T P X D P _ P C LK OU TF L E X 3 / G P I O6 7
B D 8 2 H M 6 5_ M P
6, 1 8 , 2 0 , 2 4, 2 5 , 2 9 , 3 5, 3 7 , 3 8 , 3 9 1 . 0 5 V S
2 , 3, 8, 1 1 , 1 2 , 1 6, 1 8 , 2 0 , 2 2, 2 3 , 2 4 , 2 5, 2 7 , 2 8 , 29 , 3 0 , 3 3 , 35 , 3 7 , 3 8 , 39 3 . 3 V
3 , 9 , 1 0 , 11 , 1 2 , 1 8 , 20 , 2 1 , 2 2 , 23 , 2 4 , 2 5, 27 , 2 8 , 2 9, 30 , 3 1 , 3 2, 33 , 3 4 , 3 5, 39 3 . 3 V S
B - 20 CougarPoint - M 2/9
Schematic Diagrams
CougarPoint - M 3/9
CougarPoint -M (DMI,FDI,GPIO)
U 5 4C
3 .3 V
B C2 4 B J1 4 D02 CHANGE
2 D M I_ RX N 0 BE2 0 D M I0 RX N FD I_ R XN 0 A Y1 4 F DI_ T X N0 2
2 D M I_ RX N 1 B G1 8 D M I1 RX N FD I_ R XN 1 B E1 4
F DI_ T X N1 2 ADD PULL HIGH A C _ P RE S E N T R7 7 0 1 0 K _ 04
2 D M I_ RX N 2 D M I2 RX N FD I_ R XN 2 F DI_ T X N2 2
B G2 0 B H1 3 P M _ S L P _ L A N# R3 2 3 *1 0 K _ 0 4
2 D M I_ RX N 3 D M I3 RX N FD I_ R XN 3 B C1 2 F DI_ T X N3 2
F DI_ T X N4 2 SW I # R5 7 6 1 0 K _ 04
BE2 4 FD I_ R XN 4 B J1 2 SU S_ PW R _ AC K
F DI_ T X N5 2 R5 8 2 1 0 K _ 04
2 D M I_ RX P 0 B C2 0 D M I0 RX P FD I_ R XN 5 B G1 0
2 D M I_ RX P 1 BJ 1 8 D M I1 RX P FD I_ R XN 6 B G9 F DI_ T X N6 2
2 D M I_ RX P 2 BJ 2 0 D M I2 RX P FD I_ R XN 7 F DI_ T X N7 2 PC IE_ W A K E # R3 2 2 1 K_ 0 4
2 D M I_ RX P 3 D M I3 RX P B G1 4 PW R _ BTN #
F DI_ T X P 0 2 R3 3 6 *1 0 K _ 0 4
AW 2 4 F DI _R XP0 B B1 4 P M _ B A T L OW # R5 7 5 8 .2 K_ 0 4
2 D MI _ T X N 0 AW 2 0 D M I 0 TX N F DI _R XP1 B F1 4 F DI_ T X P 1 2
2 D MI _ T X N 1 BB1 8 D M I 1 TX N F DI _R XP2 B G1 3 F DI_ T X P 2 2
2 D MI _ T X N 2 D M I 2 TX N F DI _R XP3 F DI_ T X P 3 2
AV1 8 B E1 2
2 D MI _ T X N 3 F DI_ T X P 4 2
DMI
D M I 3 TX N F DI _R XP4 B G1 2 3 .3 VS
FDI
A Y2 4 F DI _R XP5 B J1 0 F DI_ T X P 5 2
2 D MI _ T X P 0 D M I 0 TX P F DI _R XP6 F DI_ T X P 6 2
A Y2 0 B H9 P M _ CL K R UN # R5 5 3 8 .2 K_ 0 4
2 D MI _ T X P 1 D M I 1 TX P F DI _R XP7 F DI_ T X P 7 2
A Y1 8
2 D MI _ T X P 2 A U1 8 D M I 2 TX P
2 D MI _ T X P 3 D M I 3 TX P A W16
F D I _I N T F DI_ IN T 2
R 599 4 9 .9 _ 1 % _ 0 4 D M I _ C O MP _ R BJ 2 4 A V1 2
1 . 0 5V S D M I_ Z CO M P F D I_ F S Y NC 0 F DI_ F S Y N C0 2
RT C V C C
B G2 5 B C1 0
D M I _ I R C O MP F D I_ F S Y NC 1 F DI_ F S Y N C1 2
R 594 7 5 0 _ 1 % _ 04 D M I _ 2R B I A S B H2 1 A V1 4 DS W O DV R E N R5 9 6 3 3 0K _0 4
D M I2 RB I A S F DI_ L S Y NC 0 F DI_ L S Y NC 0 2
B B1 0 R5 9 3 *3 3 0 K _ 0 4
F DI_ L S Y NC 1 F DI_ L S Y NC 1 2
A 18 D S W O D V RE N
AL L _ SY S_ PW R G D R3 5 8 1 0 K _ 04 Sheet 20 of 49
D S W V R ME N
CougarPoint - M 3/9
System Power Management

SU S_ PW R _ AC K C1 2 E 22 R S M RS T #
S US A CK # D P W RO K
K3 B 9
DSWODVREN - On Die DSW VR Enable
3 .3 VS R 556 1 0 K_ 0 4 S Y S _ RE S E T # PC IE_ W AKE# P CIE _ W A K E # 2 7 ,2 9 ,3 0
S Y S _R E S E T # W A KE#
P1 2 N 3
R680 Enabled (DEFAULT)
S Y S _ P W R OK P M _ CL K RU N#
S Y S _P W R OK C LK R U N # / GP I O3 2 P M_ C LK R U N # 28
R 354 *1 0 m i _l s h o rt P M _P C H _ P W R O K _ R L 2 2 G 8 S4 _ STAT E#
R681 Disabled
3 4 P M_ P C H _ P W R OK P W R OK S U S _ S TA T# / GP I O6 1 S 4_ S T A TE # 2 8
R 352 *1 0 m i _l s h o rt P M _M P W R O K L10 N 14 SU SC L K
A P W R OK S U S C L K / GP I O6 2
B1 3 D 10 S L P _ S 5#
3 P M_ D R A M_ P W R G D D R A MP W R OK S L P _S 5# / GP I O6 3
R S M RS T # C2 1 H 4
34 RS M R S T # R 353 1 0 K_ 0 4 R S M RS T # SL P_ S4 # SU SC # 3 4 ,3 8
S U S _P W R _A C K K1 6 F 4
3 4 S U S _ P W R_ A C K S U S W A R N # / S U S P W R D N A C K / GP I O3 0 SL P_ S3 # SU SB# 6 ,2 9 ,3 4 ,3 5
P W R _B T N # E2 0 G 10 SL P_ A #
34 P W R_ B T N # P W R B T N# SL P_ A#
A C_ P R E S E NT H2 0 G 16 S L P _ S US #
2 2 ,3 4 A C _ P R E S E N T A C P R E S E N T / GP I O3 1 SL P_ SU S#
P M_ B A TL O W # E1 0 A P1 4
B A T L OW # / GP I O7 2 P MS Y N C H H _ P M _S Y N C 3
S W I# A1 0 K 14 PM _ SL P_ L AN #
34 S W I# R I# S L P _ L A N # / GP I O2 9
B D 8 2 H M6 5 _ M P
3 .3 V
U 31D
7 4 L V C 08 P W
14
12
3 .3 V 3 9 D E L A Y _P W R GD 11 S Y S _P W R _O K SY S_ PW RO K
R5 7 1 1 K_ 0 4
U3 1 C 13
3 4 P M _P C H _ P W R OK
7 4L V C 0 8 P W
R5 7 2
14
7
3 .3 V 9 1 0K _0 4
3 .3 V 37 0. 85 V S _ P W R GD 8
10 A LL _ S Y S _ P W R G D 11 , 3 4 , 3 9
U 31B
U3 1 A 7 4 L V C 0 8P W C 699
74 L V C 0 8 P W * 0 . 1 u_ 1 0 V _ X 5 R _ 0 4
14
7
14
4
1 3, 3 7 1 . 8 V S _ P W R GD 6 1 .0 5 VS _ VT T _ EN
3 8 D D R 1. 5V _P W R GD 3 5
DD R_ 1 .0 5 V S _ P W RG D
2
3 8 1 . 0 5V S _ P W R G D
7
7
3 .3 V R 649 10 K _ 0 4
1 .0 5 VS _ VT T _ EN # 3 5
D
Q 32
R 5 84 * 10 K _0 4 P M _M P W R O K M T N7 0 0 2 Z HS 3
G
1 8 ,2 5 RT C V C C
S
ON 6 , 1 8 , 1 9 , 2 4 , 2 5 , 2 9, 35 , 3 7 , 3 8 , 3 9 1 . 0 5 V S
2 , 3 , 8 , 1 1 , 1 2 , 1 6, 18 , 1 9 , 2 2 , 2 3 , 2 4 , 2 5, 27 , 2 8 , 2 9 , 3 0 , 3 3 , 3 5, 3 7 , 3 8 , 3 9 3 . 3 V
? ? SUSB# -->? ? 1.05VS_VTT? SUSPEND? ? ? ? ? 3 , 9 , 1 0 , 1 1 , 1 2 , 18 , 1 9 , 2 1 , 2 2 , 2 3 , 2 4, 25 , 2 7 , 2 8 , 2 9 , 3 0 , 3 1, 32 , 3 3 , 3 4 , 3 5 , 3 9 3 . 3 V S
Schematic Diagrams
CougarPoint - M 4/9
CougarPoint -M (LVDS,DDI)
U 54D
J47 AP4 3
11 B L ON M4 5 L _ BKL TEN S D V O_ T V C L K I N N AP4 5
1 1 ,3 4 N B_ EN A VD D L _ V D D_ E N S D V O _ T V CL K IN P
P4 5 A M 42
L _ BKL TC TL SD VO _ STAL L N A M 40
T4 0 S D V O_ S T A L L P
Ver:1.0 1 1 P_ D DC _ CL K
3 .3 VS K4 7 L _ D DC _ CL K AP3 9
pull up 2.2K 1 1 P_ D DC _ DAT A L _ D DC _ DA T A S D V O_ I N T N AP4 0
L _ C T R L_ C L K T4 5 S D V O _ INT P
R 39 7 2 .2 K _ 0 4
R 37 9 2 .2 K _ 0 4 L _ C T R L_ D A T A P3 9 L _ C TR L _ C L K
L _ C TR L _ D A TA
R 38 7 2 . 3 7K _ 1% _ 0 4 L VD S _ IBG AF3 7 P3 8
AF3 6 L VD _ IBG S DV O _ CT R L CL K M3 9
L VD _ VBG S D V O _ C T R LD A T A
AE4 8
AE4 7 L VD _ VR EFH AT4 9
L VD _ VR EFL DD P B _ A U X N AT4 7
D D P B _A U X P AT4 0 3 .3 V S
SDVO
Display Port B
AK3 9 D D P B _ HP D
1 1 L V D S -L C L K N L VD SA_ C L K#
LVDS
AK4 0 AV4 2
Sheet 21 of 49 1 1 L V D S -L C L K P
1 1 L V D S -L 0 N
A N4 8
A M4 7
L VD SA_ C L K
L VD SA_ D AT A# 0
D D
DD
D D
PB_ 0 N
PB_ 0 P
PB_ 1 N
AV4 0
AV4 5
AV4 6
1 1 L V D S -L 1 N
Digital Display Interface

AK4 7 L VD SA_ D AT A# 1 DD PB_ 1 P A U 48
CougarPoint - M 4/9 1 1 L V D S -L 2 N AJ 4 8
A N4 7
L VD
L VD
SA_ D
SA_ D
AT A# 2
AT A# 3
D D
DD
D D
PB_ 2 N
PB_ 2 P
PB_ 3 N
A U 47
AV4 7
AV4 9
R4 2 0
2. 2K _0 4
R4 1 9
2 . 2 K _ 04
1 1 L V D S -L 0 P A M4 9 L VD SA_ D AT A0 DD PB_ 3 P
1 1 L V D S -L 1 P AK4 9 L VD SA_ D AT A1
1 1 L V D S -L 2 P AJ 4 7 L VD SA_ D AT A2 P4 6
L VD SA_ D AT A3 D DP C _ CT R L CL K P4 2 H D M I _ C TR L C L K 3 2
D D P C _ C T R LD A T A H D M I _ C TR L D A T A 3 2
AF4 0
1 1 L V D S -U C L K N AF3 9 L VD SB_ C L K# AP4 7
1 1 L V D S -U C L K P L VD SB_ C L K D DP C_ A U X N AP4 9
A H4 5 D D P C _A U X P AT3 8 P OR T C _ H P C
1 1 L V D S -U 0 N P O R T C _H P C 32
Display Port C
A H4 7 L VD SB_ D AT A# 0 D DP C _ HP D
1 1 L V D S -U 1 N AF4 9 L VD SB_ D AT A# 1 A Y 47 H D MI C _ C0 C N
1 1 L V D S -U 2 N AF4 5 L VD SB_ D AT A# 2 D DP C _ 0 N A Y 49 H D MI C _ C0 C P HD MI C_ C 0C N 32
L VD SB_ D AT A# 3 D D PC_ 0 P A Y 43 H D MI C _ C1 C N HD MI C_ C 0C P 32
A H4 3 D DP C _ 1 N A Y 45 HD MI C_ C 1C N 32
H D MI C _ C1 C P
1 1 L V D S -U 0 P A H4 9 L VD SB_ D AT A0 D D PC_ 1 P BA4 7 H D MI C _ C2 C N HD MI C_ C 1C P 32
1 1 L V D S -U 1 P AF4 7 L VD SB_ D AT A1 D DP C _ 2 N BA4 8 H D MI C _ C2 C P HD MI C_ C 2C N 32
1 1 L V D S -U 2 P L VD SB_ D AT A2 D D PC_ 2 P HD MI C_ C 2C P 32
AF4 3 BB4 7 H D MI C _ CL KC N
L VD SB_ D AT A3 D DP C _ 3 N BB4 9 HD MI C_ C LK CN 3 2
R 619 * 15 m i l _ sh o rt D AC_ BL U E_ R H D MI C _ CL KC P
11 D A C _ B L UE D D PC_ 3 P HD MI C_ C LK C P 32
C 729 * 33 p _ 5 0 V _ N P O _ 0 4
R 624 * 15 m i l _ sh o rt D A C_ G RE E N_ R R 6 18 1 5 0 _1 % _ 0 4 D A C _B L U E _ R N4 8 M4 3
11 D A C _ GR E E N C RT _ B L U E D DP D _ CT R L CL K
C 734 * 33 p _ 5 0 V _ N P O _ 0 4 R 6 23 1 5 0 _1 % _ 0 4 D A C _G R E E N _ R P 4 9 M3 6
R 6 25 1 5 0 _1 % _ 0 4 D A C _R E D _ R T4 9 C RT _ G RE E N D D P D _ C T R LD A T A
R 626 * 15 m i l _ sh o rt DA C _ RE D_ R C RT _ R E D
11 D A C _ RE D AT4 5
C 738 * 33 p _ 5 0 V _ N P O _ 0 4
T3 9 D DP D_ A U X N AT4 3
CRT
1 1 D A C _D D C A C L K
EMI NEAR PCH M4 0 C RT _ D DC _ CL K D D P D _A U X P B H 41
Display Port D
1 1 D A C _D D C A D A T A C R T _ D D C _ D A TA D DP D _ HP D
BB4 3
M4 7 D DP D _ 0 N BB4 5
11 DA C _ HS Y N C M4 9 C RT _ H S Y NC D D PD_ 0 P BF4 4
11 DAC _ VSY NC C RT _ V S Y N C D DP D _ 1 N BE4 4
D D PD_ 1 P BF4 2
R 3 88 1 K _ 1 % _ 04 D A C _I R E F _R T4 3 D DP D _ 2 N BE4 2
T4 2 D A C _ IRE F D D PD_ 2 P BJ 4 2
C RT _ IR T N D DP D _ 3 N B G 42
D D PD_ 3 P
B D 8 2 H M6 5 _ MP
Connect to GND
External Graphics (PCH Integrated Graphics Disable)
3 , 9 , 1 0 , 1 1 , 1 2, 18 , 1 9 , 2 0 , 2 2 , 2 3, 24 , 2 5 , 2 7 , 2 8 , 2 9 , 30 , 3 1 , 3 2 , 3 3 , 3 4 , 35 , 3 9 3 . 3 V S
1 1, 18 , 2 4 , 2 5 , 2 7 , 2 8 , 31 , 3 2 , 3 3 , 3 5 , 3 9 , 40 , 4 1 5 V S
Schematic Diagrams
CougarPoint - M 5/9
CougarPoint -M (PCI,USB,NVRAM)
U54E
AY7 RN7 3.3V
RSVD1 AV7 10K_8P4R_04
BG26 RSVD2 AU3 LAN_CLKREQ# 5 4
TP1 RSVD3 19 LAN_CL
KREQ#
BJ26 BG4 USB_OC#23 6 3
BH25 TP2 RSVD4 USB_OC#89 7 2
BJ16 TP3 AT10 USB_OC#1213 8 1
Boot BIOS Strap BG16 TP4 RSVD5 BC8
AH38 TP5 RSVD6
RN18
AH37 TP6 AU2
BBS_BIT1 BBS_BIT0 Boot BIOS Location 10K_8P4R_04
AK43 TP7 RSVD7 AT4 USB_OC#14 5 4
AK45 TP8 RSVD8 AT3 USB_OC#67 6 3
C18 TP9 RSVD9 AT1 USB_OC#1011 7 2
0 0 LPC N30 TP10 RSVD10 AY3 USB_OC#45 8 1
H3 TP11 RSVD11 AT5
0 1 Reserved (NAND) TP12 RSVD12
AH12 AV3
1 0 PCI AM4 TP13 RSVD13 AV1 RN12 3.3VS
AM5 TP14 RSVD14 BB1 10K_8P4R_04
1 1 SPI TP15 RSVD15
Y13 BA3 INT_PIRQE# 4 5
K24 TP16 RSVD16 BB5 SATA_ODD_DA# 3 6
L24 TP17 RSVD17 BB3 2 7
INT_PIRQD#
BBS_BIT1 AB46 TP18 RSVD18 BB7 INT_PIRQA# 1 8
R415 *1K_04
AB45 TP19 RSVD19 BE8
TP20 RSVD20 BD4
RSVD
RN20
RSVD21 BF6 10K_8P4R_04
RSVD22 DGPU_HOLD_RST# 4 5
B21 AV5 DGPU_SELECT# 3 6
M20 TP21 RSVD23 AV10 2 7
D_GPU_PWR_EN#
Flash Descriptor security override strap AY16
BG46
TP22
TP23
TP24
RSVD24
RSVD25
AT8
INT
_PIRQG# 1
RN23
8
Sheet 22 of 49
AY5 10K_8P4R_04
PCI_GNT#3
LOW = PCI_GNT#3 swap override
HIGH = Default BE28
BC30 TP25
RSVD26
RSVD27
BA2
AT12
INT_PIRQB#
INT
_PIRQ
INT
_PIRQ
C#
H#
4
3
2
5
6
7
CougarPoint - M 5/9
BE32 TP26 RSVD28 BF3 1 8
BJ32 TP27 RSVD29
BC28 TP28 DGPU_PWM_SELECT
# *10K_
04 R400
BE30 TP29
BF32 TP30
Unde rstand the RE D FONT define BG 32 TP31 C24
AV26 TP32 USBP0
N A24 USB_PN0 28
PCI_GNT#3 BB26 TP33 USBP0P C25
USB_PP0 28 US B PORT0
R409 *1K_04 USB_PN1 27
AU28 TP34 USBP1
N B25
AY30 TP35 USBP1P C26
USB_PP1 27 US B PORT1
TP36 USBP2
N USB_PN2 27
AU26 A26 3G
AY26 TP37 USBP2P K28 USB_PP2 27
AV28 TP38 USBP3
N H28 USB_PN3 27
AW30 TP39 USBP3P E28 USB_PP3 27 WLAN
TP40 USBP4
N USB_PN4 28
R406 *1K_04 INT
_PIRQE# D28
USBP4P C28
USB_PP4 28 FING ER
USBP5
N USB_PN5 28
A28 CCD
USBP5P USB_PP5 28
MPC Switch C ontrol C29
USBP6
N B29
MPC OFF -- 0 DEFAULT K40 USBP6P N28
INT_PIRQA# HM65 NO SUPPORT PORT 6 & 7
INT_PIRQB# K38 PIRQA# USBP7
N M28
MPC ON -- 1 INT_PIRQC# H38 PIRQB# USBP7P L30
PCI
INT_PIRQD# G38 PIRQC# USBP8
N K30
PIRQD# USBP8P G30
DGPU_HOLD_RST# C46 USBP9
N E30
C44 REQ1# / GPIO5
0 USBP9P C30
USB
DGPU_SELECT#
E40 REQ2# / GPIO5
2 USBP10
N A30 USB_PN6_FP14 27
R407 *0_04 D_GPU_PWR_EN# W1 4XX FINGER
12,34,37 DGPU_PWR_EN# REQ3# / GPIO5
4 USBP10P L32 USB_PP6_FP14 27
BBS_BIT1 D47 USBP11
N K32
DGPU_PWM _SELECT# E42 GNT1# / GPIO51 USBP11P G32
PCI_GNT#3 F46 GNT2# / GPIO53 USBP12
N E32
GNT3# / GPIO55 USBP12P C32
USBP13
N A32
G42 USBP13P
INT_PIRQE#
SATA_ODD_DA# G40 PIRQE# / GPIO2
18,31 SATA_ODD_DA# INT_PIRQG# C42 PIRQF# / GPIO3 C33 USB_BIAS R604 22.6_1%_06
INT_PIRQH# D44 PIRQG#/ G PIO4 USBRBI AS#
PIRQH# / GPIO5
B33
R425 *0_04 K10 USBRBI AS
30,34 PME# PME#
PLT_RST# C6 A14 USB_OC#01
3,12,28 PLT_RST# PLTRST# OC0# / GPI O59 USB_OC#01 28
K20 USB_OC#23
OC1# / GPI O40 B17 USB_OC#45
H49 OC2# / GPI O41 C16 USB_OC#67
R416 *22_04 PCLK_TPM_PCH H43 CLKOUT_PCI0 OC3# / GPI O42 L16 USB_OC#89
28 PCLK_TPM J48 CLKOUT_PCI1 OC4# / GPI O43 A16
R616 22_04 CLK_PCI _FB_R USB_OC#10
11
19 CLK_PCI_FB K42 CLKOUT_PCI2 OC5# / GPI O9 D14 USB_OC#12
13
CLK_PCI _KBC_R H40 CLKOUT_PCI3 OC6# / GPI O10 C14 USB_OC#14
34 PCLK_KBC R392 22_04 R591 *0_04
CLKOUT_PCI4 OC7# / GPI O14 AC_
PRESENT 20,34
BD82HM65_MP
3.3VS
PI N PL T_ RS T# to B uf fe r
C690 *0.1u_1
6V_Y5V_
04
5
U53
PLT_RST# 1 MC74VHC1G08DFT
2G
4
2 BUF_PLT_RST
# 27,29,30,34
R574
3
100K_04
2,3, 8, 11
, 12
, 16
, 18
, 19
, 20
, 23
, 24, 25, 27, 28, 29
, 30
, 33
, 35
, 37
, 38
, 39 3.3V
3, 9, 10, 11, 12
, 18
, 19
, 20
, 21
, 23
, 24
, 25, 27, 28, 29, 30
, 31
, 32
, 33
, 34
, 35
, 39 3.3VS
Schematic Diagrams
CougarPoint - M 6/9
CougarPoint - M (GPIO,VSS_NCTF,RSVD)
3.3V
R569 1K_04 HOST_ALERT#1

R295 1K_04 HOST_ALERT#2
3.3VS
U54F
R401 *10K_04 DGPU_PWROK
R402 1K_04 SATA_ODD_PWRGT S_GPI O T
7 C40 SATA_ODD_PWRGT
BMBUSY# / GPIO0 TACH4 / GPIO68 SATA_ODD_PWRGT 31
R554 10K_04 MFG_MODE
R551 10K_04 SATA_DET#4 SMI# A4
2 B4
1 PCH_GPIO57 R609 1.5K_1%_04
34 SMI# TACH1 / GPIO1 TACH5 / GPIO69
RN22 DGPU_HPD_INTR# H3
6 C41 GPIO70 R612 1.5K_1%_04
TACH2 / GPIO6 TACH6 / GPIO70 3. 3VS
10K_8P4R_04
1 8 KBC_RST# SCI# E3
8 A4
0 GPIO71 R610 1.5K_1%_04
2 7 DGPU_HPD_I NTR# 34 SCI# TACH3 / GPIO7 TACH7 / GPIO71 3. 3VS
3 6 SCI# I CC_EN# C1
0
4 5 SMI# GPIO8
R302 200K_04 SATA_ODD_PRSNT# R573 10K_04 EDID_SEL
ECT# C4 R300 10K_04
3.3V LAN_PHY_PWR_CTRL / GPIO1
2 3. 3VS
HOST_ALERT#1 G2 P4 GA20 3
4
RN17 R465 *0_0
4
29 OCPPE# GPIO1
5 A20GAT
E
10K_8P4R_04 R320 *10K_04 1. 05
VS_VTT
1 8 S_GPIO D02 CHANGE AU16 HPECI _R R316 *0_04
PECI H_PECI 3
,34
2 7 ODD_DET ECT# FOR VIA USB3.0 ONLY SATA_DET#4 U2

3 6 ODD_DETECT# 18 SATA4
GP / GPIO1
6 P5
TEST_SET_UP KBC_RST#
4 5 CRIT_TEMP_REP#_R RCIN# KBC_
RST# 34
DGPU_PWROK D4
0 AY11
GPIO
TACH0 / GPIO17 PROCPWRGD H_CPUPWRGD 3
CPU/MISC
Sheet 23 of 49 R326
R310
R319
*10mli_short
*10mli_short
*10mli_short
PCH_TS_VSS1
PCH_TS_VSS2
PCH_TS_VSS3
BIOS_REC
HOST_ALERT#2
T
5
E8
SCLOCK/ GPIO22 THRMTRI P#
AY10
T14
HTHRMTRIP#_R R318
INI T
3_3V#
390
_1%_06
H_THRMTRIP# 3
GPIO2
4 /MEM_LED INIT3_3V#
CougarPoint - M 6/9 R311
R299
*10mli_short
*1K_04
PCH_TS_VSS4
PLL_ODVR_EN
11 SB_BLON
SB_BLON E1
6
GPIO2
7 DF_TVS
AY1 NV_
CLE R559 1K_04
R560 2.2K_
04 1.8VS
H_SNB_IVB# 3
R314 100K_04 FDI_OVRVLTG D02 CHANGE PLL

_ODVR_
EN P8
GPIO2
8 AH8
FOR VIA USB3.0 ONLY PCH_TS_VSS1 DMI & FDI Termination Voltage
K1 TS_VSS1
R466 *0_0
4
29,34 ICPPE# 31 LED_DGPU# STP_PCI# / GPIO34 AK11 PCH_TS_VSS2 Set to Vss when LOW
PL L _O D VR _ EN : HI GH - E N AB L ED [ DE F AU L T]
PCH_MUTE# K4 TS_VSS2 NV_CLE
LO W - D I SA B LE D GPIO3
5 AH10 PCH_TS_VSS3
Set to Vcc when HIGH
V8 TS_VSS3
SATA_ODD_PRSNT#
3.3VS 18,31 SATA_ODD_PRSNT# SATA2
GP / GPIO3
6 AK10 PCH_TS_VSS4
TS_VSS4 PL A CE R4 6 4 C LO S E T O T HE BR A NC H IN G P OI N T
FDI_OVRVLTG M5
SATA3
GP / GPIO3
7 ( T O C PT an d N V RA M C O NN E CT O R
R555 *1
0K_
04 GFX_CRB_DET MFG_MODE N2 P3
7
SLOAD / GPIO38 NC_1
GFX_CRB_DET M3
SDATAOUT
0 / GPIO3
9
R56
5 IN T ER N AL GF X : L OW (D E FA U LT )
TEST_SET_UP V1
3 BG2
100K_04 EX T ER N AL GF X :H I GH SDATAOUT
1 / GPIO4
8 VSS_NCTF_15
R290 *0_0
4 CRIT_TEMP_REP#_R V3 BG48
34 CRI T
_TEMP_REP# SATA5
GP / GPIO4
9 VSS_NCTF_16
R296 100K_04 TEST_DET D6 BH3

GPIO5
7 VSS_NCTF_17
BH47
VSS_NCTF_18
R288 10K_04 BIOS_REC
A4 BJ4
VSS_NCTF_1 VSS_NCTF_19
R28
7 B IO S R E CO V ER Y A4
4 BJ44
*0
_04 D IS A BL E -- - -H I GH ( D EF A UL T ) A4
5 BJ45
E NA B LE - -- - -L O W
A4
6 BJ46
NCTF
A5 BJ5
A6 BJ6
3.3V VSS_NCTF_6 VSS_NCTF_24
B3 C2
R414 10K_04 ICC_EN# VSS_NCTF_7 VSS_NCTF_25
B4
7 C48
R577 BD1 D1
I NT E GR A TE D C l oc k C hi p E n ab l e VSS_NCTF_9 VSS_NCTF_27
*1
K_04 I CC _ EN # : H IG H - D I SA B LE D [ D EF A UL T ] BD4
9 D49
L OW - EN A BL E D
BE1 E1
BE4
9 E4
9
BF1 F1
BF4
9 F4
9
BD82HM65_MP
6,24,37 1.8VS
2,3,5,24,25,35,39 1.05VS_VTT
2,3,8,11,12,16,18,19,20,22,24,25,27,28,29,30,33, 3
5, 3
7,38,39 3.3V
3
,9, 10, 1
1,12,18,19,20,21,22,24,25,27,28,29,30,31,32, 3
3, 3
4,35,39 3.3VS
Schematic Diagrams
CougarPoint - M 7/9
CougarPoint -M (POWER)
L 52 3 .3 VS
H C B 1 60 8 K F -1 2 1 T2 5
.
1. 05 V S
U5 4 G P OW E R V C C A _ D A C _ 3 . 3V S 5V S
L51
1.3A 1mA H C B 1 6 0 8K F -12 1 T 2 5 U 55
AA2 3
AC 2 3 V CC CO RE [1 ] VCC A DA C
U 48 . V C C A _D A C 3 . 3 V S 5
O UT IN
1
C4 7 8 C5 1 4 C 49 4 C 4 67 AD 2 1 V CC CO RE [2 ] C7 3 0 C7 3 1 C 73 7 C7 4 2 C 7 40 R6 3 0 C 7 41
CRT
AD 2 3 V CC CO RE [3 ] U 47 3
10 u _ 6. 3V _ X 5 R _ 0 6 1u _ 6 . 3 V _ X5 R _0 4 1 u _6 . 3 V _ X 5R _ 04 1 u _ 6. 3V _ X 5 R _ 0 4 AF 2 1 V CC CO RE [4 ] V S S A DA C 0. 0 1 u _1 6 V _ X 7R _ 04 0 . 1u _ 1 0 V _X 5 R _ 0 4 1 0 u_ 6 . 3 V _ X 5R _ 06 0 . 1 u_ 1 0 V _ X5 R _0 4 2 2 u _6 . 3 V _ X 5R _ 08 *2 3 . 7K _1 % _ 04 S HD N#
* 1u _ 6 . 3 V _X 5R _ 04
VCC CORE
AF 2 3 V CC CO RE [5 ] S ET 4 2
AG 2 1 V CC CO RE [6 ] SET G ND
AG 2 3 V CC CO RE [7 ] 3. 3 V S _ V C C A _ L V D 3 . 3V S
1mA R6 2 7 * A P L 5 60 3 -3 3B
AG 2 4 V CC CO RE [8 ] AK3 6 R3 6 5 * 15 m i _l s h or t _0 6
AG 2 6 V CC CO RE [9 ] V C CA L V D S
*1 0 K _1 % _ 0 4
AG 2 7 V CC CO RE [1 0 ] AK3 7 C5 2 3
AG 2 9 V CC CO RE [1 1 ] VSSAL VD S
AJ 2 3 V CC CO RE [1 2 ] *1 u _ 6. 3 V _ X 5 R _ 0 4
V CC CO RE [1 3 ]
LVDS
AJ 2 6 AM 3 7 1. 8 V S _ V C C T X _ LV D
AJ 2 7 V CC CO RE [1 4 ] V C C T X _ LV D S [ 1 ] APL5603-33B 6-02-56033-4C0
AJ 2 9 V CC CO RE [1 5 ] AM 3 8
60mA
V CC CO RE [1 6 ] V C C T X _ LV D S [ 2 ]
L39 . H C B 16 0 8 K F -1 2 1T 2 5 1. 8 V S G9091-330T11UF 6-02-90913-4C0
AJ 3 1
1 . 0 5V S V CC CO RE [1 7 ] AP3 6 C5 3 0 C5 3 6 C 54 3
V C C T X _ LV D S [ 3 ]
1 . 0 5 V S _ V C C A P L L_ E X P AP3 7 0. 0 1 u _1 6 V _ X 7R _ 04 0 . 01 u _ 1 6V _ X 7 R _ 0 4 2 2 u_ 6 . 3 V _ X 5R _ 08
AN 1 9 V C C T X _ LV D S [ 4 ]
R5 9 7 *1 0 m li _ s ho rt
V C C I O[ 2 8 ]
1 . 0 5 V S _ V C C A P L L_ E X P 1
L 47 *H C B 1 0 0 5 K F -1 21 T 2 0 BJ 2 2 3 .3 VS
. V C C A P L L E XP
C 7 01
V C C 3 _3 [ 6 ]
V3 3
266mA
Sheet 24 of 49
HVCMOS
AN 1 6
* 1 0u _ 6 . 3V _X 5 R _ 0 6 V C C I O[ 1 5 ] C5 2 8
AN 1 7
AN 2 1
V C C I O[ 1 6 ]
V C C 3 _3 [ 7 ]
V3 4 0 . 1u _ 1 0 V _X 5 R _ 0 4
CougarPoint - M 7/9
V C C I O[ 1 7 ]
1 .0 5 V S AN 2 6 1 . 5 V S _ 1. 8V S
2.93A 2.92A V C C I O[ 1 8 ]
160mA
AN 2 7 AT1 6
V C C I O[ 1 9 ] V C C V R M[ 3 ]
C 47 7 C4 9 5 C5 0 3 C5 0 5 C 4 85 AP2 1
V C C I O[ 2 0 ]
AP2 3 AT2 0
42mA
1 0 u_ 6 . 3 V _ X 5R _ 06 1 u _6 . 3 V _ X 5R _ 04 1 u_ 6 . 3 V _ X5 R _0 4 1u _ 6 . 3V _X 5 R _ 0 4 1 u _ 6. 3V _ X 5 R _ 0 4 1 . 0 5V S _V T T
V C C I O[ 2 1 ] V C C D MI [ 1 ]
AP2 4
DMI
C 45 8 C 4 54
V C C I O[ 2 2 ] 2mA
VCCIO
AP2 6 AB3 6 V C C C LK D MI R 37 5 *1 5 m li _ s ho rt _ 0 6 1 u _ 6 . 3V _ X 5 R _ 0 4 1 0 u _6 . 3 V _ X 5R _ 06
V C C I O[ 2 3 ] V CC CL K DM I 1. 0 5 V S
AT 2 4
V C C I O[ 2 4 ]
AN 3 3
V C C I O[ 2 5 ]
AN 3 4 AG 1 6
3. 3 V S V C C I O[ 2 6 ] V C C D F T E R M[ 1 ] V _N V R A M_ V C C Q
266mA BH 2 9 AG 1 7 190mA R 55 8 * 1 5m i l _s h o rt _ 06
1. 8V S
DFT / SPI
V C C 3 _3 [ 3 ] V C C D F T E R M[ 2 ]
C6 9 3 C 45 6 R 56 1 *0 _ 0 4
1 . 5 V S _ 1. 8 V S AJ 1 6 3. 3V S
V C C D F T E R M[ 3 ]
0. 1u _ 1 0V _X 5 R _ 0 4 160mA 0 . 1 u_ 1 0 V _ X5 R _0 4
AP1 6
V CC V RM [2 ] AJ 1 7
1 . 05 V S _ V C C A P L L _ F D I V C C D F T E R M[ 4 ]
R 3 24 * 0_ 0 6 BG 6
1 . 0 5V S V c cA F D I P L L
V C C ME 3 . 3 V R 55 0 0 _0 4 3. 3V S
AP1 7 20mA
V C C I O[ 2 7 ] V1 R 55 7 *0 _ 0 4
FDI
V CC S P I 3. 3V
42mA 1 . 0 5 S _ V C C _D MI
R 3 48 *1 5 mi l _ sh o rt _ 0 6 AU 2 0 C6 9 4
1. 0 5 V S _ V T T V CC DM I[2 ]
1 u_ 6 . 3 V _ X5 R _0 4
B D 82 H M6 5 _M P
1 . 05 V S 1 .5 V S 1 .8 V S 1 . 5V S _1 . 8 V S
R 42 2 *0 _ 0 4 35 1 .5 V S
2 5 1 . 5V S _1 . 8 V S
R 33 1 * 1 0m i l _s h o rt
R 62 2 *0 _ 0 4 6 ,2 3 ,3 7 1 .8 V S
6, 18 , 1 9 , 20 , 2 5 , 2 9, 3 5 , 3 7 , 38 , 3 9 1 . 0 5V S
1 1, 1 8 , 2 5 , 27 , 2 8 , 3 1, 3 2 , 3 3, 35 , 3 9 , 4 0, 4 1 5 V S
2 , 3 , 5, 2 3 , 2 5 , 35 , 3 9 1 . 05 V S _ V T T
2 , 3 , 8 , 11 , 1 2 , 1 6, 1 8 , 1 9 , 20 , 2 2 , 2 3, 2 5 , 2 7 , 28 , 2 9 , 3 0, 3 3 , 3 5 , 37 , 3 8 , 3 9 3 . 3 V
3 , 9, 10 , 1 1 , 12 , 1 8 , 1 9, 2 0 , 2 1 , 22 , 2 3 , 2 5, 2 7 , 2 8 , 29 , 3 0 , 3 1, 3 2 , 3 3 , 34 , 3 5 , 3 9 3 . 3 V S
Schematic Diagrams
CougarPoint - M 8/9
1 . 0 5V S _ V C C A _ C LK
CougarPoint - M (POWER) CougarPoint power supply range
1 . 05 V S L5 0 *H C B 1 00 5 K F -1 2 1 T2 0 Min Voltage Max

1. 0 5 V S
3 .3 V U5 4 J PO WE R 2. 92 A 1.00V 1.05V 1.10V

C4 8 2 A D 49 N 26
V CCA CL K V C C I O[ 2 9 ] C 51 6
1.43V 1.5V 1.58V
Note: C417 - STUFFED ONLY FOR CPT INTERPOSER; P2 6
0. 1 u _ 10 V _ X 5 R _ 04 3mA 1.71V 1.8V 1.89V
UNSTUFF FOR CPT T 16 V C C I O[ 3 0 ] 1 u _ 6. 3 V _ X 5R _ 04
V CCD S W 3 _ 3 P2 8
V C C I O[ 3 1 ] 3 .3 V 3.14V 3.3V 3.47V
C4 4 9 * 0. 1 u _ 10 V _ X 5R _ 04 PC H_ V C CD SW V 12 T27
D CP S USB Y P V C C I O[ 3 2 ] 97 mA 4.75V 5V 5.25V
T29
26 6mA V C C I O[ 3 3 ]
3 .3 VS
L4 9 . H C B 1 6 08 K F -1 2 1 T2 5 VC C3 _ 3 T 38
V C C 3 _ 3 [ 5]
C 46 1 C5 0 2
C7 3 2 C5 3 2 T23 0 . 1 u _1 0 V _ X5 R _0 4 0 . 1u _ 1 0V _ X 5 R _ 0 4
B H 23 V C C S U S 3 _3 [ 7 ]
10 u _ 6. 3 V _ X 5 R _ 06 1u _ 6 . 3V _X 5 R _ 0 4 V C C A P LL D MI 2 T24
A L 29 V C C S U S 3 _3 [ 8 ]
1 . 0 5V S V C C I O [ 1 4] V2 3
V C C S U S 3 _3 [ 9 ]
USB
A L 24 V2 4 1mA D 15 C D B U 00 3 4 0
D CP S US[3 ] V C C S U S 3 _ 3[ 1 0 ]
1 . 0 5V S L4 8 . *H C B 1 6 0 8K F -12 1 T 2 5 V C C A P L L _C P Y _ P C H
P2 4
C A
3 . 3V
V C C S U S 3 _3 [ 6 ]
Sheet 25 of 49 C4 7 6 * 0. 1 u _ 16 V _ Y 5 V _ 0 4 DC P S US
1. 01A
A A 19
A A 21
V CCA S W [1 ]
V C C I O[ 3 4 ]
T26
1. 05 V S
R3 7 0
C 50 7
1 0 _ 1% _ 0 4 5V
1 . 0 5V S
CougarPoint - M 8/9 C4 8 1 C5 1 7
A A 24
V CCA S W [2 ]
V CCA S W [3 ] V 5 R E F _S U S
M 26 5 V A _ P C H_ V CC 5 RE F S U S
0 . 1 u _1 0 V _ X5 R _0 4
Clock and Miscellaneous

A A 26
22 u _ 6. 3 V _ X 5 R _ 08 1u _ 6 . 3V _X 5 R _ 0 4 V CCA S W [4 ] A N 23 V C C A _U S B S U S C 46 5 *1 u _6 . 3 V _ X 5R _ 04
A A 27 D CP S US [4 ]
V CCA S W [5 ] A N 24
V C C S U S 3 _3 [ 1 ] 3 .3 V
A A 29
V CCA S W [6 ]
C4 8 0 C4 8 4 A A 31 5 V S _ P C H _ V C C 5R E F S U S
V CCA S W [7 ] D 17 C D B U 00 3 4 0
A C 26 P3 4
1mA C A
22 u _ 6. 3 V _ X 5 R _ 08 1u _ 6 . 3V _X 5 R _ 0 4 3 . 3V S
V CCA S W [8 ] V 5R E F
A C 27 R3 6 7 1 0 _ 1% _ 0 4
V CCA S W [9 ] N 20 97mA 5 VS
A C 29 V C C S U S 3 _3 [ 2 ]
PCI/GPIO/LPC
C5 1 8
V C C A S W [ 1 0] N 22
A C 31 V C C S U S 3 _3 [ 3 ]
1 u_ 6 . 3 V _X 5 R _ 0 4
C4 8 6 V C C A S W [ 1 1] P2 0
A D 29 V C C S U S 3 _3 [ 4 ]
1u _ 6 . 3V _X 5 R _ 0 4 V C C A S W [ 1 2] P2 2
A D 31 V C C S U S 3 _3 [ 5 ] 3 . 3V
V C C A S W [ 1 3] C 4 87
W 21 AA1 6
266mA
V C C A S W [ 1 4] V C C 3 _3 [ 1 ] 3 . 3V S
1 u _ 6. 3 V _ X 5R _ 04
W 23 W16 C5 2 2 C 71 1 C4 6 6
V C C A S W [ 1 5] V C C 3 _3 [ 8 ]
Note: C1289- STUFFED ONLY FOR CPT INTERPOSER; W 24 T34 0 . 1u _ 1 0V _ X 5 R _ 0 4 0 . 1 u _1 0 V _ X5 R _0 4 0 . 1u _ 1 0V _ X 5 R _ 0 4
UNSTUFF FOR CPT V C C A S W [ 1 6] V C C 3 _3 [ 4 ]
W 26
V C C A S W [ 1 7]
W 29
C 46 0 0. 1 u _ 10 V _ X 5 R _ 04 V C C A S W [ 1 8]
W 31 AJ 2
D02 CHANGE V C C A S W [ 1 9] V C C 3 _3 [ 2 ] 1 . 0 5S _S A T A 3 L32
1 . 05 V S 1 . 05 V S _ V C C A _ A _ D P L W 33 H C B 1 0 0 5K F - 12 1 T 20
L3 8
1 . 5 V S _ 1 . 8V S V C C A S W [ 2 0] AF1 3
2.92A
V C C I O[ 5 ] 1 .0 5 V S
H C B 16 0 8 K F -1 21 T 2 5
. V C C R T C E XT N 16
D CP R T C A H 13
C4 4 7
V C C I O[ 1 2 ]
+ C 7 39 C7 3 3 C5 4 7 16 mA 1 u_ 6 . 3 V _X 5 R _ 0 4
R4 0 3 Y 49 A H 14
22 0 u _4 V _ V _ A 22 u _ 6. 3 V _ X 5R _ 08 1u _ 6 . 3V _ X 5 R _ 0 4 V C C V R M[ 4 ] V C C I O[ 1 3 ]
*0 _ 04
80mA AF1 4 L46
B D 47 V C C I O[ 6 ] * H C B 10 0 5 K F -1 21 T 2 0
1 . 0 5 V S _ V C C A _B _D P L V CCA DPL L A AK1 1 . 0 5 V S _ V C C A P L L_ S A T A 3
80mA
SATA
B F 47 VC CAP L L SA T A 1 .0 5 V S
L36
. V CCA DPL L B 1 . 5V S _1 . 8 V S
H C B 16 0 8 K F -1 21 T 2 5
150mA AF1 1
1 . 05 V S V C C V R M[ 1 ]
+ C 8 01 C 7 24 C 72 7 C7 1 9 C5 4 0 A F 17 1 . 0 5V S
C4 7 9 C4 5 5 A F 33 V CCIO [7 ]
A F 34 V C C D I F F C LK N [ 1 ] A C 16 3. 3 V 1. 5 V 3. 3A _ 1 . 5 A _ H D A _I O
22 0 u _4 V _ V _ A
*2 2 u_ 6 . 3 V _ X 5R _ 08
* 22 u _ 6. 3 V _ X 5 R _ 0 8
2 2u _ 6 . 3V _ X 5 R _ 0 8
1 u_ 6 . 3 V _X 5R _0 4
1u _ 6 . 3V _X 5 R _ 0 4 1u _ 6 . 3V _X 5 R _ 0 4 A G 34 V C C D I F F C LK N [ 2 ] V C C I O[ 2 ]
V C C D I F F C LK N [ 3 ] A C 17
D02 CHANGE V C C I O[ 3 ] R 6 07 *0 _ 0 6
A G 33 A D 17 C4 5 3 R 6 08 *1 5 m li _ sh o rt _ 0 6
1 . 05 V S V CCS S C V C C I O[ 4 ]
1 u_ 6 . 3 V _X 5 R _ 0 4
C4 9 6 C 4 4 8 0 . 1 u_ 1 0 V _ X5 R _ 0 4 V C C S S T V 16
D CP S S T
1 8 3 . 3A _1 . 5 A _ H D A _I O
1u _ 6 . 3V _X 5 R _ 0 4 1.01A
1 . 0 5 M_ V C C S U S T 17 T21 1 8 ,2 0 RT C V CC
D CP S US[1 ] V C CA S W [2 2 ] 1 .0 5 VS 2 4 1 . 5 V S _ 1 . 8V S
C4 6 9 *1 u _6 . 3 V _ X5 R _0 4 V 19
D CP S US[2 ] 6, 1 8 , 1 9, 2 0 , 2 4, 29 , 3 5 , 37 , 3 8 , 3 9 1 . 0 5 V S
MISC
3 , 6, 8 , 9 , 1 0 , 29 , 3 5 , 37 , 3 8 1 . 5V
<1mA V2 1
V C CA S W [2 3 ] 2, 3 , 5 , 2 3 , 24 , 3 5 , 3 9 1 . 0 5 V S _ V TT
1 . 0 5V S _ V T T 1 1 , 18 , 2 4 , 2 7, 2 8 , 3 1, 3 2 , 3 3 , 35 , 3 9 , 40 , 4 1 5 V S
CPU
B J8
V _P R OC _I O T19 2 , 3 , 8 , 1 1, 1 2 , 1 6, 18 , 1 9 , 20 , 2 2 , 23 , 2 4 , 2 7, 2 8 , 2 9, 3 0 , 3 3 , 35 , 3 7 , 38 , 3 9 3 . 3V
C 45 0 C4 4 6 C4 5 1
V C CA S W [2 1 ] 3 , 9 , 1 0, 1 1 , 1 2, 1 8 , 1 9, 20 , 2 1 , 22 , 2 3 , 24 , 2 7 , 2 8, 2 9 , 3 0, 3 1 , 3 2 , 33 , 3 4 , 35 , 3 9 3 . 3V S
3 . 3 A _ 1. 5 A _ H D A _ I O 2 7 , 2 8 , 29 , 3 5 , 37 , 3 8 5 V
4 . 7 u_ 6 . 3 V _ X5 R _ 0 6 0. 1 u _ 10 V _ X 5 R _ 04 0. 1 u _ 10 V _ X 5 R _ 04
A 22 P3 2
16mA
2mA
RTC
V CCR T C HDA V C CS U S HD A
RT C V CC
C5 0 6
C 70 8 C7 1 0 C7 1 5 B D 8 2 H M 65 _ MP
0 . 1u _ 1 0V _ X 7 R _ 0 4
1 u _6 . 3 V _ X5 R _0 4 0. 1 u _ 10 V _ X 5 R _ 04 0. 1 u _ 10 V _ X 5 R _ 04
Schematic Diagrams
CougarPoint - M 9/9
CougarPoint -M (GND) Voltage Rail

V_CPU_IO
Voltage
1.05
S0 Iccmax Current (A)
1 (mA)
U54I V5REF 5 1 (mA)
U54H
AY4 H46 H5 V5REF_Sus 5 1 (mA)
AY42 VSS[ 15
9] VSS[259] K18 VSS[ 0
]
AY46 VSS[ 16
0] VSS[260] K26 AA17 AK38 Vcc3_3 3.3 0.266
AY8 VSS[ 16
1] VSS[261] K39 AA2 VSS[ 1
] VSS[ 80
] AK4
B11 VSS[ 16
2] VSS[262] K46 AA3 VSS[ 2
] VSS[ 81
] AK42
VccADAC3 1.05 1 (mA)
B15 VSS[ 16
3] VSS[263] K7 AA33 VSS[ 3
] VSS[ 82
] AK46 VccADPLLA 1.05 0.08
B19 VSS[ 16
4] VSS[264] L18 AA34 VSS[ 4
] VSS[ 83
] AK8
B23 VSS[ 16
5] VSS[265] L2 AB11 VSS[ 5
] VSS[ 84
] AL1
6
VccADPLLB 1.05 0.08
B27 VSS[ 16
6] VSS[266] L20 AB14 VSS[ 6
] VSS[ 85
] AL1
7
VSS[ 16
7] VSS[267] VSS[ 7
] VSS[ 86
]
VccCore 1.05 1.3
B31 L26 AB39 AL1
9
B35 VSS[ 16
8] VSS[268] L28 AB4 VSS[ 8
] VSS[ 87
] AL2 VccDMI 1.1 0.042
B39 VSS[ 16
9] VSS[269] L36 AB43 VSS[ 9
] VSS[ 88
] AL2
1
B7 VSS[ 17
0] VSS[270] L48 AB5 VSS[ 1
0] VSS[ 89
] AL2
3
VccIO 1.05 2.925
F45 VSS[ 17
1] VSS[271] M12 AB7 VSS[ 1
1] VSS[ 90
] AL2
6 VccASW 1.05 1.01
BB12 VSS[ 17
2] VSS[272] P16 AC19 VSS[ 1
2] VSS[ 91
] AL2
7
BB16 VSS[ 17
3] VSS[273] M18 AC2 VSS[ 1
3] VSS[ 92
] AL3
1 VccSPI 3.3 0.020
BB20 VSS[ 17
4] VSS[274] M22 AC21 VSS[ 1
4] VSS[ 93
] AL3
3
VSS[ 17
5] VSS[275] VSS[ 1
5] VSS[ 94
]
VccDSW3_3 3.3 2 (mA)
BB22 M24 AC24 AL3
4
BB24 VSS[ 17
6] VSS[276] M30 AC33 VSS[ 1
6] VSS[ 95
] AL4
8 VccDFTERM 1.8 0.19
BB28 VSS[ 17
7] VSS[277] M32 AC34 VSS[ 1
7] VSS[ 96
] AM11
VccSus3_3 3.3 0.097
BB30 VSS[ 17
8] VSS[278] M34 AC48 VSS[ 1
8] VSS[ 97
] AM14
BB38 VSS[ 17
9] VSS[279] M38 AD10 VSS[ 1
9] VSS[ 98
] AM36 VccSusHDA 3.3 1 (mA)
BB4 VSS[ 18
0] VSS[280] M4 AD11 VSS[ 2
0] VSS[ 99
] AM39
BB46 VSS[ 18
1] VSS[281] M42 AD12 VSS[ 2
1] VSS[ 100
] AM43 VccVRM 1.5 0.16
BC14
BC18
BC2
VSS[ 18
2]
VSS[ 18
3]
VSS[ 18
4]
VSS[282]
VSS[283]
VSS[284]
M46
M8
N18
AD13
AD19
AD24
VSS[ 2
2]
VSS[ 2
3]
VSS[ 2
4]
VSS[ 101
]
VSS[ 102
]
VSS[ 103
]
AM
AM
AM
45
46
7
VccClKDMI
VccSSC
1.05
1.05
0.02
0.095
Sheet 26 of 49
BC22 VSS[ 18
5] VSS[285] P30 AD26 VSS[ 2
5] VSS[ 104
] AN2
BC26
BC32
BC34
VSS[ 18
6]
VSS[ 18
7]
VSS[ 18
8]
VSS[286]
VSS[287]
VSS[288]
N47
P11
P18
AD27
AD33
AD34
VSS[ 2
6]
VSS[ 2
7]
VSS[ 2
8]
VSS[ 105
]
VSS[ 106
]
VSS[ 107
]
AN29
AN3
AN31
VccDIFFCLKN
VccALVDS
1.05
3.3
0.055
1 (mA) CougarPoint - M 9/9
BC36 VSS[ 18
9] VSS[289] T33 AD36 VSS[ 2
9] VSS[ 108
] AP12 VccTX_LVDS 1.8 0.06
BC40 VSS[ 19
0] VSS[290] P40 AD37 VSS[ 3
0] VSS[ 109
] AP19
BC42 VSS[ 19
1] VSS[291] P43 AD38 VSS[ 3
1] VSS[ 110
] AP28
BC48 VSS[ 19
2] VSS[292] P47 AD39 VSS[ 3
2] VSS[ 111
] AP30
BD46 VSS[ 19
3] VSS[293] P7 AD4 VSS[ 3
3] VSS[ 112
] AP32
BD5 VSS[ 19
4] VSS[294] R2 AD40 VSS[ 3
4] VSS[ 113
] AP38
BE22 VSS[ 19
5] VSS[295] R48 AD42 VSS[ 3
5] VSS[ 114
] AP4
BE26 VSS[ 19
6] VSS[296] T12 AD43 VSS[ 3
6] VSS[ 115
] AP42
BE40 VSS[ 19
7] VSS[297] T31 AD45 VSS[ 3
7] VSS[ 116
] AP46
BF10 VSS[ 19
8] VSS[298] T37 AD46 VSS[ 3
8] VSS[ 117
] AP8
BF12 VSS[ 19
9] VSS[299] T4 AD8 VSS[ 3
9] VSS[ 118
] AR2
BF16 VSS[ 20
0] VSS[300] W34 AE2 VSS[ 4
0] VSS[ 119
] AR48
BF20 VSS[ 20
1] VSS[301] T46 AE3 VSS[ 4
1] VSS[ 120
] AT1
1
BF22 VSS[ 20
2] VSS[302] T47 AF10 VSS[ 4
2] VSS[ 121
] AT1
3
BF24 VSS[ 20
3] VSS[303] T8 AF12 VSS[ 4
3] VSS[ 122
] AT1
8
BF26 VSS[ 20
4] VSS[304] V11 AD14 VSS[ 4
4] VSS[ 123
] AT2
2
BF28 VSS[ 20
5] VSS[305] V17 AD16 VSS[ 4
5] VSS[ 124
] AT2
6
BD3 VSS[ 20
6] VSS[306] V26 AF16 VSS[ 4
6] VSS[ 125
] AT2
8
BF30 VSS[ 20
7] VSS[307] V27 AF19 VSS[ 4
7] VSS[ 126
] AT3
0
BF38 VSS[ 20
8] VSS[308] V29 AF24 VSS[ 4
8] VSS[ 127
] AT3
2
BF40 VSS[ 20
9] VSS[309] V31 AF26 VSS[ 4
9] VSS[ 128
] AT3
4
BF8 VSS[ 21
0] VSS[310] V36 AF27 VSS[ 5
0] VSS[ 129
] AT3
9
BG17 VSS[ 21
1] VSS[311] V39 AF29 VSS[ 5
1] VSS[ 130
] AT4
2
BG21 VSS[ 21
2] VSS[312] V43 AF31 VSS[ 5
2] VSS[ 131
] AT4
6
BG33 VSS[ 21
3] VSS[313] V7 AF38 VSS[ 5
3] VSS[ 132
] AT7
BG44 VSS[ 21
4] VSS[314] W17 AF4 VSS[ 5
4] VSS[ 133
] AU24
BG8 VSS[ 21
5] VSS[315] W19 AF42 VSS[ 5
5] VSS[ 134
] AU30
BH11 VSS[ 21
6] VSS[316] W2 AF46 VSS[ 5
6] VSS[ 135
] AV16
BH15 VSS[ 21
7] VSS[317] W27 AF5 VSS[ 5
7] VSS[ 136
] AV20
BH17 VSS[ 21
8] VSS[318] W48 AF7 VSS[ 5
8] VSS[ 137
] AV24
BH19 VSS[ 21
9] VSS[319] Y12 AF8 VSS[ 5
9] VSS[ 138
] AV30
H10 VSS[ 22
0] VSS[320] Y38 AG19 VSS[ 6
0] VSS[ 139
] AV38
BH27 VSS[ 22
1] VSS[321] Y4 AG2 VSS[ 6
1] VSS[ 140
] AV4
BH31 VSS[ 22
2] VSS[322] Y42 AG31 VSS[ 6
2] VSS[ 141
] AV43
BH33 VSS[ 22
3] VSS[323] Y46 AG48 VSS[ 6
3] VSS[ 142
] AV8
BH35 VSS[ 22
4] VSS[324] Y8 AH11 VSS[ 6
4] VSS[ 143
] AW14
BH39 VSS[ 22
5] VSS[325] BG 29 AH3 VSS[ 6
5] VSS[ 144
] AW18
BH43 VSS[ 22
6] VSS[328] N24 AH36 VSS[ 6
6] VSS[ 145
] AW2
BH7 VSS[ 22
7] VSS[329] AJ3 AH39 VSS[ 6
7] VSS[ 146
] AW22
D3 VSS[ 22
8] VSS[330] AD47 AH40 VSS[ 6
8] VSS[ 147
] AW26
D12 VSS[ 22
9] VSS[331] B43 AH42 VSS[ 6
9] VSS[ 148
] AW28
D16 VSS[ 23
0] VSS[333] BE10 AH46 VSS[ 7
0] VSS[ 149
] AW32
D18 VSS[ 23
1] VSS[334] BG 41 AH7 VSS[ 7
1] VSS[ 150
] AW34
D22 VSS[ 23
2] VSS[335] G14 AJ19 VSS[ 7
2] VSS[ 151
] AW36
D24 VSS[ 23
3] VSS[337] H16 AJ21 VSS[ 7
3] VSS[ 152
] AW40
D26 VSS[ 23
4] VSS[338] T36 AJ24 VSS[ 7
4] VSS[ 153
] AW48
D30 VSS[ 23
5] VSS[340] BG 22 AJ33 VSS[ 7
5] VSS[ 154
] AV11
D32 VSS[ 23
6] VSS[342] BG 24 AJ34 VSS[ 7
6] VSS[ 155
] AY12
D34 VSS[ 23
7] VSS[343] C22 AK12 VSS[ 7
7] VSS[ 156
] AY22
D38 VSS[ 23
8] VSS[344] AP13 AK3 VSS[ 7
8] VSS[ 157
] AY28
D42 VSS[ 23
9] VSS[345] M14 VSS[ 7
9] VSS[ 158
]
D8 VSS[ 24
0] VSS[346] AP3 BD82HM65_MP
E18 VSS[ 24
1] VSS[347] AP1
E26 VSS[ 24
2] VSS[348] BE16
G18 VSS[ 24
3] VSS[349] BC16
G20 VSS[ 24
4] VSS[350] BG 28
G26 VSS[ 24
5] VSS[351] BJ28
G28 VSS[ 24
6] VSS[352]
G36 VSS[ 24
7]
G48 VSS[ 24
8]
H12 VSS[ 24
9]
H18 VSS[ 25
0]
H22 VSS[ 25
1]
H24 VSS[ 25
2]
H26 VSS[ 25
3]
H30 VSS[ 25
4]
H32 VSS[ 25
5]
H34 VSS[ 25
6]
F3 VSS[ 25
7]
VSS[ 25
8]
BD82HM65_MP
Schematic Diagrams
WLAN, 3G, Mini PCIE
3G/MSATA MINI CARD 3G POWER

FP CONN
+
C 5 75 2 2 0u _ 6 . 3V _ 6 . 3 *6 . 3* 4 . 2 GN D ? ? M S A TA f un c t io n ? P J4 3 SH O R T, ? ? ? ? ?
C 5 82 0. 1 u _ 16 V _ Y 5 V _ 04 P J4 3 OP E N _2 A
J _ 3 G1 60 mil s
W140HN ONLY 1 2
1 2
3 G_ 3 . 3 V 3 W AKE# 3. 3 V A U X_ 0 6 3G _ 3. 3 V 3 .3 V S _ F P 3 .3 V 3 G_ 3 . 3V
L1 8 3. 3 V S Q4 8
5 CO E X 1 1 . 5V _ 0 8 U I M_ P W R H C B 16 0 8 K F -12 1 T 25 A O 3 41 5
CO E X 2 U I M _P W R >48 mil >48 mil
10 U I M_ D A TA . S D
7 UIM _ DA T A 12 U I M_ C LK C4 4
11 C L K R E Q# U I M_ C L K 14 U I M_ R S T
C1 4 0 C 29 5 C 2 92
13 RE F CL K - UIM _ RE S E T 16 U I M_ V P P 0 . 1u _ 1 6V _ Y 5V _ 0 4 C7 4 4 C7 4 5
RE F CL K + U I M_ V P P
G
0 . 1u _ 1 6V _ Y 5V _ 0 4 9 1 u _1 0 V _ Y 5 V _ 06 0. 1 u _ 16 V _ Y 5 V _ 04 C7 4 3 1 u _6 . 3 V _ X5 R _0 4 R6 4 0
15 GN D 0 4 1 0u _ 1 0V _ Y 5 V _ 0 8 0 . 1 u_ 1 6V _Y 5V _ 0 4
GN D 1 GN D 5 GN D R 63 8 1 0_ 0 6
GN D J _ FP1
G ND KEY 1 0 K _ 04
1
3
GN D D
21
27 GN D 2 GN D 6
18
26
2
3
U S B _P N 6_ F P 1 4 2 2
U S B _P P 6 _ F P 1 4 2 2
Po rt 4 5
? ? ? ? ? J_ 3 G 1 R6 3 9 1 0 0K _ 0 4 G Q4 7 B
29 GN D 3
GN D 4
GN D 7
GN D 8
34
Port 2 4 S L 2N 70 0 2 D W 1 T 1G
4
40
6
34 3 G_ D E T # * 85 2 0 1-0 4 0 51 D
35 GN D 9 50
23 GN D 1 1 G ND1 0 J_FP1 2 G
1 8 S A T A _R X P 3 C7 7 8 0 . 0 1u _ 16 V _ X 7R _ 04 34 3 G_ P OW E R Q 47 A
C7 7 9 0 . 0 1u _ 16 V _ X 7R _ 04 25 PET n 0 20 4 1 S L 2 N 7 0 02 D W 1T 1 G
1 8 S A TA _ R XN 3 PET p 0 W _ DIS A B L E # 3 G_ E N 34
1
C7 8 0 0 . 0 1u _ 16 V _ X 7R _ 04 31 22 1108
1 8 S A TA _ T X N 3 33 P E R n0 P E RS E T # 30
C7 8 1 0 . 0 1u _ 16 V _ X 7R _ 04 From H8 default HI
1 8 S A T A _ T XP 3 P E R p0 S M B _ CL K 32
17 SM B_ DAT A 36
19 R e s e rv ed 0 U S B _D - 38 U S B _P N 2 22
37 R e s e rv ed 1 U S B _ D+ U S B _P P 2 22
GN D 39 GN D 1 2 24 6 0mi ls
60 mils
3G _3 . 3 V
41
43
3 .3 V A UX _ 3
3 .3 V A UX _ 4
3. 3 V A U X_ 1
1 . 5V _ 1
28
48
3G _3 . 3 V
CPU FAN CONTROL FOR AUDIO BOARD 5V
J_ C N 2
Sheet 27 of 49 C 6 11 C6 1 2
3 G_ E N R 6 44 *0 _ 04
45
47
49
GN D 1 3
R e s e rv ed 2
R e s e rv ed 3
1 . 5V _ 2
3. 3 V A U X_ 2
LE D _W W A N #
52
42
44 C 6 14
3G _3 . 3 V
5 VS U3 0
5V
J _C N 1 1
2
1 0u _ 10 V _ Y 5 V _ 08
0. 1 u _ 16 V _ Y 5 V _0 4 51 R e s e rv ed 4 L E D_ W L A N# 46 + FO N 1 8 1 3
WLAN, 3G, Mini G ND

GN D
R e s e rv ed 5
8 8 9 08 -5 20 4 M-0 1
LE D _ W P A N #
2 2 0u _ 6. 3 V _ 6 . 3* 6 . 3* 4. 2
C 39 6
5V S _ F A N
2
3
4
FO N
V IN
V O UT
VSET
G ND
G ND
G ND
G ND
7
6
5
D02
33
33
CHANGE
M I C 1 -L
M I C 1 -R
2
3
4
5
M I C 1 -L
4
5
6
7
20
JSW1
M I C 1 -R
PCIE G ND 0 . 1 u_ 1 6 V _Y 5 V _0 4 N C T 3 9 40 S -A
C P U _F A N 34 D02 CHANGE
33 H E A D P H ON E -R
33 H E A D P H ON E -L
3 3 JD _ S E N S E
S P K _H P #
6
7
8
AU DG
H E A D P H ON E -R
H E A D P H ON E -L
8
9
10
9 J D_ S E N S E 11
SPT 2 SPT4 S P T3 S P T1
VALUE 3 3 JD _ S E N S E _ B 10 SPK_ H P# 12
S M D 7 9X 1 3 8 S M D 7 9 X1 3 8 S MD 7 9 X 13 8 S MD 79 X 13 8 5 VS_ FAN C PU _F AN 33 S P K O U T R -_ R
33 S P K O U T R + _ R
11
12
J D_ S E N S E _ B 13
14
J _ F A N1 S P K O UT R-_ R
U S B _ P N 1_ C N 1 13 S P K O UT R+ _ R 15
1
1
D02 CHANGE 1 US B _ P P 1 _ CN1 14 G ND 16
1
2 15 17
1
1
C 39 9 S P D I F O _R U S B _ P N 1 _C N 2
DEL H10 (3G? ? ) 3 33 S P DIF O
L26
. F C M1 00 5 K F -1 2 1T 0 3
16 U S B _ P P 1_ C N 2 18
1 0 u_ 1 0 V _Y 5V _0 8 8 52 0 5 -03 7 01 87 2 13 -1 6 00 G S P D I F O_ R 19 NC1
20 NC2
C4 1 9
CO-lay *8 71 5 1 -20 0 7 G
34 C P U _ F A N S E N J_FAN1 DIF F USB8 P&N? ? ? ? 1 00 0 p _5 0 V _ X7 R _ 0 4
3
3 . 3V S R 5 42 4. 7 K _ 0 4
1 ?? ??? ?? ??
WLAN MINI CARD 22 U S B _ P N1 R5 3 7

R5 4 1
0 _0 4
*0 _ 04
AU DG
U S B _ P N 1 _C N 1
U S B _ P N 1 _C N 2
R5 4 6 0 _0 4 U S B _ P P 1_ C N 1
22 U SB_ PP1 R5 4 8 *0 _ 04 U S B _ P P 1_ C N 2
2 0 , 2 9, 3 0 P C I E _W A K E #
P C IE _ W A K E # 1
3
J_ MI N I 1
W AKE # 3 . 3V A U X _0
2
6
20 mil
20 mil
3 . 3V
SIM CONN U I M_ P W R
? ? M S AT A fu n c ti o n ? ? ? ? ? ? ?
R8 5 * 4. 7K _ 0 4 U I M_ D A T A
5 C OE X 1 1 . 5 V _0 8
C OE X 2 UIM _ P W R 10 V DD 3
R 62 9 1 0K _0 4 R6 2 8 *0 _ 04
3 . 3V 7 U I M_ D A T A 12 P C H _B T_ E N # 1 9 J _ S I M1
1 9 W L A N _ C L K R E Q# 11 C LK R E Q# U I M_ C L K 14 80 C LK 34
R6 5 5 1 0K _ 0 4
1 9 CL K _ P CIE _ M INI# 13 R E F CL K - U I M_ R E S E T 16 R8 9
1 9 C L K _ P C I E _M I N I R E F CL K + U I M_ V P P 3I N 1 34 (T OP VI EW)
9 9 8 *1 0 mi l _ sh o r t
15 G ND0 4 7 D E TE C T_ S W U I M _M C M D 6 U I M_ D U I M _D A T A
G ND1 G ND5 U I M_ C LK U I M _C 5 U I M_ D A T A U I M _I / O 4 U I M _V P P
U I M_ R S T R7 4 *1 0 mi l _ sh o rt 3 U I M_ C L K U I M_ V P P 2
U I M_ P W R 1 U I M_ R S T U I M_ GN D
KEY
G ND
GN D
GN G
GN D
U I M_ P W R C1 1 5 C1 1 4 C 1 27
21 18
27 G ND2 G ND6 26 9 17 1 2 -00 9 0P
*2 2 p _5 0 V _ N P O_ 0 4
*2 2 p_ 5 0 V _N P O_ 0 4
*2 2p _ 5 0V _ N P O_ 0 4
G ND 2
G ND3 G ND7
GN D 1
GN D 3
G ND4
29 34 C1 1 3 C7 7
G ND4 G ND8 40
35 G ND9 50 R4 1 3 0 . 1u _ 16 V _ Y 5 V _ 0 4 *2 2 p_ 5 0 V _N P O_ 0 4
3 4 W L A N _D E T # 23 G ND1 1 G N D 10 3. 3V S
*1 0 K _0 4
1 9 P C I E _ R X N 3_ W L A N 25 PETn 0 20 G ND
1 9 P C I E _ R X P 3 _W L A N 31 PETp 0 W _ D I S A B LE # 22 W L A N _E N 2 8, 3 4
GN D GN D
1 9 P C I E _ TX N 3_ W L A N 33 PER n 0 P E R S E T# 30 B U F _P LT _ R S T # 22 , 2 9 , 30 , 3 4
19 P C I E _T X P 3 _W L A N PER p 0 S MB _ C L K 32 3 . 3V
17 S MB _ D A T A 36 B T_ D E T# 3 4 Lay ou t?
31 , 3 4 BT_ EN R6 3 1 *0 _ 0 4 B T _ E N _ R 19
37
R es e rv e d0
R es e rv e d1
G ND1 2
U S B _ D-
US B _ D+
38
20 mil
U S B _P N 3 2 2
U S B _P P 3 2 2 Port 3 1. SI M? ? ? ? ? ? ? ? (1 0mi l)
2. ? ? ? ? ? ? ? ? G ND G ND
39 24 3. 3 V A U X_ 1 R4 1 2 0 _0 4 R3 8 2
3 .3 V 41 3 .3 V A UX _ 3 3 . 3V A U X _1 28 3 . 3V 3. SI M h ol d ? ? ? ? ? GN D? ?
3 .3 V A UX _ 4 1 . 5 V _1 40 mil
43 48 4 7K _ 0 4 4.S IM CO NN ? ? M INI C AR D C ON N
R 6 32 * 0_ 0 4 CL _ CL K _ 1 45 G ND1 3 1 . 5 V _2 52
19 C L_ C LK 1 R 6 33 * 0_ 0 4 CL _ DA T A _ 1 47 R es e rv e d2 3 . 3V A U X _2 42 3 .3 V
19 C L_ D A TA 1 R es e rv e d3 LE D _ W W A N # 20 mil
R 6 34 * 0_ 0 4 C L _ R S T # _1 49 44 B T _D E T #
19 C L_ R S T# 1 R 6 36 * 10 K _ 0 4 P C H _B T _ E N _ # 51 R es e rv e d4 L ED_ W L AN# 46 W LA N _ LE D # 31
3 . 3V R es e rv e d5 L ED_ W PAN#
C5 3 7
88 9 10 -5 2 04 M -01
11 , 1 8 , 24 , 2 5 , 28 , 3 1 , 32 , 3 3 , 35 , 3 9 , 40 , 4 1 5V S
* 18 0 p_ 5 0 V _N P O_ 0 4 2 5, 2 8 , 2 9, 3 5 , 3 7, 3 8 5 V
R 63 5 0 _0 4
3 1, 3 4 BT_ EN 1 8 , 2 8, 3 0 , 3 4, 3 5 , 3 6, 4 2 V D D 3
2 , 3, 8 , 1 1 , 12 , 1 6 , 18 , 1 9 , 20 , 2 2, 23 , 2 4, 2 5 , 2 8, 2 9 , 3 0, 3 3 , 3 5, 3 7 , 3 8, 3 9 3 . 3V
R 63 7 *0 _ 0 4
1 9 P C H _ B T _E N # 3, 9 , 1 0 , 11 , 1 2, 18 , 1 9, 20 , 2 1, 2 2 , 2 3, 2 4 , 2 5, 2 8 , 2 9, 3 0 , 3 1, 3 2 , 3 3, 3 4 , 3 5, 3 9 3 . 3V S
B - 28 WLAN, 3G, Mini PCIE
Schematic Diagrams
USB, Fan, TP, FP, Multi-Conn

USB Charge PORT CCD
V DD 5 U SB VCC 0 1 ? ?? ?? ?? ??
C 4 89 U S B _P N 0 R 43 5 0_ 0 4 U S B _ P N0 _ R 5V 1A 5 V _ CC D
17
* 10 u _ 10 V _ Y 5 V _ 0 8 U1 5 U S B _P P 0 R 43 6 0_ 0 4 USB _ P P0 _ R U 2
1 12 4 1 1A 48 mil
PPAD
IN O UT 5 VIN V OU T
2 11 U S B _P N 0 _R VIN
22 U S B _P N 0 C 3 49 C 14 C1 3 C1 0
D M_ O DM _ IN R 22 C1 2 C1 1
V DD3 3 10 U S B _P P 0 _ R * 0 . 1u _ 1 6V _ Y 5V _ 0 4 3 2
1 u _6 . 3 V _ Y 5 V _0 4
1 u _6 . 3 V _ Y 5V _0 4
22 U S B _P P 0 D P_ O D P_ IN EN G ND 1 0 0K _0 4 0. 1 u _ 16 V _ Y 5 V _ 0 4 1 u_ 6 . 3 V _Y 5 V _0 4 1u _ 6 . 3V _Y 5V _0 4
4 14 V DD3 3 .3 V G 5 24 3 A
I L I M _S E L GN D
V DD 5 R7 4 3 * 10 K _ 0 4 5 16 R 73 6 * 15 K _ 1 %_ 0 4
R 41 7 E N /DS C I L I M0
*1 0 K _ 0 4 3 4 , 35 , 3 6 D D _O N R7 3 7 * 10 K _ 0 4 6 15 R 73 8 * 10 K _ 0 4 R 7 39 R 74 2 J _ CCD 1
C TL 1 I L I M1 * 1 0K _ 0 4 1 0 K _0 4
1
R7 4 1 * 10 K _ 0 4 7 9
V DD 5
U S B _A C _ I N R 7 40 8
C TL 2 N C
13 G _O C # 0 1
34 CC D_ E N
Port 5 22
22
U S B _ P N5
USB _ P P5
2
3
34 U S B_ AC_ IN *1 0 K _0 4 R 4 37 *0 _ 04 U S B _ OC #0 1 2 2 From KBC default HI 34 CCD _ DE T #
C TL 3 F A U L T# 4
5
D
Q 25
* MT N 7 0 0 2Z H S 3 *T P S 2 54 0 U15 & AU2 ? ? ? ? ? To So uth Bridge OC P in. 8 5 20 5 -0 50 0 1
G
3 4, 4 2 A C _I N # M_PQFP16
S
3 .3 V CT L1 CT L2 CT L3: 0 X 1 --- -- > De dicat ed Ch ar ging Po t, Au to- de tec t

CT L1 CT L2 CT L3: 1 1 1- --- -> Ch arg ing Do wn str e am Por t , BC Sp ecif icatio n 1.1
CT L1 CT L2 CT L3: X 1 0 --- -- > Sta nda rd Do wn str e am Por t , USB 2.0 M od e
USB_AC_IN
R 39 6
U SB VCC 0 1
TPM 1.2 3 .3 VS
* 10 K _ 0 4
5V U6
G_ OC # 01 5 6 U2 4 C3 2 2 C 3 79 C 3 78 C 32 0
F L G# V O U T 1 26 10
MODEL FUNCTION 50 mil 2 7 18 , 3 4 L PC_ A D 0 23 L AD 0 V DD 1 19
C5 0 8 C 7 54 *0 . 1 u_ 1 6 V _Y 5 V _0 4 *0 . 1u _ 1 6V _Y 5V _0 4 * 0. 1u _ 16 V _ Y 5 V _ 0 4 * 1u _ 16 V _ X 5 R _ 06
AC/DC H Charge
C 11 2
1 0 u_ 1 0 V _ Y 5 V _ 08
3
V IN1
V IN2
VO UT 2
VO UT 3
8 0. 1 u _ 16 V _ Y 5 V _ 0 4 2 2 u _6 . 3 V _ X5 R _0 8
18 , 3 4
18 , 3 4
18 , 3 4
L PC_ A D
L PC_ A D
L PC_ A D
1
2
3
20
17
L AD
L AD
L AD
1
2
3
V DD 2
V DD 3
24
Sheet 28 of 49
4 1 21 3 .3 VS
TPM
Battery L Discharge E N#
R T 9 7 15 B G S
G ND
60 mil 1 8, 3 4
22 PCL K _ T PM
L P C _ F R A ME #
22
16
L C LK
L F R A ME # VS B
5 USB, Fan, TP, FP,
U S B V CC 0 1 3 5 ,3 8 D D _ ON # U S B _ V C C 0 1 _0 3 , 1 2, 2 2 P L T _R S T # 27 L R ESET #
L 13
.
1 8, 3 4
20
S E R IRQ
P M _C LK R U N #
15
28
S E RIRQ
C L K RU N#
6 T P M3 0 0 4
C3 2 3
*0 . 1 u _1 6 V _ Y 5 V _ 04 Multi-Conn
2 0 S 4 _ S TA T E # L P C P D# GP I O 2 T P M3 0 0 5
H C B 1 60 8 K F -1 21 T 2 5 + C 2 3 9 C 6 88 C 69 1 C1 7 7 TP M _ B A D D 9 GP I O 2
T ES T B I/B AD D 13 XTAL I
U S B V C C 01
100 MIL
5V
100 MIL
*1 0 0u _ 6. 3V _ B _ A 2 2 u _6 . 3 V _ X 5R _0 8 2 2 u _6 . 3 V _ X5 R _0 8 0. 1 u _ 16 V _ Y 5 V _ 0 4
Port 0 TP M _ P P 7
PP
XTAL I
14 XTAL O
X6
4
*3 2 . 7 68 K H z
1
T P M 30 0 1 1 X TA L O 3 2
J _ USB 1
L 14 1 T P M 30 0 2 3 N C_ 1 4
V+ T P M 30 0 3 12 N C_ 2 GN D_ 1 11
C 35 3 C 3 42 C 3 52 C 35 1 X5 *3 2 . 7 68 K H z
U S B _P N 0 _R 1 2 U S B _ P N_ 0 2 N C_ 3 GN D_ 2 18 4 1
D A TA _L 8 GN D_ 3 25 3 2
0 . 1 u _1 6 V _ Y 5 V _ 04 *2 2u _ 1 0V _ Y 5V _ 0 8 * 0. 1u _ 1 6V _ Y 5V _ 0 4 * 0. 1 u _ 16 V _ Y 5 V _ 0 4
U S B _P P 0_ R 4 3 U SB_ PP_ 0 3 T ESTI GN D_ 4 C 3 93 C 39 2
D A TA _H G ND3
W C M 2 01 2 F 2 S -16 1 T 03 4 GN D 3 G ND4
G ND 2
*S L B 9 63 5 T T * 1 8p _ 5 0V _ N P O_ 0 4 * 18 p _ 50 V _ N P O _ 04
GN D 1
G ND GN D 4
9/6 EMC DVT request

C 1 07 7 0 -10 4 A 3
Ass ert ed befor e ent ering S3
G ND1
GN D 2
? ? ? OK, PVT? ? short? P IN G N D3 ~ 4 = G N D
LPC res et ti ming:
3. 3 V S
LPCPD# inac tive to LRS T# inact ive 32~96us
HI: ACCESS TP M _ P P R2 5 8 * 10 K _ 0 4
TPM _PP R2 3 2 C 32 1
LOW: NORM AL ( I nte rnal PD)
CLICK CONN 5 VS
HI: 4 E/ 4F H
TPM _BADD LOW: 2E/ 2F H
TP M _ B A D D R2 5 9
R2 6 4
* 10 K _ 0 4
* 10 K _ 0 4
P CL K _ T P M
*3 3 _0 4
P C L K _ TP M 1
* 10 p _ 50 V _ N P O _ 04
5 VS
5V S
C2 8 9 C 2 86
D02 CHANGE
J _ TP 2
10 T P _ CL K J_ T P 1
0 . 1 u_ 1 6V _Y 5V _0 4
R1 9 1
1 0K _ 0 4
R 1 90
10 K _ 0 4
* 1 0u _ 10 V _ Y 5V _ 0 8 FOR POWER SWITCH BOARD D 32 * V 1 5A V LC 0 40 2
9 T P _ DA T A 3. 3 V S 1 2
8 1 T P _ CL K J _S W 1
7 2 T P _ DA T A T P _ CL K 34
T P _ DA T A 34 S MC _ B A T 3 4 , 42 R 39 9 * 1 K _0 4
6 3 T P B U TT O N _ L 1
5 U S B _ P N 4_ T P 2 4 T P B U TT O N _ R 2 S MD _ B A T 3 4 , 42
C2 9 0 C 2 88 M_ B T N # 3 5
4 U S B _ P P 4 _ TP 2 5 3
3 6 4 3 .3 VS
4 7p _ 50 V _ N P O_ 04 47 p _ 50 V _ N P O _ 04 W L A N _S W # 3 4
2 * 85 2 0 1-0 6 0 51 5 W LA N _ E N _ R R 78 * 0 _0 4
1 6
MU TE _S W # 3 4 R 79 0_04 W L A N _E N 2 7 , 34
8 5 20 1 -1 00 5 1 7
K20100125 8 L I D _ S W # 1 1, 3 4
K20100125 9 V D D3
For W150HNM For W140HN 10
11
C C D _S W # 3 4 W140HN R78
CSW1~2
?? ?? ?? ???
12 W150HNM R79
2 4 8 7 1 51 -1 2 07 G
LIFT 1 3
RIGHT
U S B _P N 4 _T P 2 R 6 6 0 0_04
U S B _P N 4 2 2
SW 2 KEY SW 3 KEY
U S B _P P 4_ T P 2 R 6 6 1 0_04 * TJ G-5 3 3 -S -T / R *T JG -5 33 -S -T / R
U S B _P P 4 2 2 1 2 1 2
3 4 TP B U T TO N _ L 3 4 T P B U T T ON _ R
35 , 3 6 V D D5
1 1 , 1 8, 2 4 , 2 5, 2 7 , 3 1, 3 2 , 3 3, 3 5 , 3 9, 4 0 , 4 1 5V S
2 5 , 27 , 2 9 , 35 , 3 7 , 3 8 5 V
5
6
5
6
1 8, 2 7 , 3 0, 3 4 , 3 5, 3 6 , 4 2 V D D 3
2 , 3, 8 , 1 1 , 12 , 1 6 , 18 , 1 9 , 20 , 2 2 , 2 3, 2 4 , 2 5, 2 7 , 2 9, 3 0 , 3 3, 3 5 , 3 7, 3 8 , 3 9 3. 3 V
3, 9 , 1 0 , 11 , 1 2 , 18 , 1 9 , 20 , 2 1 , 22 , 2 3 , 2 4, 2 5 , 2 7, 2 9 , 3 0, 3 1 , 3 2, 3 3 , 3 4, 3 5 , 3 9 3. 3 V S
USB, Fan, TP, FP, Multi-Conn B - 29
Schematic Diagrams
USB 3.0
1. 05
V_N EC
3. 3VA L40 21T253. 3V_NEC
HC B1
608KF- 1
.
C716 C723 C470
VLI VL8 01 U SB3.0 D02 CHANGE
10V_X5R_04
0V_X5R_04
V_X5R_04
3.3V_VI A V
VIIA
A_S
_SMD
MCA T
LK R404 *10K_0
4
For U SB3 .0 Leg ac y R337 *10K_0
4 3.3V_VIA
C509 3.3V_NEC USB3.0 NEC ROM 3. V
3_NEC
To PC H G PIO 13 VIA_SMI#
LOPW R EN#
R447
R481
*10K_0
4
*10K_0
4
0.1u_10
. 3V_NEC
3 R
R482 *10K
*10K_0
4
X5R_04
0.1u_1
C633 C756 C 75
7 C490 C755 C5
42 R44
6 *20
m_li P_04 RMTWKEN# 495 _0
4
. 1u_
3. V
3A NC 4 18 USB3.0_SMI #
0
C609 C 55
4 C472 C709 C674 C539 C425 C527 C 72
0 C549 C541 *0
. 1u_
16V_Y5V_04 *0.1u_16
V_Y 5
V_04 *0. 1
u_16V_Y5V_0
4 *0. 1u_
16V_Y5V_04 *0.1u_16
V_Y5V_04 *0.1u_16V_Y5V_
04 CHIPSET?? PULLHIGH GPA
OG
3CK R483 *10K_0
4
0.1u_10V_
R467 *NC_04 KBC _S PI_ *_R = 0. 1"~ 0.5 " R33
3 20, 2
7, 30 PCIE_WAKE# JT R439 *10K_0
4
512Kbit
4
u_16V_X7R_0
04
V_X7R_04
6V_X7R_04
16V_X7R_04
4
u_16V_X7R_0
6V_X7R_04
4
u_16V_X7R_0
04
V_X7R_04
6V_X7R_04
PEXCPPE#
R_
R_
10K_0
4 C717 C551 C553 C 46
2 0.1u_16V_
Y 5V_04 7K_04
4 R44
2 *4. 7K_0
4 G_OC_23# R445 *20mi _
l P_04 USB30_OC
0u_16V_X7
0u_16V_X7
3. V
3A 8 U37
04
6V_X7R_04
p_50V_NPO_04
USB_SPI_VDD _
1 5 USB_SPI_SI _R R389 47_04 USB_SPI _SI AL80
1_RST#
X5R _
VDD SI
0.01u_16
0.01u_16
AUXDET 3. 3V_VIA G_OC_14# R441 *10K_0
4
0.01u_1
0.01u_1
0.01u_1
2 3.3V_VI A
. 01u_
USB_SPI_SO_R R421 15_1%_04 USB_SPI_SO
0. 01
0. 01
0. 01
0.1u_10V_
C552 C499 SO 3.3V_VI A
0. 1
0. 1
D
R423 AS H3 W
1K_04 USB_FL CE# 1 USB_SPI_CE#_R R359 15_1%_04USB_SPI C
_ E#
0.01u_1
_16V_X7R_04
P#
10V_X5R_04
Q42 C 54
6 C758 C626 C 623 C519 C535 C5 31
G 6 USB_SPI_SCLK_R R360 04 USB_SPI S
_C LK
16V_Y5V_04
5
6, 20,34,35 SUSB# 47_
*MTN7002ZHS3
SCK *0
. 1u_
16V_Y5V_04 *0.1u_16
V_Y 5
V_04 *0. 1
u_16V_Y5V_0
4 *0. 1u_
16V_Y5V_04 *0.1u_16
V_Y5V_04 *0.1u_16V_Y5V_
04
65
64
62
61
60
59
58
57
55
54
52
51
50
49
48
47
45
R469 4.7K_04USB_HOLD#7 HOLD# VSS 4 6- 04- 255 12- B7 2
D10
13
VDD33 F14
VDD 3 G3
VDD33 L10
VDD33 L14
VDD 3 N 5
C67
C8
E11
12
VD D10 H11
K12
11
P13
3
6
5
6
3
5
6
4
F3
VDD33 G4
3
L1
N4
VDD33 N6
3 P3
C4
D10 C5
D10 D5
VDD10 C9
0 D8
VDD10 D9
VD D10 E3
VDD10 E4
H3
VDD10 H4
D10 L8
D7
VDD10 C
VD D10 E
VDD10 K
VD D33 F
9
L
0 5
VDD10 L
PEXC PPE#
U3
9 MX25L51
2MC 1
- 2G 6- 04- 255 12- 47 1
SMCLK
0. 01u
. 1u_
S3
PEXRST#
S MI#
LOPWREN#
RMTWKEN#
O33
USBH OC1#
U SBHOC3#
USBH OC4#
USBHPE1#
VSUS33
VDD
UDD
TESTEN
VDD
UPS
JTAGCK
SMDAT
AKE#
#
USBHOC 2
0. 1u_
VDD33
VDD33
VDD33
VDD33
D33
DD10
DD10
D10
1
0
VDD 1
VDD 1
DD10
U3AVDD33
U2AVDD33
VSG
VSV
0
DD
DD
PEXW
VD
VD
VD
VD
VD
1.05VS_VL80
1
V
19 CLK_PCI EU
_ SB3
0_NEC B2
B1 PECLKP B6 SSTX_
2NEC 67 44
19 CLK_PCIE _
U SB3
0#_NEC
19 PCI E_RXP2_USB30
_N EC C3
26 0. 1
u_10V_X5
R_04 D1
D
PECLKN
2 PETP
X
U3TXDP2
U3TXDN2 A
N6
8 SSTX#
2_NEC USB3.0 NEC core power 1.05V C636 C657 C 76
0 C761 C762 C7
63 68
69
70
V
SD
SD
X
SSX
T1+
T1-
VH
USBSUPE
USBH PE3
S2
3
#
#
43
42
41
USB_ON1#
C7
05 0. 1
u_10V_X5
R_04 U2DM2_NEC *0
. 1u_
16V_Y5V_04 *0.1u_16
V_Y 5
V_04 *0. 1
u_16V_Y5V_0
4 *0. 1u_
16V_Y5V_04 *0.1u_16
V_Y5V_04 *0.1u_16V_Y5V_
04
19 PCI E_RXN2_USB30_
19 PCI ET
N EC
_XP2_USB30_NEC
F2
PETN
X
F1 PERXP
U2DM2
P8
U2DP2 B8
U2DP2_NEC USB3.0 VIA core power 1.05VS_VIA 1. 0
5VS_VE801 71
72
73
V
SC
SCRA
X10S
SSRX1
+ SRX1
1
-
USBHSP PS
IEO
SPI SI
4
# 40
39
38
SPISO
SPISI
19 PCI ET
_XN2_USB30_NEC PERXN U3RXDP2 SSRX2_NEC 74 VCCA33SS1 SPISCLK 37 SP
SPIIS
SC
CKL#
S
U3RXDN2 A8 SSRX2#_
N EC FOR VIA ? ? ? ? P IN6 ? <2m m 1. 0
5VS_VE 75 U
US
SBBH
HP
P1+
1-
U 38 SPCIVSD#
D 36
H2 1. 5V 5V 55
L TXP0_VA
I 76
77 VCCA33SS1 *V L 80 1_ Q N F8 8 _A 1 VCCA33PEXT X 35
34 GPCI E_RXN1_USB3_RC759
22, 7
2, 30
, 34 BUF_PLT_RS #
T 3. V
3S 5V FOR VIA *0.1u_10V_
X7R_04 PCIE_RXN1_USB30_VLI 19
20,27, 3
0 PC IE_WAK E# R4
R3
68
43
4 PEWAKE K1
0_0
0_0
4 K2
P
PE
ER
WSK
ATB
EB G14 USB30_OC
2A C471 . 1.05VS_VE801 TXN0_VI A 78
79
SSX
SSXT
T2+
2- VL80 0 4PORT P
PE
EX
XT TXX0-
0
+ 33
32
GPCI E_RXP1_USB3_RC635 *0.1u_10V_
X7R_04 PCIE_RXP1_USB30_VLI 19
19 USB30_CLKREQ#_NEC PECREQB OCI 2B H13 1. 05
V 1.05VS_VIA *HC B1 80 VCCA10SSRX2 VCC A3PEXM 31
AUXDE T R 4
26 0_0
4 AU D
X ET
_R J2 OCI 1B R77
5 R345 5 U36 6 1u
_10V_Y5V_06 608KF- 1
21T25 C764 C 765 C766 C767 C7 68 R
RXP
N0_V
X _VII A
0 A 81 SSRX2+ VL80 1 2PORT PEXRX0- 30 PCI E_T
XN1_USB30_VLI 19
3.3V R408 10K_
04 J1 AUXDET
PSEL PPON2 H14 PPON 9 VVIN
IN
VCNTL 3A PJ45 *0.1u_16
V_Y 5
V_04 *0. 1
u_16V_Y5V_0
4 *0. 1u_
16V_Y5V_04 *0.1u_16
V_Y5V_04 *0.1u_16V_Y5V_
04 82 SSRX2-
VCCA33SS2
PEXRX0
VCC A33
PEXRX
+ 29 PCI E_T
XP1_USB30_VLI 19
H1 PPON1 J14 *10K_04 10K_04 7 POK VOUT 4 1 2 G_
D P0_
VI IA
A 83 28
3.3V_NEC
18 USB3.0_SMI # SMIB G_
DM 0_V 84 USBHP2+ 6-03- 00801 -031 PEXCLK- 27 C
CLK
LK_P
_PC
CIE
IE_U
_USB30_V
SB30#_V
LILI19
19
P5 8 VOUT 3 OPEN _
2A 85
86
USC
VC BA
H33S
P2- S2 VCCA PEX
3R C
EG1 K
L+
2 26
25 PEXREXT R438 *3.01K_1%
_04
PONRSTB B10 SSTX_
1NEC EN SSXI 87 VCCA10SSM PEXR EX T 24
C707
U3TXDP1 1 GND VFB 2 R 39
0 75
0_1%_04 C548 C704 0.1u_16V_Y5V_
04 SSXO 88 SS
SO
IX
X VCCA 3REV G2D5 23
VC CA10SSRX3
VC CA10SSRX4
C
USB_SPI S_C LK M2 A10 SSTX#
1_NEC C72
5 S D
V CCA33SS3
V CCA33SS4
TSSM
N2 SPS
ICK U3TXDN1 N10 3. 3
VS V
_L801
A33SS3
VCCA33SS4
D18 R349 U
US
SB
B_S
_SP
PII C
_
_I E# N1 SPC
S IS B U2DM1 U2DM1_NEC u_6.3V_Y5V_04
1 AX 6615 C 71
8 6V_X7R_04 *10
0.022u_1 U_10V_0810u_1
0V_Y5V_08 R411
*1
M_04 3. V
3S_VL801
VSUSUSB
+
X33
USBH P3
USBH P4
USBHP3-
USBHP4-
SSTX3+
SSRX3+
SSTX4+
SSRX4+
SSTX3-
SSRX3-
SSTX4-
SSRX4-
RB751V 680K_1
%_0
4 USB_SPI S_O M1 S SP
PS
II IO U2DP1 P10 U2DP1_NEC
REA
NCD
S 1. 5
0VS_VL801
CC
A
U3RXDP1 B12 SSRX1_NEC (15nF~48nF)
VC
VS
G1
G
C42
7 C769 C770 C 771 C772 C773 GND X17
S
C429 K13
uPD72 0200 U3RXDN1 A12 SSRX1#_
N EC
0u_10V_Y5V_
1 08
C72
1 R405
*0
. 1u_
16V_Y5V_04 *0.1u_16
V_Y 5
V_04 *0. 1
u_16V_Y5V_0
4 *0. 1u_
16V_Y5V_04 *0.1u_16
V_Y5V_04
2 1
1
2
3
4
5
6
7
8
9
10
12
13
15
16
17
18
19
20
22
G1
K14 GND 3 4 G ND
4
1
1
2
1u_25
V_08 J13 GND . 1u_
0 16V_Y5V_04 2.4K_1%_04 *X8A02500
0FG1H _
25MHz
P4 GND
GND P12 2 1
AU D
X ET_
R R398 *0_04 R REF N12 R424 1. 6
K1_%_
04
U2AVSS C297 X9 C32
7
C14 N11 *X8A025
000FG1H_25MHz
GND U2PVSS *20p_5
0V_NPO 0
_4 *20p_5
0V_NPO 0
_4
VSUSUSB
SSR EXT
D6
Sheet 29 of 49 USB3.0 VLI ROM

USB30
_XT1 N14 XT U3AVSS 3.3VS_VI A
D02 CHANGE M14 1
DEL XT
2 C700 *N C_04
R471
P6 CSEL
P14
U GND USB3.0 Port R 44
0 6
* . 04
K_1% _04
Q34
GN D P11 TXP1_VA I *AO3415
100_0
4 GN D P9 ? ?? ? C747 22u_6.3V_X5R_08 3.3VS_VL801 TXN1_VIA
S
GN D P7 GND
USB 3.0 2X
7 *24M
1 HZ A2
A1 GND GN D P2 RXP1_VI A G R665
A3 GN
ND
D GN
NDD P1 C752 22u_6.3V_X5R_08 GND 8 UV48 5 SPISI RXN 1 _VI A *0_0
4
G G DD SI
D
A
A4
5 GND GN D N13
N9 USBVC C3.0 L24 HC B16
08KF- 2
11T25 C498 0. 1u_
16V_Y5V_04 GND 2
D02 CHANGE 8
X 24
. 000
M Hz/ 16pF/ + 0
3ppm R443 SPISO G_D P1
_VI A
+
2 1 A7 GND GN D N7 C525 *220u_6. 3V_
6. 3*6. 3*4. 2GND *10K_0
4 SO G_D M1_
VI A 3.3V_VIA
A9 GND GN D N3 3 1 SPISCS#
A13
11 GND GN D M13 CLOS E TO C ONNEC TOR WP# C E#
A GND GN D M12 U2DM1_NEC J_USB3 6 SPISCLK
R 54
3 0_04
5
C423 C422 A14 G
GN
ND
D GN
GNDD M11 G_DM0_VI A R 27
1 *0_
04 G_DM0 SC K
B
B3 M10 U2DP1_NEC R 544 0_04 XP1
T C524 0
. 1u_
10V_X7R_04 X
TP1_R 9
1 SSTX+ SHI ELD GND1 7 H OLD# VS S 4 PEXCPPE# 1 3. V
3S_VL801
Standard-A
4 GND GN D M9 4 R496
_4
_4
G_DP0_VIA R 273 *0_

04 G_DP0 *10
K_04
0V_NPO 0
0V_NPO 0
B5 GN
GND
D GN
GNDD M8 U2DM2_NEC R 646 0_04 XN1
T C520 0
. 1u_
10V_X7R_04 T
XN1_R VBUS
8 S *MX25L51 2MC -12G 2
B7 M7 G_DM1_VI A R 27
6 *0_
04 G_DM1 G_DM1 1 2 2 STX- 6 -0 4-2 5512- B 72 23 OC PPE# U11
B9 GND GN D M6 U 4 D- 1.05VS_VI A
G2D
_DP
P2_N
1_VIE
AC R 64
7 0_04 *W CM20 1
G2F
_D2S
P1-161T03-short 4 3 L6
3 *MC74VHC1G08DFT2G
3
B11 GND GN D M5 G_DP1 3 GND
R 28
1 *0_
04
20p_5
20p_5
B13 G
GN
ND
D G
GN
NDD M4 RXP1 1 2 DS
6 S+RX+
B14
C1 GND M3
GN D L12 SSTX1_
N EC R 65 *W CM20 12F2S
RXN1 -161T03-short 4 3 L6
4 7 GND_D
5 GND2
1 0_04 D31 *C DBU003
40 Q35
C2 G
GN
ND
D G
GN
NDD L11 TXP_
0VI A R 45
3 *0_
04 TXP0 Di f .f t race90oh m SSRX- SHI ELD 34VI A_RST# C A *AO3415
C3 L7 SSTX1#
_NEC R 65 2 0_04
S
C10 GND GN D L6 TS
XT
N0_V G
C11 GND GN D S NIAEC R
X2_ 45
5
R 65
3 *0_
04
0_04 TXN0 GND UEA111R
6 -21 C- C141
-B 4A1 F8
0-1 H GND
- 09 22,27, 3
0, 34BU F_PT
L_RST# R456 *100K_
04 AL801_
R ST
# R666
USB3.0 POWER SETTING
C12 GND
D11 GND
NDD
E14 GND
F7 GND
NDD
GNDD
G9 GND
NDD
NDD
J4 GND
9 GNDD
NDD
GNDD
GND
D 3 GND
D4 GND
1 GND
D13 GND
2 GND
E13 GND
F4 GND
ND
F8 GND
F9 GND
11 GND
G2 GN
G67 GND
G8 GND
G 1 GND
G12 GND
6 GND
9 GND
J3 GND
J6 GND
J7 GND
J8 GND
3 GND
L1 GN
L2 GND
L4 GND
GND
TXP_
1VI A R 45
7 *0_
04 TXP1 C692 22u_6.3V_X5R_08 *0_0
4
GN
GN
GN
GN
GN
GND
D14 G
F6 G
F11 G
G13 G
H8 G
G
J12 G
D
S
. 3V
3 S
TS
XTX2#
_IA
N1_V NEC R 662 0_04 TXN1 G PEX
C PPE#
?? ? ? R 45
8 *0_
04 C746 22u_6.3V_X5R_08 GND
Q14 C577 *1u_10
V_Y5V_06
C13
D2
E1
H7
1
HH2
J11
K4
L3
FG
H
E
K
2
J
R283 uPD72020
0 SSRX1_NEC R 66 8 0_04 L25 HC B16
08KF- 2
11T25 C395 0. 1u_
16V_Y5V_04 *AO3415
RXP0_VIA RXP0 USBVCC 3
.0 GND
D
R 66
45
9 *0_
04 R454 *1
00K_04 3. 3V_
VI A
+
10K_04 SSRX1#_NEC R 9 0_04 C538 *220u_6. 3V_
6. 3*6. 3*4. 2 3. 3
V 3.3V_NEC 3.3VS 3.3VS_VIA
RXN0_VIA R 46
2 *0_
04 RXN0 GND
CLOS E TO C ONNEC TOR 8/ 19 1 PJ3
42 1 PJ39 2
USB30_
OC S
RS
XR
PX2_NIAEC R
R 46
67
0 0_04
.
1_V 3 *0_
04 RXP1 J_USB2 L54
SSRX2#_NEC R 671 0_04 OPEN_2A O PEN_2
A *HCB1608
KF- 121
T25
V
5 RXN1_VIA R 46
4 *0_
04 RXN1 XP0
T C420 0
. 1u_
10V_X7R_04 X
TP0_R 9 GND1 3.3V_VI A 1.05VS
Standard-A
3. 3V USBVCC 3
.0 1 SSTX+ SHI ELD 1.05VS_VIA
U26 50 M IL XN0
T C421 0
. 1u_
10V_X7R_04 T
XN0_R 8 VBUS 1 PJ3
52 PJ36
5 FLG# VO UT1 6 ? ? ?? ? ? ? G_DM0 4 3 2 SSTX- 1 2 1.05VS_VE 1. 05
VS V
_L801
4 D-
R374 C373 2 VI N1 VO UT2 7 C377 C358 C356 R540 *W
CM20
1
G2F
_D2S
P0-161T03-short 1 2 L6
5 3 G OPEN_2A
+ DN
+D O PEN_2
A PEXCPPE# R444 *20mi _
l P_0
4 I CPPE# 23,34
10u_10
V_Y5V_08 3 8 RXP0 4 3 6
7 SSRX+ 1. 0
5V 1.05V_NEC
4
_16V_Y5V_0
V_Y5V_04
* 6.3*4.2
0K_04
*10
K_04 *W
CM20
12F2S-161T03-short L6
6 PJ3
7
VI N2 VO UT3 PR122 *15mli _
shor t RXN0 1 2 5 GND_D GND2 1 2 1.0 5VS 3 .3V S 3 .3V
USB_ON1# 4 1 SSRX- SHI ELD
10
EN# GND
V_6. 3
Di f .f t race90oh m
D
OPEN_2A
*0.1u_16
Q38 R347 RT9715BGS UG ND GND C19007-

6 -21 -B94A1
090 L 09 GND
5- 0-0 S3 O FF O FF ON
0. 1u
u_6. 3
25, 27,28,35, 7
3, 38 V5
PPON G 6 -21 -B 4A0 0-0 09 6,18,19, 0
2, 24 , 25,35,37, 8
3, 39 1. 05VS
*2N700
2W 0_
04
S
220
V IA EN# R 347 ? ? ? 2, ,38,1

3,9, 10, 11,11,
2,1
12,
8, 16
,, 18,
19 20,1
29,
1,2
20,
2, 2
2,, 23
3 ,, 24,
24 25,2
25,
7,2
27,
8, 8
2
3,, 30
0 ,, 33,
31 32,3
35,
3,3
37,
4, 8
3
3,, 39
5 39 3
.3
. 3V
3VS
, 6,8, 9
3 , 10,25,35, 73, 38 1 . 5V
B - 30 USB 3.0
Schematic Diagrams
Card Reader (JMC251C)

S D_ CL K
JMC251 C C 2 65 near Pin#41

Sw it ch in g Reg ul at or
cl os e to P IN3 3
* 1 0p _ 5 0V _ N P O_ 0 6 DV D D 3 . 3V _L A N
3 .3 VS L16
SD_ CL K R1 6 2 0 _ 04 ( >2 0m il )
R E G LX . DV D D
R 18 5 *4 . 7 K _0 4 S D_ CD # ( >2 0m il)
R 18 4 *4 . 7 K _0 4 M S _ INS # S D XC _ P OW E R S W F 2 5 2 0C F -4 R 7 M- M C2 7 4 C2 7 3
R 1 93 R 19 4
S D X C _ P OW E R
V CC _ CA R D
I S O N _ 2 5 1C
C 2 63 10 u _ 6. 3 V _ X 5 R _ 0 6 0 . 1u _ 1 6V _ Y 5V _0 4
L A N _L E D 0
F or J MC 25 1C/ 26 1 on ly
L AN_ L ED1
3 . 3 V _ LA N
U1 7
SD _ CL K _ C
C2 6 1 Pin#33 Pin#33 *4 . 7K _0 4 *4 . 7 K _ 0 4
M D I O 11
R E GL X
S D_ W P 8 7
S D _ D3
S D_ D 2
S D _ D1
S D_ D 0
S D_ B S
R1 8 1 1 K_ 0 4 * 0 . 1u _ 1 6V _ Y 5V _0 4 2. 2 u _ 6. 3 V _ X 5 R _ 0 6
D V DD
V CC WP
V D D3 3 .3 V L AN_ SC L 6
3 . 3V _L A N L AN_ SD A 5 S CL 1
S DA A0 2
R1 7 8 4 . 7 K _ 04 M S _ INS # 4 A1 3
48
47
46
45
44
43
42
41
40
39
37
35
33
GN D A2
38
36
34
U 12
R1 8 2 R1 8 3 * A T2 4 C 0 2 B N
M D I O1 1
L A N _L E D 1
G ND
G ND
LX
FB1 2
LA N _ L E D 0
M DIO 5
M D I O4
M DIO 3
M D I O2
M DIO 1
M D I O0
V DD IO
V D DO
I S ON
Card Reader Pull High/Low *1 5 m li _ s ho rt _ 0 6 *0 _ 06
Resistors (> 20 mi l)
MD I O1 0 49 32 V D DR E G
MD I O9 50 MD I O1 0 V D DR E G 31
MD I O9 V C C3 V 3. 3 V S (> 20 mi l)
MD I O8 51 30
52 MD I O8 P W RC R 29 V C C _C A R D
DVD D R 14 7 * 15 m i _l s h ort _ 0 6 A V D D 1 2_ 5 2
53 VDD T EST 28 MP D
32 LA N _ MD I P 0 54 VIP _ 1 M PD 27 P ME #
R 14 6 * 15 m i _l s h ort _ 0 6 3 2 LA N _ MD I N 0 A V D D 1 2_ 5 5 55 VIN_ 1 W AK EN 26 LA N _ S C L
DVD D 56 A V DD 1 2 L A N_ L E D2 25 3. 3 V S V D D 3
LA N _ S D A
32
32
LA N _ MD I P 1
LA N _ MD I N 1
57
58
VIP _ 2
VIN_ 2
JMC251 C C R_ L E D
R ST N
24
23 CPP EN
B U F _ P L T_ R S T# 2 2 , 2 7, 2 9 , 3 4
59 GN D CP P E N 22
3. 3 V _ L A N 60 A V DD 3 3 GN D 21
LA N _ MD I P 2 MP D R1 9 5 1 0 K _ 04
32 LA N _ MD I P 2 LA N _ MD I N 2 61 VIP _ 3 (LQFP 64 ) V DD IO 20 S D_ W P 3. 3 V _ L A N
32 LA N _ MD I N 2 62 VIN_ 3 MD I O6 19
R 14 5 * 15 m i _l s h ort _ 0 6 A V D D 1 2_ 6 2 MD I O1 2 R1 9 6 * 4. 7 K _ 0 4
DVD D
32 LA N _ MD I P 3
LA N _ MD I P 3 63
64
A V DD 1 2
VIP _ 4
6-03-02510-0P0 M D I O 12
M D I O 14
18
17
MD I O1 4
Core power 1.2V
LA N _ MD I N 3 S D_ CD # C 28 3 0. 1 u _ 16 V _ Y 5V _ 0 4
32 LA N _ MD I N 3 VIN_ 4 C R_ CD 0 N
C R_ CD 1 N
V DD 3 3. 3V
? ? ? ? PIN6? <2mm
AV D D3 3
A V DD 1 2
A V DD 1 2
M D I O1 3
M DIO 7
V D D3
Sheet 30 of 49
C LK P
XO UT
CL K N
RE X T
G ND
R XP
TX P
RX N
TXN
XIN
R 4 78
V DD 3 3 .3 V S C7 1 4 * 0_ 0 6 R2 0 9
( >20 mi l) (> 20 mi l) J M C 2 5 1-L G B Z 0 C V D D3 *1 u _ 6. 3 V _ X 5 R _ 04 *0 _ 0 6
Card Reader
1
2
3
4
5
6
7
* 15 m i _l s h ort _ 0 6 8
9
10
11
A V DD1 2 _ 1 3 1 3
15
12
* 15 m i _l s h ort _ 0 6 14
16
P CI e Dif fe re nt ia l U 33
I S O N _ 2 5 1C R1 5 1 0 _0 4 6 5 IN_ C
RE X T _ C P ai rs = 10 0 Oh m V CN T L VIN 9
C2 9 9 C2 9 6 C 28 7 C 2 85
A V DD1 2 _ 7
1A
CR _ CD1 N
L A NX O UT
R1 5 6 * 10 0 K _ 0 4 D V DD 4 VIN 7
L A N X IN
V OU T P OK
(JMC251C)
M D I O7
10 u _ 6. 3 V _ X 5 R _ 06 0 . 1 u_ 1 6 V _ Y 5 V _ 04 1 0 u _6 . 3 V _ X5 R _0 6 0 . 1 u _1 6 V _ Y 5 V _ 0 4
Pin#32 Pin#32 Pin#31 Pin#31 3
V OU T 8
R 15 4 R 4 80 *1 . 2 7 K _ 1% _ 0 4
EN
1 2 K _1 % _ 04 2 1
3 .3 V_ L AN 3 .3 V V DD 3 VFB G ND
R1 6 9 C7 2 2
R1 7 0
A V D D1 2 _ 7 A V D D 1 2 _ 13 R 14 8 *0 _ 06 * 8 2p _ 5 0V _ N P O_ 0 4 R 47 9 *AX6615 C 7 26
3 . 3V _L A N *2 . 4 9 K _1 % _ 04 * 1 u_ 6 . 3 V _X 5 R _ 0 4
R1 7 6 * 0 _0 4 R 16 4 *0 _ 06
D V DD
D V DD
C2 6 6 C2 7 5 R1 7 7 0_04 MS _ I N S #
3 . 3 V _L A N
0. 1 u _ 16 V _ Y 5 V _ 0 4 0. 1 u _ 1 6V _ Y 5V _ 0 4 P C I E _R X P _4 _ GL A N C 2 7 2 0 . 1 u _1 0 V _ X 7R _ 04 P C I E _ R X P 4 _ GL A N 1 9
Pin#7 Pin#13 P C I E _R X N _ 4 _G L A N C 2 7 0 0 . 1 u _1 0 V _ X 7R _ 04
P C I E _ R XN 4_ G LA N 1 9
R 18 0
1 0 K _ 04
D9
A V D D 1 2 _ 52 A V D D 1 2 _ 55 A V DD1 2 _ 6 2 A V D D 1 2 _7
P C I E _ TX N 4 _ GL A N 1 9 A C
P C I E _ T X P 4 _G LA N 1 9 2 0, 2 7 , 2 9 P C I E _ W A K E # P ME # 2 2 ,3 4
C L K _ P C I E _ GL A N 1 9
C L K _ P C I E _ G LA N # 1 9 C D B U 0 0 3 40
C2 5 6 C2 5 5 C2 5 3 C 2 71
L A N X OU T
0. 1 u _ 16 V _ Y 5 V _ 0 4 0. 1 u _ 1 6V _ Y 5V _ 0 4 0 . 1u _ 1 6V _ Y 5V _0 4 * 1 0u _ 6 . 3V _ X 5 R _ 0 6
Pin#52 Pin#55 Pin#62 Pin#7 D02 CHANGE 4 IN 1 SOCKET SD/MMC/MS/MS Pro
Reserved R 16 1 *1 M_ 0 4 L A NX IN
DEL
X1 F S X -8 L _2 5 MH z Card Reader J _ C A R D -R E V 1
1 2 S D_ C D# P1
3 .3 V _ L A N V C C_ CA R D
Fo r JM C25 1 C Power S D_ D 2 P2 CD _ S D
S D_ D 3 P3 DA T 2 _ S D
FSX8L_25MHz? ? ? ? ?
X2 V C C_ CA R D S D_ B S P4 CD /DAT 3 _ S D
P5 CM D_ SD
C2 8 2 C 25 2 C2 8 4 C2 9 3 4 3 P6 VSS_ SD
3. 3 V _ L A N V CC _ CA R D P7 V DD _ SD
S D _ C LK
0. 1 u _ 16 V _ Y 5 V _ 0 4 * 0. 1 u _ 10 V _ Y 5 V _ 0 4 0 . 1u _ 1 6V _ Y 5V _0 4 0 . 1u _ 1 6V _Y 5 V _0 4 1 2 C7 1 2 P8 CL K_ SD
Pin#43 Pin#43 *H S X 3 21 S _ 2 5M H Z C 28 1 C2 5 7 S D_ D 0 P9 VSS_ SD
0 . 1u _ 1 6 V _Y 5 V _0 4 S D_ D 1 P1 0 DA T 0 _ S D
C2 6 4 * 0 . 1u _ 1 6V _ Y 5V _0 4 * 1 0u _ 6 . 3V _X 5 R _ 0 6 R6 0 0 C2 6 2 S D_ W P P1 1 DA T 1 _ S D
C 26 0 W P_ SD
75 _ 0 4 1 0u _ 6 . 3V _ X 5 R _ 0 6 P1 2
Pin#2 Pin#2 P1 3 V S S _ MS
2 2p _ 5 0V _ N P O_ 0 4 2 2 p_ 5 0 V _ N P O _0 4 V CC _ CA R D V C C _ MS
3 .3 V _ L A N S D _ C LK P1 4
C5 4 4 S D_ D 3 P1 5 S CL K _ M S
MS _ I N S # P1 6 D A T 3 _ MS
0 . 1u _ 1 6 V _Y 5 V _0 4 S D_ D 2 P1 7 I N S _M S
S D_ D 0 P1 8 D A T 2 _ MS
C2 4 9 C2 5 4 C2 5 9 C 2 58 6-2 2- 25 R0 0- 1B4
S D_ D 1 P1 9 S D I O/ D A T0 _ MS
6-2 2- 25 R0 0- 1B5 V C C _C A R D S D_ B S P2 0 D A T 1 _ MS P2 2
10 u _ 6. 3 V _ X 5 R _ 06 0. 1 u _ 1 6V _ Y 5V _ 0 4 0 . 1u _ 1 6V _ Y 5V _0 4 0 . 1 u _1 6 V _ Y 5 V _ 0 4
Pin#59 Pin#59 Pin#2 Pin#21 P2 1 B S _ MS GN D P2 3
V S S _ MS GN D
Reserved
Crystal 8045 & 3225 Co-lay C 7 13 C 5 45
M D R 01 9 -C 0 -1 0 42
0 . 1 u _1 6 V _ Y 5 V _ 0 4 *4 . 7u _ 6 . 3 V _X 5 R _ 0 6
Place a ll capac itors clo sed t o chip.
The subscript in each CAP incic ates t he p in
number of JM C25 1/JMC261 t hat sho uld be
Near Cardreader CONN 2 5 , 2 7, 2 8 , 2 9 , 35 , 3 7 , 38 5 V
closed to . 32 DVD D
1 8 , 2 7, 28 , 3 4 , 35 , 3 6 , 4 2 V D D 3
2, 3 , 8 , 1 1 , 12 , 1 6 , 1 8, 1 9 , 2 0, 2 2 , 2 3 , 24 , 2 5 , 27 , 2 8 , 2 9, 3 3 , 3 5 , 37 , 3 8 , 39 3 . 3 V
3 , 9 , 1 0, 11 , 1 2 , 18 , 1 9 , 2 0, 2 1 , 2 2, 2 3 , 2 4 , 25 , 2 7 , 28 , 2 9 , 3 1, 3 2 , 3 3 , 34 , 3 5 , 39 3 . 3 V S
Card Reader (JMC251C) B - 31
Schematic Diagrams
SATA ODD, LED, Hotkey, LID SW
SATA ODD W140XX ONLY Zero Power ODD

5 VS 3 .3 VS
J _ OD D 1 ? ? ? ? ? J_ODD1 Z e ro_ V I N R 17 9 *1 5 m li _ s ho rt _ 0 6
W140XX ONLY
S1
S2 C7 7 4 *0 . 0 1 u_ 1 6V _X 7 R _ 0 4 C 2 80
S3 S A TA _T X P 4 _1 4 1 8
C7 7 5 *0 . 0 1 u_ 1 6V _X 7 R _ 0 4 S A TA _T X N 4 _ 14 1 8 C2 7 9 R1 2 R1 6
S4
S5 C7 7 6 *0 . 0 1 u_ 1 6V _X 7 R _ 0 4 *0 . 0 1 u_ 5 0V _ X 7 R _ 0 4 SW 1 2 20 _ 0 4 2 20 _ 04
0 . 1u _ 1 6V _ Y 5 V _ 04
S6 S A TA _R XN 4 _1 4 1 8
C7 7 7 *0 . 0 1 u_ 1 6V _X 7 R _ 0 4 *T JG -5 33 -S -T / R
S7 S A TA _R XP 4_ 1 4 18 U1 3 1 2
1 4 3 4
3
??? ?? ?? ?? V GA _ S W #
V O UT V IN 5 V GA _ S W # 3 4 D 2 ad d W LA N_L ED #
V IN
R
C9 907 13
G
5
6
P1 5 V S _ OD D * R Y -S P 1 95 U H Y U Y G 4
P2 S A T A _ OD D _ P R S N T# 1 8 , 23 2 3
G ND E N S A TA _ O D D _ P W R GT 2 3
4
P3
P4 G5 2 4 3A R1 6 7
C
P5 S A T A _ OD D _ D A # 1 8, 2 2 C 67 5
P6 C6 7 6 C6 7 1 C 27 6 C 2 67 1 00 K _ 0 4 B W LA N _ LE D #
+ 27 , 3 4 BT_ EN
D1 D2
GN GN
*C 1 85 5 3 -11 3 05 -L 0. 1u _ 16 V _ Y 5 V _ 0 4 1 u _1 0 V _ Y 5 V _ 06 * 22 0 u_ 6 . 3 V _6 . 3 *4 . 2 Q 2
0 . 1u _ 1 6V _ Y 5V _ 0 4 1 0 u _1 0 V _ Y 5 V _ 08 D TC 1 14 E U A
E
P I N GN D 1 ~ 4 = GN D
For V41XX
LED W140XX/W150XX/W170XX
3 . 3V S 3 . 3V S 3. 3V S
Sheet 31 of 49 3 .3 V S 3 .3 V S 3 .3 V S
R 11 R 9 R 3
SATA ODD, LED, R4 2 9 R4 3 0 R4 3 1 * 2 20 _ 04 * 2 20 _ 04 * 2 20 _ 04
Hotkey, LID SW 2 20 _ 0 4 2 20 _ 0 4 2 20 _ 0 4
A
D3 HDD/CD-ROM D5 IGPU LED D1 DGPU LED
A
A
SCROLL LED *R Y -S P 1 7 2Y G3 4
D 20 NUM LOCK D 21 CAPS LOCK D 22 *H T-1 7 0 B P Z *R Y -S P 1 7 2U H R 24 -5 M
R Y -S P 1 7 0 Y G3 4 -5 M R Y -S P 1 7 0 Y G3 4 -5 M
LOCK LED Green
LED LED R Y -S P 1 7 0 Y G3 4 -5 M
White
C
G re en M 100 12 6 Red
G re en G re en M1 001 26
C
C
L E D_ DG P U#
LE D _ N U M # LE D _ C A P # L E D _ S C R OL L # S A T A _ L E D# L E D_ IG P U# L E D_ DG P U# 2 3
L E D _N U M # 3 4 L E D _C A P # 34 L E D _ S C R OL L # 3 4 S A T A _ LE D # 18 L E D _ I GP U # 18
W140XX/W150XX/W170XX 34 O P TI M U S _ M OD E
3 .3 V S
8/17
E
K P B -3 02 5 Y S G C
R6 B
R 44 8 2 2 0 _0 4 1 2
34 L E D _A C I N
*2 2 0 _0 4 Q 3
Y
C
* D T A 1 14 E U A
R 46 1 2 2 0 _0 4 3 SG 4 R 5
34 L E D _P W R
D3 0 * 22 0 _ 04
3
RED D 4 Green
AC IN/POWER ON LED
Y
SG
* R Y _S P 1 9 5
W150XX/W170XX LED CON
C 2
4
K P B -3 02 5 Y S G C
R 42 8 2 2 0 _0 4 1 2 B
3 4 LE D _ B A T_ C H G
Y Q 1
* DT C1 1 4 E UA
SG
E
R 42 7 2 2 0 _0 4 3 4 3 .3 V S
3 4 LE D _ B A T_ F U LL
J _ LE D 1
D2 3
L E D _I G P U # 1
2
L E D _D GP U #
VG A_ SW # 3
BT_ EN 4
BAT CHARGE/FULL LED S A T A _ L E D# 5
O P T I MU S _M OD E 6 1 8, 2 7 , 2 8, 3 0 , 3 4, 3 5 , 3 6, 4 2 V D D 3
7 11 , 1 8 , 24 , 2 5 , 27 , 2 8 , 32 , 3 3 , 35 , 3 9 , 40 , 4 1 5V S
W L A N _L E D #
27 W L A N _L E D # 8 3 , 9 , 1 0, 1 1 , 1 2, 1 8 , 1 9, 2 0 , 2 1, 2 2 , 2 3, 2 4 , 2 5, 2 7 , 2 8, 2 9 , 3 0, 3 2 , 3 3, 3 4 , 3 5, 3 9 3 . 3V S
9
10
8 8 48 6 -1 00 1
8 pi n ->1 0 pi n a dd WL AN _L ED#
C9 90 71 3
B - 32 SATA ODD, LED, Hotkey, LID SW
Schematic Diagrams
HDMI, RJ45
L5 7
FOR W/O LEVEL SHIFT
LAN POART GIGA LAN (JMC251C) T MD S _C L OC K #-I
*H D M I 2 01 2 F 2 S F -9 00 T 0 4
R 17 3
1 2
* 0 _0 4
TM D S _ C L O C K #
T MD S _C L OC K -I 4 3 T MD S _C L OC K
R 24 3 * 0 _0 4
L44 L1 5 R 24 9 * 0 _0 4
1 2 J _ RJ _ 1 T MD S _D A T A 1 #-I 1 2 T MD S _D A T A 1 #
30 L A N _ MD IP 0
LA N _ MD I P 0 12 13 LM X 1+ W C M2 0 1 2F 2 S -1 6 1T 0 3 D L MX 1 + 1 G ND 1 D02 CHANGE
LA N _ MD I N 0 11 T D4 - MX 4 - 14 LM X 1- 4 3 D L MX 1 - 2 D A+ sh i e dl G ND 2 T MD S _D A T A 1 -I 4 3 T MD S _D A T A 1
30
30
L A N _ MD
L A N _ MD
IN0
IP 1
LA N _ MD I P 1 9 T D4 + M X4 + 16 LM X 2+ 1 2 L1 7 D L MX 2 + 3 D A- sh i e dl ? ? ? R 25 0 * 0 _0 4
LA N _ MD I N 1 8 T D3 - MX 3 - 17 LM X 2- W C M2 0 1 2F 2 S -1 6 1T 0 3 D L MX 2 - 6 D B+ L3 7
D V DD 30 L A N _ MD IN1 T D3 + M X3 + 4 3 L2 3 D B-
*H D MI 2 0 1 2F 2 S F -9 0 0 T0 4
1 2
LA N _ MD I P 2 6 19 LM X 3+ W C M2 0 1 2F 2 S -1 6 1T 0 3 D L MX 3 + 4
30 L A N _ MD IP 2 5 T D2 - MX 2 - 20 4 3 5 D C+
R6 2 LA N _ MD I N 2 LM X 3- D L MX 3 - L5 9
30 L A N _ MD IN2 LA N _ MD I P 3 3 T D2 + M X2 + 22 LM X 4+ 1 2 L3 3 D L MX 4 + 7 D C-
30 L A N _ MD IP 3 *H D M I 2 01 2 F 2 S F -9 00 T 0 4
LA N _ MD I N 3 2 T D1 - MX 1 - 23 LM X 4- W C M2 0 1 2F 2 S -1 6 1T 0 3 D L MX 4 - 8 D D+ R 25 2 *0 _ 0 4
30 L A N _ MD IN3 T D1 + M X1 + 4 3 D D- TM D S _ D A TA 0 # -I 3 4 T MD S _D A T A 0 #
*0 _ 04
10 15 NM CT _ 4 1 3 0 45 1 -0 2
7 T CT 4 M CT 4 18 NM CT _ 3 T MD S _D A T A 0 -I 2 1 T MD S _D A T A 0
4 T CT 3 M CT 3 21 NM CT _ 2
Main 6-21-84020-008 R 34 1 *0 _ 0 4
T CT 1 T CT 2 M CT 2 24 NM CT _ 1 Sec 6-21-84030-008 3 . 3V S
T CT 1 M CT 1 R 49 7 *0 _ 0 4
G S T 50 0 9 LF T MD S _D A T A 2 #-I 3 4 T MD S _D A T A 2 #
D03 LP16 CHANGE T MD S _D A T A 2 -I 2 1 T MD S _D A T A 2
C5 7 9 C 5 73 C 5 71 TO RN22 R 15 2 R 52 0 *0 _ 0 4
C5 8 3 R5 0 7 5_ 0 4 N MC T_ R L58
*0 . 0 1u _ 1 6V _ X 7 R _ 0 4 *0 . 01 u _ 16 V _ X 7R _ 04 * 0. 01 u _1 6 V _ X 7R _0 4 R3 9 7 5_ 0 4 *1 M _0 4 *H D M I 2 01 2 F 2 S F -9 00 T 0 4
G
0 . 01 u _ 16 V _ X 7R _ 04 R3 4 7 5_ 0 4 Q 7
R3 3 7 5_ 0 4 * MT N 7 0 0 2Z H S 3
P O R T C _H P C S D H D M I _ H P D -C C 7 98 * 0 . 1u _ 1 0V _ X 7 R _ 0 4 TM D S _ D A T A 2 # -I
2 1 H DM IC_ C0 C N
C6 3 2 1 H DM IC_ C0 C P C 7 99 * 0 . 1u _ 1 0V _ X 7 R _ 0 4 TM D S _ D A T A 2 -I
3 .3 VS
10 0 0 p_ 2 K V _ X 7R _1 2 _ H 1 2 5 2 1 H DM IC_ C1 C N C 2 98 * 0 . 1u _ 1 0V _ X 7 R _ 0 4 TM D S _ D A T A 1 # -I
G
Q8 C 2 77 * 0 . 1u _ 1 0V _ X 7 R _ 0 4 TM D S _ D A T A 1 -I
2 1 H DM IC_ C1 C P
Sheet 32 of 49
*M T N 7 00 2 Z H S 3
H D M I _C T R L C L K S D H D M I _ S C L -C C 2 69 * 0 . 1u _ 1 0V _ X 7 R _ 0 4 TM D S _ D A T A 0 # -I
2 1 H DM IC_ C2 C N TM D S _ D A T A 0 -I
2 1 H DM IC_ C2 C P C 2 68 * 0 . 1u _ 1 0V _ X 7 R _ 0 4
3 .3 VS
TM D S _ C L O C K # -I
2 1 H DM IC_ CL K C N C 2 35 * 0 . 1u _ 1 0V _ X 7 R _ 0 4
HDMI, RJ45
G
Q1 4 C 2 19 * 0 . 1u _ 1 0V _ X 7 R _ 0 4 TM D S _ C L O C K -I
2 1 H DM IC_ CL K C P
*M T N 7 00 2 Z H S 3
H D M I _C T R L D A T A S D H D M I _ S D A -C
5V S _ H D MI
Fo r ES D
FOR INTEL GRAPHIC HDMI CONNECTOR
C
A
A
R7 7 R8 0
2 . 2K _ 0 4 2. 2K _ 0 4
U8
D 25 D 26 D 27
0 . 1 u_ 1 0 V _X 7 R _ 0 4 H D MI C _ C 0C N _ C3 9 22 5V S _H D M I
AC
AC
AC
2 1 H D MI C _ C 0 C N C 20 2 TM D S _ D A TA 2# -R 5V S
I N _D 1+ OU T _ D 1 +
2 1 H D MI C _ C 0 C P C 20 1 0 . 1 u_ 1 0 V _X 7 R _ 0 4 H D MI C _ C 0C P _ C3 8 23 TM D S _ D A TA 2-R *B A V 99 R E C T I F I E R *B A V 9 9 R E C T I F I E R
I N _D 1- O UT _ D1 - R 71 1 _0 4 5 V S _ H D MI _ I N R7 2 1 _ 04 *B A V 99 R E C T I F I E R
2 1 H D MI C _ C 1 C N C 20 4 0 . 1 u_ 1 0 V _X 7 R _ 0 4 H D MI C _ C 1C N _ C4 2 19 TM D S _ D A TA 1# -R H D MI _ S C L-C
2 1 H D MI C _ C 1 C P C 20 3 0 . 1 u_ 1 0 V _X 7 R _ 0 4 H D MI C _ C 1C P _ C4 1 I N _D 2+ OU T _ D 2 + 20 TM D S _ D A TA 1-R
I N _D 2- O UT _ D2 - J _H D M I 1 H D MI _ S D A -C
2 1 H D MI C _ C 2 C N C 20 6 0 . 1 u_ 1 0 V _X 7 R _ 0 4 H D MI C _ C 2C N _ C4 5 16 TM D S _ D A TA 0# -R
C 20 5 0 . 1 u_ 1 0 V _X 7 R _ 0 4 H D MI C _ C 2C P _ C4 4 I N _D 3+ OU T _ D 3 + 17 TM D S _ D A TA 0-R C8 1 C 80 H D M I _H P D -C
2 1 H D MI C _ C 2 C P I N _D 3- O UT _ D3 -
C 20 8 0 . 1 u_ 1 0 V _X 7 R _ 0 4 H D MI C _ C LK C N _4C8 13 TM D S _ C LO C K # -R 1 0u _ 1 0V _ Y 5V _ 0 8 2 2 u_ 6 . 3 V _ X5 R _ 0 8
2 1 H D M I C _ C LK C N
2 1 H D M I C _ C LK C P C 20 7 0 . 1 u_ 1 0 V _X 7 R _ 0 4 H D MI C _ C LK C P _4C7 I N _D 4+ OU T _ D 4 + 14 TM D S _ C LO C K -R 19 H D MI _ H P D -C
I N _D 4- O UT _ D4 - 18 H OT P L U G D E TE C T
? ? LE VE LSH IF T 100 K_ 04
H D MI _ C T R L C LK 9 28 H D MI _ S C L -C +5V 17
2 1 H D MI _ C T R LC LK SC L S C L_ S I N K ? ? ? L EV EL SH IFT 2 0K _04 DD C/C E C G ND
2 1 H DM I_ CT RL DA T A H D MI _ C T R L D A TA 8 29 H D MI _ S D A -C ? ? Co-Ray H D M I _ S D A -C 16
SD A S DA _ S IN K SD A 15
R 1 24 1 0 0K _0 4 H D MI _ S C L-C ? ? Co-Ray
P OR TC _ H P C 7 30 H D MI _ H P D -C 14 SC L
21 P OR T C _ H P C HP D H P D_ S IN K R E S E RV E D 13
R1 6 3 0_04 R 10 7 *4 9 9_ 1 % _0 4 H D M I _C E C
R1 2 1 *4 . 7K _0 4 O E# 25 2 T M D S _ C L OC K # -R 4 3 T M D S _ C L OC K # 12 CE C
3. 3 V S OE # VC C[1 ] 11 3 .3 V S T MD S C L O C K - 11
R1 1 9 *0 _0 4 R1 0 5 *4 99 _ 1 %_ 0 4
D CC_ E N # 32 VC C[2 ] 15 T M D S _ C L OC K -R 1 2 T M D S _ C L OC K 10 C L K S HIE L D R2 3 8 0 _0 4
10 DC C_ E N # VC C[3 ] 21 T MD S C L O C K + 9 T MD S _D A T A 0# 1 2 T MD S _D A T A 0 #-R
? ? ? C 1 76 C1 5 9 R2 0 1 0_04 R 10 6 * 49 9 _ 1% _ 0 4
RT _ E N# VC C[4 ] 26 L1 2 * H D MI 2 0 12 F 2 S F -9 0 0T 0 4 8 TM D S D A T A 0 -
PC 0 3 VC C[5 ] 33 S H IE L D0 7 T MD S _D A T A 0 4 3 T MD S _D A T A 0 -R
SN 75D P1 39 C han ge 3 .9 K 0 . 1 u _1 6 V _ Y 5 V _ 0 4 0 . 1u _ 1 6V _ Y 5V _ 0 4 R2 3 3 0_04 R 10 3 *4 9 9_ 1 % _0 4
PC 1 4 PC 0 VC C[6 ] 40 T M D S _ D A T A 1 # -R 4 3 T MD S _ D A T A 1 # 6 T MD S D A T A 0 + R1 0 4 *4 99 _ 1 %_ 0 4 R2 8 6 0 _0 4
R E XT 6 PC 1 VC C[7 ] 46 T MD S D A TA 1 - 5
R1 2 8 49 9 _ 1% _ 0 4 R1 0 1 *4 99 _ 1 %_ 0 4 L11 *H D M I 20 1 2 F 2S F -90 0 T 04
R E XT VC C[8 ] T M D S _ D A T A 1 -R 1 2 T M DS _ DA T A 1 4 S H I E LD 1 R3 7 6 0 _0 4
1 T MD S D A TA 1 + 3 T MD S _D A T A 2# 1 2 TM D S _ D A TA 2 # -R
R2 3 6 0_04 R 10 2 *4 9 9_ 1 % _0 4
3 . 3V S R 13 2 *4 . 7 K _ 0 4 O E _1 34 GN D [ 1 ] 5 C 1 53 C1 5 8 L1 0 * H D MI 2 0 12 F 2 S F -9 0 0T 0 4 2 TM D S D A T A 2 -
DH DM IG ND
O E _2 35 OE _1 GN D [ 2 ] 12 S H IE L D2 1 T MD S _D A T A 2 4 3 T MD S _D A T A 2 -R
R 13 4 *4 . 7 K _ 0 4
QE _2 GN D [ 3 ] 18 0 . 1 u _1 6 V _ Y 5 V _ 0 4 T MD S D A T A 2 + R1 0 0 *4 99 _ 1 %_ 0 4 R3 8 1 0 _0 4
GN D [ 4 ] 24 5 VS
? ? ? 0 . 1u _ 1 6V _ Y 5V _ 0 4 L9 *H D M I 20 1 2 F 2S F -90 0 T 04
GN D [ 5 ] 27 Q 6
GN D
G ND
GN D
G ND
GN D [ 6 ] 31 H D MI G N D
* MT N 7 0 0 2Z H S 3
GN D [ 7 ] 36
DC C_ E N# GN D [ 8 ] 37 G
R 12 7 4 . 7 K _0 4
GN D
3. 3 V S
G ND 1
GN D [ 9 ] 43
GN D 2
G ND3
GN D 4
C1 5 4
GN D [ 1 0 ]
S
R 13 1 4 . 7 K _0 4 P C0
P a ra d e P S 81 0 1 0 . 1u _ 1 6V _Y 5V _0 4
49
R 13 0 *4 . 7 K _ 0 4 P C1 P I N 4 9 = GN D C 1 28 1 7 -11 9 A 5 -L
? ? ? P IN G N D1 ~ 4 = G N D
SN75DP139 6-03-75139-030 D02 CHANGE

6-03-03360-030 R107/R106/R103/R102/R105/R104/R101/R100/Q6
PS8101 (6-03-08101-030) PIN TO PIN FOR W/O LEVELSHIFT? ? ?
30 DV D D
1 1 , 1 8, 2 4 , 2 5, 27 , 2 8 , 31 , 3 3 , 35 , 3 9 , 40 , 4 1 5 V S
3 , 9, 1 0 , 1 1, 1 2 , 1 8, 1 9 , 2 0 , 21 , 2 2 , 23 , 2 4 , 25 , 2 7 , 28 , 2 9 , 3 0, 3 1 , 3 3, 3 4 , 3 5, 3 9 3 . 3 V S
HDMI, RJ45 B - 33
Schematic Diagrams
Audio Codec ALC269

CODEC (ALC269 & VT1802P) P V D D1 _ 2 R 3 12
* 15 m i _l s h or t _0 6
La yout not e:
5 VS GND a nd AUDG spa ce i s
3. 3 V S _ A U D C4 3 9 C6 9 6 60m ils ~ 1 00 mil s
0 . 1 u_ 1 6 V _Y 5 V _ 04 10 u _ 6. 3 V _ X 5 R _ 0 6
C4 7 3 C 4 74
10 u _ 6 . 3V _ X 5 R _ 0 6 0 . 1 u _1 6 V _ Y 5 V _ 0 4
AZ_RS T# For 3. 3V C 44 1 C 43 7
VT1802P ? ? ?
PD# Cont rol HDA Link De -pop
*0 . 1 u _ 16 V _ Y 5 V _ 0 4 * 10 u _ 6. 3 V _ X 5 R _ 0 6
D 12 * C D B U 0 0 34 0 3 .3 V S L2 7
E A P D _M OD E C A H C B 1 0 05 K F -1 2 1 T2 0 5V S _A U D L3 4 5 VS
5 VS_ AU D H C B 1 0 05 K F -1 2 1 T2 0
D1 3 C 43 8 C 44 2 C4 4 4
B A T 54 A W G H R 3 21 C 44 0 C4 9 3 C 5 01 C 69 5 C4 9 7
2 0 . 1 u_ 1 6 V _ Y 5 V _ 04 1 0 u_ 6 . 3 V _ X5 R _0 6 0 . 1u _ 1 6V _Y 5V _0 4
18 H DA _ R S T # A 3 1 0 K_ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 04 0 . 1u _ 1 6V _Y 5V _0 4 1 0 u _6 . 3 V _ X 5R _ 06 *1 0 u _6 . 3 V _ X 5R _ 06 1 u_ 6 . 3 V _Y 5 V _ 04
1 C
3 4 K B C _M U T E # A
P D# ANALOG DIG ITAL
39
46
25
38
1
9
U 34 A UD G
EMI Require
DV DD 1
D V D D -I O
P V D D1
P V DD 2
A V D D1
A V DD 2
Q 20 4 13 SEN SE_ A R3 6 8 2 0K _1 % _ 04
G PD # S e ns e A J D _S E N S E 2 7
R 32 9 *1 0 0K _ 0 4 * 2 N 7 0 02 W
5V S _A U D 14 L I N E 2 -L R3 6 9 3 9. 2K _ 1 % _0 4 J D _S E N S E _ B 2 7 L35 H C B 10 0 5 K F -1 21 T 2 0
S
40 L I N E 2 -L 15
S P K O UT L + L I N E 2 -R
S P K O UT L - 41 S P K -L + L I N E 2-R
Q2 1
H D A _ R S T# G *B S S 1 3 8 _ N L S P K -L - 16 M IC2 _ L C5 1 0 4 . 7 u _6 . 3 V _ X 5R _ 06 I N T _ MI C A U DG
S P K O UT R- 44 M I C 2 -L 17 M IC2 _ R C5 1 1 4 . 7 u _6 . 3 V _ X 5R _ 06 J P2 *1 0m i l _s h o rt
AZ_RST# For 1. 5V
S
S P K O UT R+ 45 S P K -R - MI C 2-R
HDA Link De -pop S P K -R + 18 S E N S E -B NEAR CODEC J P1 *1 0m i l _s h o rt
3 . 3V E A P D _ MO D E 47 S e ns e -B VT1802P 5.1K_1%_04
48 S P D IF C2 /E A P D 19 J DR E F R3 6 6 2 0 K _ 1 %_ 0 4 C5 5 5 0. 1 u _ 16 V _ Y 5 V _ 0 4
Layout Note: Layout Note:
27 S P DIF O S P D IF O J DR E F
M ON O-O U T
20 MO N O -OU T C5 0 4 *1 0 0 p_ 5 0 V _ N P O _0 4
Sheet 33 of 49 C 45 2
C lo se to P CH
22 p _ 5 0V _ N P O_ 0 4
R3 3 8
*1 0 K _ 04
Ve ry c lo se to
Au di o Co de c
R 34 2 33 _ 0 4
D M I C -D A T
D M I C -C L K
2
3 G P I O0 -D M I C -D A T
G P I O1 -D M I C -C L K M I C 1 -L
MI C 1-R
21
22
MI C 1 -L_ R C 5 1 2
MI C 1 -R _ R C 5 1 3
4 . 7 u _6 . 3 V _ X 5R _ 06 M I C 1 _ L
4 . 7 u _6 . 3 V _ X 5R _ 06 M I C 1 _ R
A UD G C5 5 6 0. 1 u _ 16 V _ Y 5 V _ 0 4
DIGITAL ANALOG
Audio Codec
18 H DA _ S D IN0 23 L I N E 1 -L C 4 75 0 . 1 u_ 1 6 V _Y 5 V _0 4
R 33 4 3 3_ 0 4 A Z _S D OU T _R 5 L I N E 1 -L 24 L I N E 1 -R A U DG
1 8 H D A _ S D OU T S D A T A -OU T L I N E 1-R C 4 83 2 . 2 u _6 . 3 V _ X5 R _0 6
R 33 9 3 3_ 0 4 A Z _ B IT CL K _ R 6 27 V R E F -A L C 2 6 9
VT1802P 10u
ALC269 1 8 H D A _ B I T C LK
18 H D A _S Y N C R 35 7 3 3_ 0 4 D S Q2 3
MT N 70 0 2 Z H S 3
A Z _S D I N 0 _ R 8
B I T -C LK
S D A T A -I N
6-03-02695-030
L D O _C A P
M I C 1 -V R E F O-R
VR EF
28
30
L D O _C A P
MI C 1 -V R E F O-R C 4 64 1 0 u _6 . 3 V _ X5 R _0 6 M I C 2 -V R E F O J_INTMIC1
A Z _S Y N C _ R 10 29 MI C 2 -V R E F O
FOR VOLUMN S Y NC MI C 2 -V R E F O VT1802P NC PIN 2 1
3 .3 V S
G
H DA _ R S T # 11 32 H E A D P H ON E -L R2 1 6
ADJUST R ESET# H P -O U T -L 33 H E A D P H ON E -R
H E A D P H ON E -L 2 7
A U DG
VT1802P
BEEP_ R PC BEEP 1 2 H P -OU T-R H E A D P H ON E -R 2 7 2.2K_04
D1 6 R3 7 2 4 7 K _0 4 4 . 7 K _0 4
M I C 1 -V R E F O-L
PC BEEP B A T 5 4C W GH
1 A
PC BEEP
CB N
35 C B N -A L 2 69 C 4 43 2 . 2u _ 6 . 3 V _X 5 R _ 0 6
I N T _M I C R 2 1 3
J _ I N T MI C 1
R3 6 4 4 . 7 K _ 04 C 49 2 1 u_ 6 . 3 V _X 5 R _ 0 4 1 K_ 0 4
34 K B C_ B E E P C 3 BEEP 36 C B P -A L C 2 6 9 2
C BP 1
D VSS2
AVSS 2
2 A 34 OP V E E -A L C 2 6 9
PVSS1
PVSS2
AVSS1
C 4 91 1 0 0p _ 5 0V _ N P O_ 0 4 VT1802P
GN D
18 H D A _S P K R O PVEE C 3 06
C 4 45 330P 6 80 p _ 50 V _ X 7 R _ 04 8 8 26 6 -0 20 0 1
P C B F o ot p ri n t = 88 2 6 6-2 R
42
49
26
37
31
43
7
A L C 2 69 Q -V B 5 -GR
Ple a se Le t LC Fil te r 2 . 2 u _6 . 3 V _ X 5R _ 06 VT1802P 75_1%_05
3.3 VS_ AUD
toget he r and close to M IC1 _ R R3 7 7 1 K_ 0 4
Code c .I F Spe ak e r A U DG
M I C 1 -R 27
AU DG MI C 1 -V R E F O -L M IC1 _ L R3 8 3 1 K_ 0 4
5 VS w ire le ngth i s l es s M I C 1 -L 27
tha n 80 00 mil s I t don't
20 ms The rma l P ad pl a ce 9 M I C 1 -V R E F O-L R3 8 4 2 .2 K _ 0 4
ne e d t he LC Fil te r. V ia hole .
AZ_RS T# M I C 1 -V R E F O-R R3 7 8 2 .2 K _ 0 4 D02 CHANGE
L31
VT1802P 4.7K_1%_05
* F C M 1 60 8 K -1 21 T 0 6_ s h o rt
S P K OU TL + S P K OU T L+ _ L 8/27
PD#
C 4 32 C 43 5 Headphone Anti-Pop Circuit
* 1 u_ 1 6 V _ X5 R _ 0 6 *1 8 0 p _5 0 V _ N P O _0 4 3. 3 V S H E A D P H ON E -L
Spe a ke r w ire l e ngt h le ss tha n 80 00 mil s , I t don't ne e d LC Fi lt er. J _S P K L1 H E A D P H ON E -R
SPK OUTR+ ,R -,L+ ,L- Trac e w id t h S P K OU T L- S P K OU T L-_ L 2
D
1
Spe a ke r 4 ohm-- --- -> 4 0m ils * F C M 1 60 8 K -1 21 T 0 6_ s h o rt 8 52 0 5 -02 7 0 1 R3 9 5 R 3 80 Q 31
L30 C 4 34 G * 2 N 7 0 02 W
Spe a ke r 8 ohm-- --- -> 2 0m ils *1 8 0 p_ 5 0 V _ N P O _0 4
*2 2 0K _ 0 4
S
* 1 0K _ 0 4
EMI Require
S
E A P D _ M OD E G
D
Q3 6 A U DG
S P K OU T R + _ R 2 7
L28 *A O 3 41 5 R 39 3 R3 8 5 Q 29
S P K OU T R -_ R 2 7 G
* F C M 1 60 8 K -1 21 T 0 6_ s h o rt *2 N 7 0 02 W
D
S P K O UT R+ S P K OU T R + _ R
S
* 4. 7 K _ 0 4 *1 0 K _ 04
C 4 31 C 43 6 C 7 53
* 10 u _ 6 . 3V _ X 5 R _ 0 6
* 1 u_ 1 6 V _ X5 R _ 0 6 *1 8 0 p _5 0 V _ N P O _0 4 A U DG
J_SPK1
2 1 A UD G
S P K O UT R- S P K OU T R -_ R
* F C M 1 60 8 K -1 21 T 0 6_ s h o rt
L29 C 4 33
*1 8 0 p_ 5 0 V _ N P O _0 4
La yout not e : 2 , 3 , 8, 1 1 , 1 2 , 16 , 1 8 , 1 9, 2 0 , 2 2, 2 3 , 2 4 , 25 , 2 7 , 28 , 2 9 , 3 0, 3 5 , 3 7 , 38 , 3 9 3 . 3V
3 , 6 , 8, 9 , 1 0 , 2 5, 2 9 , 3 5 , 37 , 3 8 1 . 5V
Cl ose to code c 11 , 1 8 , 24 , 2 5 , 2 7, 2 8 , 3 1 , 32 , 3 5 , 39 , 4 0 , 4 1 5 V S
3, 9 , 1 0 , 1 1, 1 2 , 1 8, 1 9 , 2 0 , 21 , 2 2 , 2 3, 2 4 , 2 5, 2 7 , 2 8 , 29 , 3 0 , 3 1, 3 2 , 3 4, 3 5 , 3 9 3. 3 V S
B - 34 Audio Codec ALC269
Schematic Diagrams
KBC-ITE IT8518E
K B C _ A V DD L 19
H C B 1 00 5 K F -1 2 1T 2 0
V D D3
. V DD3
C6 8 5 C2 9 4 C 68 4 C 3 19 C 34 6
C3 0 2 C3 0 3 C3 0 0 VDD 3
0 . 1u _ 1 6V _ Y 5 V _ 04
0. 1 u _ 16 V _ Y 5 V _ 0 4 1 0u _ 1 0V _ Y 5V _ 0 8 0 . 1 u_ 1 6 V _Y 5 V _0 4 0 . 1 u _1 6 V _ Y 5 V _ 04
0 . 1u _ 1 6V _ Y 5V _ 0 4 *0 . 1 u _1 6 V _ Y 5 V _ 04 *0 . 1 u_ 1 6 V _Y 5 V _0 4
1 J_KB1 24
C 34 3 R2 4 7
L22 H C B 1 0 0 5K F -12 1 T 20 0 . 1 u_ 1 6 V _Y 5 V _0 4 K B C _ A GN D 10 0 K _ 04
3 . 3V S
. E C_ V C C W140XX W150HRM K B C _ W R E S E T#
0 _0 4 f or M 760 T/ TU
114
127
J _K B 1 J _ KB2 C3 4 7
1 21
26
50
92
B KP 100 5H S1 21_ 04 f or M 74 0T/ TU
11
74
3
U 18 * 85 2 0 1-2 4 0 51 8 52 0 1 -24 0 5 1
E MI So lu ti on 1u _ 6 . 3V _ Y 5V _ 0 4
V CC
VST BY
VSTB Y
VSTB Y
VBAT
A V CC
VSTBY
VSTBY
VSTBY
10 58 K B -S I 0 4 K B -S I0 4
18 , 2 8 L PC_ AD 0 9 L A D0 K S I0 /S T B # 59 K B -S I 1 5 K B -S I1 5
18 , 2 8 L PC_ AD 1 8 L A D1 K SI1 /A F D # 60 K B -S I 2 6 K B -S I2 6
18 , 2 8 L PC_ AD 2 7 L A D2 K S I 2/ I N I T # 61 K B -S I 3 8 K B -S I3 8
18 , 2 8
22
L PC_ AD 3
P C L K _K B C
P CL K _ K B C 13
6
L A D3
L P CC L K
K S I 3/ S LI N #
KSI4
62
63
K B -S I 4
K B -S I 5
11
12
K B -S
K B -S
I4
I5
11
12
Board? ?
18 , 2 8 L P C _ F R A M E # 5 L F R A ME # KSI5 64 K B -S I 6 14 K B -S I6 14
18 , 2 8 S E RIR Q 22 SE R IRQ LPC K/B MATRIX KSI6 65 K B -S I 7 15 K B -S I7 15
2 2 , 2 7, 2 9 , 3 0 B U F _ P L T_ R S T# L P C R S T #/ W U I 4 / GP D 2 ( P U ) KSI7 EC MODULE CHOOSE (FOR DIFFERENCE K/B TYPE)
K B C _W R E S E T # 14 36 K B -S O 0 1 K B -S O0 1
W R ST # K S O0 / P D 0 37 K B -S O 1 2 K B -S O1 2
1 26 K S O1 / P D 1 38 3 3 V ER . RX V OL TAG E MOD EL _I D
K B -S O 2 K B -S O2
23 G A 20 4 G A 20 / G P B 5 K S O2 / P D 2 39 K B -S O 3 7 K B -S O3 7
2 8 , 42 A C _I N # 16 K B R S T #/ G P B 6 ( P U ) K S O3 / P D 3 40 9 9 V 1. 0 R20 2 10 K/ R2 04 X 3. 3V
31 L ED_ ACIN 20 P W U R E Q # / GP C 7( P U ) K S O4 / P D 4 41 K B -S O 5 10 K B -S O5 1 0
2 0, 22 A C _P R E S E N T * 0 _0 4 R 6 73 R20 2 X /R2 04 1 0K 0V
L 8 0L L A T / GP E 7 ( P U ) K S O5 / P D 5 42 K B -S O 6 13 K B -S O6 1 3
23 K S O6 / P D 6 43 K B -S O 7 16 K B -S O7 1 6
23 S MI # 15 E C S C I # / GP D 3 ( P U ) K S O7 / P D 7 44 17 1 7
23 S CI # E C S MI # / GP D 4 ( P U ) K S O8 / A C K # 45 K B -S O 9 18 K B -S O9 1 8 MO D E L _ I D R2 0 2 10 K _ 0 4
K S O 9/ B U S Y 46 19 V DD3
DAC K B -S O 10 K B -S O1 0 1 9
76 K S O 1 0/ P E 51 K B -S O 11 20 K B -S O1 1 2 0 R2 0 4 *1 0K _0 4
2 7 , 2 8 W LA N _ E N 77 G P J0 K S O1 1 / E R R # 52 K B -S O 12 21 K B -S O1 2 2 1
33
18
27
K B C _ MU TE #
ME _ W E
CP U _ F A N MU T E _S W #
78
79
80
G
D
D
P J1
A C 2 / GP J
A C 3 / GP J
2
3
K S O1 2/ S LC T
K S O1 3
K S O1 4
53
54
55
K B -S O
K B -S O
K B -S O
13
14
15
22
23
24
K B -S
K B -S
K B -S
O1 3 2 2
O1 4 2 3
O1 5 2 4
RX Sheet 34 of 49
28 MU TE _S W # 81 D A C 4 / GP J 4 IT8518 K S O1 5
29 V I A _R S T #
B A T _ DE T 66
D A C 5 / GP J
ADC
5
6-03-08518-0P2
FLASH 10 0
VDD 3 KBC-ITE IT8518E
42 B A T _ DE T B A T _ V OL T 67 AD C 0 / GP I 0 F L F R A ME # / GP G 2 10 1 K B C_ S P I_ C E # 3G _ P OW E R 27 C C D _S W #
4 2 B A T_ V O LT R5 3 2 10 K _ 0 4
CC D_ S W # 68 AD C 1 / GP I 1 F L A D0 /S C E # 10 2 K B C_ S P I_ S I M UT E _ S W # R4 7 0 *1 0 K _0 4
28 C C D _S W # 69 AD C 2 / GP I 2 F L A D 1/ S I 10 3 K B C_ S P I_ S O 3 G _D E T #
2 T H E R M_ V O LT R2 0 6 10 K _ 0 4
70 AD C 3 / GP I 3 F L AD2 /SO 10 4 V S HG _ S E L C C D _D E T # R2 0 5 10 K _ 0 4
42 T OT A L _ C U R 71 AD C 4 / GP I 4 F L A D 3 / GP G 6 10 5 K B C _ S P I _ S C LK V S H G_ S E L 4 2
2 3 C R I T_ T E MP _ R E P # *0 _ 0 4 R5 3 8
0 _0 4 R5 3 9 72 AD C 5 / GP I 5 F L CL K /S CK 10 6 S M C _ C P U _ TH E R M _ R R2 1 9 4 3 _1 % _ 04
27 3 G _D E T # 73 AD C 6 / GP I 6 ( P D )F L R S T# / W U I 7 / GP G 0/ T M CC D_ E N 28 S M C _ C P U _ TH E R M _ R R2 2 7 * 0_ 0 4 H _P E C I 3 , 2 3
AD C 7 / GP I 7 S MC _C P U _ T H E R M 1 9
C C D _ D E T# GPIO S M D _ C P U _ TH E R M _ R R2 4 8 * 0_ 0 4
28 C C D _D E T # MO D E L _ I D 56 S M D _ C P U _ TH E R M _ R R2 5 3 * 0_ 0 4 S MD _C P U _ T H E R M 1 9
1 10
SMBUS ( P D )K S O1 6 / GP C 3 57 SU SB# 6, 2 0 , 2 9, 3 5 U S B _ A C_ IN 2 8
S MC _ B A T
28 , 4 2 S MC _B A T S MD _ B A T 1 11 SM C L K 0 / GP B 3 ( P D )K S O1 7 / GP C 5 S U S C# 20 , 3 8
28 , 4 2 S MD _B A T S MC _ V GA _ T H E R M 1 15 SM D A T 0 / GP B 4 93
1 6 S MC _ V G A _ TH E R M S MD _ V GA _ T H E R M 1 16 SM C L K 1 / GP C 1 ( PD )GP H 0/ I D 0 94 S U S _P W R _ A C K 2 0 P C L K _K B C R 2 42 P C L K _ K B C _R C 3 50 * 1 0p _ 5 0V _ N P O_ 0 4
1 6 S MD _ V G A _ TH E R M S MC _ C P U _ T H E R M_ R 1 17 SM D A T 1 / GP C 2 ( PD )GP H 1/ I D 1 95 BT_ EN 27 , 3 1
* 10 _ 0 4
S MD _ C P U _ T H E R M_ R 1 18 SM C L K 2 / GP F 6 ( P U ) ( PD )GP H 2/ I D 2 96 B K L_ E N 11
SM D A T 2 / GP F 7 ( P U ) ( PD )GP H 3/ I D 3 97 HS P I_ CE # 1 8
( PD )GP H 4/ I D 4 H S P I _S C L K 1 8
PWM 98
L C D _B R I GH TN E S S 24 ( PD )GP H 5/ I D 5 99 H S P I _M S O 1 8
25 PW M 0 / GP A 0 ( PU ) ( PD )GP H 6/ I D 6 10 7 H S P I _M S I 1 8
K B C _B E E P
33 K B C _B E E P 28 PW M 1 / GP A 1 ( PU ) ( PD )GP G 1/ I D 7 D D _ ON 28 , 3 5 , 36
3 1 LE D _ S C R OL L # 29 PW M 2 / GP A 2 ( PU )
31 L E D _ N U M# 30 PW M 3 / GP A 3 ( PU ) EXT GPIO 82 B A T_ V O LT
31 L E D_ CA P # V GA _ S W # 3 1 C 3 01 1 u_ 1 0 V _Y 5 V _0 6
31 PW M 4 / GP A 4 ( PU ) ( P D )E G A D / G P E 1 83
3 1 L E D _B A T _ C H G 32 PW M 5 / GP A 5 ( PU ) ( P D )E G C S # / G P E 2 84 d GP U _R S T # 12
3 1 LE D _ B A T _F U L L 34 PW M 6 / GP A 6 ( PU ) ( P D )E G C L K / G P E 3 d GP U _P W R _ E N # 1 2 , 22 , 3 7
31 LE D _ P W R PW M 7 / GP A 7 ( PU )
WAKE UP 35
8 0C L K 85
PS/2 ( P D )W U I 5 / G P E 5 17 R S MR S T # 2 0
27 8 0 CL K 86 PS2 C LK 0 / G P F 0( PU ) ( P D )L P C P D # / W U I 6 / G P E 6 K B C _R S T # 2 3
27 B T _ DE T # 87 PS2 D A T0 / G P F 1( PU )
27 3 IN1 88 PS2 C LK 1 / G P F 2( PU ) PWM/COUNTER 47
28 W LA N _ S W # 89 PS2 D A T1 / G P F 3( PU ) ( P D )T A C H 0 / GP D 6 48 CP U_ F A NS E N 2 7
28 T P _C L K 90 PS2 C LK 2 / G P F 4( PU ) ( P D )T A C H 1 / GP D 7 H _ P R OC H OT # _ E C 3
V DD 3
28 T P _D A T A PS2 D A T2 / G P F 5( PU ) 12 0
( P D )T MR I 0/ W U I 2 / GP C 4 12 4 P M _P C H _ P W R OK 2 0
1 25
WAKE UP ( P D )T MR I 1/ W U I 3 / GP C 6 A L L _S Y S _ P W R G D 1 1 , 20 , 3 9 N C1
27 3 G_ E N P W R S W / G P E 4( P U )
18 CIR 11 9 S H OR T
35 P W R _S W # 21 R I 1# / W U I 0 / GP D 0( P U ) ( P D )C R X / GP C 0 12 3 C E LL _ C O N T R O L 4 2 KBC_SPI_*_R = 0.1"~0.5"
0. 1 u _1 6 V _ Y 5 V _ 0 4
11 , 2 8 L ID_ SW # R I 2# / W U I 1 / GP D 1( P U ) ( P D )C TX / G P B 2 PM E# 22 , 3 0
C 29 1 32 Mb it
GP INTERRUPT LPC/WAKE UP U1 6
33 19 S P I _ V D D _1 8 5 K B C _S P I _S I _ R R2 0 8 0_04 K B C _S P I _S I
20 P W R_ B T N# G I N T / GP D 5 ( P U ) ( P D )L 80 H LA T / G P E 0 SW I# 20 VD D SI
11 2 2 K B C _S P I _S O _ R R1 7 1 0_04 K B C_ S P I_ S O
( P D )R I N G #/ P W R F A I L # / L P C R S T# / G P B 7 C H G_ E N 42 SO
1 08 UART ? ? ? R1 8 9 K B C_ F L A S H 3 1 K B C _S P I _C E # _R R1 7 2 0_04 K B C_ S P I_ CE #
3 1 O P T I MU S _M OD E 1 09 R XD / GP B 0 ( P U ) CLOCK 2 CK3 2 K E * 0_ 0 4 R 2 40 1 K _ 04 W P# CE #
AVSS
27 W LA N _ D E T # N B _E N A V D D 1 1 , 21
VSS
VSS
VSS
VSS
VSS
VSS
VSS
T X D / G P B 1( P U ) C K 3 2K E 12 8 CK3 2 K 6 K B C _S P I _S C L K _R R2 1 0 0_04 K B C _ S P I_ S CL K
C K 3 2K R 2 37 * 10 M _0 4 * 0_ 0 4 R 2 41 S CK
IC PPE# 2 3, 2 9 7 4
I T8 5 18 E V E R : C R1 9 2 K B C_ HO L D#
H OL D # VSS
1
12
27
49
91
113
75
X 4 *3 2 . 7 68 K H z D02 CHANGE 4 . 7K _0 4 C4 5 7 *3 3 _5 0 V _ N P O _0 4
1 22
1 4 FOR VIA USB3.0 ONLY P C T 2 5V F 03 2 B

2 3 6-04-25032-491
R 24 6 *0 _0 4 E C_ V S S V D D3
X3 * 3 2. 7 6 8 K H z
C 34 4 0 . 1 u_ 1 6 V _Y 5V _0 4 1 4
2 3 J _8 0 D E B U G1
0 _0 4 F OR I T85 12 CX /EX 1
NC 2 S H OR T R2 5 6 C3 2 9 3 IN1 R2 4 5
0 .1 U_0 4 FO R I TE 85 12- J( IT E85 02 -J W/0 C IR ) 2 8 0C L K
0_ 0 4 10 K _ 0 4
*1 2 p_ 5 0 V _N P O_ 0 4 3 8 0D E T #
E C Cos t Do wn 4
R2 4 4 *1 0 mi l _ sh o rt L CD _ B RIG HT NE S S K B C _A G N D 5
11 B RIG HT NE S S
8 82 6 6 -05 0 0 1
C 3 45 * 0. 1 u _ 16 V _ Y 5 V _ 0 4
18 , 2 7 , 28 , 3 0 , 35 , 3 6 , 42 V D D 3
3 , 9 , 1 0, 1 1 , 1 2, 1 8 , 1 9, 20 , 2 1, 22 , 2 3 , 24 , 2 5 , 27 , 2 8 , 29 , 3 0 , 31 , 3 2 , 33 , 3 5 , 39 3 . 3 V S
KBC-ITE IT8518E B - 35
Schematic Diagrams
5VS, 3VS, 3.3VM, 1.5VS_CPU

V DD 3
V IN
V DD 3
U 20 R 2 21
R 2 60 1 8
VA VA V IN 1 V I N1
10 K _ 0 4 P R2 1 7
*1 0K _ 0 4 2 7 R 2 18 1K _0 4 D D _ ON 1 0K _ 0 4
V IN V IN D D _O N _ L A TC H
R 2 22 1 K _0 4 3 6 P W R _S W #R R 5 34 1K _ 0 4
28 M_ B T N # M _B T N # P W R _S W # P W R _ S W # 34
4 5
I N S TA N T -ON GN D
P 28 0 8A 1 1 . 0 5V S _V T T _ P W R G D # 3 7
1.05VS_VTT
C
P R2 4 2
B P Q4 6
2 , 3 , 5, 23 , 2 4, 25 , 3 9 1. 0 5 V S _ V TT
10 0 K _ 04 2 N 3 90 4
P Q6 9 A
E
1 .0 5 V S NM OS MT N N 20 N 0 3 Q8
8 2 ON
7 1
SYS1 5 V P Q4 5 A 10A 1. 0 5 V S _ V TT
MT N N 20 N 03 Q8 S Y S 5V SY S5 V
3
8 2
7 1
P R 2 45 P C2 2 7 P C 22 8
V IN V IN P R 26 9 P R 1 14 P R 22 5
0 . 1 u_ 1 6 V _ Y 5V _ 0 4
1 M _0 4 1 0 0_ 0 4
10 u _1 0 V _ Y 5 V _0 8
3
1 0 K _ 04 1 0 K _ 04
C 24 C2 5 1. 0 5 V S _ V T T_ E N 1 S US B
S US B 3, 3 7 , 3 8
D D _ ON #
DD_ O N# 2 8 , 38 D P C 1 84
3
0. 1 u _ 50 V _ Y 5 V _ 06
6
C 6 60 D P C8 0 P Q 18 B
0 . 1 u_ 5 0 V _Y 5 V _ 0 6
5G * 0 . 1u _ 16 V _ Y 5 V _ 0 4
2G 6 , 2 0 , 29 , 3 4 S U S B # S
2 2 0 0p _ 5 0V _ X 7 R _ 04 *0 . 1 u _1 6 V _ Y 5 V _ 04
2 8 , 34 , 3 6 D D _ ON
4
S P Q 18 A M TD N 7 0 02 Z H S 6R
1
Sheet 35 of 49
4
P Q 4 5B P Q6 9B P R 1 18 MT D N 7 00 2 Z H S 6 R
M TN N 2 0 N 0 3 Q8 MT N N 2 0 N 0 3Q 8
10 0 K _ 04
5 5
5VS, 3VS, 3.3VM, EMI 1 . 05 V S _ V T T_ E N # 20 ON

ON ON ON
6
1.5VS_CPU 5V 5VS 1.5VS_CPU
1.5VS 20A
NM O S 1 .5 V 1 .5 V S _ CP U
NM OS N M OS ON
P Q 15 200mA
S Y S 1 5V V DD 5 P Q5 7 A S Y S 1 5 V V D D5 P Q5 8A 5 VS SYS1 5 V 1 . 5V P 2 7 03 B A G 1 .5 V S PJ 5 PJ 7 MU ST S HOR T
MT N N 20 N 0 3 Q8 5V M T N N 2 0 N 0 3 Q8 6 1 2
8 2 8 2 5
7 1 3A 7 1 P R 2 43 2
1
4 S Y S 15 V *5 m m P R 79
P R2 3 0 P R 24 1
1 M _0 4
P Q 1 1A NM OS * 22 0 _ 04
1 M_ 04 1 M_ 0 4 P C2 0 4 P C2 0 6 P C2 0 9 P R 24 4 * MT N N 2 0N 03 Q 8
3
3
Power Plane 1 0 0_ 0 4 P R8 0 8 2
5 V_ EN 1 5 VS_ EN 1 0. 1 u _ 16 V _ Y 5 V _ 04 1. 5 V S _ E N 1 7 1
0 . 1 u_ 1 6 V _Y 5V _ 0 4
1 0 u _1 0 V _ Y 5V _0 8
D1 . 5V S _C P U _ L O
4
P Q 57 B *1 M_ 0 4
1 . 5V S _L O
4
M TN N 2 0 N 0 3Q 8 P Q 58 B P C 54 P C5 5
P C1 9 5 MT N N 2 0 N 0 3Q 8
5 D D _ ON # 1 .5 V S _ CP U E N1
3
P C 20 3 *0 . 1 u _1 6 V _ Y 5 V _ 04 *1 0u _ 6 . 3V _X 5 R _ 0 6
*2 2 00 p _ 50 V _ X 7R _ 04 5
S US B 3 , 3 7, 3 8
1
4
2 2 00 p _ 50 V _ X 7R _ 04 P C 2 05 P Q6 8A P Q 11 B
6
3
PJ 9 D L2 N 7 0 0 2D W 1 T1 G D *M T N N 2 0 N 0 3 Q8 P Q 10
6
P J 18 6 8 0 0p _ 5 0V _ X 7 R _ 04 P Q 6 8B P C5 6 * MT N 7 0 02 Z H S 3
D02 CHANGE 4 0 mi l G 2 S US B 5 G L 2 N 7 0 02 D W 1T 1 G 5 SU SB G
2
4 0 mi l S S *2 2 00 p _5 0 V _ X7 R _0 4
D02 CHANGE
S
2
6
ON ON
D02 CHANGE
3.3V 3.3VS ON ON
NM O S NM O S
P Q5 9A P Q6 0 A
S Y S 1 5V V DD 3 M T N N 2 0 N 0 3 Q8 3 .3 V S Y S 15 V V DD 3 MT N N 2 0N 0 3Q 8 3 .3 V S
8 2 8 2 42 VA
7 1 3A 7 1 36
2 8, 3 6
V IN 1
VDD 5
P R2 3 1
Power Plane P R2 3 9 P C 20 1 P C 20 2
24 1 . 5V S
3 ,6 ,3 8 1 .5 V S _ CP U
P R 2 40
36 S Y S 5V
3
1 M_ 04 1M _ 04 75 _ 04
0 . 1 u _1 6 V _ Y 5 V _0 4
10 u _ 10 V _ Y 5 V _ 08
3 6, 3 7 S Y S 1 5V
25 , 2 7 , 28 , 2 9 , 37 , 3 8 5V
3 . 3 V _E N 1 3 .3 V S _ E N1
6 , 1 8 , 19 , 2 0 , 24 , 2 5 , 29 , 3 7 , 38 , 3 9 1. 05 V S
1 1 , 3 6, 3 7 , 3 8, 3 9 , 4 0, 4 1 , 4 2 V I N
3 . 3 V S _ LO
4
P Q 59 B
P C1 9 6 MT N N 2 0 N 0 3Q 8 P C2 0 0 3 , 6 , 8 , 9, 1 0 , 2 5, 2 9 , 3 7, 3 8 1 . 5V
1 8 , 2 7, 2 8 , 3 0, 3 4 , 3 6, 4 2 V D D 3
11 , 1 8 , 24 , 2 5 , 27 , 2 8 , 31 , 3 2 , 33 , 3 9 , 40 , 4 1 5V S
2 20 0 p _5 0 V _ X7 R _ 0 4 5 D D _ ON # 47 0 0 p_ 5 0 V _X 7 R _ 0 4
2 , 3 , 5 , 2 3, 2 4 , 2 5, 3 9 1 . 05 V S _ V T T
4
P Q6 0 B D 2, 3 , 8 , 1 1, 1 2 , 1 6, 1 8 , 1 9, 2 0 , 2 2, 2 3 , 2 4, 2 5 , 2 7, 2 8 , 2 9, 3 0 , 3 3, 3 7 , 3 8, 3 9 3 . 3V
MT N N 20 N 0 3 Q8 P Q6 7
3 , 9 , 1 0, 1 1 , 1 2, 1 8 , 1 9, 2 0 , 2 1, 2 2 , 2 3, 2 4 , 2 5, 2 7 , 2 8, 2 9 , 3 0, 3 1 , 3 2, 3 3 , 3 4, 3 9 3 . 3V S
6
MT N 7 0 02 Z H S 3
5 S US B G
S
6
D02 CHANGE
ON ON
B - 36 5VS, 3VS, 3.3VM, 1.5VS_CPU
Schematic Diagrams
VDD3, VDD5
V R E F _ V DD
P R 87 * 0 _0 4 P R8 8 0_04
PC 5 8
1 u_ 1 0 V _ Y 5 V _ 0 6
VFB2 VFB 1
T ON S E L
PR 9 1 P R9 0
E N _ 3V E N _5 V
P C 63
1 0 0K _0 4 1 0 0 K_ 0 4 P C6 1
1 0 00 p _ 5 0V _ X 7 R _ 0 4 1 00 0 p _ 50 V _ X 7 R _ 0 4
1
P U5
V RE G 3 ? ? ? ? ? ?
TO N SEL
VR EF
VFB2
VFB1
V IN
E N2
E N1
VI N
7 24
V O2 VO 1
PC 1 7 5 P C1 7 6
P C6 2 P R 92 * 10 K _ 0 4
4 . 7 u _ 25 V _ X 5 R _ 0 8 4. 7 u _ 2 5V _X 5 R _0 8 8 23 P O K _ 61 8 2 P C2 0 7 P C2 0 8
SYS5 V
VDD3 1u _ 1 0V _Y 5 V _ 0 6 LD O3 PO K P C 17 9 P C7 5 P C 1 80 + +
VDD5
* 1 5u _ 2 5 V _ 6. 3 * 4. 4
P Q5 2 P C6 5
1 5 u _2 5 V _ 6 . 3 *4 . 4
P 12 0 3 B V PC 6 4 B OO T2 9 22 B O OT 1 0 . 1 u _ 50 V _ Y 5V _0 6 4. 7u _ 2 5 V _ X5 R _0 8 4 . 7 u _2 5 V _ X 5R _ 0 8
B OO T 2 B O OT 1 5A
8
7
6
5
5
6
7
8
5A 0. 1u _ 5 0 V _ Y 5 V _ 0 6 uP6182 1 u _ 2 5V _0 8 P Q4 9
V DD 3 4 U GA TE 2 10 21 UG A T E 1 4 P 1 20 3 B V SY S5 V V DD 5
SYS3 V PL 1 1 UG A T E 2 UG A T E 1 PL 1 0
3
2
1
1
2
3
P J 19 T MP C 0 6 03 H -4 R 7 M- Z 01 T M P C 0 6 0 3H -4 R 7 M -Z 0 1 P J1 7
2 1 2 1 P HA S E 2 11 20 P HA S E 1 1 2 1 2
P HA S E 2 P HA S E 1
*5 m m P Q5 1 P D1 2 P D1 1
Ra *5 m m
C
12 19
8
7
6
5
5
6
7
8
P 12 0 3 B V L G AT E2 L GA T E 1 P R8 9
GN D P A D
LG A T E 2 L G ATE1
C
S K IP S E L
PC 8 1 P Q5 0 P C6 0
P C1 8 6 + PR 8 5 P C5 9 P D 13 4 4 3 0 K _ 1 % _0 6
L DO 5
Sheet 36 of 49
V CL K
G ND
E N0
2 2 0u _ 6 . 3 V _ 6 . 3* 6 . 3* 4 . 2
V IN
0 . 1 u _1 6 V _ Y 5V _ 0 4 P 12 0 3 B V 1 0 00 p _ 50 V _ X 7 R _ 0 4
3
2
1
1
2
3
1 3 K _ 1 %_ 0 6 P D 14
C S OD 1 40 S H
1 00 p _ 5 0V _N P O _0 4
PD 7 P D6
A
* SK3 4 SA
Rb P C8 2
*S K 3 4S A
13
25
15
16
17
18
A
A C C A
14
VDD3, VDD5
CS O D1 4 0 S H
+ P C 1 85
V R E G5 VR EG 5
P R9 4 P R8 4
2 2 0 u _6 . 3 V _ 6 . 3 *6 . 3 *4 . 2
EN _ AL L
V IN_ 6 1 8 2
0 . 1 u _1 6 V _ Y 5 V _ 0 4
P R8 6 R B 0 5 40 S 2 PR 9 9 P R 98 R B 0 54 0 S 2 1 9 . 1 K _ 1 % _0 6
S K IP S E L
2 0 K _ 1 % _0 4 * 6 80 K _ 1 % _ 0 4
M9 90 12 5
P R9 7 P D 10
V R E F _ V DD P R 1 02 0 _ 04 *0 _ 04 0_04 *0 _ 0 4 B A T 54 S W G H
P R1 0 1 P C7 1 A 1
3 C SY S5 V
V R E G5 P R 1 00 *0 _ 0 4 2. 2 _ 0 6
A 2
S Y S 1 0V
0 . 0 1 u_ 5 0 V _ X7 R _ 04
1026
V IN1 V R E G5
P C7 0
PD 9
P C7 3
C A P C 69 PD 8 2 2 0 0 p_ 5 0 V _ X7 R _ 04
VI N
4 . 7 u _2 5 V _ X 5 R _ 0 8
B A T 54 S W G H
1 u _1 0 V _ Y 5 V _ 0 6 P C6 8 A 1
R B 0 5 4 0S 2 3 C
A 2
S YS1 5 V
0 . 0 1 u _ 50 V _ X 7 R _ 0 4
P C6 7
2 2 0 0 p_ 5 0 V _ X7 R _ 04
VR EG 5
E N_ 3 V 5 V P R 81 * 0_ 0 6 E N_ 3 V
P R 83
P R 15 3 E N_ 5 V
1 0 K _0 4 * 10 m i l _s h o rt
3
D
P Q 12 B
D D _O N _ E N _ V D D 5G
S
6
D MT D N 7 0 02 Z H S 6 R
1
PR 8 2
2G PJ 6 P C 57
28 , 3 4 , 3 5 D D _ O N
S P Q6 3 A *4 0 m i l
1
M TD N 7 0 0 2 Z H S 6 R 0 . 1 u_ 1 0 V _ X 5R _ 04 1 00 K _ 0 4
6
2G
42 A C _ IN
S P Q1 2 A
1
MT D N 7 0 02 Z H S 6 R
Support Intel V-Pro Function 35 V IN 1
2 8 ,3 5 V DD 5
35 SYS5 V
3 5 , 3 7 S Y S 15 V
1 1 , 3 5, 37 , 3 8 , 3 9 , 40 , 4 1 , 4 2 V I N
18 , 2 7 , 2 8 , 30 , 3 4 , 3 5 , 42 V D D 3
VDD3, VDD5 B - 37
Schematic Diagrams
Power 0.85VS, 1.8VS, PEX_VDD

PEX_VDD 1.8VS
SYS1 5 V 1 . 05 V S
N M OS
PQ 5 A
1.05V@4A P EX _ VDD
M T N N 20 N 0 3 Q8 250 MIL ? ? ? ? PIN6? <2mm
8 2 5V
P R 2 22 PJ 1 *1 0 m i _l s ho rt
7 1 1 2 3 .3 V
1 M _0 4 P C 19 2
PC2 3 0 P C2 3 1 *O P E N _ 5 A 2A P U 11
V 1. 8
P R2 2 3 2 . 2 u_ 6 . 3 V _ Y 5 V _ 06
5 6 1. 8 V S
3
1 . 0 5V _ P W R _ E N 0 . 1u _ 1 6V _Y 5 V _0 4 1 0 u _1 0 V _ Y 5 V _ 0 8 P R 22 6 1 0 K _0 4
1 0 _ 04
D02 CHANGE 3. 3V 9 VIN VCN T L 2A PJ 2 1
1 .8 VS _ P W RG D R5 4 7 P O K _ 66 1 0 7 VIN 4 1 2
3, 2 0 1 . 8 V S _ P W R G D P OK V OU T
4
P C 2 29 PQ 5 B
D
M TN N 2 0 N 0 3 Q8 P Q7 0 3 O P E N_ 3 A
E N 1 . 8V S 1 8 V OU T
6 8 0 0p _ 5 0V _ X 7 R _ 0 4 M T N 7 0 02 Z H S 3 5V P R 22 9 10 K _ 0 4
5 dG P U _ P W R _ E N # _ R G EN PC1 9 0 P C 1 91 P C 1 93
P C 18 8 1 2 V F B _6 6 1 0 P R 22 7
S
GN D VF B
3
D 1. 27 K _ 1 %_ 0 4
1 0 u_ 1 0 V _ Y 5V _0 8
0 . 1 u _1 6 V _ Y 5 V _0 4
*1 0 u_ 1 0 V _Y 5V _ 0 8
6
PJ 2 P Q6 3 B *1 u _ 6 . 3V _ Y 5V _ 0 4
P R 22 4 1M _0 4 E N 1 . 8V S 5G MT D N 70 0 2 Z H S 6 R AX66 15ESA P C1 8 9 8 2 p_ 5 0 V _ N P O _0 4
3 ,3 5 ,3 8 SUSB
4 0m i l S M 990 12 5
4
P R 3 10 0_04 dG P U _ P W R _ E N # 1 2 , 22 , 3 4 P C 19 4 P C1 8 7
P C1 8 3
0 . 1 u_ 1 6 V _ Y 5 V _ 04
22 0 0 p_ 5 0 V _X 7 R _ 0 4 10 u _ 10 V _ Y 5 V _ 0 8 P R 22 8
P C2 3 6
*0 . 1 U _ 1 0 V _X 5 R _ 0 4 1 K _ 1 %_ 0 4
ON
GS7113 6-02-07113-320
AX6610 6-02-06610-320
APL5930KC 6-02-05930-420
Sheet 37 of 49
N M OS
Power 0.85VS, 1 . 5V
VIN
P Q7 2 A FBVDDQ P R1 9 0 9 . 3 1K _ 1 % _0 4 9. 3 1 K _ 1% _ 0 4
S S _0 . 8 5 V S 3 . 3 V
0. 8 5 V S _ P W R GD 20
1.8VS, PEX_VDD MT N N 2 0 N 0 3Q 8 P R1 9 1
0 . 1 u_ 5 0 V _ Y 5V _0 6
4. 7u _ 2 5V _ X 5 R _ 0 8
4 . 7 u _2 5 V _ X 5R _ 08
0. 1u _ 5 0V _ Y 5 V _ 0 6
8 2 5V
7 1 11A F B V DD Q PC1 3 7 P R 18 9
SYS1 5 V
0. 0 2 2 u_ 1 6 V _ X 7R _ 04
0 _ 04
P Q7 1 A
A
P R1 9 2 P R1 9 3 10 K _ 1 %_ 0 4 P R1 8 7
MT N N 2 0 N 0 3Q 8 240MIL
3
1 2 K _1 % _ 04 10 K _ 0 4 P D 21
P R 2 74 8 2 PJ 3 P R 18 8
7 1 F B_ VDD Q 1 2 R B 0 5 40 S 2
P C 13 1
P C1 2 1
P C 1 22
P C1 2 3
1 M _0 4 1 0 _0 4
C
P C2 3 3 P C2 3 4 * OP E N _ 11 A
P R 27 5 P R1 9 4 10 . 7 K _ 1% _ 0 4 E A P _0 . 8 5 V S
0.85VS
3
F B V D D Q _P W R _ E N 0 . 1u _ 1 6V _Y 5 V _0 4 1 0 u _1 0 V _ Y 5 V _ 0 8 P C 52 9 . 1 K _1 % _ 04 P R 19 5 B OO T _0 . 8 5 V S
1
2
1 00 _ 0 4
+ PU 9 PC1 9 8 P Q3 1 A
*3 3 0 u_ 2 . 5 V _ V _A
4
4
P C 2 32 P Q7 1 B P Q 72 B u P 6 12 2 PC1 4 0 P D 1 5 0 3Y V S
8
5
4
3
2
1
1 u_ 1 0 V _Y 5V _ 0 6
MT N N 2 0N 03 Q 8 M T N N 20 N 03 Q8
6 8 0 0p _ 5 0V _ X 7 R _ 0 4 P R1 9 8 15 K _ 1 %_ 0 4 10 K _ 1 %_ 0 4 0. 1 u _ 50 V _ Y 5V _ 0 6
U G
B OO T
EAP
SS
P OK
5 5 P R1 9 9 PL 5 V 0 . 85 P J 1 4 0 .8 5 VS
6A
7
21 TM P C 0 6 0 3H -1 R 0 M-Z 01 OP E N -6 mm
S E T 3 _ 0. 85 V S 6 GN D 20 P H A S E _ 0 . 8 5V S 1 2 1 2
S E T3 PH ASE
6
6
3. 3 V S E T 2 _ 0. 85 V S 7 19 L G_ 0 . 85 V S
ON S E T 1 _ 0. 85 V S 8 S E T2 LG 18
S E T 0 _ 0. 85 V S 9 S E T1 VCC 17 R T _ 0 . 8 5V S P C 1 41 PC1 5 1
10 S E T0 RT 16
EN /PS M
P R 20 1 1K _ 1 % _0 4 F B_ 0 .8 5 VS PR 1 1 +
FB C SP
C O MP
C S P _ 0 . 85 V S
P R3 1 1 P R1 2
VID 0
VID1
CS N
5
6
0 _ 04 0_ 0 4
0 . 1u _ 1 6V _ Y 5 V _ 0 4
5 6 0 u_ 2 . 5 V _ 6. 6 * 6. 6 * 5. 9
1 00 K _ 0 4
D02 CHANGE
11
12
13
14
15
3
P S _ N V V D D _ P GO OD # P R 20 4 PC1 4 7 0 . 0 1u _ 5 0V _ X 7 R _ 0 4 C OM P _0 . 8 5 V S PR 7
C S N _ 0. 8 5 V S
1
22 _ 0 4 P R1 9 6 P Q 31 B PJ 3 0 P R 2 08
D
4
P C 14 8 3 .3 V P D 15 0 3 Y V S 1 2 K _ 1% _ 0 4
0 . 85 V _ ON
P Q7 3 P C1 5 0 P C 1 45 * 6m i l
G P R 20 2 33 K _ 1 % _0 4 1 0 _0 4
0 . 0 1u _ 5 0V _X 7 R _0 4
4 1 P S _ N V V D D _ P G OOD
2
MT N 70 0 2 Z H S 3 *0 _0 4 47 p _ 50 V _ N P O _ 04
S
P R2 3 7 PC1 6
5V
P R 20 6 10 0 K _ 1% _ 0 4 10 0 K _ 0 4 0. 1u _ 5 0V _ Y 5V _ 0 6
*0 . 1 u_ 1 6 V _ X 7R _ 06
PJ 2 6
2 1 C S P _0 . 8 5 V S
P R 2 05
1 00 K _ 0 4 * 6m i l C S N _ 0 . 8 5V S
PJ 2 8
6 V CC S A _ V ID0 2 1 P R2 0 0 1. 3K _ 1 % _0 4
6 V CC S A _ V ID1
0 . 8 5 V _O N * 6m i l PR 2 4 0_04
V C CS A _ S E N S E 6
D
6 0 . 8 5V S
P Q3 9 P C1 4 4 0.9 V 0 .8V 0.7 25 V 0 .67 5V
G 6 , 2 3 , 24 1 . 8 V S
3 5 1. 05 V S _ V T T _P W R G D # 35 , 3 6 S Y S 1 5V
MT N 70 0 2 Z H S 3 * 1 u_ 6 . 3 V _ X5 R _ 0 4 VC CS A_ VI D0 0 0 1 1
S
3 , 6 , 8, 9, 1 0 , 2 5, 2 9 , 3 5 , 38 1 . 5 V
12 , 1 3 P E X _V D D
1
VC CS A_ VI D1 0 1 0 1 1 3 , 1 4 , 15 F B V D D Q
P J 29
35 , 3 6 S Y S 5 V
4 0m i l
SET0 SET2 SET1 SET3 2 5, 2 7 , 2 8, 2 9 , 3 5 , 38 5 V
11 , 3 5 , 3 6, 3 8 , 3 9, 4 0 , 4 1 , 42 V I N
2
6 , 1 8 , 1 9, 2 0 , 2 4, 2 5 , 2 9 , 35 , 3 8 , 39 1 . 0 5 V S
2, 3, 8 , 1 1 , 12 , 1 6 , 1 8, 1 9 , 2 0, 2 2 , 2 3 , 24 , 2 5 , 27 , 2 8 , 2 9, 3 0 , 3 3, 3 5 , 3 8 , 39 3 . 3 V
B - 38 Power 0.85VS, 1.8VS, PEX_VDD
Schematic Diagrams
Power 1.5V/1.05VS/0.75V
P D1 7 VI N
PU6 A C P Q5 5 P C1 8 2 P C9 0 P C8 9 P C8 3
5V
5
6
7
8
ME 4 8 94 -G
4 . 7 u _ 25 V _ X 5 R _ 0 8
uP 61 6 3
4. 7 u _ 25 V _ X 5 R _ 0 8
0. 1 u _ 50 V _ Y 5 V _ 0 6
0. 1u _ 5 0V _ Y 5 V _ 0 6
R B 0 5 40 S 2 4
V DD Q
VTT_MEM
2
3
1
P C8 5
10 u _ 10 V _ Y 5 V _ 0 8
23
V LD OI N VBST
22 VBST P C 1 81 0 . 1 u _1 0 V _ X 7R _ 04
V D DQ
1.5V
PJ 8 PL 9
V T T _ ME M
2 1 VTT 24
V TT DR VH
21 DR V H P R1 2 0 T MP C 10 0 4 H -R 56 M -Z 0 1
1 2
30A 1
PJ 1 6
2
3 . 3 _0 6 1 .5 V
O P E N _2 A
1 20 LL P C8 4 OP E N _ 8 A
PC 8 8 P C8 7 P C8 6 V TT G N D LL
* 1 00 0 p _5 0 V _ X 7 R _ 0 4
P R1 2 1 P R1 1 9 P C 17 4 P C 1 73 P C 1 72 P C1 7 1
1 0 u _ 10 V _ Y 5 V _ 0 8 0_ 0 6 V T T S N S 2 19 DR V L + +
10 u _ 10 V _ Y 5V _ 0 8 *1 0 u _1 0 V _ Y 5 V _ 0 8 V TT S N S D RV L
56 0 u _2 . 5 V _ 6 . 6 *6 . 6* 5 . 9
5 60 u _ 2. 5 V _ 6 . 6 *6 . 6 *5 . 9
0_06
0. 1 u _ 16 V _ Y 5 V _ 0 4
0. 1 u _ 1 6V _ Y 5 V _ 0 4
C
C
5
6
7
8
5
6
7
8
3 18 P D 15 P D1 6
G ND P GN D 17
V D DQ P R 1 17 0_06 P R 11 5 0_06
C S _ GN D 5V 4 4
P R 1 13 * 0 _0 6 MO D E 4 16 C S P R 11 2 1 0K _ 1 % _0 6
5V M OD E CS D02 CHANGE P Q5 4
2
3
1
2
3
1
P R1 1 6
C S O D 1 4 0S H
*S K 34 S A
ME 4 6 26 -G
A
P R 1 11 * 0 _0 6 15 PQ 1 9
P C7 8 V T TR E F 5 P V CC5 14 P R1 1 0 2 . 2 _0 6 ME 4 6 2 6 -G
V TT R E F V CC5
* 5 . 1_ 0 6
0. 1 u _ 10 V _ X 7 R _ 0 4
P R 1 03 0_ 0 6 C O MP _ V D D 6 13 P G OO D _ 6 1 63 PC 7 7 P C7 9
5V C OM P P G OO D 3 . 3V D02 CHANGE
8/18
DEL PR223,PR222,PC177
1u _ 1 0V _ Y 5 V _ 0 6
1 u _1 0 V _ Y 5 V _ 06
V D DQ S NS 8 11 S 5 _ 6 16 3
? ?
P R 1 07
V TT _ ME M PR 9 6 *2 2 _ 04
P C 76 V D D QS N S S5 P R 22 0
P R 1 06
D
9 10
* 10 0 0 p_ X 7 R _ 0 4 V D D QS E T S3
1 0 0K _0 4 0 _ 06
* 10 _ 0 4
P Q1 3 V D DQ S E T
SU SB G
GN D
3 , 3 5, 3 7 S U S B D D R 1. 5V _ P W R GD
Sheet 38 of 49
* MT N 7 0 02 Z H S 3
NC
NC
S
D D R 1 . 5 V _P W R G D 2 0
PC 7 2
*1 0 00 p _ X 7 R _ 0 4
12
25
P R 1 08 Power 1.5V/1.05VS/
5V
5V
P R9 5 1 0 0 K _ 04
*1 0 K _ 1% _ 0 4
PR1 0 9 9 . 5 3K _ 1 % _ 06
5V P R1 0 4 4 7K _0 4
P Q1 7 A
P R2 2 1 9 . 7 6K _ 1 % _ 06
0.75V
6
1 .5 S _ CP U _ P W RG D P R9 3 * 1 00 K _ 0 4 VTTEN D PC 7 4
D
M T DN7 0 0 2 Z HS 6 R
P C6 6 P R1 0 5 1 0 0 K _ 04 2G PQ 1 6 0 . 1 u _1 6 V _ Y 5 V _ 0 4
G
6
D S
1
P Q 14 A 0 . 1u _ 1 6 V _Y 5 V _0 4 D PJ 7 *MT N 70 0 2 Z H S 3
S
S US B 2G P Q1 7 B
S M TD N 7 0 0 2Z H S 6 R 5G 40 m i l
20 , 3 4 S U S C#
1
S
28 , 3 5 D D _O N #
2
5V M T D N 70 0 2 Z H S 6 R
VIN
D02 CHANGE
A
5V
OCP? ? PD 2
P R8 1 . 05 V _ O N R B 0 54 0 S 2 P C 13 2 P C 13 0 P C 1 34 P C 1 35 P C 1 25
PR 9 10 K _ 1 % _0 4 +
1 00 K _ 0 4
1.05VS
C
* 1 5u _ 2 5V _ 6 . 3 *4 . 4 _ C
3
4 . 7 u _2 5 V _ X 5 R _ 0 8
D
0 . 1 u_ 5 0 V _Y 5V _ 0 6
4 . 7 u_ 2 5 V _ X 5R _ 08
0 . 1 u _5 0 V _ Y 5 V _ 06
P Q 35
S US B 5G
5
6
7
8
P U1 M E 4 8 94 -G
S U P 6 1 27
4
4
P Q 1 4B P C1 5
2
3
1
IL IM
MT D N 7 00 2 Z H S 6R *0 . 1 u_ 1 6 V _ Y 5 V _ 04
D H
PC 1 7
V1 .0 5 20A 1 . 0 5V S
0 . 1 u _5 0 V _ Y 5 V _ 0 6 PL 6 P J 15
15
16
13
14
T M P C 1 0 04 H -1 R 0 M-Z 0 1
P R 10 10 K _ 0 4 LX 1 2 1 2
3 .3 V
N.C
N.C
DH
12 1
I LI M
EN LX
1 . 05 V S _ P W R GD 11 2 BST P Q3 7 P C 15 9 *O P E N -1 2 m m
2 0 1. 0 5 V S _ P W R GD PG D BST
+ P C 15 8 P C1 6 0
C
10 3 +
5
6
7
8
5
6
7
8
P K 3 9 06 P Q 34 * ME 4 6 26 -G
V O UT V CC
1
* 56 0 u _2 . 5 V _ 6 . 6* 6 . 6* 5 . 9
5 6 0 u_ 2 . 5 V _ 6. 6 * 6. 6 * 5. 9
M E 4 6 26 -G PD 3 PR 1 8
0 . 1u _ 1 6V _ Y 5 V _ 0 4
FOR S3 REDUCE ? ? 9 4 DL 4 4 P J3 1
3. 3V FB DL
S K 34 S A * 6 mi l 0_ 0 4
GN D
2
3
1
2
3
1
RT N
17
N.C
N.C
PAD
2
3 .3 V ? ? ? ? PIN3? D02 CHANGE
8
R 1 65 PC 2 0
* 1 0K _ 0 4 1 u _ 10 V _ Y 5 V _ 0 6
R 16 6 1 . 5 S _ C P U _P W R G D
D
1. 5 V S _ C P U * 10 K _ 0 4 Q 12 *6 m li P J 4 2
V C C P _ S E N S E _ 6 12 7 2 1
V CC P _ S E N S E 5
3 . 3V _E N _ D G
* MT N 70 0 2 Z H S 3 PR1 6 P C2 2
C
B Q 11 P R1 4 4. 0 2 K _ 1 %_ 0 4 *1 5 p_ 5 0 V _ N P O _0 4 2 1
VSSP_ SEN SE 5
* 2N 3 90 4 0_ 0 4 ? ? ? IC PIN5,6 ? ? ? ? *6 m li PJ 3 2
E
P R1 3 * 9 0. 9 K _ 0 4 F B _1 . 0 5 V S _ 6 12 7
5V
3, 6 , 3 5 1 . 5V S _C P U
P C1 9 P C2 1 PR1 5
9, 10 V T T _ ME M
3 5 , 3 6, 3 7 S Y S 1 5V
0. 0 1 u _ 16 V _ X 7R _ 04 *2 0 p _5 0 V _ N P O _ 04 10 K _ 1 % _0 4
1 3 , 1 4, 1 5 , 3 7 F B V D D Q
25 , 2 7 , 28 , 2 9 , 3 5, 3 7 5 V
11 , 3 5 , 3 6, 3 7 , 3 9 , 40 , 4 1 , 4 2 V I N
6 , 1 8 , 1 9, 2 0 , 2 4 , 25 , 2 9 , 35 , 3 7 , 3 9 1. 0 5 V S
3 , 6 , 8 , 9, 1 0 , 2 5 , 29 , 3 5 , 3 7 1 . 5 V
2 , 3 , 8 , 11 , 1 2 , 16 , 1 8 , 1 9, 2 0 , 2 2 , 23 , 2 4 , 2 5, 2 7 , 2 8, 29 , 3 0 , 33 , 3 5 , 3 7, 3 9 3 . 3 V
Power 1.5V/1.05VS/0.75V B - 39
Schematic Diagrams
Power V-Core1
1.05VS_VTT
P R 21 2 10 _ 04 P C 1 64 6 80 p _ 50 V _ X 7R _0 4
VCORE_1 P R 2 0 9 1 . 2 k_ 1 % _0 4
B~ 43 50
T RB S T
10/13 P R2 8 P R3 3 P R4 7 P R2 1 1 2 4 . 9 K _ 1% _ 0 4 P C 16 3
PUT COLSE
R T2 TO VCORE
13 0 _ 1% _ 0 4 *7 5 _ 04 5 4. 9 _ 1 %_ 0 4
A_ GN D
33 0 0 p_ 5 0 V _X 7 R _ 0 4 1 2
Phase 1
D02 CHANGE
5 H_ CP U_ S V IDD A T H_ C P U_ S V ID DA T 1 00 K _ N T C _0 6 _ B Inductor ? VALUE & FOOTPRINT
5 H _ C P U _ S V I D A L R T# H _ C P U _ S V I D A LR T# P C 29 1 0 0p _ 5 0V _ N P O_ 04 PC 3 4 2 2 p_ 5 0 V _N P O_ 0 4
Qua d 45 W CPU
DI FFOU T
5 H_ CP U_ S V IDC L K H _ C P U _S V I D C L K P R3 9 10 0 _ 04 P R5 0 10 0 K _ 1% _ 0 6
FB
P R3 6 PC 3 0 3 3 00 p _ 50 V _ X 7R _ 04 P R 32 7 5K _ 1 % _0 4 C SP1 40 VID1 = 0.9 V
P R4 0 1K _0 4 4 . 0 2 K _1 % _ 04 P R 35
TSE NSE 1 6 5K _ 1 % _0 6 Ic cM a x= 9 4A
P R4 6 10 0 K _ 1% _ 0 6
C SP3 40
R_LL= 1. 9m oh m
PR 4 1 20 K _ 1 % _0 4 P C3 1 2 2 0 0p _ 50 V _ X 7 R _ 04
OCP ~1 20 A
P C3 2 1 0 0 p_ 5 0V _N P O_ 0 4
5 V C OR E _V S S _S E N S E D02 CHANGE
C OM P_ CPU
TR BST
P C3 6 CSSU M
P R 2 07
? VALUE
R T1
PC3 3
P R2 1 4 1 0_ 0 4
CS N 1 40
1
0 . 1u _ 1 0V _X 7 R _0 4
10 0 0 p_ 5 0 V _X 7 R _ 0 4
CSCO M P
V R1 _C SREF
B~ 3 964 5 V C O R E _ V C C _S E N S E
I MO N
1 0 0K _N T C _ 0 6_ B
PR6 0 *1 5 mi l _s h o r t P R2 1 3 1 0_ 0 4
9 3 . 1 K _1 % _ 06
CS N 3 40 CS N 3 40
2
PR 7 5 0 _ 04 P C3 5
3.3VS 1.05VS A_ GND 10 0 0 p_ 5 0 V _X 7 R _ 0 4 P C3 7 0 . 0 4 7u _ 1 0V _ X 7 R _ 0 4
PR 7 4 * 0_ 0 4
3.3V
53
52
51
50
49
48
47
45
43
41
46
44
42
40
A_G ND PU 3 P R 45 5 . 49 K _ 1 %_ 0 4
A_ GN D A_G ND C SP3 40
6-13-93121-28B
D R O OP
NC 2
N C1
IL IM
C S S UM
EPAD
VSN
FB
C OM P
C S C OM P
DIF F O UT
T RB S T
I OU T
C S RE F
PUT COLSE P R4 8 P R 49 P R4 4 5VS C SN1
P R4 2 0_04 CS N 1 40
TO VCORE 10 K _ 0 4 1 0 K _0 4 * 7 5_ 0 4 1
VSP C S N2
39 C S N 2_ 5 V S
TSENSE
2 38 P C3 8 0 . 0 4 7u _ 1 0V _ X 7 R _ 0 4
HOT SPOT P R7 7 0_04 3 T S E NS E N C P 6 13 1 S CS P 2 37 CS N 3
3 H _ P R OC H OT # H_ CPU _S VIDD AT 4 V R H OT # C S N3 36 CS P P 3
5 S DIO CS P 3 35
Sheet 39 of 49 2 0 D E L A Y _P W R G D
H_ CPU _S VIDC LK
H_ CPU _S VIDAL RT# 6
VR_ RD YA
7
8
S CL K
A L E RT #
V R_ R DY
C S N1
CS P 1
D R ON
34
33
32
CSN 1
CS P P 1
D R ON
P R5 1
D R ON
5 . 49 K _ 1 %_ 0 4
40
C SP1 40
V R 1_ P W M 1 40
Power V-Core1 V R _ ON _E N A B L E _ 61 3 19
V R _O N P R5 2 0 _ 04 V R_ R DY A P W M 1/ A D D R 31
6 1 3 1_ VC C 10 E N A B LE P W M3 / V B O OT 30 P W M2 _ 6 13 1 V R 1 _P W M3 4 0
5VS P R5 3 2 . 2_ 0 6
PR 5 4 1 0K _ 0 4 11 V CC P W M2 / I S H E D 29 I MA X _ 6 13 1 PR5 5 0 _0 4 5VS P R2 1 5
A_G ND RO S C I MA X
TSE NSEA P R5 7 V R MP _V I N 1 2 28 VR1 _ PWMA P R2 1 8
VIN V R 1 _P W MA 4 0
D I F F OU T A
C S CO M P A
TSEN SEA 1 3 V RM P P W MA / I MA X A 27 P R5 9 10 K _ 0 4
5VS
D R OO P A
C S S UM A
1 K _ 1% _ 0 4 T S E NS E A V B O OT A * 10 K _ 0 4 1 0K _ 0 4
T RB S T A
CO M P A
I OU T A
I LI M A
C S NA
PR 5 8 P R5 6
V S NA
VSPA
CS P A
FBA
P C3 9 P R6 1 PC 4 0 PR2 1 9
P R 23 3 1 1 3K _ 1 % _0 4 1 0 K _ 04 76 . 8 K _ 1% _ 0 4
1
P C4 1 1 u_ 6 . 3 V _X 5 R _ 0 4 *1 4K _ 1 % _0 4 0 . 0 1 u_ 5 0 V _X 7 R _ 0 4 1 8. 7 K _ 1 %_ 0 4 P R2 3 2
14
15
16
17
18
19
21
23
25
R T4
20
22
24
26
OPTION: PJ 2 3
2 1 *6 m i l 1 13 K _ 1 %_ 0 4
DISALBE
1
V S N A _ 61 3 1
0 . 1u _ 1 0V _X 7 R _0 4
P R 2 16
V S P A _ 6 13 1
2
P J2 4 * 6 mi l
B~ 3 964 A_ GN D A_G ND V_GT ICC_ M AX_2 1h A_ GN D A_G ND
A_G ND
I MO NA
=R *1 0uA*25 6A/ 2V
1 0 0K _N T C _ 0 6_ B
A_ GN D
2
P C4 2 2 2 00 p _ 50 V _ X 7R _0 4 A_ GN D A_ GN D
CSN A
8 . 2 5 K _1 % _ 04
IMO NA I MO N CSPPA P C 48
P R 72 0 . 0 4 7u _ 1 0V _X 7 R _ 0 4 CS N A 40
C SSUM A
C SPA 40
P R6 9 P C4 6 P R 2 10 P C 1 65 C SCO MPA P C4 9 10 0 0 p_ 5 0 V _X 7 R _ 0 4 6 3 . 4K _ 1 % _0 6 P R6 4
4 . 87 K _ 1 % _0 6 C SPA 40
2 4. 9 K _ 1 % _0 4 22 K _ 1 %_ 0 4 0 . 1u _ 1 0V _ X 5 R _ 0 4 PR 6 2
A_ GN D 0. 1u _ 10 V _ X 5 R _ 04 1 3 . 7 K _1 % _ 04 0 2
PUT COLSE C OM PA P C4 5 68 0 p _5 0 V _ X7 R _0 4 D02 CHANGE
TO V_GT D IFFO UTA
? VALUE
HOT SPOT A_ GN D A_ GND A_G ND A_ GND P R7 0 P R 73
P R6 5 1 0 _1 % _ 04 7 5K _ 1 % _0 4 16 5 K _ 1% _ 0 6
P R 2 3 1 0 0_ 0 4 P C4 4 6 8p _ 5 0V _ N P O_ 0 4 R T3
PR 7 1 1 2 Q ua d V CCAXG
P R 6 6 0 _0 4 1K _0 4 VI D1= 1 .15 V
6 V S S _ G T_ S E N S E
FBA PC 4 3 1 0 0 K _N T C _ 06 _ B
B~ 435 0 I ccM a x = 26 A
P C 47 1 0 0p _ 5 0V _ N P O_ 0 4
P R 6 7 0 _0 4 1 0 00 p _ 50 V _ X 7R _ 04
R_ L L= 3 .9m ohm
6 V C C _ GT _ S E N S E
PC 5 0 PUT COLSE O CP~ 31 A
P R6 8 3 . 01 K _ 1 %_ 0 4 3 3 00 p _ 50 V _ X 7R _ 04
P R 2 5 1 0 0_ 0 4 TO V_GT
40 V _ GT Inductor
3 .3 V S
1 0 K _0 4
P R 23 8
1
PJ 4
*6 m i l
2
P R6 3 *1 5 m li _ sh o rt
V R _ ON
1 1 , 20 , 3 4 A L L_ S Y S _P W R G D
2 , 3, 8 , 1 1 , 12 , 1 6 , 18 , 1 9 , 20 , 2 2 , 23 , 2 4 , 2 5, 2 7 , 2 8, 2 9 , 3 0, 3 3 , 3 5, 3 7 , 3 8 3. 3 V
2, 3 , 5 , 2 3, 2 4 , 2 5, 3 5 1 . 0 5V S _ V T T
6 , 1 8, 1 9 , 2 0, 2 4 , 2 5, 2 9 , 3 5, 3 7 , 3 8 1. 0 5 V S
1 1 , 3 5, 3 6 , 3 7, 3 8 , 4 0, 4 1 , 4 2 V I N
1 1 , 18 , 2 4 , 2 5, 2 7 , 2 8, 3 1 , 3 2, 3 3 , 3 5, 4 0 , 4 1 5V S
3, 9 , 1 0 , 11 , 1 2 , 18 , 1 9 , 20 , 2 1 , 22 , 2 3 , 24 , 2 5 , 2 7, 2 8 , 2 9, 3 0 , 3 1, 3 2 , 3 3, 3 4 , 3 5 3. 3 V S
B - 40 Power V-Core1
Schematic Diagrams
Power V-Core2
VIN
VCORE_2 P C 1 54 PC1 5 3 P C1 5 2 +P C 17 7
* 4. 7u _ 25 V _ X 5 R _ 0 8
3 3 0U _ 25 V
*4 . 7 u _2 5 V _ X 5R _ 08
0 . 1 u _5 0 V _ Y 5V _ 0 6
P R 31 2. 2 _ 0 6 P C2 7 0 . 22 u _ 10 V _ X 7R _ 06 PQ 4 1 P Q4 0
D02 CHANGE
M D U 26 5 7 M D U 2 65 7
? ? DIP?
D
P U2 NCP 5 9 1 1 G G
D02 CHANGE
S
CHANGE VALUE 1
BST HG 8
V R E G_ S W 1 _ H G P L7
TM P B 1 23 5 MP -R 3 6M -Z 0 1
2 7 V R E G_ S W 1 _ OU T 1 2 V COR E V C OR E 5
39 V R 1 _ P W M1 P WM SW PQ 4 3 P Q 42 P Q6
C
PR 3 0 3 M D U 26 5 4 M DU2 6 5 4 M D U 2 65 4 P D4
G ND 6
D
39 D RO N 2 K _ 1 %_ 0 4 EN 1 2
4 V R E G_ S W 1 _ L G
5VS V CC LG 5
G G G PL 1 4
PAD * TM P C 1 0 04 H -R 3 6 M-Z 0 1 P R 2 7 *1 5 mi l _ sh o rt
S K 3 4S A
CS N1 39
A
P C 28 9
1 u _6 . 3 V _ X 5 R _ 04
PR 2 6 *1 5 mi l _ sh o rt
CS P 1 39
PC1 3 8 PC2 4 PC2 3 P C2 5

+
1 5 u_ 2 5 V _6 . 3 *4 . 4
4 . 7 u _2 5 V _ X 5 R _ 08
4 . 7 u _2 5 V _ X 5R _ 08
0 . 1 u _5 0 V _ Y 5V _ 0 6
P R 20 3 2. 2 _ 0 6 P C 1 46 0 . 22 u _ 10 V _ X 7R _ 06 VIN
PQ 3 8 P Q4
M D U 26 5 7 M D U 2 65 7
D
D02 CHANGE P U1 0 NCP 5 9 1 1 G G
CHANGE VALUE
S
V R E G_ S W 3 _H G
39 V R 1 _ P W M3
1
2
BST
P WM
HG
SW
8
7 V R E G_ S W 3 _O U T
PQ 3 6 PQ 3 P Q3 3
P L4
TM P B 1 23 5 MP -R 3 6M -Z 0 1
1 2 V COR E
V C OR E 5
Sheet 40 of 49
39 D RO N P R1 9 7 3 G ND 6 M D U 26 5 4 M DU2 6 5 4 M D U 2 65 4
Power V-Core2
C
2K _1 % _ 04 EN PD 2 2
4 5 V R E G_ S W 3 _L G 1 2
5VS V CC LG G G G
PAD PL 1 3 PR 2 1 *1 5 mi l _ sh o rt C S N3 39
SK3 4 SA
P C1 4 2 9 * TM P C 1 0 04 H -R 3 6 M-Z 0 1
A
1u _ 6 . 3V _X 5 R _ 0 4
PR 2 0 *1 5 mi l _ sh o rt C SP3 39
VIN
PC1 6 9 P C 1 68 P C1 6 7
VGFX_CORE
4 . 7 u_ 2 5V _X 5 R _0 8
4 . 7u _ 2 5V _ X 5 R _ 0 8
0 . 1u _ 5 0V _ Y 5 V _ 0 6
PR 7 6 2. 2 _ 0 6 P C5 1 0 . 2 2 u_ 1 0 V _X 7 R _ 0 6 PQ 8
M D U 26 5 7
D
PR 2 9 *1 5 mi l _ sh o rt
V _G T 39
G
PU4 N C P 59 1 1 VGFX_CORE
D02 CHANGE
S
CHANGE VALUE 1
BST HG 8 VRE G_ SWA_ HG PL 8
T MP C 1 00 4 H -R 3 6M -Z 0 1
2 7 VRE G_ SWA 1 2 V GFX_ COR E
39 V R 1 _ P W MA PW M SW PQ 4 7 P Q7
P R7 8 3 M D U 26 5 4 *M D U 2 6 5 4
GN D 6
D
39 DRO N 2 K _1 % _ 04 EN PD5
4 VRE G_ SWA_ L G
5VS V CC LG 5
G G P C 1 62 P C1 6 6
PA D P R 37 * 1 5m i _l s h ort
S
CSN A 39
SK3 4 SA
* 33 0 u _2 . 5 V _ V _ A
PC 5 3
5 60 u _ 2. 5 V _ 6 . 6* 6 . 6* 5 . 9
9 +
A
+
1 u_ 6 . 3 V _X 5 R _0 4
Colay
P R 43 * 1 5m i _l s h ort CSPA 39
5 V C OR E
P C1 4 9 PC1 3 9 P C 1 55 P C 1 57 P C 1 36 P C 14 3 P C 2 6 P C1 8
5 6 0u _ 2 . 5V _ 6 . 6 *6 . 6 *5 . 9
5 6 0u _ 2 . 5V _ 6 . 6 *6 . 6 *5 . 9
5 60 u _ 2. 5 V _ 6 . 6 *6 . 6* 5 . 9
5 60 u _ 2. 5 V _ 6 . 6* 6 . 6* 5. 9
+ +
* 33 0 u_ 2 . 5 V _ V _A
*3 3 0 u_ 2 . 5 V _V _A
5 60 u _2 . 5 V _ 6 . 6* 6. 6* 5. 9
*5 6 0u _ 2 . 5V _ 6 . 6 *6 . 6 *5 . 9
+ + + + + +
6 V GF X _ C O R E
5 V CO RE
1 1 , 35 , 3 6 , 37 , 3 8 , 39 , 4 1 , 42 V I N
1 1 , 18 , 2 4 , 25 , 2 7 , 28 , 3 1 , 32 , 3 3 , 35 , 3 9 , 41 5 V S
3 , 9 , 1 0, 1 1 , 1 2, 1 8 , 1 9, 2 0 , 2 1, 22 , 2 3 , 24 , 2 5 , 27 , 2 8 , 29 , 3 0 , 31 , 3 2 , 33 , 3 4 , 35 , 3 9 3 . 3V S
Power V-Core2 B - 41
Schematic Diagrams
Power VGA NVVDD

0.8125V 0.8625V 0.9125V
NVVDD_VID0 1 0 1 (GPIO5)
D 0 2 C H A NG E
? ? FO R N V VD D ? ? ? ?
3V 3 _R U N 3V 3_R U N 5 VS
1K _1 %_0 4
1K _1 %_0 4
1 K_ 1%_ 04
*1K _1 %_0 4
*1 K _1% _04
*1 . 91K _1 %_0 4
1K _1% _04
P C 24 3
1 u_2 5V _0 8
PD 1 8 P D2 5
A
R B0 540 S 2 R B0 54 0S 2
VI N
P R 235
C
P R 13 1
P R 31 3
P C 24 8 1u_ 25 V_ 08 P C2 44 1u _25 V _08 GN D _6 220
P R 141
PR 1 39
PR 1 30
PR 3 12
Input ? ? VIN? ? Hi side Mosfet
B OOT1 _62 20 P C3 P C4 P C2 PC 5 PC 9 8
16 NV V D D _V I D 0 P R 5 *10 mi _l sho rt
16 NV V D D _V I D 1 P R 6 *10 mi _l sho rt PR 2 96 0_ 06 P R 29 7 0_ 06 D 0 2 C H A NG E 4 . 7u_ 25 V_ X5 R _08 4 . 7u_ 25 V_ X5R _ 08 4 . 7u_ 25 V_ X5R _ 08 4. 7u _25 V _X5 R _08 4. 7u _2 5V _X 5R _0 8
P R 14 2 *10 mi _l sho rt PQ2 1
16 NV V D D _V I D 2
F O R E M I C H A N GE MD U 265 7 N12E_VGA
D
3V 3_ R U N GN D _62 20 G Input ? ? GND? ? Low side Mosfet
1K _1 %_0 4
1 K_ 1%_ 04
1K _ 1%_ 04
P R 281 2. 2_ 06 V GA _V C OR E
D0 2 C HA N G E T MPCPL1 004
12 P J11 N V VD D
S
PQ1 P Q22 H -R 56M-Z 01
40 A
C LK EN # _6 220
MD U 265 4 MD U 2 654 PD1 CH A N G E V A L UE 1 2 1 2
V R _ON _6 22 0
C
P R 280 P R 28 5
P R 16 5 *12 mm
G G
10 K_ 04
1 0K _04
PC 1 03
P C 10 6
P C 99
P C9 7
P C 11 1
5. 1 _0 6
PC 9 4
P C 95
P R 2 98 P R 123
S
P R 14 0
0 _0 4
P R 17
P R 136
0_ 04
A
+ + + + +
Sheet 41 of 49
S K3 4S A
PU 7 P R 291
40
37
35
31
39
38
36
34
33
32
U G1,P H1,L G1? ? ? ? ? ? ? ? ? ? MOS FET P C 23 9 1_ 04
V ID6
V ID5
V ID3
V ID2
V ID1
OS M
EN
C LK _E N #
VI D 4
VI D 0
L AYOU T? ? ?
56 0u_ 2. 5V _ 6. 6*6 . 6*5. 9
5 60u _2 .5 V _6. 6 *6. 6*5 . 9
*33 0u_ 2. 5V _V _ A
*3 30u _2 .5 V_ V _A
0 . 1u_ 10 V_ X7 R _0 4
0. 1u _1 0V _X 7R _ 04
5 60u _2 . 5V _6. 6 *6. 6* 5. 9

U P 622 0A 22 0p _50 V _N P O_04
D 0 2 CH A N G E P R 299
Power VGA NVVDD 3 7 P S_ N VV D D _P GOOD

P SI #_ 62 20 2
1
POK
PS I #
BOOT 2
U G2
30
29
F O R EM I C HA N G E
P R 295 2. 2_ 06 Input ? ? VIN? ? Hi side Mosfet VIN
12 K _1% _04
V IN
D 02 C H AN G E
28
P H2
27 P C9 PC 1 0 P C 11 P C 12 P C 10 7
PR 2 87 33 K_ 1%_ 04 P GN D 2
3 26 4 . 7u_ 25 V_ X5 R _08 4. 7u _2 5V _X5 R _0 8 4. 7 u_2 5V _X 5R _0 8 4 .7 u_ 25V _X 5R _ 08 4 .7 u_ 25V _ X5R _ 08
GN D_ 62 20 RT L G2 PQ2 9
H _P R OC H OT# _62 20 4 GND MD U 265 7
D
P R 28 8 1 00K _0 4 VR _ TT#
TM_ 622 0 5
5V S TM G
P R2 89 0_ 04 Input ? ? GND? ? Low side Mosfet GND D0 2 C HA N G E
6 25
S
PR 2 90 *82 0_1 %_0 4 EA P PV C C PR 3 00
24 ? ?
5 VS VI N V IN
PR 2 76
P C 24 5 *0. 01 u_ 50V _ X7R _ 04 23 20 0K _1% _04
*10K _ 1%_ 04 7 L G1 D 0 2 C H A N GE PL 15
C OMP 22 T MPC 1 004 H -R 56M-Z 01
C H A NG E V AL U E
PS1_ VDD_ SENS E , V GA_V CORE , P S1_G ND_S ENSE ? ? ? ? ? ? ? ?
P R 30 1 *2 2_ 1%_ 04 8 P GN D 1 P C 25 1 1 2
FB 21
P C 2 50 10 0p_ 50 V_ N PO_ 04 9 P H1 1 000 p_ 50V _X 7R _ 04 PQ3 0 P Q32
TB
D A C /S S
D0 2 C HA N G E MD U 265 4 MD U 2 654 P D 23 T M_62 20
F B R TN
1 SE N 1
B OOT1
A GN D
C
R AM P
I MON
P C 2 49 0. 01 u_ 16V _X 7R _ 04 10 P R 159
CS N
VCC
CS P
U G1
1S EN 2 5. 1 _06
G G P R 3 02 PR 3 03 P R 30 4
1
P R 292 15 K_ 1%_ 04 GN D _6 22 0 0 _0 4 0_0 4 R T5 1 _04
S
15
17
11
12
13
14
2. 2_ 04
16
18
19
20
41
GN D _62 20
A
S K3 4S A
P R 279 0_0 4 P C 246 100 K_ N TC _ 06_ B
U G2,P H2,L G2? ? ? ? ? ? ? ? ? ? MOS FET
2
22 0p_ 50 V_ N PO_ 04
B OOT1 _6 220
P C 25 2 P R 28 6 L AYOU T? ? ?
PR 2 36
P R 124 *0 _04 PR 3 06 0_ 04 P R 30 5 0_0 4 PR 3 07
1 0K _1 %_0 4 GN D _ 62 20 NT C ? ? ? ? ?
12 PS 1_ VD D _ SE N S E
2 200 p_ 50 V_ X7R _ 04
P R 12 6 0 _04 P R 29 4
1 0K _1 %_0 4 12 K_ 1%_ 04
V GA _V C ORE
PJ 27 P R 29 3 1 K_ 1%_ 04 5V S
2 1
P C 10 2
*6mi l P C 247
*1 000 p_ 50V _ X7R _ 04 P R 28 2 44 .2 K _1% _04
1u _25 V_ 08
PR 1 25 ? ? ? ? ? I C U P 6 22 0 P i n1 6
*0_ 04
12 P S 1_GN D _ SE N S E P R 283
P C 253 *5 _1% _04
V GA_ VC OR E
P R 127 0_ 04
D 0 2 C H A NG E P R 30 8 0 . 1u_ 10 V_ X7R _ 04
P J 25
2 1 GN D _ 622 0 PR 3 09 5 60_ 04 R T6
*0_0 4 10 0K _N TC _ 06 _B
* 6mi l PC 2 54 P C 24 0 2 1
V I N P R 28 4 10K _1 %_ 04 I MON _6 22 0 0 .0 1u _50 V_ X 7R _0 4
220 p_ 50V _N P O_0 4 *1 u_1 0V _Y 5 V_ 06
3V 3_ R U N
2 K _1% _04
GN D _6 220
P C 24 2
P R 129 1 0K _0 4 V R _ON _ 62 20
100 0p _50 V _X7 R _04
PC 2 41
0. 0 47u _1 0V _X7 R _0 4
P R 2 34
P C 23 5
GN D _6 22 0
P C 10 0
D 0 2 C H A N GE *2 20 0p_ 50 V_ X7R _ 04
GND _ 62 20 17 NV V DD
D 0 2 C H A N GE 1 1, 35 , 36, 3 7, 38 , 39, 4 0, 42 V I N
? ? P J4 4 F OR N V V DD C V T E S T 11 ,1 8, 24 , 25 ,2 7, 28 , 31, 3 2, 33 , 35, 3 9, 40 5 VS
1 8, 27 , 28, 3 0, 34 , 35, 3 6, 42 V D D 3
GN D _6 22 0 3, 6, 8 ,9 , 10, 2 5, 29 , 35, 3 7, 38 1 . 5V
12 , 16 3 V3 _R U N
2 3, , 8, 11 , 12, 1 6, 18 ,1 9, 2 0, 22 ,2 3, 24 , 25, 2 7, 28 , 29, 3 0, 33 , 35, 3 7, 38 ,3 9 3. 3 V
B - 42 Power VGA NVVDD
Schematic Diagrams
AC_IN, Charger
VA
Ch ar ge Cu rr en t 3 .0 A
P Q2
V IN
4
ME P 44 3 5 Q8 Ch ar ge Vo lt ag e 1 2. 6V
1 5
2 6
To ta l P ow er 1 10W
VA 3 7
J _ D C -J A C K 1 P L1 8
5 0 9 32 -0 0 30 1 -0 01 H C B 45 3 2 K -8 00 _ 1 8 P Q 26 A
P D 1 5 03 Y V S P L3 P R2 4 7 B AT
1 P R 1 63 0 . 0 2 _1 % _ 32 2 0 6 03 H - 6R 8M -Z 0 1 0 . 0 2 _1 % _ 32
2 1 7
GN D 1 P R2 4 6
GN D 2
4 . 7 u _2 5 V _ X 5 R _ 0 8 P C 1 09
P C1 0 8
P C 1 12
P C 1 14
5
6
10 0 K _ 04
P C 2 11
P C 2 10
P C 2 26
8
PC 9 1 P C9 2 P R 24 8 P C9 3 Z321 4 P C2 1 2
Z 3 2 1 53
4 . 7u _ 2 5V _X 5 R _0 8
4 . 7 u _2 5 V _ X 5 R _ 08
4 . 7 u _2 5 V _ X 5R _ 08
0 . 1 u _5 0 V _ Y 5 V _ 06 1 0 K _0 8 0 . 1 u_ 5 0 V _Y 5 V _ 06 P R 24 9 0. 1u _ 5 0V _ Y 5V _ 0 6
0. 1u _ 50 V _ Y 5V _ 0 6 0 _ 04
4 . 7 u _2 5 V _ X 5R _ 08
4 . 7 u _2 5 V _ X 5R _ 08
P R2 5 1 P R 25 0 0 _ 04 P Q 26 B
0 . 1 u _5 0 V _ Y 5 V _0 6
4
P D 15 0 3 Y V S
20 K _ 1 %_ 0 4 Z3213
P Q4 4
ME P 4 4 3 5Q 8 0 . 1 u_ 5 0 V _ Y 5 V _ 06
8 P C 2 13 PC2 1 4 1 u _2 5 V _ 08
Z3211
Z 3 21 0
Z 3 21 2
7 3
6 2 C A
VA 5 1 P D2 0 R B 05 4 0 S 2
S GN D 5 P C 2 15 PC2 1 6
PQ 2 7
D02 CHANGE Z 32 0 3
4
8
M E P 4 43 5 Q8 ADD P R2 5 2 0 _0 4 C TL *4 . 7 U _ 2 5V _X 5 R _ 0 8 4. 7U _2 5 V _ X 5R _0 8
28
27
26
25
24
23
22
7 3 PU 8
6 2 P C 2 17
O U T -1
OU T -2
C
P G ND
CB
VS
VB
X A CO K
5 1 1 21
2 V CC C TL 20 0 . 1 u _5 0 V _ Y 5 V _ 0 6
P R2 5 3 Z 32 0 4 3 -I N C 1 GN D 19 VR EF
+ INC 1 V RE F
4
P D2 4 10 0 K _ 0 6 Z 32 0 5 4 18 Z3219 P R 25 4 3 9. 2K _ 1 % _0 4
U D Z 1 6B 5 A CI N
A CO K
TRERMAL PAD R T
CS
17 Z3220 P C 15 6 0 . 2 2u _ 1 0V _ X 5 R _ 0 4
Sheet 42 of 49
A
6 16 Z3221
Z 3 5 28 Z 3 5 27 Z 32 0 6 7 CV M O UT D 15
O UT C 2
D02 CHANGE + INE 1 -I N E 3
+ INC2
-I N C 2
+I N E 2
-I N E 2
F B 1 23
-I N E 1
P R2 5 6
1 0K _ 0 6
P R2 5 7
20 K _ 0 6
P R 25 5
1 6. 2K _ 1 % _0 4 P R 2 58
M B 3 9A 1 1 9
S GN D
29 P R2 5 9
1 0 0 K _ 1% _ 0 4
S GN D 5 AC_IN, Charger
8
9
10
11
12
13
14
2 3 . 7 K _ 1% _ 0 4
V DD3 S GN D 5 -I N E 3
Z 3 5 30 P R2 7 1 4 7 0 K _0 4
34 T OT A L _ C U R
C
R 20 7 10 K _ 0 4 P C2 1 9
Z 3 5 29 B P Q6 5 R 21 5 4. 7 K _ 0 4 P C2 1 8 22 0 0 p_ 5 0 V _X 7 R _ 0 4
2N 3 90 4 R 21 2 4. 7 K _ 0 4 P C 2 20 68 0 0 p_ 5 0 V _X 7 R _ 0 4
Z 3 20 9
6 8 0 0p _ 50 V _ X 7 R _ 0 4
E
C P R 26 1 Z 3 22 3 P C2 2 1 P R2 6 4 P C 2 22
P R2 6 0 S MC _ B A T AC S GN D 5 P C1 6 1 Z 32 0 7
A
22 p _ 50 V _ N P O_ 04
20 0 K _ 1% _ 0 4
47 p _ 50 V _ N P O _ 04
1 00 K _ 0 6 D 10 1 0 0K _1 % _ 04 P R2 6 3 P R2 6 6
? ? BAT? B A V 9 9 R E CT IF IE R P R 2 65 P R 2 62
C 0 . 02 2 u _1 6 V _ X7 R _0 4 10 K _ 1 %_ 0 4 33 K _ 1 %_ 0 4 P C2 2 3 P C2 2 4
S MD _ B A T AC 4 7 K _ 1% _ 0 4 1 0 K _ 1% _ 0 4
D 11 A Z 3 20 8 0 . 01 u _ 16 V _ X 7R _ 04 0. 0 1 u _1 6 V _ X 7R _0 4
B A V 9 9 R E CT IF IE R
C P R 26 7 Z 3 22 4
B A T _ DE T AC 1 1 3 K _ 1% _ 0 4
D 7 A + INE 2
B A V 9 9 R E CT IF IE R
C
B A T _ V OL T AC
34 B A T _ V O LT D 8 A PR2 7 7 D02 CHANGE
B A V 9 9 R E CT IF IE R V RE F + IN E 2 VR EF -I N E 3
DEL
1 M_ 0 4
P R 27 8
1 . 5 M_ 0 4
P R 26 8 J BATT A2
B A T_ D E T 1
P R 1 85 3 3 K _ 1% _ 0 4 9/13 P R 27 2
A C_ IN 36 34 B A T _D E T S MD _ B A T 2
1 0 0 K _0 4 1 M_ 0 4 2 8 , 3 4 S MD _ B A T 3
S MC _ B A T
3
Support Intel V-Pro Function P Q 6 2A D P Q6 2 B P R 27 3
VH =3 S2 P/ 3A M T D N 7 0 0 2Z H S 6 R MT D N 7 00 2 Z H S 6 R 2 8 , 3 4 S MC _ B A T 4
V DD 3 5G 3 00 K _ 1 % _0 4
S 5
VL= 3S 1P /1 .5A
6
3
D D t B T D -1 0 1 00 0 9
2G
P C 1 97 V H= 12. 6V ( 22 00m AH c el l)
5G
P Q6 6 B Battery Voltage:
P R1 5 0
3 4 CE L L _ CO NT RO L S 0 . 0 1 u_ 5 0 V _X 7 R _ 0 4 V L= 12. 9V ( 28 00m A ce ll ) S 9V~12.6V
1
4
1
10 K _ 0 4 MT D N 7 0 02 Z H S 6R D02 CHANGE
6
P D 1 9 *U D Z 1 6 B PJ 2 2 P R 1 84 D
P R1 8 6 6-21-D34C0-105 ? ? &
A C_ IN # 28 , 3 4
1
C A 1 00 K _ 0 4 *O P E N _ 1 0 mi l -1 MM 1 . 5 M_ 0 4 2G S G ND5
34 V S H G_ S E L PIN? ? ? ?
2
3
D S P Q6 6 A PJ 4 0
1
P Q2 3 B MT D N 70 0 2 Z H S 6 R *O P E N _ 1 0 m li -1 MM
5G
VA
2
S MT D N 70 0 2 Z H S 6 R
4
P R1 6 0 1M _ 04 S G ND 5
P R1 4 9 S G ND 5
S GN D 5 P R 27 0 *1 5 mi l _s h o rt _ 06
20 0 K _ 1 %_ 0 4
SYS3 V V IN
S G ND5
P R 1 69 P C1 7 8 P C2 2 5 PC 1 4 P C1 3
PQ 2 4 P R 1 61
A O 3 40 9 3 0 K _ 1% _ 0 4 1 0 0 K _0 4 0 . 1 u_ 5 0 V _ Y 5 V _ 06 0 . 1u _ 5 0V _Y 5V _0 6 0 . 1 u _5 0 V _ Y 5 V _ 06 0 . 1u _ 5 0V _ Y 5V _ 0 6
BAT S D B A T_ V O LT
C TL BAT
3
P R1 6 2 D
G
2 00 K _ 1 %_ 0 4 P Q 2 8B
P R 16 4 1 0 0 K _0 4 5G P C6 PC 7 P C8 P C2 5 5
SYS3 V
P R 15 1 P C 11 0 S
4
P Q 2 3A M TD N 7 0 0 2Z H S 6 R 0. 1 u _ 50 V _ Y 5 V _ 0 6 0 . 1 u_ 5 0 V _Y 5 V _0 6 0 . 1 u_ 5 0 V _ Y 5 V _ 06 1 00 0 p _5 0 V _ X7 R _0 4
6
D 6 . 0 4K _1 % _ 04 0 . 1 u_ 1 6 V _Y 5 V _ 04 D
MT D N 7 00 2 Z H S 6 R
2G 2G
1
SYS3 V 34 C H G_ E N
S S P Q2 8 A PJ 1 3
1
MT D N 7 00 2 Z H S 6R * OP E N _ 10 m i -l 1 MM
3 5 , 36 , 3 7 S Y S 1 5 V
2
35 VA
3 5 ,3 6 SYS5 V
18 , 2 7 , 28 , 3 0 , 3 4, 3 5 , 3 6 V D D 3
1 1 , 3 5, 3 6 , 3 7, 3 8 , 3 9, 4 0 , 4 1 V I N
AC_IN, Charger B - 43
Schematic Diagrams
W150HNM Audio Board

USB PORT(PORT3)
A _ US B V CC
A L6 A _ US B V C C2
H C B 1 6 08 K F -1 2 1 T2 5 60 mil
A C1 9 AC1 1 A C3
+ +
A _ US B V C C *1 00 u _ 6. 3 V _ B _ A 2 20 u _ 6. 3 V _ 6 . 3* 6 . 3* 4 . 2 0. 1 u _ 10 V _ X 7R _ 04
A _5 V A J_ U S B 1
A U1 1
5 6
60 mil V+
F L G# V OU T1 A U S B _P N 8 _R 2
60 mil A G ND
2 7 D A TA _L
V IN 1 V OU T2 A U S B _P P 8_ R 3
A C 15 A C1 6 A C1 7
A C 13 3 8 A L7 D A TA _H
V IN 2 V OU T3 4
GN D 1
GN D 2
0 . 1 u_ 1 0 V _ X5 R _ 0 4 0. 1 u _ 10 V _ X 5R _ 04 1 0u _ 1 0V _ Y 5V _ 0 8
1 0 u_ 1 0 V _Y 5 V _0 8 4 1 A U S B _P N 8 4 3 G ND
EN # GN D
R T 97 1 5 B GS A U S B _P P 8 1 2 C 1 07 7 0 -10 4 A 3
G ND1
G ND2
* W C M 2 01 2 F 2 S -1 61 T 0 3-s h o rt
A GN D A GN D A GN D
9/6 EMC DVT request
A GN D
? ? ? OK, PVT? ? short? A GN D
Sheet 43 of 49
W150HNM Audio
Board S P D I F _P I N 5 5 A J_ S P D I F 1
S P D I F _P I N 4 4
AUDIO BOARD ? ?? ?? ?? ?? A S P D IF O
A C8
0. 0 1 u _5 0 V _ X7 R _0 4
A S P D I F O -R A L5 F C M1 0 0 5K F -10 2 T 02 A S P D I F O_ R 2
3
S P D I F _P I N 6 6 L
R
A US B _ P N 8 AR 5 52 0_ 0 4 A US B _P N 8 _A U D1 1
AR 6 45 *0 _ 04 A US B _P N 8 _A U D2 AR 3 A C9 2 S J -T3 5 1 -S 23
CO-Ray DIFF USB8P&N? ? ? ? A US B _ P P 8 AR 6 56 0_ 0 4 A US B
A US B
_P P 8 _ A U
_P P 8 _ A U
D1
D2
AR 6 57 *0 _ 04 2 2 0 _0 4 10 0 0 p_ 5 0 V _X 7 R _ 0 4
A _5 V SPDIF OUT
A J _ A UD 2 A _5 V
20 N C2
A J _ A UD 1 BLACK
19 N C1 16 AJ _ SPKL 1 A GN D
18 15 A MI C 1-R A S P K O U T R -_ R A MI C _ S E N S E 5 A J_ M I C 1
17 14 A M I C 1 -L A S P K O UT R+ _ R 1 4
16 13 2 A MI C 1 -R A MI C 1 -R _R 3
AL 3 F C M 1 00 5 K F -1 2 1T 0 3 R
10/22
A M I C 1 -R 15 12 A H E A D P H O N E -R 8 5 2 04 -0 2 00 1
A M I C 1 -L 14 11 A H E A D P H O N E -L A MI C 1 -L A MI C 1 -L _ R 2
A GN D AL 4 F C M 1 00 5 K F -1 2 1T 0 3
A _ A UD G 13 10 A M IC_ S E N S E A C 18 A C1 4 MI C _P I N 6 6 L
A H E A D P H ON E -R 12 9 A S P K _ HP # 1
A H E A D P H ON E -L 11 8 A HP _ S E N S E 1 8 0p _ 5 0V _ N P O_ 0 4 1 80 p _ 50 V _ N P O _ 04 AC 2 A C7 2 S J -T3 5 1 -S 23
A M IC_ S E NS E 10 7 A S P K OU T R -_R
ASPK_ H P# 9 6 A S P K OU TR + _R 68 0 p _5 0 V _ X 7R _0 4
A H P _S E N S E 8 5
6 8 0 p_ 5 0 V _X 7 R _ 0 4
MIC IN
A S P K O U T R -_ R 7 4 A U S B _P N 8 _A U D 1
A S P K O UT R+ _ R 6 3 A U S B _P P 8 _ A U D 1 Re sist or 32 or 33 _0 4 BLACK
5 2
A G ND
A U S B _P N 8 _A U D 2 4 1
A S P D IF O me e t W LK Te st A HP _ S E N S E
VT1802P A GN D A _ A U DG
A U S B _P P 8_ A U D 2 3
A S P D IF O 2 33_1%_04 A S P K _ HP # 5 A J_ H P 1
8 7 21 3 -1 60 0 G
1 4
* 87 1 51 -2 0 07 G A H E A D P H ON E -R A R 4 2 4 0_ 1 % _0 6 A H E A D P H ON E -R - R A L1 F C M1 0 0 5K F -12 1 T 03 A H E A D P H O N E -R _R 3 R
A H E A D P H ON E -L A R 5 2 4 0_ 1 % _0 6 A H E A D P H ON E -L -R A L2 F C M1 0 0 5K F -12 1 T 03 A H E A D P H O N E -L _ R 2
A G ND A _ A UD G 6 L
1
AR 1 A R2 AC 6 A C5 2 S J -T3 5 1 -S 23
A H3 A H2
C 5 6D 5 6 C 5 6D 5 6 *1 K _ 0 4 * 1 K _0 4 68 0 p _5 0 V _ X 7R _0 4
La yout note : 6 8 0 p_ 5 0 V _X 7 R _ 0 4 HEAD PHONE
He a dphone? ? ? ? > 1 0mi ls BLACK
? ? phone j a ck ? ?
A _ A U DG
? ?? ?? ??
AH5 A H1 AH 4 A C1 0 0 . 1 u _1 0 V _ X 5R _0 4
R/ L? ? ? ? G ND? ? ? ? 3 *? ?
2 9 2 9 2 9
3 8 3 8 3 8 A C1 0 . 1 u _1 0 V _ X 5R _0 4
4 1 7 4 1 7 4 1 7 G ND
5 6 5 6 5 6 A C1 2 0 . 1 u _1 0 V _ X 5R _0 4 H P-L
3* R/L ? ?
MT H 6 _ 0 D 2 _ 2 MT H 7 _ 0D 2 _8 M TH 7 _0 D 2_ 8 A C4 0 . 1 u _1 0 V _ X 5R _0 4 H P-R
G ND
A GN D A G ND A GN D A G ND A GN D A GN D A GN D A _ A UD G
B - 44 W150HNM Audio Board
Schematic Diagrams
W150HNM Second HDD Board

OJ _OD D 1
S1 OJ _SA TA 1
S2 OC 15 0.0 1u_16V _X7R _04 O _D S ATA _TXP 2 O_H SA TA _TXP 1 16 1 O_D SA TA _TXP 2
S3 OC 16 0.0 1u_16V _X7R _04 O _D S ATA _TXN 2 O_H SA TA _TXN 1 17 16 1 2 O_D SA TA _TXN 2
S4 18 17 2 3
S5 OC 17 0.0 1u_16V _X7R _04 O _D S ATA _R X N 2 O_H SA TA _R XN 1 19 18 3 4 O_D SA TA _R XN 2
S6 O _D S ATA _R X P2 O_H SA TA _R XP 1 20 19 4 5 O_D SA TA _R XP 2
OC 18 0.0 1u_16V _X7R _04
S7 21 20 5 6 O_S A TA _OD D _PR SN T#
22 21 6 7
O _3. 3VS 22 7
23 8 O_S ATA _OD D _D A #
OG N D 24 23 8 9
P1 O _S ATA _OD D _P R S N T# 25 24 9 10
P2 O_H D D _5V S 26 25 10 11 O_Z ero_OD D _5V S
O_Z ero_OD D _5V S 26 11
P3 27 12
P4 O_S A TA_O D D _D A# OC 10 28 27 12 13
P5 + 29 28 13 14
P6 220u_6. 3V _6. 3*6. 3* 4. 2 30 29 14 15
30 15
F P->A T13 035 BAA 089
A T13035B A A 089 C 9903 26 88028-3010
OG N D OGN D OG N D OG N D
6-21-C1D6 0-215
W150HNM Zero Power
Sheet 44 of 49
OJ _H D D 1
S1
Gen3 W150HNM Second
S2
S3
OC 11
OC 12
0. 01u_16V _X7R _04
0. 01u_16V _X7R _04
O_H S A TA_T XP1
O_H S A TA_T XN 1
HDD Board
S4
S5 OC 13 0. 01u_16V _X7R _04 O_H S A TA_R XN 1
S6 OC 14 0. 01u_16V _X7R _04 O_H S A TA_R XP 1
S7
O_3. 3V S
P1
P2
P3 O C3 OC 5
P4
P5 * 0. 01u_50V _X7R _04 * 10u_10V _Y 5V _08
P6
P7 O _H D D _5VS
P8 O GN D O GN D
P9
P 10
P 11 OC 1
P 12 O C6 OC 8 OC 7 OC 9 OC 4
P 13 +
P 14 0. 1u_10 V_X5R _04 0. 1u_10V _X5R _04 0. 1u_10V _X5R _04 1u_6. 3V _X5R _04 * 10u_10V _Y 5V _08 220u_6. 3V _6. 3*6. 3* 4. 2
P 15
C 16664-12204-L
P IN G N D 1 ~ 2= G N D
O GN D
O GN D
6-21 -C2700 -122
OH 6 OH 4 OH 1 OH 2 OH 5 OH 3
2 9 2 9 H 6_5D 3_7 H 6_5D 3_7 C 67D 67 C 67D 67
3 8 3 8
4 1 7 4 1 7
5 6 5 6
H 6_5D 2_3 H 6_5 D 2_3
OG N D O GN D OG N D OGN D OGN D OGN D
W150HNM Second HDD Board B - 45
Schematic Diagrams
B5100 Click Board

CSW1~2
2 4
V15XX CLICK BOARD T 3. 3V T+5 VS
T +5 V S
C C1
0 . 1u _ 1 0V _ X 7 R _ 0 4
RIGHT
1 3
LIFT
KEY KEY
F CR 7
*3 2m i l _s h o rt C SW 2 CS W 1
T J _T P B 1 T GN D T J G-5 3 3-S -T / R TJ G -53 3 -S -T / R
TJ _ TP 1 1 2 1 2
1 T G TP _ C LK 3 4 C T P B U T T ON _ R 3 4 C TP B U T TO N _ L
2 T GT P _ D A T A 1 T GT P _ C L K
3 2 T GT P _ D A T A
4 3
5
6
5
6
T _3 . 3 V C TP B U T TO N _ L
5 4 C TP B U T TO N _ R
T C 16
6 T U S B _P N 1 0 5 C SW 4 CS W 3
7 TU S B _ P P 1 0 6
0 . 1 u _1 6 V _ Y 5 V _ 04 *T J G-5 3 3 -S -T / R *T JG - 5 33 -S - T / R
8 8 5 20 1 -0 60 5 1 1 2 1 2
9 3 4 3 4
10 TG N D
*3 2 m li _ s ho rt
5
6
5
6
8 5 20 1 -1 0 05 1 TG N D T R1 0 T E S D_ G ND T GN D T G ND
6-20-94A20-110
It is st ro ng ly rec ommend ed th at the TESD_ GND h as TG N D T GN D
a d ed ica ted co nn ect ion to th e sy ste m ch ass is o r

ca ble sh ield .
T 3 .3 V
TU 1
Sheet 45 of 49 TM OS I
TM I S O
TM C S
TM C L K
5
2
1
6
S
Q
C S#
VDD
8
SC K 3
B5100 Click Board TM I S O

T R1 2
T R1 1
*4 . 7 K _ 04
*4 . 7 K _ 04
T 3. 3 V W P#
T C2
0 . 1u _ 1 6V _ Y 5V _ 0 4
TJ _ FPB1
TM OS I T R2 4 . 7K _ 0 4 4 7
T R E G_ OU T 1 2 T R E F _ OS C VS S HO L D#
T B D RIV E 1 3 4 M9 5 12 8 W MN 6 TP
T B D RIV E 2 5 6 T GN D T GN D TG N D
7 8 TAVD D
T B E Z E L1 951206
T X IN 9 10 T B E Z E L2
T X OU T 11 12 TN R E S E T TR 4 4 7 K _ 04
13 14 T M IS O T 3. 3 V TB E Z E L 1
T M OS I 15 16 T U S B _ C ON N TC 4 1 u _ 6. 3 V _ Y 5 V _ 0 4 TU 2
T M CL K 17 18 T P D _R E G TB D R I V E 1 T R1 3 10 0 _ 1% _ 0 4 1
T M CS 19 20 3
T N RE S E T 21 22 T U S B_ PN_ R TR E F _ OS C T C 11 2 7 p _5 0 V _ N P O _0 4 TB D R I V E 2 T R1 4 10 0 _ 1% _ 0 4 2
T3 . 3 V T 3 .3 V 23 24 T U S B _ P P _R
TB E Z E L 2 R C L A M P 05 0 2 B
* CO N2 4 A T GN D
TG N D T GN D T C1 3
T E S D_ G ND
TP D _ R E G TR 9 3 3 0 K _0 4 1 8p _ 5 0V _ N P O_ 0 4
T 3. 3 V
Pla ce Bot to n T 3. 3 V T C 12 1 u _ 6. 3 V _ Y 5 V _ 0 4
T G ND
J_FP1
23 1 TC 5 T C1 4 T C1 5
T A V DD
1u _ 6 . 3V _ X 5 R _ 0 4 1 u_ 6 . 3 V _ X5 R _ 0 4 0 . 1 u _1 6 V _ Y 5 V _ 04
24 2 2 24 TR E G_ O U T T R6 2 . 2_ 1 % _0 6
TOP VIEW BOTTON VIEW T U S B _ P N _R T R8 2 7 . 4_ 1 % _0 4 T U S B _P N 1 0
TC 8 T C7 T C6
T GN D
1u _ 1 6V _ X 5 R _ 0 6 1 u _ 16 V _ X 5R _0 6 TC 10
0 . 1 u_ 1 6 V _ Y 5 V _ 04
1 6
TJ_FP1
B5100M ONLY T GN D T GN D
T GN D
47 p _5 0 V _ N P O _ 04
T U S B _ C ON N T R5 1 . 5 K _ 1% _ 0 4
T US B _ P P _ R T R7 2 7 . 4_ 1 % _0 4 TU S B _ P P 1 0
T XI N TR 3 4 7 0 _0 4 T XI N _ R
TC 9
T R1
T GN D 47 p _5 0 V _ N P O _ 04
1 M_ 0 4 2 1
T X OU T HSX531S+-20pp m
3 4 T GN D
T GN D
T X1
H S X 53 1 S _ 12 M H Z
T H1 TH 3 T H4 TH 2 T H5 TH 6
2 9 2 9 2 9 2 9 H 3 _ 0D 2_ 3 H 3 _0 D 2_ 3
3 8 3 8 3 8 3 8
4 1 7 4 1 7 4 1 7 4 1 7 TC 1 T C3
5 6 5 6 5 6 5 6
1 8 p _5 0 V _ N P O _0 4 1 8 p_ 5 0 V _N P O_ 0 4
M TH 6 _0 D 2_ 3 _ S MT H 6 _ 0D 2 _3 _ S MT H 6_ 0 D 2 _ 3_ S M T H 6 _0 D 2_ 3 _ S
T GN D T GN D
TG N D TG N D
T G ND T GN D T GN D T G ND T GN D
B - 46 B5100 Click Board
Schematic Diagrams
B5100 Fingerprint Board

V51XX FINGERPRINT BOARD FPJ T1
FPU 1 FR E G_OU T 1 2 FR EF _OS C

FB D R IV E1 3 4
B5 FU SB _ C ON N FB D R IV E2 5 6
US B_C ON N EC T 7 8 FAV D D
FBE ZEL1
B11 FBD R I VE 1 FXI N 9 10 FBE ZEL2
B D R IV E1 FXOU T 11 12
B10 FBD R I VE 2 13 14 FMI SO
B D R IV E2 FMOS I 15 16 FU SB _C ON N
A5 FBE ZE L1 FMC LK 17 18 FPD _R EG
B7 B EZ EL 1 A FMC S 19 20
NC 1 A7 The TESD_GND trace has to be w ide ( > 20mil) FN R E SET 21 22 FU SB _P N
B8 B EZ EL 1 B F 3. 3 V F3. 3 V 23 24 FU SB _P P
NC 2 C5 FBE ZE L2
The path be marked in RED
B9 B EZ EL 2 A
needs to be design to be short and at low im pedance. S PN Z- 24 S2 -VB-0 1 7-1 -R
NC 3 C7 FGN D FGN D
C2 B EZ EL 2 B
NC 4 A10 FR EG_ OU T
R EG_OU T
6-21-41710-212
C 10
A VD D FA VD D
A3
ES D_GN D 1 FGN D Sheet 46 of 49
C3
ES D_GN D 2
A1
FGN D
B5100 Fingerprint
D VD D 1 F3 . 3V
A11 Board
D VD D 2
C9
ES D_GN D 3 FGN D
A4 FPD _R E G
PD _R EG
MC S
MI SO
B2
C6
B4
FMC S
FMI SO
FMOSI
B5100M ONLY
MOSI
B3 FMC LK
MC L K
B1 FU SB _ PN
US B_ D N
C1 FU SB _ PP
U SB _ D P
A2 FN R ES ET FJ1
N R ES ET 1 23 23 1
C4
D GN D 1 FGN D
C 11 FR EF _ OSC 2 24 24 2
R EF _OSC
BOTTON VIEW TOP VIEW
A8
AGN D FGN D
B6 FXI N
ESD _GN D 4
XTA LI N
C8
D GN D 2 F GN D
A6 FXOU T
XTALOU T
TCS5BF
A9
F GN D
B5100 Fingerprint Board B - 47
Schematic Diagrams
B5130 LED & VGA SW Board

HDD LED BL _3 .3 VS
BT LED BL _3 .3 VS
BLJ _L ED1
BL _3 .3 VS BL_ LED _I GPU # 10

BL_ LED _D GPU # 9
BL_ VGA_ SW# 8
BL_ BT_ EN 7
BLR 1 BLR 7
BL_ SATA_ LED # 6
BLR 2
BL_ OPTIMUS_ MO DE 5
22 0_ 04 22 0_ 04
BL_ WL AN_ LED # 4
22 0_ 04
3
3
2
A
BLD 1 1
ad d WL AN _L ED #
BLD 2
R
HDD/CD-ROM C9 90 71 3
G
RY -SP1 95 UH YU YG 4 BLG ND 88 48 6- 10 01
RY -SP1 72 DBW 71 -5 M LED
4
8 pi n -> 10 p in a dd W LA N_ LE D#
C
C
Gr ee n
D02 CHANGE BL_ BT_ EN B BL_ WL AN_ LED # C9 90 71 3
C9 90 71 3
UPDATE VALUE
BLQ 1
DTC1 14 EUA
E
BL_ SATA_ LED #
BLG ND BL _3 .3 VS
Sheet 47 of 49
B5130 LED & VGA
S
G
SW Board BL _3 .3 VS BL _3 .3 VS
BLQ 2
BLR 5 AO3 40 9
D
BLR 3 BLR 4 22 0_ 04
BLR 6
22 0_ 04 22 0_ 04
47 0_ 04
A
3
IGPU LED
BLD 3 BLD 4 DGPU LED RE D BLD 5 Gr ee n
R
G
RY -SP1 70 UY G2 4- 5M
RY -SP1 70 UH Y2 4- 5M RY -SP1 95 UH YU YG 4
Green
Red
4
C
B5130M ONLY
C
BL_ LED _I GPU # BL_ LED _D GPU # BL_ OPTIMUS_ MO DE B
BLQ 3
DTC1 14 EUA BL_ SW1
E
TJ G- 53 3- S-T/R
1 2
3 4 BL_ VGA_ SW#
BLH 1 BLH 2 BLH 3 BLG ND
5
6
2 9 2 9 2 9 BLH 4 BLH 5
3 8 3 8 3 8 H4 _4 D2 _2 H4 _4 D2 _2
4 1 7 4 1 7 4 1 7
5 6 5 6 5 6
BLG ND
H6 _0 D2 _3 H6 _0 D2 _3 H6 _0 D2 _3
BLG ND BLG ND BLG ND BLG ND BLG ND BLG ND DU MM Y NE T

C9 90 71 3
B - 48 B5130 LED & VGA SW Board
Schematic Diagrams
B5100 Power Switch Board

V51XX POWER SWITCH BOARD
BH_3. 3VS
BVD D3 BH _3.3VS BJ_SW1

BR 1
BVDD 3 BVDD 3 BVD D3 BVDD 3 1
680_06 2
BPW R BTN #
P OWER 3
BD 4 BD 1 B D2 BD 3 BW EB#0 4
B UTTON 5
A BH _PI NA
C
C
*BAV99 *B AV99 *BAV99 *BAV99 BW EB#1 6
L ED BLID _SW# 7
8
AC BPW RBTN# AC BWEB #0 AC BW EB#1 AC BWEB #2 BW EB#2 9
10
BD 5 11
12
H T- 150BP
87151-1207G
A
A
M100126
BDG N D
C
BD GN D BD GN D B DGND BD GN D
Sheet 48 of 49
B DGND
B5100 Power
BSW2 Mute BSW 3 Wl an BSW 1 CCD BSW 4
POWER Switch Board
BOTTOM
4 1 4 1 4 1 4 1
3 2 B WEB#1 3 2 BW EB#0 3 2 BW EB#2 3 2 BPW RBTN#
TJ G- 533-S- T/ R TJ G-533-S-T/R TJG -533-S-T/R TJG-533- S-T/R

BD GN D PIN5,6=BDGND BD GND PIN5,6=BDGN D BDG N D PIN5,6=BDGND BDGN D PIN5,6=BDGND
BVD D3
LID SWITCH IC
1
BR2
BU1
VC C OUT
10K_04
2 BLID _SW #
B5100M ONLY
GN D
BC 7
MH- 248
3
0.1u_16V_Y5V_04 BV DD 3 BVDD 3 BVDD 3 BVD D3
BD GN D BDGND BC 6 BC 3 BC 5 BC4
*0. 1u_16V_Y 5V_04 *0. 1u_16V_Y 5V _04 *0.01u_50V_X7R _04 *0.01u_50V_X7R _04
BD GN D BD GN D BD GN D BD GND
BH 1 BH2 B H3 BH4 BH 5
2 9 2 9 2 9 H 4_4D 2_2 H4_4D 2_2
3 8 3 8 3 8
4 1 7 4 1 7 4 1 7
5 6 5 6 5 6
H6_0D 2_3 H6_0D 2_3 H 8_0D3_0
BD GND BD GND BD GN D BD GND BD GN D BD GN D BD GN D BD GN D
B5100 Power Switch Board B - 49

Schematic Diagrams System Block Diagram

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Schematic Diagrams System Block Diagram

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Schematic Diagrams

System Block Diagram

PCIE*8 AUDIO BOARD

Nvidia 800/1067/1333 MHz SECOND HDD/ODD BOARD

FDI DMI*4 6-71-B5102-D04

B5100 RJ-45 7IN1

W150HNM (Optional) 12 MHz

B - 2 System Block Diagram

Sandy Bridge Processor 1/7

PCI EXPRESS* - GRAPHICS

Sandy Bridge Processor 1/7 B - 3

Sandy Bridge Processor 2/7

S3 circuit:- DRAM PWR GOOD logic

JTAG & BPM

B - 4 Sandy Bridge Processor 2/7

Sandy Bridge Processor 3/7

DDR SYSTEM MEMORY B

M_A_DQ33 AG5 SA_DQ[32] SA_ODT

Sandy Bridge Processor 3/7 B - 5

Sandy Bridge Processor 4/7

AF26 VCC19 VCCIO18 F14 22u_6.3V_X5R_0

Sandy Bridge AC33 VCC32 VCCIO30 C13

Processor 4/7 V_X5R_08

AC27 VCC38 VCCIO36 A13 C224 C227 C228 C229

AA33 J23 1. 05VS_VCCP_F R129 *15

H_CPU_SVIDCLK R117 *54.9_1%_04

R27 VCC88 AJ35 R523

B - 6 Sandy Bridge Processor 4/7

Sandy Bridge Processor 5/7

Sandy Bridge Processor 5/7 ( GRAPHICS POWER )

DDR3 -1.5V RAILS

Sandy Bridge Processor 5/7 B - 7

Sandy Bridge Processor 6/7

Sandy Bridge Processor 6/7 ( GND )

to CPU AT3 VSS1 2 VSS92 AH32 P9 VSS170 VSS243 E9

PZ98827 -364B-0 1F PZ98 827-3 64B-01F

B - 8 Sandy Bridge Processor 6/7

Sandy Bridge Processor 7/7

Sandy Bridge Processor 7/7 ( RESERVED )

CF G2 1:(Default) Normal Operation; Lane # R6 4 2 *0 _ 0 4

0:Enabled; An external Display Port device is A N2 6 C F G[ 1 3 ] R S VD3 7 J 16 R6 4 3 *0 _ 0 4

PEG DEFER TRAINING P Z 98 8 2 7-3 6 4 B -01 F

1: (Default) PEG Train immediately following xxRESETB de assertion

Sandy Bridge Processor 7/7 B - 9

Panel, Inverter, CRT

PANEL CONNECTOR (LED+EDP) 3. 3 V S

B - 12 Panel, Inverter, CRT

VGA PCI-E Interface

100K _04 P EX_IO VDD Q

2 P EG _TX0 PE G_T X0 AP 17 AG 20 PE X_CA L_P U_G N D_N C 3V3 _RU N

2 P EG _TX#4 PE X_RX4 N C_17 AK1 5

16, 41 3V3 _RU N

VGA PCI-E Interface B - 13

VGA Frame Buffer Interface

2/ 16FBA 3/16 FBB

FB A_D 26 M32 FBA _D25 FB VDD Q J22 FBC _D 27 F14 FBB_D 26

Sheet 13 of 49 AD 30 FBA _D38 E32 FBB_D 39

VGA Frame Buffer

P 29 FBA _WC K0 FBB D

GT21x G F10x C1 35 C9 0 C 806 C 137 C 143

B - 14 VGA Frame Buffer Interface

VGA Frame Buffer A

Frame Buffer Partition A

56 0u_ 2. 5V _ 6. 66 . 65. 9

5 60u _2 .5 V _6. 6 6. 65 . 9

5 60u _2 . 5V _6. 6 6. 6 5. 9